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Floating-Point Software Emulation

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Applicable Environment

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Topic: Floating-Point Software Emulation
SDP: 6.4.1
Target: Any supported target

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Solution

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Can the libgcc functions such as addsf3 be optimized for ARM?

A good portion of the libgcc routines (such as addsf3 and many others) for ARM are already optimized in assembly code. You can find the implementation in gcc/config/arm/ieee754-sf.S and gcc/config/arm/ieee754-df.S.

http://community.qnx.com/sf/projects/toolchain

Why does disabling interrupts show faster results for floating point operations in a loop?

On ARM, the kernel emulates ClockCycles() and the algorithm relies on the timer interrupt. Disabling interrupts results in inaccurate measurements.

ClockCycles() on SH retrieves values from the TCNT1 and TCOR1 registers.

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NOTE: This entry has been validated against the SDP version listed above. Use caution when considering this advice for any other SDP version. For supported releases, please reach out to QNX Technical Support if you have any questions/concerns.

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