Artículos de Pablo
Actividad
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We're pleased to announce our participation in the FPGA World Conference 2024 in Stockholm September 10th and Copenhagen on September 12th. The…
We're pleased to announce our participation in the FPGA World Conference 2024 in Stockholm September 10th and Copenhagen on September 12th. The…
Recomendado por Pablo T.
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Register for this webinar with my colleague Apurva Peri on using SLVS-EC on PolarFire #fpga and #soc for helping you build #innovation on your next…
Register for this webinar with my colleague Apurva Peri on using SLVS-EC on PolarFire #fpga and #soc for helping you build #innovation on your next…
Recomendado por Pablo T.
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You might have noticed that I use a lot of MicroBlaze Processors in my FPGA developments. Understanding the impacts of optimisations on the…
You might have noticed that I use a lot of MicroBlaze Processors in my FPGA developments. Understanding the impacts of optimisations on the…
Recomendado por Pablo T.
Experiencia
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controlpaths.com
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Educación
Cursos
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Designing FPGAs Using the Vivado Design Suite 3
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Designing FPGAs Using the Vivado Design Suite 4
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Proyectos
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Design and implementation of a Closed-loop control for a DC motor in a FPGA Cyclone IV of ALTERA.
The project consist in design and inplement a PI control for DC motor in a Cyclone IV FPGA of ALTERA . The DC motor is powered by a H bridge controlled with a bipolar modulation that generates the FPGA .
Feedback signals are acquired through an external ADC converter that communicates with the FPGA by SPI bus.
For the control, double loop PI is used, designed with the aid of POWERSIM . The control is designed in continous time with MATLAB and then is discretized with Tustin method…The project consist in design and inplement a PI control for DC motor in a Cyclone IV FPGA of ALTERA . The DC motor is powered by a H bridge controlled with a bipolar modulation that generates the FPGA .
Feedback signals are acquired through an external ADC converter that communicates with the FPGA by SPI bus.
For the control, double loop PI is used, designed with the aid of POWERSIM . The control is designed in continous time with MATLAB and then is discretized with Tustin method.
All motor variables are visibles in one alphanumeric display managed by FPGA.
The language used for program FPGA is VHDL.
Idiomas
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Español
Competencia bilingüe o nativa
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Inglés
Competencia básica profesional
Más actividad de Pablo
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Artículo de Business Insider recogiendo la #investigación #ferroviaria que hicimos Gabriela_ G. y yo presentada en RootedCON y DEF CON donde explica…
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SDR Update: Our SDR featuring the AD9361 RF chip is now in our hands! Named LEOSDR, the ADI libraries porting work is almost done—We'll be sharing a…
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Altera's Agilex 5 is starting to show up in some #opensource projects. Of course the obligatory FuseSoC blinky project by Olof Kindgren is one of…
Altera's Agilex 5 is starting to show up in some #opensource projects. Of course the obligatory FuseSoC blinky project by Olof Kindgren is one of…
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📸 Day 1 at Automation Taipei was a success ✅ The Canonical team had an incredible time showcasing the latest innovations and connecting with…
📸 Day 1 at Automation Taipei was a success ✅ The Canonical team had an incredible time showcasing the latest innovations and connecting with…
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Hola!!! Terminamos la semana presentando ponencia doble para #AsturCONTech24! 🧑🏻💻 Ainoa Guillén Gonzalez 📄 Graduada en Criminología por la…
Hola!!! Terminamos la semana presentando ponencia doble para #AsturCONTech24! 🧑🏻💻 Ainoa Guillén Gonzalez 📄 Graduada en Criminología por la…
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Fridays are for demos! I did the Google Dino game a while ago using image processing on a Zynq MPSoC to jump. This time I did it old school a LDR…
Fridays are for demos! I did the Google Dino game a while ago using image processing on a Zynq MPSoC to jump. This time I did it old school a LDR…
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Please join me in celebrating Rick Lyons' participation as a speaker at the upcoming 2024 DSP Online Conference. Rick, the brilliant mind behind the…
Please join me in celebrating Rick Lyons' participation as a speaker at the upcoming 2024 DSP Online Conference. Rick, the brilliant mind behind the…
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Design once with a trusted supplier! AMD has announced extended lifecycles for #7Series (2040) and #UltraScale+ (2045). #Versal also announced to…
Design once with a trusted supplier! AMD has announced extended lifecycles for #7Series (2040) and #UltraScale+ (2045). #Versal also announced to…
Recomendado por Pablo T.
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Not everything we do is FPGA, I am just writing an article on embedded Linux and AI / ML. I am going to use the TDA4VM with the model developed in…
Not everything we do is FPGA, I am just writing an article on embedded Linux and AI / ML. I am going to use the TDA4VM with the model developed in…
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FOSSi Foundation was recently invited to support the GoIT project in the effort to draft an Open Source EDA roadmap for Europe. As a next milestone,…
FOSSi Foundation was recently invited to support the GoIT project in the effort to draft an Open Source EDA roadmap for Europe. As a next milestone,…
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Exciting news for tech enthusiasts! The first-ever Development Board for evaluating PCIe lanes of both PS and PL of AMD Kria K26 SOM is on the…
Exciting news for tech enthusiasts! The first-ever Development Board for evaluating PCIe lanes of both PS and PL of AMD Kria K26 SOM is on the…
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