‘ Dr. Ostadzadeh started his teaching career with us in 2002 at IAUM. We undergraduate students were so lucky to have him as a teacher who not only brought with himself a solid training in pedagogical methods for C language but also he taught us the real C++ object oriented programming, along with great energy and enthusiasm. He actually was the very first one who introduced several new computer courses to us , including distributed systems that I learned how distributed systems work in an independent way by improving time performance thanks to highly paralleled procedures, multi-scale data-sets/structures/trees, and totally the way to think object orientedly and implement any program in C++. He brought exciting new ideas to my professional life and thanks to him, I could become a programmer who actually knows how to efficiently use classes and objects in computer vision in order to speed up advanced driving assistance systems (ADAS). He was the most charismatic and creative teacher of mine during my bachelor studies, and he always thought outside the box. He also showed excellent classroom management skills to us as his students and I always felt so lucky to have his academic support for pursuing my studies even after my graduation. As one of the students of Dr. Ostadzadeh mentored by him and attended his valuable classes, I assure that he has my highest recommendation for position of a computer science professor and I believe he is highly skilled at it. I wish I could be his student once again to learn even more. ’
S. Arash Ostadzadeh
Eindhoven, Noord-Brabant, Nederland
1K volgers
Meer dan 500 connecties
Info
My research interests include parallel and distributed computing, application profiling, software analysis/performance evaluation, HW/SW co-design, machine learning, knowledge representation and reasoning.
Ervaring
Opleiding
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Graduated as the top student in the department of Computer Engineering. Majored in Software Engineering. Thesis titled "The Design and Implementation of an Offline Handwritten Signature Verification System Using Local Correspondence".
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Majored in Software Engineering. Thesis titled "A System for Timetable Scheduling of University Curriculum: Design and Implementation".
Licenties en certificaten
Patenten
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Systems and methods for reconstructing a trajectory from anonymized data
Toegekend US-11537924-B2
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Method, apparatus and computer program product for determining a semantic privacy index
Toegekend US-11397818-B2
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Quantification of privacy risk in location trajectories
Toegekend US-11042648-B2
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Data augmentation with on demand entity matching
Ingediend op US-20220300570-A1
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Method, apparatus, and system for identifying transportation transition regions from probe data
Ingediend op US-20210285777-A1
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Systems and methods for reconstructing a trajectory from anonymized data
Ingediend op US-20210269057-A1
Projecten
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USoft Platform
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USoft aims at manufacturing business software quickly and comfortably, yet with a high level of maintainability. This is achieved by mobilizing a rules engine which governs business data quality and delivers it to service buses, client interfaces and batch processes. With USoft, it is possible to quickly convert business models and rules into a functioning application. Special attention is given to specification formats that business people find easy to understand: natural language, simple…
USoft aims at manufacturing business software quickly and comfortably, yet with a high level of maintainability. This is achieved by mobilizing a rules engine which governs business data quality and delivers it to service buses, client interfaces and batch processes. With USoft, it is possible to quickly convert business models and rules into a functioning application. Special attention is given to specification formats that business people find easy to understand: natural language, simple diagrams, and working prototypes. The platform is highly compatible with short-cycled, agile development modes. It complements project development methods like Scrum by providing much-needed traceability and maintainability of the deliverables.
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QUAD
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QUAD (Quantitative Usage Analysis of Data) is an open source project consisting of several tools that provide a comprehensive overview of the memory access behavior of an application. The primary goal is the detection of the actual data dependencies at the function-level.
Andere bijdragersProject weergeven -
iFEST (industrial Framework for Embedded Systems Tools)
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The iFEST project aims at specifying and developing a tool integration framework for HW/SW co-design of heterogeneous and multicore embedded systems. Such a framework will allow engineers to combine tools into coherent, well-functioning toolchains. In addition, the integration framework permits tools to be readily replaced within the toolchain; thus dealing with issues such as tool obsolescence and tool lock-in.
The main contribution of iFEST lies in the definition and implementation of…The iFEST project aims at specifying and developing a tool integration framework for HW/SW co-design of heterogeneous and multicore embedded systems. Such a framework will allow engineers to combine tools into coherent, well-functioning toolchains. In addition, the integration framework permits tools to be readily replaced within the toolchain; thus dealing with issues such as tool obsolescence and tool lock-in.
The main contribution of iFEST lies in the definition and implementation of models and meta-models both for the targeted application domains and for existing tools. Supported by the iFEST framework, these models and meta-models allow different toolchains to be derived. Meta-modelling approaches are used to automatically implement necessary toolchain interfaces which provide the sought for interoperability of tools.
The integration framework and toolchains will be validated by industrial case studies concerning control and data streaming applications. -
SMECY (Smart Multicore Embedded Systems)
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Being part of ARTEMIS (Advanced Research & Technology for EMbedded Intelligence and Systems), the SMECY project envisioned developing programming and design methods, multicore architectural solutions and associated supporting tools to enable the exploitation of multi-/many-core architectures.
In order to master complete system design of future smart multicore embedded systems, new programmable architectural solutions along with associated supporting tools were developed. All of this was…Being part of ARTEMIS (Advanced Research & Technology for EMbedded Intelligence and Systems), the SMECY project envisioned developing programming and design methods, multicore architectural solutions and associated supporting tools to enable the exploitation of multi-/many-core architectures.
In order to master complete system design of future smart multicore embedded systems, new programmable architectural solutions along with associated supporting tools were developed. All of this was strongly driven by the requirements and constraints of different application areas as well as the target platform.
The hardware platforms and the development tools were evaluated for a set of representative applications provided by industrial partners of SMECY, such as radar systems, video/audio treatments and energy efficient wireless communication systems. -
DReAMSim
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DReAMSim (Dynamic Re-configurable Autonomous Many-task Simulator) is an open source project that provides a simple simulation framework for modeling homogeneous and/or heterogeneous (re)-configurable processing elements in a large-scale distributed environment. In particular, DReAMSim enables users to model task scheduling techniques at a preliminary design stage in order to investigate their performance potential.
The simulation framework makes it easy to extract various performance and…DReAMSim (Dynamic Re-configurable Autonomous Many-task Simulator) is an open source project that provides a simple simulation framework for modeling homogeneous and/or heterogeneous (re)-configurable processing elements in a large-scale distributed environment. In particular, DReAMSim enables users to model task scheduling techniques at a preliminary design stage in order to investigate their performance potential.
The simulation framework makes it easy to extract various performance and resource utilization related statistics to study the behavior of different task scheduling techniques.
DReAMSim has been intentionally developed with a very simple-to-use interface to allow novice programmers implement their own resource management techniques without being bothered with all the hassles of a full-fledged commercial simulator, yet it has the main features required for defining (re)-configurable processing elements in a distributed environment.Andere bijdragersProject weergeven -
hArtes (holistic Approach to reconfigurable real-time embedded systems)
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hArtes was a European Union funded project in the sixth FrameWork Programme of Information Society Technologies (EU-IST FWP6), which aimed to lay the foundation for a new holistic (end-to-end) approach for complex real-time embedded system design, with the latest algorithm exploration tools and reconfigurable hardware technologies.
In summary, the objective of hArtes was to simplify the development of embedded products based on heterogeneous reconfigurable embedded platforms. This was…hArtes was a European Union funded project in the sixth FrameWork Programme of Information Society Technologies (EU-IST FWP6), which aimed to lay the foundation for a new holistic (end-to-end) approach for complex real-time embedded system design, with the latest algorithm exploration tools and reconfigurable hardware technologies.
In summary, the objective of hArtes was to simplify the development of embedded products based on heterogeneous reconfigurable embedded platforms. This was achieved by 1) developing a toolchain and a methodology to deal with the different challenges of effective embedded system designs, 2) designing a scalable heterogeneous and reconfigurable hardware platform that can be re-targeted to produce optimized real-time embedded systems.
As the outcome of the project, the innovations of the hArtes toolchain included: 1) a framework that allows implementing novel algorithms for design space exploration, supports design partitioning automation, task transformation, choice of data representation, and metric evaluation for hardware and software components, 2) a system synthesis tool producing near-optimal implementations that best exploits the capability of each type of processing element; dynamic hardware reconfigurability can be exploited to support system upgrade or adaptation to operating conditions, 3) diagrammatic and textual formats in algorithm description and exploration.
Talen
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English
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