Ankita Anshu

Ankita Anshu

Franchise Sales Manager

Tring, England, United Kingdom
5K followers 500+ connections

Activity

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Experience

  • Antal International Graphic

    Franchise Sales Manager

    Antal International

    - Present 5 months

    London Area, United Kingdom

    Franchise Sales Manager (Global) at Antal International UK 🌍
    Leading franchise sales initiatives on a global scale for Antal International UK, a renowned recruitment and talent solutions firm. Driving business growth through strategic franchise partnerships and innovative sales strategies.

  • Antal International Graphic

    Franchise Sales Manager

    Antal International

    - 8 months

    Mumbai, Maharashtra, India

  • Expertrons Graphic

    Senior Manager Account Management

    Expertrons

    - 2 years 10 months

    Mumbai, Maharashtra, India

  • SMEC Automation Graphic

    VLSI Engineer

    SMEC Automation

    - 2 years 6 months

    Mumbai, Maharashtra, India

  • CADD Centre Training Services Pvt Ltd. Graphic

    VLSI Trainer

    CADD Centre Training Services Pvt Ltd.

    - 11 months

    Mumbai, Maharashtra, India

  • VLSI Engineer

    Fronyn Technologies

    - 1 year 4 months

    Hyderabad Area, India

    VLSI Engineer

  • Netmax technologies pvt ltd Graphic

    Embedded Engineer Trainee

    Netmax technologies pvt ltd

    - 5 months

    Chandigarh Area, India

Education

Licenses & Certifications

Publications

  • HIGH PERFORMANCE AND AREA DELAY EFFICIENT INTERPOLATION FILTER ARCHITECTURE

    International Journal & Magazine of Engineering, Technology, Management and Research

    Finite Impulse Response (FIR) filters area unit wide applied in multi-standard wireless communications. These filters supply linear section and absolute stability.
    The FIR offers a low sensitivity for the constant quantization errors. These properties increase the usage of FIR filter. Throughout this paper, reconfigurable interpolation filter architecture is projected. The approach is compatible if the filter order is mounted. The filter is self-propellingly reconfigured by dynamical the…

    Finite Impulse Response (FIR) filters area unit wide applied in multi-standard wireless communications. These filters supply linear section and absolute stability.
    The FIR offers a low sensitivity for the constant quantization errors. These properties increase the usage of FIR filter. Throughout this paper, reconfigurable interpolation filter architecture is projected. The approach is compatible if the filter order is mounted. The filter is self-propellingly reconfigured by dynamical the filter order.
    The order is changed by turning of the multiplier whose inputs area unit mitigates to be eliminated. The complexity of linear section FIR filters is dominated by the amount of adders (sub-tractors) among the constant number. The conventional multiplier is replaced by Dadda multiplier which reduces delay and dynamically reconfigurable filters are going to be efficiently enforced.

    See publication

Courses

  • Embeded system

    NEMB281220124W862195

Projects

  • SPI Controller

  • Traffic light control coding

  • UART Interface with Spartan 6 FPGA

    -

  • Design and FPGA Prototyping for I2C based RTC

    -

  • HIGH PERFORMANCE AND AREA DELAY EFFICIENT INTERPOLATION FILTER ARCHITECTURE

    -

    Finite Impulse Response (FIR) filters area unit wide applied in multi-standard wireless communications. These filters supply linear section and absolute stability.
    The FIR offers a low sensitivity for the constant quantization errors. These properties increase the usage of FIR filter. Throughout this paper, reconfigurable interpolation filter architecture is projected. The approach is compatible if the filter order is mounted. The filter is self-propellingly reconfigured by dynamical the…

    Finite Impulse Response (FIR) filters area unit wide applied in multi-standard wireless communications. These filters supply linear section and absolute stability.
    The FIR offers a low sensitivity for the constant quantization errors. These properties increase the usage of FIR filter. Throughout this paper, reconfigurable interpolation filter architecture is projected. The approach is compatible if the filter order is mounted. The filter is self-propellingly reconfigured by dynamical the filter order.
    The order is changed by turning of the multiplier whose inputs area unit mitigates to be eliminated. The complexity of linear section FIR filters is dominated by the amount of adders (sub-tractors) among the constant number. The conventional multiplier is replaced by Dadda multiplier which reduces delay and dynamically reconfigurable filters are going to be efficiently enforced.

  • ARDUINO KIT

    -

Honors & Awards

  • First Class with Distinction

    Jawaharlal Nehru Technical University, Hyderabad

  • Gold Medalist

    CMR Institute of Technology, Hyderabad, India

    Academic Topper

  • Second Rank

    Lord Krishna College of Engineering

Test Scores

  • M-Tech

    Score: 83 / 100

  • B-Tech

    Score: 79.82 / 100

Languages

  • English

    -

  • Hindi

    -

  • bhojpuri

    -

  • punjabi

    -

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