“I enjoyed working with Allen very much in 2019. He worked as the right channel for the R&D collaboration between the business division and the research, making the complicated requirements digestible by the research team. With consistency and steadiness, he kept all related people staying on track even under technical conflicts or cultural conflicts. I wish him a brighter future and also hope to co-work again. ”
About
Summary:
As a visionary and technically astute 360 product leader, I thrive on the…
Activity
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I'm hiring for several SWE positions (IC5-IC6) in Menlo Park! Great opportunities to lead some high impact initiatives in the Ads Measurement area…
I'm hiring for several SWE positions (IC5-IC6) in Menlo Park! Great opportunities to lead some high impact initiatives in the Ads Measurement area…
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Meta's advertising business depends upon very large and sophisticated ML models which make millions of predictions per second in real-time. My team…
Meta's advertising business depends upon very large and sophisticated ML models which make millions of predictions per second in real-time. My team…
Liked by Allen Cheng, Ph.D.
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The news of Arvind’s passing has hit us hard. The kindest of souls has passed on. These words must rise through a dense layer of sadness to celebrate…
The news of Arvind’s passing has hit us hard. The kindest of souls has passed on. These words must rise through a dense layer of sadness to celebrate…
Liked by Allen Cheng, Ph.D.
Experience
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Education
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University of Michigan
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Doctoral Researcher, Department of EECS
• Pioneered a new class of low-power high-performance reconfigurable microprocessor architecture featuring application-specific instruction encoding and hardware accelerator synthesis methods powered by compiler-directed data flow analysis
• Developed a fast cycle-accurate power-performance register-transfer level (RTL) simulator in C/C++ and Verilog
Lecturer, College of Engineering
• Taught C/C++/Matlab and analytical problem solving to…Doctoral Researcher, Department of EECS
• Pioneered a new class of low-power high-performance reconfigurable microprocessor architecture featuring application-specific instruction encoding and hardware accelerator synthesis methods powered by compiler-directed data flow analysis
• Developed a fast cycle-accurate power-performance register-transfer level (RTL) simulator in C/C++ and Verilog
Lecturer, College of Engineering
• Taught C/C++/Matlab and analytical problem solving to 200+ engineering students -
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• Supervised Learning: neural networks, support vector machines (SVM), kernels, logistic and linear regression modeling, parametric/non-parametric algorithms
• Unsupervised Learning: recommender systems, deep learning, clustering, dimensionality reduction
• Best Practices: bias/variance theory, innovation process in machine learning and AI
• Hands-on ML Implementation: collaborative filtering movie recommendations; neural network based optical character recognition (OCR); SVM based…• Supervised Learning: neural networks, support vector machines (SVM), kernels, logistic and linear regression modeling, parametric/non-parametric algorithms
• Unsupervised Learning: recommender systems, deep learning, clustering, dimensionality reduction
• Best Practices: bias/variance theory, innovation process in machine learning and AI
• Hands-on ML Implementation: collaborative filtering movie recommendations; neural network based optical character recognition (OCR); SVM based spam classifier; compressing face image data set using K-means clustering and principal component analysis (PCA); detecting anomalous data center server nodes via Gaussian density estimation and F1 score; modeling university admissions by logistic regression; modeling truck fleet operation profits via linear regression
• Certificate: https://www.coursera.org/account/accomplishments/certificate/NSCNQXYQEQAQ
Publications
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Machine learning on-a-chip: A high-performance low-power reusable neuron architecture for artificial neural networks in ECG classifications
Computers in Biology and Medicine (CBM)
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A self-healing autonomous neural network hardware for trustworthy biomedical systems
International Conference on Field-Programmable Technology (FPT)
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SubsetTrio: An evolutionary, geometric, and statistical benchmark subsetting framework
ACM Transactions on Modeling and Computer Simulation (TOMACS)
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Programmable Neural Processing on a Smartdust for Brain-Computer Interfaces
IEEE Transactions on Biomedical Circuits and Systems (IEEE BioCAS)
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A Wearable Smartphone-based Platform for Real-Time Cardiovascular Disease Detection via Electrocardiogram Processing
IEEE Transactions on Information Technology in Biomedicine (IEEE TITB)
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Transplanting a Resting ECG Machine to a Cell Phone for Real-Time ECG Acquisition, Feature Extraction, and Statistical Cardiac Summary Reports
In Proceedings of the 2009 Biomedical Engineering Society Annual Scientific Meeting
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Predicting Cardiovascular Disease from Real-Time Electrocardiographic Monitoring: An Adaptive Machine Learning Approach on a Cell Phone
International Conference of the IEEE Engineering in Medicine and Biology Society (IEEE EMBC)
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A Programmable Implementation of Neural Signal Processing on a Smartdust for Brain-Computer Interfaces
IEEE International Symposium on Low Power Electronics and Design (IEEE ISLPED)
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Programmable Neural Processing on a Smartdust
ACM/IEEE Design Automation Conference (ACM/IEEE DAC)
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Predicting End-Point Locomotion from Neuromuscular Activities of People with Spina Bifida: A Self-Organizing and Adaptive Technique for Future Implantable and Non-invasive Neural Prostheses
International Conference of the IEEE Engineering in Medicine and Biology Society (IEEE EMBC)
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Improve Simulation Efficiency Using Statistical Benchmark Subsetting – An ImplantBench Case Study
ACM/IEEE Design Automation Conference (ACM/IEEE DAC)
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Amplifying Embedded System Efficiency via Automatic Instruction Fusion on a Post-Manufacturing Reconfigurable Architecture Platform
IEEE International Symposium on Quality Electronic Design (IEEE ISQED)
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Accelerating Embedded Multimedia Applications with Versatile and Reconfigurable Instruction Fusion
IEEE International Symposium on Multimedia (IEEE ISM)
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Toward Ubiquitous Biomedical Implantable Computing Chips - An Energy-Efficient Low-Power Architecture
IEEE International Symposium on Low-Power and High-Speed Chips (IEEE COOL Chips)
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High-Quality ISA Synthesis for Low-Power Cache Designs in Embedded Microprocessors
IBM Journal of Research & Development (IBM JRD)
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An Energy Efficient Instruction Set Synthesis Framework for Low Power Embedded System Designs
IEEE Transactions on Computers (IEEE TC)
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PowerFITS: Reduce Dynamic and Static I-Cache Power Using Application Specific Instruction Set Synthesis
IEEE International Symposium on Performance Analysis of Systems and Software (IEEE ISPASS)
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FITS: Framework-based Instruction-set Tuning Synthesis for Embedded Application Specific Processors
ACM/IEEE Design Automation Conference (ACM/IEEE DAC)
Patents
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METHOD FOR COMMUNICATING DATA AND ELECTRONIC DEVICE THEREOF
Issued KR KR102202647
The method for performing according to a preferred embodiment of the present invention, the wearable apparatus and the various communication, and the apparatus or the system can be provided. The system according to one embodiment comprises at least one data source, the collector which is configured to receive data from at least one data source, and the access point and the wearable apparatus which is configured to communicate with the access point it receives the information from the collector…
The method for performing according to a preferred embodiment of the present invention, the wearable apparatus and the various communication, and the apparatus or the system can be provided. The system according to one embodiment comprises at least one data source, the collector which is configured to receive data from at least one data source, and the access point and the wearable apparatus which is configured to communicate with the access point it receives the information from the collector which is configured to communicate, and the access point which is configured to communicate with the collector or the wearable apparatus and the collector which communicates with the access point. It does not limit to the above-described method and the dissimilar embodiment is possible in the identity of the invention or the range that is similar.
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Method and system for automatically creating an instant ad-hoc calendar event
Filed CH WO2019088734
An electronic device, method, and non-transitory computer readable medium are provided for automatically creating an ad-hoc calendar event. The electronic device includes a memory and a processor coupled to the memory. The processor receives data including user information, venue information, and location information from a plurality of data sources; determines an interest above a predetermined threshold based on the received data; creates an event based on the determined interest and received…
An electronic device, method, and non-transitory computer readable medium are provided for automatically creating an ad-hoc calendar event. The electronic device includes a memory and a processor coupled to the memory. The processor receives data including user information, venue information, and location information from a plurality of data sources; determines an interest above a predetermined threshold based on the received data; creates an event based on the determined interest and received data; and provides a recommendation of the created event to another electronic device.
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Method and system for automatically creating an instant ad-hoc calendar event
Filed EU EP3669536
An electronic device, method, and non-transitory computer readable medium are provided for automatically creating an ad-hoc calendar event. The electronic device includes a memory and a processor coupled to the memory. The processor receives data including user information, venue information, and location information from a plurality of data sources; determines an interest above a predetermined threshold based on the received data; creates an event based on the determined interest and received…
An electronic device, method, and non-transitory computer readable medium are provided for automatically creating an ad-hoc calendar event. The electronic device includes a memory and a processor coupled to the memory. The processor receives data including user information, venue information, and location information from a plurality of data sources; determines an interest above a predetermined threshold based on the received data; creates an event based on the determined interest and received data; and provides a recommendation of the created event to another electronic device.
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Method and system for automatically creating instant AD-HOC calendar events
Filed CN CN111247782
An electronic device, method, and non-transitory computer readable medium are provided for automatically creating an ad-hoc calendar event. The electronic device includes a memory and a processor coupled to the memory. The processor receives data including user information, venue information, and location information from a plurality of data sources; determines an interest above a predetermined threshold based on the received data; creates an event based on the determined interest and received…
An electronic device, method, and non-transitory computer readable medium are provided for automatically creating an ad-hoc calendar event. The electronic device includes a memory and a processor coupled to the memory. The processor receives data including user information, venue information, and location information from a plurality of data sources; determines an interest above a predetermined threshold based on the received data; creates an event based on the determined interest and received data; and provides a recommendation of the created event to another electronic device.
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Apparatus, method, and system for low power wearable wireless devices
Issued EU EP2838295
A system, apparatus, and method for communicating with a wearable wireless device are provided. The system includes at least one data source, an aggregator configured to receive data from the at least one data source, and to communicate with an access point, the access point configured to communicate with the aggregator and to communicate with a wearable wireless device, and the wearable wireless device configured to communicate with the access point so as to receive information from the…
A system, apparatus, and method for communicating with a wearable wireless device are provided. The system includes at least one data source, an aggregator configured to receive data from the at least one data source, and to communicate with an access point, the access point configured to communicate with the aggregator and to communicate with a wearable wireless device, and the wearable wireless device configured to communicate with the access point so as to receive information from the aggregator through the access point.
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METHOD AND SYSTEM FOR AUTOMATICALLY CREATING AN INSTANT AD-HOC CALENDAR EVENT
Filed US US20190130364
An electronic device, method, and non-transitory computer readable medium are provided for automatically creating an ad-hoc calendar event. The electronic device includes a memory and a processor coupled to the memory. The processor receives data including user information, venue information, and location information from a plurality of data sources; determines an interest above a predetermined threshold based on the received data; creates an event based on the determined interest and received…
An electronic device, method, and non-transitory computer readable medium are provided for automatically creating an ad-hoc calendar event. The electronic device includes a memory and a processor coupled to the memory. The processor receives data including user information, venue information, and location information from a plurality of data sources; determines an interest above a predetermined threshold based on the received data; creates an event based on the determined interest and received data; and provides a recommendation of the created event to another electronic device.
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APPARATUS, METHOD, AND SYSTEM FOR LOW POWER WEARABLE WIRELESS DEVICES
Issued US US9485729
A system, apparatus, and method for communicating with a wearable wireless device are provided. The system includes at least one data source, an aggregator configured to receive data from the at least one data source, and to communicate with an access point, the access point configured to communicate with the aggregator and to communicate with a wearable wireless device, and the wearable wireless device configured to communicate with the access point so as to receive information from the…
A system, apparatus, and method for communicating with a wearable wireless device are provided. The system includes at least one data source, an aggregator configured to receive data from the at least one data source, and to communicate with an access point, the access point configured to communicate with the aggregator and to communicate with a wearable wireless device, and the wearable wireless device configured to communicate with the access point so as to receive information from the aggregator through the access point.
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Projects
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Exploring Artificial Neural Networks to Develop Self-Adaptive Threat Detection Techniques for Bio-Implantable System-on-Chip (#NSF)
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The objective of this exploratory research is to develop a cyber-enabled autonomic threat-management system aimed at transforming today's vulnerable bio-implants into resilient bio-implantable systems-on-chip. The goal is to realize next-generation bio-implantable systems that are capable of dynamic reconfiguration to react to unexpected threats in the complex and unpredictable human body. The research explores how to model unexpected threats and how a bio-implant knows that there is a threat…
The objective of this exploratory research is to develop a cyber-enabled autonomic threat-management system aimed at transforming today's vulnerable bio-implants into resilient bio-implantable systems-on-chip. The goal is to realize next-generation bio-implantable systems that are capable of dynamic reconfiguration to react to unexpected threats in the complex and unpredictable human body. The research explores how to model unexpected threats and how a bio-implant knows that there is a threat. To this end, the research focuses on threat modeling and injection schemes using statistical and probabilistic approaches and self-adaptive threat detection schemes using biologically-inspired artificial neural network techniques.
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Monitoring Cardiovascular Diseases (CVD) on a Mobile Phone (#Microsoft Research)
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Developed the concept, design, and initial research prototypes for a smartphone-based mobile computing, communication, and sensing platform continuously monitoring electrocardiogram (ECG) patterns associated with cardiovascular diseases (CVD) (e.g. heart attacks, arrhythmia) and alert the user and emergency contacts for any abnormal conditions in real time. Built and led a multi-talented team of PhD/MS student researchers to develop machine learning algorithmic framework combining artificial…
Developed the concept, design, and initial research prototypes for a smartphone-based mobile computing, communication, and sensing platform continuously monitoring electrocardiogram (ECG) patterns associated with cardiovascular diseases (CVD) (e.g. heart attacks, arrhythmia) and alert the user and emergency contacts for any abnormal conditions in real time. Built and led a multi-talented team of PhD/MS student researchers to develop machine learning algorithmic framework combining artificial neural networks (ANN) and pattern-matching methods suitable for resource-constrained battery-powered mobile environment. Developed a 45nm 500MHz ANN ASIC accelerator/co-processor demonstrating 5000x speedup and 4000x energy efficiency compared to a 200MHz ARM microprocessor.
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Static Pipelining, an Approach for Ultra-Low Power Embedded Processors (#NSF)
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As mobile embedded systems become more prevalent, there is an increasing demand to make processor pipelines more power efficient. Conventional pipeline inefficiencies include unnecessary accesses to the register file due to duplication or avoidable computation from constantly checking for forwarding and hazards at points where they cannot possibly occur, repeated calculation of invariant values, etc. It is desirable to develop an alternative processor design that can avoid these wasteful energy…
As mobile embedded systems become more prevalent, there is an increasing demand to make processor pipelines more power efficient. Conventional pipeline inefficiencies include unnecessary accesses to the register file due to duplication or avoidable computation from constantly checking for forwarding and hazards at points where they cannot possibly occur, repeated calculation of invariant values, etc. It is desirable to develop an alternative processor design that can avoid these wasteful energy consumption aspects of a traditionally pipelined processor while still achieving comparable performance.
A statically pipelined processor is expected to achieve these goals by having the control during each cycle for each portion of the processor explicitly represented in each instruction. The pipelining is in effect statically determined by the compiler, which has several potential benefits, such as reducing energy consumption without degrading performance, supporting a less complex design with a lower production cost, and being able to apply more effective compiler optimizations due to instructions having more explicit control of the processor.Other creators -
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Low Power Computer Architecture and Power/Performance Modeling (#DARPA, #NSF)
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Developed several computer architecture and microarchitecture techniques (e.g. reconfigurable instruction fetch/decode, chained arithmetic logic operations, zero-overhead loop execution) targeted for low power mobile and SOC devices. Built pipelined CPU processors and custom accelerators in RTL (Verilog) to model power and performance. Performed compiler directed data flow analysis and cycle-level CPU simulation in C/C++ using full benchmark suites (e.g. SPEC, MediaBench). Built Perl-based…
Developed several computer architecture and microarchitecture techniques (e.g. reconfigurable instruction fetch/decode, chained arithmetic logic operations, zero-overhead loop execution) targeted for low power mobile and SOC devices. Built pipelined CPU processors and custom accelerators in RTL (Verilog) to model power and performance. Performed compiler directed data flow analysis and cycle-level CPU simulation in C/C++ using full benchmark suites (e.g. SPEC, MediaBench). Built Perl-based profiler to parse and aggregate simulation results. Proposed efficient system simulation framework to significantly reduce simulation turnaround times. Modeled and characterized emerging biomedical workloads. Developed programmable neural processing workflow and optimized its power/performance on a dynamic voltage and frequency scaling (DVFS)-capable ARM-based SOC board.
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Honors & Awards
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Microsoft Research Faculty Award – Cell Phone as a Platform for Healthcare
Microsoft Research
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University of Michigan Rackham Graduate School Research Fellowship
University of Michigan
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US Department of Education GAANN Fellowship
US Department of Education
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National Science Foundation MGE Research Fellowship
National Science Foundation
Languages
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English
Native or bilingual proficiency
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Chinese
Native or bilingual proficiency
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Japanese
Limited working proficiency
Recommendations received
4 people have recommended Allen
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