Niranjan B Eshappa

Niranjan B Eshappa

San Jose, California, United States
711 followers 500+ connections

About

- Experience in System level HW validation and Post Silicon validation.
- Proficient…

Activity

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Experience

  • Google Graphic

    Google

    Mountain View, California, United States

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    San Francisco Bay Area

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    San Francisco Bay Area

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    San Francisco Bay Area

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    Bangaon Area, India

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    Bengaluru Area, India

Education

  • New Mexico State University Graphic

    New Mexico State University

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    • Charge Pump based DC-DC converter to drive a white LED for portable applications.
    • Power Management System with an inductor Based Buck and a Boost DC-DC converter (180nm)
    • Designed and Implemented Short Channel & Long Channel Bandgap Voltage Reference.
    • Designed and Implemented Beta Multiplier Voltage Reference.
    • Paper Study: High Power Gain Low Noise Amplifier Design for Next Generation 1-7GHz Wideband RF frontend, RFIC using 0.18μm CMOS.
    • Designed and…

    • Charge Pump based DC-DC converter to drive a white LED for portable applications.
    • Power Management System with an inductor Based Buck and a Boost DC-DC converter (180nm)
    • Designed and Implemented Short Channel & Long Channel Bandgap Voltage Reference.
    • Designed and Implemented Beta Multiplier Voltage Reference.
    • Paper Study: High Power Gain Low Noise Amplifier Design for Next Generation 1-7GHz Wideband RF frontend, RFIC using 0.18μm CMOS.
    • Designed and Implemented a LDO for Drop out voltage of 80mV.

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    1. “Symmetric Cryptography and Haar DWT Watermarking
    Techniques to perform Digital Image Steganography.”
    2. “Dual Tone Multi Frequency Based robot for performing Home
    Automation.”

Publications

Courses

  • A/D & D/A Converters

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  • ASIC Design

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  • Analog VLSI

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  • Control System Synthesis

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  • Digital VLSI

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  • Power Management in Integrated Circuits

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  • RF Microelectronics

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  • Random Signal Analysis

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  • Work Teams in Organization

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Projects

  • Design of 6-Bit D/A using a Fully Differential Operational Amplifier

    - Designed and implemented a 6 bit Digital to Analog Converter using R-2R ladder technique.
    - Fully Differential Operational Amplifier was designed for GBW of 10MHz and a Bias current of 30uA.
    - The unit resistor was 10KOhm and 1 LSB was equal to 30-35mV.
    - The settling time of the converter was equal to 139ns.

  • Charge Pump based DC-DC converter to drive a white LED for portable applications.

    • Designed, Simulated and taped out a Charge Pump based DC-DC converter to drive a white LED for portable applications using PWM and PFM techniques (130nm)
    - Input voltage= 1.8V, Output voltage= 3.3V, Load current= 6mA
    - PWM technique was used to set the output voltage from 2.6V to 3.3V, by varying the duty cycle from 5 to 50%.
    - PFM technique was used to set variable current at the output from 500uA to 6mA and perform analog dimming of the LED.

  • PMOS input folded cascode amplifier

    - The amplifier was designed for a GBW of 10MHz taking 5uA of Bias currents.
    - The load capacitance was fixed to 10pF and the slew rate was 34MV/s.

  • Power Management System with an inductor Based Buck and a Boost DC-DC converter (180nm)

    • Designed and Simulated a Power Management System with an inductor Based Buck and a Boost DC-DC converter (180nm)
    - The IC supplies power to CPU core, Audio Codec and display backlight of cellular phone operated at switching frequency of 20MHz.
    - The Buck converter was used to regulate the Battery source to 2V and a Boost converter was used to display backlight at 3.8V.
    - A pulse width modulated voltage feedback mode was used in the control loop.

  • Band Gap Voltage Reference

    - A constant voltage of 1.2V and 0.8V was obtained respectively.
    - A temperature sweep was done from -40’C to 125’C to obtain a temperature coefficient of 4mV/°C and 6mV/°C.

  • Low Dropout Voltage Regulator for clean supply

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    - Input voltage= 1.8V and output voltage= 1.5V and a dropout voltage of 80mV was obtained.
    - Minimum phase margin of 62° and gain margin of 21dB was achieved.
    - Line Regulation of 15mV was achieved.

Languages

  • English

    Native or bilingual proficiency

  • Hindi

    Full professional proficiency

  • Kannada

    Native or bilingual proficiency

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