Rahul Tiwari

Rahul Tiwari

San Jose, California, United States
4K followers 500+ connections

About

Diligent, reliable and efficient with proven analytical skills in hardware-software…

Contributions

Activity

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Experience

  • Rivian Graphic

    Rivian

    Palo Alto, California, United States

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    Palo Alto, California, United States

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    Palo Alto, California, United States

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    Santa Clara

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    Sillicon Valley

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    Greater Los Angeles Area

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    Dearborn Michigan

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    Peoria, Illinois Area

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    Columbus Indiana

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    Mumbai Area, India

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    Mumbai Area, India

Education

  • University of Cincinnati Graphic

    University of Cincinnati

    -

    Activities and Societies: BearChats, Indian Students Association (ISA)

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    Activities and Societies: 1. Member of Publicity Committee and organized technical festival Pulse'09 during the academic year 2009-2010 || 2. Secretary of Electronics Engineering Students Association (EESA) and organized technical festival Osmosis'11 during the academic year 2010-2011 || 3. Chairman of Institute of Electronics & Telecommunication Engineers (IETE) Students Chapter and organized technical festival Jolt'12 during the academic year 2011-2012 ||

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    Activities and Societies: Quiz Club, Debate, Extempore, Poetry Recitation

    Completed primary and secondary education with accolades and honors for first rank in Social Studies (History, Geography and Civics) throughout the school and winning the 'L' Ward Science Quiz for the school in 2006.

Volunteer Experience

  • Drippler Graphic

    Tech Wizard

    Drippler

    - Present 7 years 8 months

    Science and Technology

    The Tech Wizard community brings together passionate tech experts who are interested in using their knowledge to help people solve everyday tech issues.

  • Embedded C Tutor

    Padmabhushan Vasantdada Patil Pratishthan's College of Engineering

    Education

    Tutoring my peers in Embedded C Programming for Laboratory sessions.

Courses

  • Advanced VLSI Design

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  • Communication Networks

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  • Embedded Systems

    EECE6017C

  • Embedded Systems and Real Time Programming

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  • Engineering Project Management

    ENGR6014

  • Fundamentals of Leadership

    ENGR6050

  • Fundamentals of MEMS

    EECE6008

  • Introduction to VLSI Design

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  • Microfabrication of Semiconductor Devices

    EECE6018

  • VLSI Design

    EECE6080C

  • VLSI Design Automation

    EECE6086C

  • VLSI Design for Test and Power

    EECE6082C

  • Wireless Communication

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Projects

  • Dual-Level Power Estimation and Gate-Level Power Optimization

    The purpose of this project to use Synopsys Power Compiler to estimate the power consumption of a design and further use logic-level to reduce the power consumption of the design.

    Phase 1: Power Estimation by RT-level and Gate-level switching activities.
    Phase 2: Logic-level Power Optimization

    Other creators
    • Hanisha
    • Sowjanya
  • Design Automation: Placement and Routing of Cells

    The project involves implementing a design automation algorithm for placement and routing in C++

    Other creators
  • Scan Chain and Boundary Scan Design for a GCD Machine

    The purpose of this project is to use Synopsys Design Compiler, DFT (design for testability) Compiler and BSD (boundary scan design) Compiler to synthesize a GCD machine which is able to compute the greatest common divisor of two numbers.

    Other creators
    • Soujanya
    • Hanisha
  • Cutset Minimal Balanced Bi-partitioning of a Graph using Simulated Annealing Algorithm for VLSI Design Automation

    The aim of this project is to obtain a minimal cutset cost after performing a balanced bi-partition of a given netlist using Simulated Annealing Algorithm. The optimized algorithm will be tested on a multitude of benchmark from a few hundred nodes and edges to thousands of nodes with millions of edges.

  • iLock: Intelligent Lock

    The iLock is an intelligent security system that be built on Altera DE 2 development board that employs the Altera Cyclone II FPGA. iLock employs the VGA and PS/2 module on the board to communicate with the VGA monitor and keyboard for display and input functions.

    Other creators
  • UC Woodside Entrance Traffic Signal Controller Model on Altera DE2 FPGA Board

    The traffic signal controller at the junction of UC Main Street and Martin Luther King Drive was modeled completely including the pedestrian crossing feature as well as the short term left signal light on MLK. The programming was done in Verilog and was implemented on the Altera DE2 board.

    Other creators
    • Himabindu
    • Sangeetha
  • EBC Detector

    A mini project that checked the terminals of a unknown transistor and indicated which one of them is the base, emitter and collector (or source, gate and drain).

    Other creators
  • uBER - Ubiquitous Extensive Router

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    It is a Mini Programmable Router 40 pin IC designed under the guidance of Dr. Ranga R. Vemuri. uBER consists of 16 input and output lines each that can route any of the 16 input pins to any of the 16 output pins as per the configuration data loaded in it. uBER uses a full custom layout designed by us and fabricated by MOSIS with 0.3 um feature size and a die size of 2mm x 2mm.

    Other creators
  • ZiDACS: Zigbee Based Data Acquisition & Control System

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    Designed and developed a robust home/office automation system with data logging capabilities under the guidance of Dr. KTV Reddy. The wireless communication protocol utilized in this project was IEEE 802.15.4 better known as ZigBee since it offers low power consumption and a wide coverage area. The whole automation and data logging system was split in two operational units where the remote unit was connected to sensors and appliances or machines and the main unit was connected to a computer…

    Designed and developed a robust home/office automation system with data logging capabilities under the guidance of Dr. KTV Reddy. The wireless communication protocol utilized in this project was IEEE 802.15.4 better known as ZigBee since it offers low power consumption and a wide coverage area. The whole automation and data logging system was split in two operational units where the remote unit was connected to sensors and appliances or machines and the main unit was connected to a computer that received data through ZigBee and saved it in a computer as well as transmit control signals to the remote unit for appliance/machine control.

    Other creators
  • GraLDE: Graphic LCD Display for Elevators

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    Leading the team towards the completion of project.
    Finalizing the system architecture and co-designing the circuit.
    Programming and prototyping the actual design.

    Other creators

Honors & Awards

  • University Graduate Scholarship

    University of Cincinnati

    A merit based scholarship for a Graduate Student.

  • University Graduate Scholarship

    University of Cincinnati

    A merit based scholarship for a Graduate Student.

  • General Proficiency Award for Social Studies

    Principal, Holy Cross High School

    The award for scoring the maximum marks in Social Studies (History, Geography & Civics) at SSC Examination in Holy Cross High School.

  • L Ward Science Quiz Champion

    Maharashtra Government (L Ward)

    Won the Ward level science quiz with 44 participants shortlisted from 11 schools.

Test Scores

  • GRE

    Score: 309/340

  • TOEFL

    Score: 116/120

Languages

  • English

    Native or bilingual proficiency

  • Hindi

    Native or bilingual proficiency

  • Marathi

    Limited working proficiency

Organizations

  • BEARchats, University of Cincinnati Ethnic Programs & Services

    SocialCat & CountryCat

    - Present

    I handle the Facebook, Twitter and Instagram handles of BEARchats and keep it updated with the current activities as well as future events.

  • Indian Students Asociation

    Member

    - Present

    Assisting ISA office members during events and other student activities.

  • Center for Research In Neuromorphic Engineering (CRINE)

    Student Research Member

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    http://www.spit.ac.in/faculty-research/center-for-research-in-neuromorphic-engineering-crine/ Working on 'Memristor: A device for modern memory' under Dr. D.V. Bhoir along with other investigators of CRINE

  • Institute of Electronics & Telecommunication Engineers (IETE) Student's Chapter

    Chairman

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    Part of the committee that institutionalized the IETE Students Chapter in college Organized the Technical Festival Jolt'12

  • Electronics Engineering Students Association (EESA)

    Secretary

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    Organized the intercollege Technical Festival 'Osmosis 2k11'

  • Electronics Engineering Students Association (EESA)

    Member of Sponsorship Committee

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    Played a pivotal role in acquiring sponsors and organizing the intercollege technical festival 'Pulse'09'

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