Sathishkumar Balasubramanian

As old methods fall short, new techniques make advanced SoC verification possible. This paper presents mixed-signal block and IC-level verification methodologies using analog behavioral modeling and combined analog and digital solvers. It then describes analog real number modeling (RNM) and how it is used in top-level SoC verification.

OpenAcess(OA) based flow enables efficient implementation of today's complex Mixed-Signal Designs.

We just completed some hugely successful Mixed-Signal Tech-on-Tours in North America. I am back in San Jose after this whirlwind trip that covered 9 cities in 4 weeks. Even though being on the road does get tedious, what kept me excited was the enthusiasm shown among Cadence customers for the Mixed-Signal Tech-on-Tour events. Close to 400 customers attended these Mixed-Signal Tech-On-Tour events.

Mixed-Signal Tech-On-Tours helps bring the latest Mixed-Signal design methodologies to designers. The topics covered are Mixed-Signal Implementation & Verification.

We are seeing a huge trend -- the mobile revolution is changing the way we go about our everyday lives. Gone are the days where the term 'Internet' was associated with a PC or Mac. The smartphone revolution has changed how the data is consumed and used by consumers and businesses. For example, with the new line of smart systems, every device or appliance is connected to the Internet to manage their services in a better way with users and other connected devices.

Cadence holds a leading position in the EDA industry due to its broad product portfolio catering to digital and analog designs and the ever popular mixed-signal designs. With its immense technical and market leadership based on the Virtuoso platform for analog design and Encounter platform for digital design, Cadence EDA products helps designers achieve productivity gains and predictable design closure for today's complex mixed-signal designs.

The recently concluded ARM TechCon 2012, the annual event for ARM users (including hardware and software engineers) along with ARM ecosystem partners, was a huge success. Once again, this event showcased the excellent Cadence-ARM partnership that's helping to bring next generation electronic designs to fruition for our customers.

Performing full-chip verification of large mixed-signal systems on chip (SoCs) is an increasingly
daunting task. As complexity grows and process nodes shrink, it’s no longer adequate to bolt
together analog or digital “black boxes” that are presumed to be pre-verified. Complex analog/
digital interactions can create functional errors, which delay tapeouts and lead to costly silicon
re-spins. Cadence helps customers overcome these challenges with a fully integrated mixed-signal… Show more

Performing full-chip verification of large mixed-signal systems on chip (SoCs) is an increasingly
daunting task. As complexity grows and process nodes shrink, it’s no longer adequate to bolt
together analog or digital “black boxes” that are presumed to be pre-verified. Complex analog/
digital interactions can create functional errors, which delay tapeouts and lead to costly silicon
re-spins. Cadence helps customers overcome these challenges with a fully integrated mixed-signal verification solution that spans basic mixed-signal simulation to comprehensive, metric-driven mixed-signal verification. Show less