For over 20 years IC Enable has successfully provided design IP, IC products, services and platform solutions to demanding customers ranging from startups to Fortune 50 members. Our design and product offerings focus on high reliability, mixed-signal and digital markets while our platform solutions focus on IDM, foundry and IP providers. Now is an exciting time to join our team as we continue to change the industry through experience in technology development, full-custom ASIC / SOC and electronics development across the Semiconductor, Medical and Defense industries, including some of the most challenging fabrication processes and product applications.
We are looking for an early career layout engineer as an IC Layout Design Engineer to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the layout and verification on complex, high-performance circuits with applications such as PLL, HSC, AGC, SerDes, ADC/DAC, Wireless systems, and custom logic. This position is best suited for a junior-mid level engineer who is hungry, humble and smart and is excited about growing his or her skillset in integrated circuit layout design and physical design.
Job Location and Work Mode:
Tucson, AZ (On-Site)
The best fit candidate for this position will have:
3-5 years experience in layout and verification tools and methodologies for RF/Analog/Mixed Signal ICs
3-5 years experience in Cadence layout (Virtuoso, VXL) and Calibre verification (ERC, DRC, LVS)
Demonstrated success in delivering quality work product
Strong communication, debugging and analytical skills with complex technical concepts
Experience in DFM hierarchical layout construction for efficient verification and integration
Comprehensive understanding of the target process to balance layout and design needs, e.g. crosstalk, RC delay, electro-migration, IR drop, self-heating, shielding, matching, guard rings and latch up
Proficiency in PERL or SKILL scripting is a plus
Bachelor’s Degree in Electrical Engineering or Applicable Field
While working with our team you will be responsible for:
Delivering on project assignments with integrity, commitment, and excellence
Efficiently laying out sensitive RF, Analog and Mixed Signal circuits conforming to all physical design verification (PDV) requirements while balancing demanding area, performance, and power specifications
Identifying quality and reliability improvements in IC circuit and layout design
Supporting or performing design verification from sub-block up through top-level
Collaborating effectively with local and remote team members
Developing accurate layout design schedules and resource estimates
Proactively looking for continuous improvement opportunities in the flow, layout and design methodologies
IC Enable is an Equal Opportunity Employer
Seniority level
Mid-Senior level
Employment type
Full-time
Job function
Engineering and Information Technology
Industries
Semiconductor Manufacturing
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