Gowin Semiconductor Corp’s Post

Trenz Electronic GmbH COO Thomas Brünger (Steffens) and CTO Antti Lukats were on an exciting Intel Corporation Event "Intel FPGA Partner Insight Day" in #Munich. The event was mainly focused on Intel Agilex5 FPGA. If you are interested in Intel Agilex5 projects, Trenz Electronic is always able to offer you customized solutions with its know-how and experience in already existing Agilex5 hardware for a customer specific development. #fpga #agilex #modules

I am happy to share that i had attend a webinar on Evolution of FPGA Technologies that was organized by ChipEdge Technologies Pvt Ltd. A great platform to understand the concepts from the leads in Semiconductor giants. #FPGA #Chipedge #Technology #Vlsi #webinar

Leverage the advancements in our latest midrange FPGAs to take your innovations to the next level. Agilex™ 5 devices feature the industry’s first Enhanced DSP with AI Tensor Block, which delivers high-efficiency artificial intelligence (AI) and digital signal processing (DSP) functionality. Our 8-input Adaptive Logic Modules combined with 2nd generation hyperflex architecture on Intel 7 technology provide better performance/watt than competing 7nm FPGAs. The first asymmetric processor cluster with dual Arm Cortex-A76 and dual Arm Cortex-A55 in an FPGA, along with a variety of hardened connectivity options, enables a high level of integration with elevated performance. Learn more at: https://intel.ly/3S1rVk9 #FPGA #AcceleratingInnovators

If you are curious about where Intel Corporation is going with their #FPGA line, I highly recommend checking out this DigiKey webinar: https://lnkd.in/gMG7xCGV You'll be able to ask their CEO and COO about the new and upcoming #Agilex line! #embedded #electronics

We're thrilled to announce that the paper co-authored by AMD and Mirabilis Design Inc. , "22 Complex application mapping to heterogeneous compute resources," has been accepted! 🎉 Join us as we delve into the intricate world of performance-power-area trade-offs in implementing signal processing algorithms on Xilinx FPGA. Our paper explores the dynamic partitioning of tasks across processors, logic, and AI Engines within the AMD-Xilinx Versal FPGA. Presented by Wesley Skeffington, PE and Surya Chongala from AMD, alongside Deepak Shankar from Mirabilis Design, our study offers a sneak peek into the realm of FPGA resources. From AIE tiles to DDR and HBM memory, we navigate the vast landscape of system modeling to optimize FPGA usage. Stay tuned for insights on enhancing performance while balancing power consumption and area utilization. Don't miss out on the opportunity to explore the cutting-edge advancements shaping the future of FPGA technology! #FPGA #Technology #Innovation #AMD #MirabilisDesign #VersalFPGA #SignalProcessing #SystemModeling #HeterogeneousCompute #PerformanceOptimization

New Era of FPGA Technology: Intel Agilex 5 & Beyond We recently engaged in enlightening discussions with Aracely Mejia from Intel FPGA, updating us on the Agilex family's latest advancements. The Agilex 5 series, a beacon of innovation, delivers unparalleled performance, efficiency, and compactness. Manufactured in Intel's cutting-edge Fabs, these FPGAs assure sustained excellence. Highlights include enhanced AI and DSP capabilities, superior flexibility through a new chiplet-based architecture, and advanced security features. As we look forward, the upcoming Agilex 3 series promises to expand these innovations, catering to a wider range of applications and setting new benchmarks in the FPGA landscape. The first Trenz board for the Agilex 5 series, tailored for vision and broadcast applications, exemplifies our commitment to providing our customers with leading-edge solutions. Board: https://t1p.de/p7lvz Stay tuned as we continue to pioneer with Intel, bringing the future of technology into today's applications. #IntelAgilex #FPGA #Innovation #ArrowElectronics #TrenzElectron

Simulation is the primary verification method for #FPGA designs and is essential for minimizing the risk of non-trivial bugs escaping into production. The ability to run more simulations enables the verification of a wider range of test scenarios, thus elevating verification quality. In our three-part webinar series, we will show you how to turbocharge your FPGA simulation workflows by using Active-HDL as the default simulator within: ·       AMD’s Vivado – webinar date March 21. ·       Intel’s Quartus – webinar date March 28. ·       Microchip’s Libero SoC. – webinar date April 4. All webinars will be live and held twice - at 15:00 CEST and 11:00 PDT – and include a Q&A session. Register for one, more or all three here https://lnkd.in/d8PgG3Zh Follow us and be sure not to miss out on notifications about other webinars, product launch news and tool tips. #fpgadesign #fpgadevelopment #fpgasimulation #hdlsimulation #simulation #activehdl #vivado #AMDVivado #Quartus #IntelQuartus #Microchiplibero

DAC is the biggest show for the chip design industry over the last 61 years and it is the industry that is the most complex and the most automated. Today, they called the slightest automation AI. They called it generative AI, we called it synthesis and P&R. They called it prediction we called it simulation. #asic #chip #semiconductor #ic #foundries #eda

From this week's XPU.pub email newsletter: Two years after completing its Xilinx acquisition, AMD has released a design combining an AMD-heritage processor with a Xilinx-heritage FPGA. The new AMD Embedded+ is a board, not a chip, however. It targets PC-like systems for industrial, medical, and other embedded applications. Taking over Xilinx, with its broad customer base, should help AMD expand its… Continue reading this super-short article at https://lnkd.in/ey3xt33U

Developing new serial digital interface (SDI) products has been simplified! Read the 3 minute blog from our #FPGAexpert on how SDI development can be streamlined with Intel® SDI II FPGA reference design. https://intel.ly/3wp0YyI #FPGAs #AcceleratingInnovators