Intel Labs’ Post

Intel is demonstrating tech. leadership with integrated optics to scale data rates, wavelengths and fiber count. Optical IO can solve your challenges with high density compute systems essential for AI

https://lnkd.in/gfh5iDaq AMD Showcases Continued Enterprise Data Center Momentum with EPYC CPUs and Pensando DPUs. > SANTA CLARA, Calif., Aug. 21, 2023 at VMware Explore 2023 Las Vegas, AMD continued to showcase its proven performance and growing adoption of AMD EPYC CPUs, AMD Pensando data processing units (DPUs) and adaptive computing products as ideal solutions for the most efficient and innovative virtualized environments. #amd #datacenters #vmware #Semiconductorindustry #electronics #semiconductor #supplychain #manufacturingtechnology #processtechnology #engineering #manufacturing #technology #computerchips #business #innovation #semiconductors #chips #chipmaker #foundry credit: hpcwire

Gooxi Intel Eagle Stream 4U8-GPU server supports two 4th/5th generation Intel® Xeon® Scalable processors, DDR5, and PCIe Gen5, with flexible direct and switch connection options. The PCIe direct configuration offers low latency for optimal performance, supporting up to ten 600W GPU cards without needing a switch chip, making it more cost-effective. The switch interconnect provides a SWITCH-CPU bandwidth of PCIe5.0 x32, meeting high-performance GPU computing needs, with up to ten dual-width 600W GPU cards and a total of 16 PCIe expansion slots, offering robust computational support for AI and large model training and inference. The product's fully modular design and redundant key components ensure high system reliability. 🔎https://bit.ly/3O8PhlK 📩 If you would like to get more about Gooxi, please contact us by Email: [email protected] #server #datacenter #computer #tech #ithardware #GPU #AI #computing #cloud #HPC #ServerTech #Intel #CPU

Intel Unveils Optical Compute Interconnect Chiplet: Adding 4 Tbps Optical Connectivity To CPUs or GPUs: Intel has introduced an advanced optical input/output chiplet, marking what it claims to be a significant leap in data center technology. The optical compute interconnect (OCI) chiplet, unveiled at the Optical Fiber Communication Conference 2024, is designed for integration with CPUs and GPUs and boasts 64 PCIe 5.0 channels transmitting 4 Tbps over 100 meters using fiber optics. Tom's Hardware adds: The chiplet uses dense wavelength division multiplexing (DWDM) wavelengths and consumes only five pico-Joules per bit, significantly more energy-efficient than pluggable optical transceiver modules, which consume about 15 pico-Joules per bit, according to Intel. This device is crucial for next-generation data centers and AI/HPC applications. It will enable high-performance connections for CPU and GPU clusters, coherent memory expansion, and resource disaggregation. These features will be handy for operating supercomputers for large-scale AI models and machine learning tasks that require tremendous data bandwidth. Read more of this story at Slashdot.

#SiPearl, backed by the #European Processor Initiative, is set to release its first Rhea processor, designed for high-performance computing (#HPC) workloads. The Rhea-1 features 72 Arm Neoverse V1 cores, a #hybrid memory subsystem supporting HBM2E and DDR5 memory, and PCIe interconnects with CXL protocol. It's manufactured by #TSMC on N6 process #technology and powers Europe's first exascale system, Jupiter. SiPearl is already working on Rhea-2, expected in 2026 for exascale supercomputers. Rhea-2 will likely feature a dual-chiplet design, aiming for higher performance with more processing cores, potentially adopting Arm's Neoverse V3 cores. SiPearl aims to maintain #software compatibility between Rhea-1 and Rhea-2. However, the competitiveness of #EPI's #AI and HPC accelerators against #NVIDIA, #AMD, and #Intel remains uncertain. https://lnkd.in/gv74ginD

Intel Unveils Optical Compute Interconnect Chiplet: Adding 4 Tbps Optical Connectivity To CPUs or GPUs: Intel has introduced an advanced optical input/output chiplet, marking what it claims to be a significant leap in data center technology. The optical compute interconnect (OCI) chiplet, unveiled at the Optical Fiber Communication Conference 2024, is designed for integration with CPUs and GPUs and boasts 64 PCIe 5.0 channels transmitting 4 Tbps over 100 meters using fiber optics. Tom's Hardware adds: The chiplet uses dense wavelength division multiplexing (DWDM) wavelengths and consumes only five pico-Joules per bit, significantly more energy-efficient than pluggable optical transceiver modules, which consume about 15 pico-Joules per bit, according to Intel. This device is crucial for next-generation data centers and AI/HPC applications. It will enable high-performance connections for CPU and GPU clusters, coherent memory expansion, and resource disaggregation. These features will be handy for operating supercomputers for large-scale AI models and machine learning tasks that require tremendous data bandwidth. Read more of this story at Slashdot.

Intel Unveils Optical Compute Interconnect Chiplet: Adding 4 Tbps Optical Connectivity To CPUs or GPUs: Intel has introduced an advanced optical input/output chiplet, marking what it claims to be a significant leap in data center technology. The optical compute interconnect (OCI) chiplet, unveiled at the Optical Fiber Communication Conference 2024, is designed for integration with CPUs and GPUs and boasts 64 PCIe 5.0 channels transmitting 4 Tbps over 100 meters using fiber optics. Tom's Hardware adds: The chiplet uses dense wavelength division multiplexing (DWDM) wavelengths and consumes only five pico-Joules per bit, significantly more energy-efficient than pluggable optical transceiver modules, which consume about 15 pico-Joules per bit, according to Intel. This device is crucial for next-generation data centers and AI/HPC applications. It will enable high-performance connections for CPU and GPU clusters, coherent memory expansion, and resource disaggregation. These features will be handy for operating supercomputers for large-scale AI models and machine learning tasks that require tremendous data bandwidth. Read more of this story at Slashdot.

Graviton? Intel? AMD? Ampere? This week at re:Invent, AWS announced the new Graviton 4 processor. The last few years have been an interesting time in the CPU space. We’ve moved from a near complete dominance of #Intel to not only #AMD providing a very viable alternative but also the rise of #ARM based server CPUs from #AWS and #Ampere. Optimisation for HPC in the days of old meant ensuring your code ran as fast possible on the hardware you purchased and installed in your data centre. Shaving milliseconds from every subroutine by carefully targeting the hardware you would run for the next 5 or so years. Viewed another way, it could be argued that this was simply cost optimisation. Faster code meant buying fewer CPUs. Faster code meant delaying buying more CPUs. But what does cost optimisation on cloud look like? Simplistically it could still be viewed as highly optimised code. The faster your code runs, the fewer hours of compute you need to buy. Optimised for which CPU though? Picking Intel over Graviton isn’t a 5 year binding decision anymore. More like 5 hours. If the future direction of server CPUs is anything like what we’ve seen in the consumer space, increasing performance will come at the price of decreasing compatibility. What if Graviton 4 turns out to be the new king of the hill? How long before your workload can adopt it? What if its AMD instead? What’s the marginal cost of not being able to adopt it on day one? In a world where you pay for compute by the second with no future commitments, isn’t the most cost-effective code, the code that can run anywhere?

Our CTO Prasad Mantri has given me the weekend high, with this astounding news :: https://lnkd.in/gF3S58pe A few implications, if this turns out to be a practical reality :: 1. Almost a mini data-center in only one CPU. 2. The Photonics based NoC among the 528 cores means that there is reduced burden on the Closs architecture : the network/fabric consisting of Access, Aggregation & Core switches based on Ethernet/NVLink/Infiniband protocols for networking the server CPUs. Imagine 528 cores communicating among themselves with the least latency based on just a (Photonic) NoC - how fast the overall processing can be (okay, boringly parallel tasks for the theorists out there 😀 )!! 3. Finally a CPU giant admitting the power of an open-core processor : RISC V, leading to such a great innovation !! 4. The future with RISC V seems very bright, especially on the innovation front !!

Imagination Technologies’s New Catapult CPU Is Driving RISC-V Device Adoption https://lnkd.in/dNRyQGbb #APXM6200CPU #CatapultCPU #Computing #ImaginationTechnologies #RISCVapplication