Circuit Diagram: Feeder Dadf-N1

Circuit Diagram
Feeder
DADF-N1
Oct 26 2004
IMPORTANT
This documentation is published by Canon Inc., Japan, to serve as a source of reference for work in the field.
Specifications and other information contained herein may vary slightly from actual machine values or those found
in advertising and other printed matter.
Any questions regarding the information contained herein should be directed to the Copier Service Department of the
Sales Company.
This documentation is intended for all sales areas, and may contain information not applicable to certain areas.
Reproduction without permission not allowed.
Use of this manual should be strictly supervised to avoid disclosure of confidential information.
COPYRIGHT
2001 CANON INC.
Printed in Japan
Caution
Use of this manual should be strictly supervised to avoid disclosure of confidential information.
Contents
1 ADF Controller PCB ................................................................................................................................................ 1

ADF Controller PCB (1/4) ...................................................................................................................................... 2
1 ADF Controller PCB
ADF Controller PCB (1/4)

PMOT_A
PMOT_A
[A503]
[A503]
[A503]
PMOT_B
[A503]
NF1
FB
PMOT_B
[A503]
+5V
EMPS
[A503]
+5U
+5U
R18
R19
COVERS
[A504]
RMOT_A
[A504]
RMOT_A
[A504]
RMOT_B
[A504]
+5U
R3
R4
R5
R6
R7
R8
RMOT_B
[A502]
+5U
R9
R10
R12
R11
DF_LOAD
[A502]
[A502]
PMOT_CLK
R15
R13
R14
R16
R17
RMOT_CLK
+5U
C7
1
PG3/_CS1
PG0/_CAS
126
MD2
125
MD1
124
MD0
123
P10/PO8/TIOCA0/_DACK0
122
P11/PO9/TIOCB0/_DACK1
121
P12/PO10/TIOCC0/TCLKA
120
P13/PO11/TIOCD0/TCLKB
119
R1
1
R2
R61
[A504]
[A502]
MD2
C45
L_SOL
R59
+5V
LED1
R60
R58
R57
R56
R55
R54
P14/PO12/TIOCA1
118
P15/PO13/TIOCB1/TCLKC
117
P16/PO14/TIOCA2
116
P17/PO15/TIOCB2/TCLKD
115
VSS15
114
AVSS
113
P47/AN7/DA1
112
[A504]
RMOT_VREF
P46/AN6/DA0
111
[A503]
PMOT_VREF
P45/AN5
110
P44/AN4
109
P43/AN3
108
P42/AN2
107
P41/AN1
106
P40/AN0
105
VREF
104
AVCC
103
IC1
CP14
1
127
check
R65
R64
R63
128
PG2/_CS2
PG1/_CS3
PG4/_CS0
VSS1
NC
VCC1
PC0/A0
PC1/A1
PC2/A2
PC3/A3
VSS2
PC4/A4
PC5/A5
+5U
10
11
12
PC6/A6
VCC3
PC7/A7
PD7/D15
58
13
57
14
PD6/D14
PB0/A8
56
15
PD5/D13
PB1/A9
55
PB2/A10
16
17
PD4/D12
PB3/A11
54
18
VSS8
VSS3
53
1
19
PD3/D11
PB4/A12
52
PB5/A13
20
21
PD2/D10
PB6/A14
51
22
PB7/A15
23
PD1/D9
PA0/A16
PD0/D8
50
24
49
PA1/A17
25
PA2/A18
PE7/D7
26
PE6/D6
48
PA3/A19
47
27
R68
R69
[A504]
1
VSS4
R25
R26
R27
R28
R29
28
DS_LED
PA4/A20/_IRQ4
PE5/D5
29
46
CLUCH
PA5/A21/_IRQ5
PE4/D4
30
VSS7
45
PA6/A22/_IRQ6
44
[A504]
31
PE3/D3
PA7/A23/_IRQ7
43
32
P67/_CS7/_IRQ3
33
PE2/D2
P66/_CS6/_IRQ2
PE1/D1
42
PE0/D0
34
41
VSS5
35
VSS6
40
36
+5U
S_SOL
VCC2
P65/_IRQ1
P64/_IRQ0
39
R20
R22
R21
R23
37
38
+5U
+5U
PF4/_HWR
PF3/_LWR
PF2/_WAIT/_BREQO
PF1/_BACK
PF0/_BREQ
P50/TXD2
P51/RXD2
VSS13
VSS14
P52/SCK2
P53/_ADTRG
90
91
92
93
94
95
96
97
98
99
100
101
102
+5U
VR
C11
CP1
IC9
2
check
66
65
+5U
+5V
+5V
1
88
PF5/_RD
87
89
PF7/FAI
86
VCC5
VSS12
PF6/_AS
EXTAL
85
81
84
80
XTAL
RES
79
83
FWE
78
VCC4
P20/PO0/TIOCA3
77
82
P21/PO1/TIOCB3
76
NMI
P22/PO2/TIOCC3/TMRI0
75
STBY
P23/PO3/TIOCD3/TMCI0
74
VSS9
P24/PO4/TIOCA4/TMRI1
P35/SCK1
73
P34/SCK0
64
P25/PO5/TIOCB4/TMCI1
63
R162
72
[A502]
DF_CLK
P26/PO6/TIOCA5/TMO0
P33/RXD1
71
P32/RXD0
62
P27/PO7/TIOCB5/TMO1
61
[A502]
70
[A502]
DOWN_RXD
P63/_TEND1
DF_DATA_IN
69
P31/TXD1
P62/_DREQ1
60
68
[A502]
P61/_TEND0/_CS5
DOWN_TXD
67
P30/TXD0
VSS11
59
VSS10
[A502]
P60/_DREQ0/_CS4
DF_DATA_OUT
R53
R49
R50
R51
R52
R62
1 ER
VDD 5
+5U
2 SUB
+5U
R43
R44
R42
R70
+5U
R40
R41
VOUT 4
C10
2
1
+5U
R45
R48
R47
R46
ENDS
LENG2S
LENG1S
A4R_LTRS
C8
C9
F-1-1
DOWN_FWE
R66
R67
R31
R32
R33
R34
R35
R36
R38
R37
R39
[A503]
[A502]
+5U
X1
2
[A503]
[A503]
[A503]
R30
C1
3 GND
[A502]
RESET
R121
[A503]
DELIVS
+5V
2
CP23
check
R81
J1
R80
DF_LOAD
[A501]
J8P
C18
C17
+5V
+5V
CP24
2
CP15
J1
C16
PMOT_CLK
[A501]
13
12
DF_CLK
[A501]
DF_DATA_IN
[A501]
C19
C15
+5V
C12
10
J5P
14
11
IC3
J8P
14
R72
IC3
14
R83
IC3
J12
R71
check
check
R82
CP25
check
R85
IC4
CP16
14
C21
1
C20
IC4
2
J1
C59
J8P
C14
RGV1
J8P
14
C13
R86
Q3
R88
J5P
J1
RMOT_CLK
[A501]
check
CP26
14
R76
IC3
J12
J8P
check
R75
IC4
14
R84
+5V
J1
J1
DF_DATA_OUT
[A501]
R87
6
1
J8P
J1
7
+5V
J8P
CP17
1
R100
+5V
12
J9
J7P
J3
C22
13
+5U
R91
R90
J7P
R92
1
J9
+5U
J7P
+5U
+5V
C58
1
14
J5P
J9
J3
2
1
IC4
J7P
5
1
2
1
J12
J9
J3
J9P
J7P
READS
R99
J9P
14
3
R101
IC3
Q2
R103
J9P
C61
J9
J3
+5V
1
C23
check
J5P
J7P
3
2
C57
R79
J9
J3
CP18
J7P
J9P
J12
J9
J3
REGS
R98
J9P
14
IC3
Q1
2
J9P
C60
J8P
3
J5P
R102
8
1
R73
+5V
J1
check
J12
RESET
[A501]
MD2
[A501]
check
CP19
DOWN_FWE
[A501]
4
check
CP13
DOWN_TXD
[A501]
5
check
CP20
DOWN_RXD
[A501]
R89
1
F-1-2
+5V
J3P
CP2
+24V
J5
+5V
J3P
J5
J3P
R109
C46
A4R_LTRS
[A501]
C2
1
C25
FU1
+5V
J5
check
R108
CP3
1
J8
J6P
J8
J6P
J8
J6P
J8
J6P
J8
J6P
J8
J6P
check
R111
R115
+5V
C27
8
5
4
3
C42
2
R151
13 SYNCB
C40
1
REFB 14
J9P
J3
J9P
C24
2
CP8
1
J3
7
J9P
+5V
check
R127
IC4
14
R128
DELIVS
[A501]
10
EMPS
[A501]
C31
1
+5V
+5V
R132
1
J6P
CP9
1
J4
C52
J4
J6P
IC4
J6P
check
R131
J4
14
R130
C32
1
C53
+5V
4
J6P
J4
J6P
J4
J6P
+5V
R134
1
CP10
1
J4
11
check
R135
C54
F-1-3
8
COVERS
[A501]
R136
C33
1
PMOT_B
[A501]
RA1
1
7
+5V
2
OUT_B 18
RA1
R125
IN_B 16
17 INB
PMOT_B
[A501]
15 GNDB
R105
VSB 12
R94
R107
11 OUTB
C70
RSB 10
C29
RA1
[A501]
R120
OUT_A 8
9 RSA
R106
+5V
J4P
C50
7 VSA
RA1
VR
PMOT_A
[A501]
INA 6
C41
R168
CP30
GNDA 4
CP6
SYNCA 2
3 REFA
5 IN_A
1
check
R150
2
PMOT_A
[A501]
C28
R104
R118
J3
C37
1 OUTA
check
ENDS
[A501]
check
[A501]
PMOT_VREF
IC6
R167
CP29
1
3
J4P
C48
J6
IC7
check
CP5
R119
J6
C63
+5V
R93
C65
C49
C62
CP28
check
J4P
LENG2S
[A501]
+5V
check
J6
C64
R114
CP4
C26
+5V
R112
C47
LENG1S
[A501]
1
J4P
J6
+24V
+24V
C3
J10
FU3
D1
J2P
FU2
CP11
check
1
2
J10
J2P
J7
J7
Q5
1
J7P
R141
L_SOL
[A501]
2
J7P
J7
3
J7P
R142
J7
J7P
J7
J7P
D2
J7
CP12
6
J7P
+5V
2
2
C43
REFB 14
2
2
R153
15 GNDB
R171
IN_B 16
RMOT_B
[A501]
DS_LED
[A501]
OUT_B 18
RA2
C34
C72
R146
R149
1
IC2
RGV1
1
3
SI
CT
V+
GND
INVIN
ETH1
1
C5
C36
+5V
D3
ES
CP21
FU4
CP31
check
R148
1
L4
C4
1
C6
+5V
+5V
IC3
IC4
14
VCC
GND
F-1-4
10
14
14
7
1
J2P
C39
1
J2
VCC
GND
14
2
J2P
J2
ZD1
C38
ETH2
1
2
CD
check
L3
1
CS
RMOT_B
[A501]
10K,0.063W
RA2
J6P
17 INB
Q4
+24V
13 SYNCB
R140
R137
VSB 12
R166
RSB 10
R145
J11
R139
C56
2
RA2
9 RSA
11 OUTB
J6P
RMOT_A
[A501]
INA 6
7 VSA
+5V
1
1
C44
6
1
CLUCH
[A501]
CP34
OUT_A 8
2
3
R147
1
3 REFA
RA2
+5V
GNDA 4
R24
J11
C71
R74
Q7
5 IN_A
R170
check
J6P
SYNCA 2
[A501]
C55
1 OUTA
8
1
RMOT_A
R169
R152
CP22
R138
check
C68
IC6
check
D4
5
CP32
C35
[A501]
RMOT_VREF
J6P
IC8
1
S_SOL
[A501]
check
R165
CP33
2
3
C67
C66
R144
R143
J11
check
2
J6P
Q6
J11
+5V
J7
J7P
J11
C69
1
J6P
J11
Oct 26 2004

Circuit Diagram: Feeder Dadf-N1

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Circuit Diagram

2001 CANON INC.

1 ADF Controller PCB ................................................................................................................................................ 1

1 ADF Controller PCB

ADF Controller PCB (1/4)

ADF Controller PCB (2/4)

ADF Controller PCB (3/4)

ADF Controller PCB (4/4)

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