Pin Diode Basics
Pin Diode Basics
Introduction
Basic TheoryVariable Resistance A PIN diode is essentially a variable resistor. To determine the value of this resistance, consider a volume comparable to a typical PIN diode chip, say 20 mil diameter and 2 mils thick. This chip has a DC resistance of about 0.75 M . Note: 1 mil = 0.001 inches. In real diodes there are impurities, typically boron, which cannot be segregated out of the crystal. Such impurities contribute carriers, holes or electrons, which are not very tightly bound to the lattice and therefore lower the resistivity of the silicon. The resistivity of the I region and thus the diode resistance is determined by the number of free carriers within the I region. The resistivity of any semiconductor material is inversely proportional to the conductivity of the material. Expressed mathematically the resistivity of the I region is
I/ P1 = q ( N N+ P P)
Under steady conditions the mobile charge density in the I region is constant, i. e.,
dQS
dt = 0, so that
IF
= Idc =
QS TL
We can next proceed to calculate the forward resistance of a PIN diode of cylindrical geometry with a thickness, W1, and an area, A. We can ignore some details of analysis not critical to this note. The forward current IF was given before as
IF = Q/TL where Q = Charge per unit volume and Q = q (N+P) WI A therefore q (N+P) WI A IF = TL
where q is the electronic charge (q = 1.602 x 10-19 coul.), N and P are the mobilities of electrons and holes respectively. Consider electrons and holes travelling in opposite directions within the I region under the impetus of an applied, positive electric field. The I region will fill up and an equilibrium condition will be reached. In non-equilibrium conditions excess minority carriers exist, and recombination between holes and electrons proceed to restore equilibrium. Recombination often occurs because of interactions between mobile charge carriers and imperfections in the semiconductor crystalline structure, either structural defects or dopant atoms. The rate of recombination of holes and electrons is proportional to the carrier concentrations and inversely proportional to a property of the semiconductor called the LIFETIME, TL, of the minority carriers. [2] In the case of applied forward bias, the equation governing mobile charges in the I region is QS dQS = IF TL dt where QS is the stored charge and QS = q(N+P).
2q NWI A TL
where =
( N + P ) 2
The resistance of the I region will then be: P W WI RF = I I = (2q N) 1 A A Combining equations yields:
RF = WI 2 2I F TL
The above relation is a fundamental equation of PIN diode theory and design. [3] Rigorous analysis such as reported by Chaffin [4] shows:
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RF =
2kT qI F
sinh
( 2 WDT ) tan
I L I L
[ sinh ( 2 WDT ) ]
Where k = Boltzmanns constant, 1. 38044 x 10 joule/kelvin
-23
In simplest form the capacitance of a PIN is determined by the area and width of the I region and the dielectric constant of silicon. This minimum capacitance is obtained by the application of a reverse bias in excess of VPT, the voltage at which the depletion region occupies the entire I layer.
CU
T = Temperature in degrees kelvin D = Diffusion constant Typical data on RS as a function of bias current are shown in Figure 1. A wide range of design choices is available, as the data indicate. Many combinations of W and TL have been developed to satisfy the full range of applications.
500 100
C A A B C D E E Low TL Thick Attenuator Diode Thick High TL Switching Diode Low TL Thin Attenuator Diode High TL Thin Switching Diode Beam Lead 0.2 F
Contacts
CD
RC
Depleted RU
Undepleted
10
D E A
Consider the undepleted region: this is a lossy dielectric consisting of a volume (area A, length L) of silicon of permittivity 12 and resistivity . The capacitance is
12E0 A 24 12E0 A , and the admittance is L L
RS ()
C B D
Bias Current (mA) Figure 1. Typical Series Resistance as a Function of Bias (1 GHz)
The resistance is proportional to L/A and the conductance to A/L. At voltages below VPT, CJ will increase and approach capacitance at a forward bias of 0.7 V in silicon and 0.9 V in GaAs. Skyworks measures junction capacitance at 1 MHz; this is a measure of the depletion zone capacitance. For I region thickness of W and a depletion width Xd, the undepleted region is (W-Xd). The capacitance of the depleted zone is, proportionally,
1 1 , of the undepleted, Xd WXd
Breakdown Voltage Capacitance, Q Factor The previous section on RS explained how a PIN can become a low resistance, or a short. This section will describe the other statea high impedance, or an open. Silicon has a dielectric strength of about 400 V per mil, and all PIN diodes have a parameter called VB, breakdown voltage, which is a direct measure of the width of the I region. Voltage in excess of this parameter results in a rapid increase in current flow (called avalanche current). When the negative bias voltage is below the breakdown of the I region, a few nanoamps will be drawn. As VB is approached, the leakage current increases. Typically leakage current occurs at the periphery of the I region. For this reason various passivation materials (silicon dioxide, silicon nitride, hard glass) are deposited to protect and stabilize this surface and minimize leakage. These techniques have been well advanced at Skyworks and provide a reliable PIN diode. VB is usually specified at a reverse current of 10 microamps.
The 1 MHz capacitance decreases with bias until punchthrough where Xd = W. At microwave frequencies well above the crossover, the junction looks like two capacitors in series.
CT = Cd CU , which is proportional to 1/W Cd + C U
i. e., the microwave capacitance tends to be constant, independent of Xd and bias voltage. However, since the undepleted zone is lossy, an increase in reverse bias to the punch-through voltage reduces the RF power loss.
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10
A = Zero Punch-Through PIN, Thin Low Voltage B = 200 V PIN C = Thick PIN
CJ
Capacitance (pF)
RP
10K
B 10 GHz C 10 GHz C 18 GHz
RC
CJ
RSR
RP ()
1K
A = Thin PIN CJ = 0.15 pF B = 200 V PIN CJ = 0.15 pF C = Thick PIN CJ = 0.15 pF
500
A
100
A
0.1K 0 10 100
RV ()
10
B 3 GHz 3 GHz
0.5 0.4
Loss (dB)
10
100
A: 10 V
A good way to understand the effects of series resistance is to observe the insertion loss of a PIN chip series mounted in a 50 line.
10
18
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An accepted way to include reverse loss in the figure of merit of a PIN is to write the switching cutoff frequency 1 FCS = 2 C T R S R V where RS and RV are measured under the expected forward and reverse bias conditions at the frequency of interest. The punch-through voltage is a function of the resistivity and thickness of the I region. It is advisable to measure loss as a function of bias voltage and RF voltage to determine if the correct diode has been selected for your application.
RF Switching Time
Switching Considerations
Consider a PIN diode and a typical drive circuit. When the system calls for a change in state, the logic command is applied to the driver. There is delay time in the driver, in the passive components as well as in the transistors, before the voltage at Point A begins to change. There is a further delay before that voltage has stabilized. Most diode switching measurements are measured with the time reference being the 50% point of the (Point A) command waveform. The diode begins to respond immediately, but there is a delay before the RF impedance begins to change. It is the change in impedance that causes the RF output to switch. The driver waveforms shown are required for the fastest total switching times. Reverse to Forward In the high impedance state, the IV characteristics are inductive. This can be considered a function of the fact that the I region must become flooded with stored charge before the current (and RF impedance) stabilizes. Accordingly, the driver must deliver a current spike with substantial overvoltage. The capacitor paralleling the output dropping resistor is called a speed-up capacitor and provides the spike. Typical total switching time can be on the order of 2% to 10% of the specified diode lifetime and in general is much faster than switching in the other direction, from forward to reverse.
5 510 3K 100 TTL 100 2K 2N2222 2K 2N2894A 390 510 10K IF = 10 mA VR = -10 V 0.1 F Point A 5V
Forward To Reverse In this mode the problem is to extract the stored charge rapidly. Once again the solution is a reverse current spike coupled with a moderately high reverse bias voltage, with reverse current on the order of 10 to 20 times forward bias, I I I R = 0.10 to 0.05 or less The charge storage delay will be 5% to 10% of the lifetime. Additionally the actual RF switching time will be minimized by a large negative bias and/or by a low forward bias. Bias Circuitry It is advisable to design the bias circuit to have the same characteristic impedance as the RF line to minimize reflections and ringing. Extraneous capacitance, in the form of blocking and bypass elements, must not be excessive. A typical 60+ pF bypass in a 50 RF circuit produces a 3.0 nanosecond rise time. A few of these make it impossible to exploit the fastest PINs.
PIN Diode
0.1 F -12
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1.5 RO
RO 0.5 RO
Isolation (dB)
52
50
46 40 34
50
50
J2500 J2500
50
-55
25
125
0.1
0.2
0.3
0.4
0.5
Temperature (C) Figure 11. Series Resistance vs. Temperature Figure 13. Isolation vs. Diode Spacing 9 7 5 3
2d B B 4d B 6 d dB 8 dB B 10 d 12 4 dBdB 1 6 dB 1 18 dB 20 dB B 22 4 d dB 2 6 dB 2 8 dB 2 30
CS 50 50
A typical fast switching diode will draw 10 mA at 850 mV at 25 C. At -55 C, the same VF will draw about 500 microamps; at 100 C, IF will be 200 mA.
CS (pF)
RS 50
48 42 36
50
Isolation (dB)
0.2
dB 50
0.1
1 2
4 6 81
4 6 810
20
40 60 100
Simple Circuit Performance Charts Figures 12 and 13 refer to chips shunt mounted in 50 microstrip. Figure 14 refers to series-mounted diodes. Figure 12 shows isolation as a function of diode series resistance RS. Figure 13 shows isolation as a function of diode spacing for a shunt pair of 1.0 diodes, and a series pair of diodes with XC = -j2500.
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Limiters
PIN diodes with low breakdown voltages can serve as power limiters. The onset of limiting is primarily determined by the VB of the diode. The limiting function is also affected by the lifetime of the base region. For this reason the frequency range, peak power requirements and threshold need to be specified to choose a diode with minimum leakage. The power handling capability of limiter diodes is determined by VB for short pulse applications and thermal heat sinking for long pulsed applications. The heat sinking is a composite of the thermal path in the diode and the mounting thermal resistance. Beam-lead diodes provide very low power handling capability due to the extremely high (1200 C/W) thermal resistancehigh powers can be achieved from shunt chips which can have thermal resistances below 5 C/W. To determine the power handling capability of a limiter circuit one needs to determine the maximum power absorbed by the limiter diode. In hard limiting, the diode will reflect most of the power and only a small portion will be absorbed.
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