Professional Documents
Culture Documents
DL05 User Manual PDF
DL05 User Manual PDF
1
Manual Revisions
If you contact us in reference to this manual, remember to include the revision number.
Title: DL05 Micro PLC User Manual
Manual Number: D0USERM
Edition/Rev
Date
Description of Changes
Original
12/98
original issue
2nd Edition
2/00
2nd Edition,
Rev. A
7/00
added DC power
3rd Edition
11/01
removed MC and analog module chapters, corrected drum instruction, several minor corrections, added PLC weights, EU directive additions
3rd Edition,
Rev. A
7/02
1
Table of Contents
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Table of Contents
System Power Disconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Emergency Stop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Orientation to DL05 Front Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connector Removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mounting Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Unit Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enclosures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Panel Layout & Clearances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using Mounting Rails . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Environmental Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Agency Approvals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wiring Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Fuse Protection for Input Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External Power Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Planning the Wiring Routes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Fuse Protection for Input and Output Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O Point Numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Wiring Strategies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PLC Isolation Boundaries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connecting Operator Interface Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connecting Programming Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sinking / Sourcing Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O Common Terminal Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connecting DC I/O to Solid State Field Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Solid State Input Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Solid State Output Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Relay Output Wiring Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Surge Suppresion For Inductive Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Prolonging Relay Contact Life . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Input Wiring Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Output Wiring Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High-Speed I/O Wiring Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Glossary of Specification Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
23
23
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25
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26
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28
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29
210
210
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212
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Table of Contents
D005DD General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Input Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Output Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D005AA I/O Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D005AA General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AC Input Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AC Output Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D005DA I/O Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D005DA General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Input Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AC Output Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D005DRD I/O Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D005DRD General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Input Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Relay Output Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D005DDD I/O Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D005DDD General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Input Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC Output Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D016ND3 DC Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Table of Contents
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interfacing to Counter Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setup for Mode 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Presets and Special Relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Preset Data Starting Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using Fewer than 24 Presets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Equal Relay Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Calculating Your Preset Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
X Input Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Writing Your Control Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program Example: Counter Without Preset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program Example Contd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Counter With Presets Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Counter With Preload Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Troubleshooting Guide for Mode 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mode 20: Quadrature Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Quadrature Encoder Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interfacing to Encoder Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setup for Mode 20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
X Input Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Writing Your Control Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Quadrature Counter w/Preload Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program Example Contd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Counter Preload Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Troubleshooting Guide for Mode 20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mode 30: Pulse Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Wiring Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interfacing to Drive Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Motion Profile Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Physical I/O Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logical I/O Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setup for Mode 30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Profile / Velocity Select Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Profile Parameter Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Trapezoidal Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Registration Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Velocity Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Choosing the Profile Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Trapezoidal Profile Defined . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Registration and Home Search Profiles Defined . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Velocity Profile Defined . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Trapezoidal Profile Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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310
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312
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314
316
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318
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Table of Contents
Trapezoidal Profile Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Trapezoidal Profile Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program Example Contd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Preload Position Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Registration Profile Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Registration Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Registration Profile Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program Example Contd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Home Search Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Velocity Profile Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Velocity Profile Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Velocity Profile Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program Example Contd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pulse Output Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Troubleshooting Guide for Mode 30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mode 40: High-Speed Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setup for Mode 40 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupts and the Ladder Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External Interrupt Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timed Interrupt Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
X Input / Timed INT Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Independent Timed Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External Interrupt Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timed Interrupt Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mode 50: Pulse Catch Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pulse Catch Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setup for Mode 50 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
X Input Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pulse Catch Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mode 60: Discrete Inputs with Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Purpose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Filter Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setup for Mode 60 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
X Input Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Filtered Inputs Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
331
332
333
333
334
334
335
336
337
339
339
340
341
342
342
344
344
344
345
345
346
346
346
346
347
348
349
349
349
349
350
350
351
352
352
352
352
353
353
354
42
42
43
44
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Communication Port Pinout Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connecting the Programming Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CPU Setup Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Status Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mode Switch Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Changing Modes in the DL05 PLC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mode of Operation at Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Auxiliary Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clearing an Existing Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Initializing System Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setting Retentive Memory Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using a Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CPU Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CPU Operating System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Run Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Read Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Service Peripherals and Force I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Update Special Relays and Special Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Solve Application Program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Write Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Is Timing Important for Your Application? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Normal Minimum I/O Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Normal Maximum I/O Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Improving Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CPU Scan Time Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reading Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Writing Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application Program Execution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PLC Numbering Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PLC Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VMemory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Binary-Coded Decimal Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hexadecimal Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Octal Numbering System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Discrete and Word Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V Memory Locations for Discrete Memory Areas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Points (X Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Points (Y Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control Relays (C Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timers and Timer Status Bits (T Data type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timer Current Values (V Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Counters and Counter Status Bits (CT Data type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Counter Current Values (V Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
44
45
45
46
46
47
47
48
48
48
49
410
411
411
412
412
413
413
414
414
415
415
415
415
415
416
417
418
418
418
419
420
420
421
421
421
422
422
422
422
423
423
423
423
424
424
424
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Table of Contents
Word Memory (V Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stages (S Data type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Special Relays (SP Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL05 System V-memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
System Parameters and Default Data Locations (V Data Type) . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL05 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
X Input Bit Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
425
425
425
426
426
428
429
432
432
432
433
433
434
435
436
436
436
437
438
438
438
438
439
440
440
440
440
440
441
442
442
443
443
444
444
52
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Table of Contents
Using Boolean Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
END Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Simple Rungs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Normally Closed Contact . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contacts in Series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Midline Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parallel Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Joining Series Branches in Parallel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Joining Parallel Branches in Series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Combination Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparative Boolean . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Boolean Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Immediate Boolean . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Boolean Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Store (STR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Store Not (STRN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or (OR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or Not (ORN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
And (AND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
And Not (ANDN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
And Store (AND STR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or Store (OR STR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Out (OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or Out (OR OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Not (NOT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Positive Differential (PD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Store Positive Differential (STRPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Store Negative Differential (STRND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or Positive Differential (ORPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or Negative Differential (ORND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
And Positive Differential (ANDPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
And Negative Differential (ANDND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Set (SET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reset (RST) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pause (PAUSE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparative Boolean . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Store If Equal (STRE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Store If Not Equal (STRNE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or If Equal (ORE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or If Not Equal (ORNE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
And If Equal (ANDE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
And If Not Equal (ANDNE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Store (STR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Store Not (STRN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or (OR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or Not (ORN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
And (AND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
And Not (ANDN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
54
54
54
54
55
55
55
56
56
56
56
57
58
59
59
59
510
510
511
511
512
512
513
513
514
514
515
515
516
516
517
517
518
518
519
520
520
520
521
521
522
522
523
523
524
524
525
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Immediate Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Store Immediate (STRI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Store Not Immediate (STRNI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or Immediate (ORI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or Not Immediate (ORNI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OR Immediate Instructions Contd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
And Immediate (ANDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
And Not Immediate (ANDNI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Out Immediate (OUTI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or Out Immediate (OROUTI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Set Immediate (SETI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reset Immediate (RSTI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timer, Counter and Shift Register Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timer (TMR) and Timer Fast (TMRF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timer Example Using Discrete Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timer Example Using Comparative Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Accumulating Timer (TMRA) Accumulating Fast Timer (TMRAF) . . . . . . . . . . . . . . . . . . . . . . . . .
Accumulating Timer Example using Discrete Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Accumulator Timer Example Using Comparative Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Counter (CNT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Counter Example Using Discrete Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Counter Example Using Comparative Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stage Counter (SGCNT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stage Counter Example Using Discrete Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stage Counter Example Using Comparative Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Up Down Counter (UDC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Up / Down Counter Example Using Discrete Status Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Up / Down Counter Example Using Comparative Contacts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Shift Register (SR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Accumulator / Stack Load and Output Data Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using the Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Copying Data to the Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Changing the Accumulator Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using the Accumulator Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using Pointers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Load (LD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Load Double (LDD ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Load Formatted (LDF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Load Address (LDA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Out (OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Out Double (OUTD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Out Formatted (OUTF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pop (POP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pop Instruction Continued . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logical Instructions (Accumulator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
And (AND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
526
526
526
526
526
527
527
527
528
528
529
529
530
530
531
532
532
533
534
534
535
536
537
537
538
539
539
540
541
541
542
543
543
543
544
545
546
548
549
550
551
552
552
553
553
554
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And Double (ANDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or (OR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Or Double (ORD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exclusive Or (XOR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Exclusive Or Double (XORD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Compare (CMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Compare Double (CMPD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Math Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Add (ADD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Add Double (ADDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Subtract (SUB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Subtract Double (SUBD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Multiply (MUL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Multiply Double (MULD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Divide (DIV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Divide Double (DIVD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Increment (INC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Decrement (DEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Increment Binary (INCB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Decrement Binary (DECB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Add Binary (ADDB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Subtract Binary (SUBB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Multiply Binary (MULB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Divide Binary (DIVB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bit Operation Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sum (SUM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Shift Left (SHFL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Shift Right (SHFR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Encode (ENCO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Decode (DECO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Number Conversion Instructions (Accumulator) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Binary (BIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Binary Coded Decimal (BCD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Invert (INV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ASCII to HEX (ATH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HEX to ASCII (HTA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gray Code (GRAY) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Shuffle Digits (SFLDGT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Shuffle Digits Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Move (MOV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Move Memory Cartridge / Load Label (MOVMC), (LDLBL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Copy Data From a Data Label Area to V Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CPU Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
No Operation (NOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
End (END) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stop (STOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
556
557
558
559
560
561
562
563
563
564
565
566
567
568
569
570
571
571
572
572
573
574
575
576
577
577
577
579
580
581
582
582
583
584
585
586
588
589
589
591
591
592
593
594
594
594
594
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Reset Watch Dog Timer (RSTWT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
For / Next (FOR) (NEXT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Goto Subroutine (GTS) (SBR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Subroutine Return (RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Subroutine Return Conditional (RTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Master Line Set (MLS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Master Line Reset (MLR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Understanding Master Control Relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MLS/MLR Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupt Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupt (INT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupt Return (IRT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupt Return Conditional (IRTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable Interrupts (ENI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disable Interrupts (DISI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External Interrupt Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timed Interrupt Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Independent Timed Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Message Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Fault (FAULT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Fault Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Label (DLBL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ASCII Constant (ACON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Numerical Constant (NCON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Label Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Print Message (PRINT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Network Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Read from Network (RX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Write to Network (WX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
595
596
596
598
598
598
5101
5101
5101
5102
5103
5103
5103
5103
5103
5104
5104
5105
5105
5106
5106
5106
5107
5107
5107
5108
5109
5113
5113
5115
62
62
62
63
63
64
64
64
65
66
66
67
68
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Drum Instruction Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Powerup State of Drum Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Drum Control Techniques . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Drum Control Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Self-Resetting Drum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Initializing Drum Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using Complex Event Step Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Drum Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Timed Drum with Discrete Outputs (DRUM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Event Drum (EDRUM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Handheld Programmer Drum Mnemonics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
68
69
610
610
611
611
611
612
612
614
616
72
72
73
73
73
73
74
74
75
75
76
76
77
77
78
78
79
710
710
710
711
712
712
713
714
714
715
715
716
717
717
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Power Flow Transition Technique . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stage View in DirectSOFT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parallel Processing Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parallel Processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Converging Processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Convergence Stages (CV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Convergence Jump (CVJMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Convergence Stage Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RLLPLUS (Stage) Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Staget (SG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Initial Staget (ISG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JUMP (JMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Not Jump (NJMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Converge Stage (CV) and Converge Jump (CVJMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Questions and Answers about Stage Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
718
718
719
719
719
719
720
720
721
721
722
722
722
723
725
82
82
84
86
86
86
87
88
89
810
811
811
812
812
813
813
813
814
815
817
817
817
817
817
818
818
818
818
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Step 9: Run Process Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Step 10: Save Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Basic Loop Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Data Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Direct Access to Analog I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Loop Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CPU Modes and Loop Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
How to Change Loop Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operator Panel Control of PID Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PLC Modes Effect on Loop Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Loop Mode Override . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bumpless Transfers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PID Loop Data Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Loop Parameter Data Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Choosing Unipolar or Bipolar Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Handling Data Offsets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Setpoint (SP) Limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Remote Setpoint (SP) Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Process Variable (PV) Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Control Output Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Error Term Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PID Algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Position Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Velocity Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Direct-Acting and Reverse-Acting Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
P-I-D Loop Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Using a Subset of PID Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derivative Gain Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bias Term . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bias Freeze . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Loop Tuning Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Open-Loop Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Manual Tuning Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Auto Tuning Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tuning Cascaded Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PV Analog Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
The DL05 Built-in Analog Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Creating an Analog Filter in Ladder Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Feedforward Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Feedforward Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Time-Proportioning Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
On/Off Control Program Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cascade Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cascaded Loops in the DL05 CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
818
818
819
819
819
820
821
822
823
824
824
824
825
826
826
826
827
827
828
828
829
830
831
831
832
833
834
835
836
836
837
838
838
839
840
844
845
845
846
847
848
849
850
851
851
852
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Process Alarms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PV Absolute Value Alarms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PV Deviation Alarms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PV Rate-of-Change Alarm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PV Alarm Hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Alarm Programing Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ramp/Soak Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ramp/Soak Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ramp/Soak Table Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ramp/Soak Generator Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ramp/Soak Controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ramp/Soak Profile Monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ramp/Soak Programming Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Testing Your Ramp/Soak Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Troubleshooting Tips . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
853
854
854
855
856
856
857
857
858
860
860
860
861
861
861
862
Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 863
Glossary of PID Loop Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 864
92
Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
92
CPU Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
96
Communications Problems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
97
98
A2
A2
A3
A3
A4
A4
A4
A4
A4
A4
A4
A4
xvi
Table of Contents
AUX 41 Show I/O Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A4
AUX 5* CPU Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
AUX 51 Modify Program Name . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
AUX 53 Display Scan Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
AUX 54 Initialize Scratchpad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
AUX 55 Set Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
AUX 56 CPU Network Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5
AUX 57 Set Retentive Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A6
AUX 58 Test Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A6
AUX 59 Bit Override . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A6
AUX 5B Counter Interface Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A7
AUX 5D Select PLC Scan Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A7
AUX 6* Handheld Programmer Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
AUX 61 Show Revision Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
AUX 62 Beeper On/Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
AUX 65 Run Self Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
AUX 7* EEPROM Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
Transferrable Memory Areas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
AUX 71 CPU to HPP EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A8
AUX 72 HPP EEPROM to CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 73 Compare HPP EEPROM to CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 74 HPP EEPROM Blank Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 75 Erase HPP EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 76 Show EEPROM Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 8* Password Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 81 Modify Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9
AUX 82 Unlock CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A10
AUX 83 Lock CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A10
C2
C2
C2
C2
C3
C3
C4
C10
C10
C11
C12
C12
xvii
Table of Contents
Bit Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Number Conversion Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CPU Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupt Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Network Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Message Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RLLPLUS Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Drum Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
C14
C14
C14
C15
C15
C15
C15
C16
C16
C16
D2
D2
D2
D3
D3
D4
D4
D4
E2
F2
F2
F3
F4
F4
F4
F5
F5
F6
F6
F7
F7
F7
F7
F7
F8
F9
Getting Started
11
In This Chapter. . . .
Introduction
Conventions Used
DL05 Micro PLC Components
Programming Methods
I/O Selection Quick Chart
Quick Start for PLC Checkout and Programming
Steps to Designing a Successful System
Questions and Answers about DL05 Micro PLCs
12
Getting Started
Getting Started
Introduction
The Purpose of
this Manual
Thank you for purchasing a DL05 Micro PLC. This manual shows you how to install,
program, and maintain all the Micro PLCs in the DL05 family. It also helps you
understand how to interface them to other devices in a control system.This manual
contains important information for personnel who will install DL05 PLCs, and for the
PLC programmer. If you understand PLC systems our manuals will provide all the
information you need to get and keep your system up and running.
Where to Begin
If you already understand the DL05 Micro PLC please read Chapter 2, Installation,
Wiring, and Specifications, and proceed on to other chapters as needed. Be sure to
keep this manual handy for reference when you run into questions. If you are a new
DL05 customer, we suggest you read this manual completely so you can understand
the wide variety of features in the DL05 family of products. We believe you will be
pleasantly surprised with how much you can accomplish with our products
Supplemental
Manuals
The D0OPTIONSM manual will be most helpful to select and use any of the
optional modules that are available for the DL05 PLC which includes the analog I/O
modules. If you have purchased operator interfaces or DirectSOFT, you will need
to supplement this manual with the manuals that are written for these products.
Technical Support
We realize that even though we strive to be the best, we may have arranged our
information in such a way you cannot find what you are looking for. First, check these
resources for help in locating the information:
S
13
Getting Started
Conventions Used
When you see the notepad icon in the left-hand margin, the paragraph to its
immediate right will be a special note.
The word NOTE: in boldface will mark the beginning of the text.
When you see the exclamation mark icon in the left-hand margin, the paragraph to
its immediate right will be a warning. This information could prevent injury, loss of
property, or even death (in extreme cases).
The word WARNING: in boldface will mark the beginning of the text.
Key Topics for
Each Chapter
Getting Started
When you see the light bulb icon in the left-hand margin, the paragraph to its
immediate right will give you a special tip.
The word TIP: in boldface will mark the beginning of the text.
14
Getting Started
Getting Started
The DL05 Micro PLC family includes eight different versions. All have the same
appearance and CPU performance. The CPU offers the same instruction set as our
popular DL240 CPU, plus several more instructions specifically designed for
machine control applications. All DL05 PLCs have two RS232C communications
ports. Units with DC inputs have selectable high-speed input features on three input
points. Units with DC outputs offer selectable pulse output capability on the first and
second output points. All DL05 Micro PLCs offer a large amount of program memory,
a substantial instruction set and advanced diagnostics. Details of these features and
more are covered in Chapter 4, CPU Specifications and Operation. The eight types
of DL05 Micro PLCs provide a variety of Input/Output choices, listed in the following
table.
DL05
Part Number
Discrete
Input Type
Discrete
Output Type
External
Power
High-Speed
Input
Pulse
Output
D005AR
AC
Relay
95240 VAC
No
No
D005DR
DC
Relay
95240 VAC
Yes
No
D005AD
AC
DC
95240 VAC
No
Yes
D005DD
DC
DC
95240 VAC
Yes
Yes
D005AA
AC
AC
95240 VAC
No
No
D005DA
DC
AC
95240 VAC
Yes
No
D005DRD
DC
Relay
1224 VDC
Yes
No
D005DDD
DC
DC
1224 VDC
Yes
Yes
Programming Methods
DirectSOFT
Programming for
Windows
Two programming methods are available: RLL (Relay Ladder Logic) and RLL PLUS.
RLL PLUS combines the added feature of flow chart programming (Staget) to the
standard RLL language. Both the DirectSOFT programming package and the
handheld programmer support RLL PLUS as well as standard RLL instructions.
The DL05 Micro PLC can be programmed with one of the most advanced
programming packages in the industry DirectSOFT, a Windows-based software
package that supports familiar features such as cut-and-paste between
applications, point-and-click editing, viewing and editing multiple application
programs at the same time, etc.
15
Getting Started
Handheld
Programmer
All DL05 Micro PLCs have built-in programming ports for use with the handheld
programmer (D2HPP), the same programmer used with the DL105 and DL205
families. The handheld programmer can be used to create, modify and debug your
application program. A separate manual discusses the Handheld Programmer. Only
D2HPPs with firmware version 1.09 or later will program the DL05.
INPUTS
OUTPUTS
I/O type /
commons
Sink /
Source
Voltage Ranges
Voltage / Current
Ratings
D005AR
AC / 2
90 120 VAC
Relay / 2 Sink or
Source
6 27 VDC, 2A *
6 240 VAC, 2A *
D005DR
DC / 2
Sink or
Source
12 24 VDC
Relay / 2 Sink or
Source
6 27 VDC, 2A *
6 240 VAC, 2A *
D005AD
AC / 2
90 120 VAC
DC / 1
Sink
D005DD
DC / 2
Sink or
Source
12 24 VDC
DC / 1
Sink
D005AA
AC / 2
90 120 VAC
AC / 2
17 240 VAC, 47 63 Hz
0.5A *
D005DA
DC / 2
Sink or
Source
12 24 VDC
AC / 2
17 240 VAC, 47 63 Hz
0.5A *
D005DRD
DC / 2
Sink or
Source
12 24 VDC
D005DDD
DC / 2
Sink or
Source
12 24 VDC
Relay / 2 Sink or
Source
DC / 1
Sink
6 27 VDC, 2A *
6 240 VAC, 2A *
6 27 VDC, 0.5A (Y0Y2)
6 27 VDC, 1.0A (Y3Y5)
Getting Started
DirectSOFT universally supports the DirectLOGIC CPU families. This means you
can use the full version of DirectSOFT to program DL05, DL105, DL205, DL305,
DL405 or any new CPUs we may add to our product line. (Upgrade software may be
required for new CPUs as they become available.). A separate manual discusses
DirectSOFT programming software. DirectSOFT version 2.4 or later is needed to
program the DL05.
16
Getting Started
Getting Started
17
Getting Started
1224VDC
Power Supply
Getting Started
To finish this quick-start exercise or study other examples in this manual, youll need
to connect some input switches as shown below. If you have DC inputs you will need
to use the FA24PS (24VDC) or another external 12-24VDC power supply. Be sure
to follow the instructions in the accompanying WARNING note.
18
Getting Started
Getting Started
+G
12 24 VDC
LG N
95 240 VAC
19
Getting Started
CLR
C
Y0
OUT
E
2
NEXT
CLR
AUX
ENT
A
STR
ENT
ENT
END
GX
OUT
SHFT
A
0
E
4
N
TMR
ENT
CLR
ENT
After entering the simple example program put the PLC in Run mode by using the
Mode key on the Handheld Programmer.
The RUN indicator on the PLC will illuminate indicating the CPU has entered the Run
mode. If not, repeat this step, ensuring the program is entered properly or refer to the
troubleshooting guide in chapter 8.
After the CPU enters the run mode, the output status indicator for Y0 should follow
the switch status on input channel X0. When the switch is on, the output will be on.
Getting Started
Apply power to the system and ensure the PWR indicator on the DL05 is on. If not,
remove power from the system and check all wiring and refer to the troubleshooting
section in Chapter 9 for assistance.
110
Getting Started
Getting Started
Step 2:
Understand the
PLC Setup
Procedures
Step 3:
Review the I/O
Selection Criteria
Input
+
PLC
Input
Sensing
Common
Step 4:
Choose a System
Wiring Strategy
Step 5:
Understand the
System Operation
AC
Power
Loads
DL05
PLC
Power Input
6 Outputs
Commons
8 Inputs
Commons
Power up
Initialize hardware
111
Getting Started
The DL05 PLC instruction set provides for three main approaches to solving the
application program, depicted in the figure below.
S
S
S
X0
RLL diagram-style programming is the best tool for solving boolean logic
and general CPU register/accumulator manipulation. It includes dozens
of instructions, which will also be needed to augment drums and stages.
The Timer/Event Drum Sequencer features up to 16 steps and offers
both time and/or event-based step transitions. The DRUM instruction is
best for a repetitive process based on a single series of steps.
Stage programming (also called RLL Plus) is based on state-transition
diagrams. Stages divide the ladder program into sections which
correspond to the states in a flow chart you draw for your process.
Timer/Event Drum Sequencer
(see Chapter 6)
Stage Programming
(see Chapter 7)
PushUP
RAISE
LDD
V1076
CMPD
K309482
SP62
DOWN
Y0
OUT
LIGHT
LOWER
UP
Push
DOWN
After reviewing the programming concepts above, youll be equipped with a variety
of tools to write your application program.
Step 7:
Choose the
Instructions
Step 8:
Understand the
Maintenance and
Troubleshooting
Procedures
TMR
T1
K30
CNT
CT3
K10
Getting Started
Step 6:
Review the
Programming
Concepts
112
Getting Started
Getting Started
113
Getting Started
Getting Started
Installation, Wiring,
and Specifications
In This Chapter. . . .
Safety Guidelines
Orientation to DL05 Front Panel
Mounting Guidelines
Wiring Guidelines
System Wiring Strategies
Glossary of Specification Terms
Wiring Diagrams and Specifications
D0-10ND3 DC Input
D0-16ND3 DC Input
D0-10TD1 DC Output
D0-16TD1 DC Output
D0-10TD2 DC Output
D0-16TD2 DC Output
D0-07CDR DC Input and Output
D0-08TR Relay Output
D0-08CDD1 DC Input and Output
12
22
Installation, Wiring, and Specifications
Safety Guidelines
NOTE: Products with CE marks perform their required functions safely and adhere
to relevant standards as specified by CE directives provided they are used
according to their intended purpose and that the instructions in this manual are
adhered to. The protection provided by the equipment may be impaired if this
equipment is used in a manner not specified in this manual.
Installation, Wiring,
and Specifications
The best way to provide a safe operating environment is to make personnel and
equipment safety part of the planning process. You should examine every aspect of
the system to determine which areas are critical to operator or machine safety. If you
are not familiar with PLC system installation practices, or your company does not
have established installation guidelines, you should obtain additional information
from the following sources.
S NEMA The National Electrical Manufacturers Association, located in
Washington, D.C., publishes many different documents that discuss
standards for industrial control systems. You can order these
publications directly from NEMA. Some of these include:
ICS 1, General Standards for Industrial Control and Systems
ICS 3, Industrial Systems
ICS 6, Enclosures for Industrial Control Systems
S NEC The National Electrical Code provides regulations concerning
the installation and use of various types of electrical equipment. Copies
of the NEC Handbook can often be obtained from your local electrical
equipment distributor or your local library.
S Local and State Agencies many local governments and state
governments have additional requirements above and beyond those
described in the NEC Handbook. Check with your local Electrical
Inspector or Fire Marshall office for information.
Three Levels of
Protection
The publications mentioned provide many ideas and requirements for system
safety. At a minimum, you should follow these regulations. Also, you should use the
following techniques, which provide three levels of system control.
S Orderly system shutdown sequence in the PLC control program
S Mechanical disconnect for output module power
S Emergency stop switch for disconnecting system power
23
Installation, Wiring, and Specifications
Orderly System
Shutdown
Turn off
Saw
Jam
Detect
RST
RST
Retract
Arm
System Power
Disconnect
Emergency Stop
You should also use electromechanical devices, such as master control relays
and/or limit switches, to prevent accidental equipment startup at an unexpected
time. These devices should be installed in such a manner to prevent any machine
operations from occurring.
For example, if the machine has a jammed part the PLC control program can turn off
the saw blade and retract the arbor. However, since the operator must open the
guard to remove the part, you should also include a bypass switch that disconnects
all system power any time the guard is opened.
The machinery must provide a quick manual method of disconnecting all system
power. The disconnect device or switch must be clearly labeled Emergency Stop.
Use EStop and Master Relay
Emergency
Stop
E STOP
Power On
Guard
Limit
Master
Relay
To disconnect
PLC Power
To disconnect PLC
output circuitry
Saw
Arbor
After an Emergency shutdown or any other type of power interruption, there may be
requirements that must be met before the PLC control program can be restarted. For
example, there may be specific register values that must be established (or
maintained from the state prior to the shutdown) before operations can resume. In
this case, you may want to use retentive memory locations, or include constants in
the control program to ensure a known starting point.
Installation, Wiring,
and Specifications
24
Installation, Wiring, and Specifications
Communication Ports
Installation, Wiring,
and Specifications
Mounting tab
External Power
Inputs
The upper section of the connector accepts external power connections on the two
left-most terminals. From left to right, the next five terminals are one of the input
commons (C0) and input connections X1, X3, X4, and X6. The remaining four
connections are an output common (C2) and output terminals Y1, Y3, and Y5.
The lower section of the connector has the chassis ground (G) and the logic ground
(LG) on the two left-most terminals. The next two terminals are for the inputs X0 and
X2. Next is the other input common (C1) followed by inputs X5 and X7. The last four
terminals are for outputs Y0, Y2, Y4, and the second output common (C3). On DC
output units, the end terminal on the right accepts power for the output stage.
WARNING: For some applications, field device power may still be present on the
terminal block even though the Micro PLC is turned off. To minimize the risk of
electrical shock, check all field device power before you expose or remove either
connector
25
Installation, Wiring, and Specifications
Connector
Removal
All of the terminals for the DL05 are contained on one connector block. In some
instances, it may be desireable to remove the connector block for easy wiring. The
connector is designed for easy removal with just a small screwdriver. The drawing
below shows the procedure for removal at one end.
Connector Removal
2. From the center of the connector block, pry upward with the screwdriver
until the connector is loose.
The terminal block connector on DL05 PLCs have regular screw terminals, which
will accept either standard or #1 Philips screwdriver tips. You can insert one 16 AWG
wire under a terminal, or two 18 AWG wires (one on each side of the screw). Be
careful not to overtighten; maximum torque is 6 inch/ounces.
Spare terminal block connectors and connector covers may be ordered by individual
part numbers:
Part Number
Description
D0IOCON
D0IOCVR
26
Installation, Wiring, and Specifications
Mounting Guidelines
In addition to the panel layout guidelines, other specifications can affect the
definition and installation of a PLC system. Always consider the following:
S Environmental Specifications
S Power Requirements
S Agency Approvals
S Enclosure Selection and Component Dimensions
Installation, Wiring,
and Specifications
Unit Dimensions
The following diagram shows the outside dimensions and mounting hole locations
for all versions of the DL05. Make sure you follow the installation guidelines to allow
proper spacing from other components.
4.8
120mm
2.6
65mm
3.8
95mm
0.40
10mm
4.0
100mm
0.20
5mm
3.4
85mm
Enclosures
27
Installation, Wiring, and Specifications
There are many things to consider when designing the panel layout. The following items
correspond to the diagram shown. Note: there may be additional requirements,
depending on your application and use of other components in the cabinet.
1. Mount the PLCs horizontally as shown below to provide proper ventilation.
You cannot mount the DL05 units vertically, upside down, or on a flat
horizontal surface. If you place more than one unit in a cabinet, there must
be a minimum of 7.2 (183mm) between the units.
OK
Airflow
2. Provide a minimum clearance of 2 (50mm) between the unit and all sides of
the cabinet. Note, remember to allow for any operator panels or other items
mounted in the door.
3. There should also be at least 3 (78mm) of clearance between the unit and
any wiring ducts that run parallel to the terminals.
Temperature
Probe
DL05
Micro PLC
2"
50mm
min.
Power
Source
Panel
2"
50mm
min.
BUS Bar
2"
50mm
min.
Ground Braid
Copper Lugs
Earth Ground
Panel or
Single Point
Ground
Star Washers Star Washers
Panel Ground
Terminal
Not to Scale
4. The ground terminal on the DL05 base must be connected to a single point
ground. Use copper stranded wire to achieve a low impedance. Copper
eye lugs should be crimped and soldered to the ends of the stranded wire to
ensure good surface contact.
5. There must be a single point ground (i.e. copper bus bar) for all devices in
the panel requiring an earth ground return. The single point of ground must
be connected to the panel ground termination. The panel ground
termination must be connected to earth ground. Minimum wire sizes, color
coding, and general safety practices should comply with appropriate
electrical codes and standards for your area.
Installation, Wiring,
and Specifications
28
Installation, Wiring, and Specifications
Installation, Wiring,
and Specifications
29
Installation, Wiring, and Specifications
7mm
Retaining Clip
NOTE: Refer to our catalog for a complete listing of DINnector connection systems.
Environmental
Specifications
The following table lists the environmental specifications that generally apply to
DL05 Micro PLCs. The ranges that vary for the Handheld Programmer are noted at
the bottom of this chart. Certain output circuit types may have derating curves,
depending on the ambient temperature and the number of outputs ON. Please refer
to the appropriate section in this chapter pertaining to your particular DL05 PLC.
Specification
Rating
Storage temperature
4 F to 158 F (20 C to 70 C)
32 F to 131 F (0 C to 55 C)
Ambient humidity**
Vibration resistance
Shock resistance
Noise immunity
NEMA (ICS3304)
Atmosphere
No corrosive gases
Agency approvals
* Operating temperature for the Handheld Programmer and the DV1000 is 32 to 122 F (0 to 50 C)
Storage temperature for the Handheld Programmer and the DV1000 is 4 to 158 F (20 to70 C).
**Equipment will operate down to 5% relative humidity. However, static electricity problems occur much
more frequently at low humidity levels (below 30%). Make sure you take adequate precautions when
you touch the equipment. Consider using ground straps, anti-static floor coverings, etc. if you use the
equipment in low-humidity environments.
Agency Approvals
Some applications require agency approvals for particular components. The DL05
Micro PLC agency approvals are listed below:
S UL (Underwriters Laboratories, Inc.)
S CUL (Canadian Underwriters Laboratories, Inc.)
S CE (European Economic Union)
Installation, Wiring,
and Specifications
35 mm
210
Installation, Wiring, and Specifications
Wiring Guidelines
Connect the power input wiring for the DL05. Observe all precautions stated earlier
in this manual. For more details on wiring, see Chapter 2 on Installation, Wiring, and
Specifications. When the wiring is complete, close the connector covers. Do not
apply power at this time.
Installation, Wiring,
and Specifications
LG N
95 240 VAC
+G
12 24 VDC
WARNING: Once the power wiring is connected, secure the terminal block cover in
the closed position. When the cover is open there is a risk of electrical shock if you
accidentally touch the connection terminals or power wiring.
Fuse Protection
for Input Power
There are no internal fuses for the input power circuits, so external circuit protection
is needed to ensure the safety of service personnel and the safe operation of the
equipment itself. To meet UL/CUL specifications, the input power must be fused.
Depending on the type of input power being used, follow these fuse protection
recommendations:
208/240 VAC Operation
When operating the unit from 208/240 VAC, whether the voltage source is a
step-down transformer or from two phases, fuse both the line (L) and neutral (N)
leads. The recommended fuse size is 0.375A.
110/125 VAC Operation
When operating the unit from 110/125 VAC, it is only necessary to fuse the line (L)
lead; it is not necessary to fuse the neutral (N) lead. The recommended fuse size is
0.5A.
211
Installation, Wiring, and Specifications
10A
Maximum Power
30 VA
20 W
Insulation Resistance
Planning the
Wiring Routes
The following guidelines provide general information on how to wire the I/O
connections to DL05 Micro PLCs. For specific information on wiring a particular PLC
refer to the corresponding specification sheet further in this chapter.
1. Each terminal connection of the DL05 PLC can accept one 16 AWG wire or
two 18 AWG size wires. Do not exceed this recommended capacity.
2. Always use a continuous length of wire. Do not splice wires to attain a
needed length.
3. Use the shortest possible wire length.
4. Use wire trays for routing where possible.
5. Avoid running wires near high energy wiring.
6. Avoid running input wiring close to output wiring where possible.
7. To minimize voltage drops when wires must run a long distance , consider
using multiple wires for the return line.
8. Avoid running DC wiring in close proximity to AC wiring where possible.
9. Avoid creating sharp bends in the wires.
10. Install the recommended powerline filter to reduce power surges and
EMI/RFI noise.
Installation, Wiring,
and Specifications
External
Power Source
212
Installation, Wiring, and Specifications
Fuse Protection
for Input and
Output Circuits
Input and Output circuits on DL05 Micro PLCs do not have internal fuses. In order to
protect your Micro PLC, we suggest you add external fuses to your I/O wiring. A
fast-blow fuse, with a lower current rating than the I/O banks common current rating
can be wired to each common. Or, a fuse with a rating of slightly less than the
maximum current per output point can be added to each output. Refer to the Micro
PLC specification sheets further in this chapter to find the maximum current per
output point or per output common. Adding the external fuse does not guarantee the
prevention of Micro PLC damage, but it will provide added protection.
Installation, Wiring,
and Specifications
External Fuses
(shown with DIN Rail, Fuse Blocks)
I/O Point
Numbering
All DL05 Micro PLCs have a fixed I/O configuration. It follows the same octal
numbering system used on other DirectLogic family PLCs, starting at X0 and Y0. The
letter X is always used to indicate inputs and the letter Y is always used for outputs.
The I/O numbering always starts at zero and does not include the digits 8 or 9. The
addresses are typically assigned in groups of 8 or 16, depending on the number of
points in an I/O group. For the DL05 the eight inputs use reference numbers X0 X7.
The six output points use references Y0 Y5.
213
Installation, Wiring, and Specifications
PLC Isolation
Boundaries
Primary Side
Secondary, or
Logic side
PLC
Power
Input
Main
Power
Supply
Filter
Isolation
Boundary
CPU
Field Side
Input
Circuit
Discrete Inputs
Output
Circuit
Discrete Outputs
Programming Device or
Operator Interface
Isolation
Boundary
The next figure shows the internal layout of DL05 PLCs, as viewed from the front
panel.
To Programming Device
or Operator Interface
DL05
PLC
CPU
2 Comm.
Ports
Main
Power
Supply
Input Circuit
Power
Input
Filter
8 Discrete
Inputs
Commons
Output Circuit
Installation, Wiring,
and Specifications
The DL05 Micro PLC is very flexible and will work in many different wiring
configurations. By studying this section before actual installation, you can probably
find the best wiring strategy for your application . This will help to lower system cost,
wiring errors, and avoid safety problems.
PLC circuitry is divided into three main regions separated by isolation boundaries,
shown in the drawing below. Electrical isolation provides safety, so that a fault in one
area does not damage another. A powerline filter will provide isolation between the
power source and the power supply. A transformer in the power supply provides
magnetic isolation between the primary and secondary sides. Opto-couplers
provide optical isolation in Input and Output circuits. This isolates logic circuitry from
the field side, where factory machinery connects. Note that the discrete inputs are
isolated from the discrete outputs, because each is isolated from the logic side.
Isolation boundaries protect the operator interface (and the operator) from power
input faults or field wiring faults. When wiring a PLC, it is extremely important to avoid
making external connections that connect logic side circuits to any other.
214
Installation, Wiring, and Specifications
Connecting
Operator Interface
Devices
Operator interfaces require data and power connections. Operator interfaces with a
large CRT usually require separate AC power. However, small operator interface
devices like the popular DV-1000 Data Access Unit and the Optimation panels may
be powered directly from the DL05 Micro PLC.
Connect the DV-1000 to either communication port on the DL05 Micro PLC using the
cable shown below. A single cable contains transmit/receive data wires and +5V
power.
DL05 Micro PLC
Installation, Wiring,
and Specifications
RJ12
phone style
RJ12
phone style
DV-1000
RJ12
phone style
15-pin D-shell
male
Optimation Panel
Connecting
Programming
Devices
DL05 Micro PLCs can be programmed with either a handheld programmer or with
DirectSOFT on a PC. Connect the DL05 to a PC using the cable shown below.
DL05 Micro PLC
RJ12
phone style
9-pin D-shell
female
RJ12
phone style
RJ12
phone style
D2HPP
215
Installation, Wiring, and Specifications
Sinking / Sourcing
Concepts
Before going further in our study of wiring strategies, we must have a solid
understanding of sinking and sourcing concepts. Use of these terms occurs
frequently in input or output circuit discussions. It is the goal of this section to make
these concepts easy to understand, further ensuring your success in installation.
First we give the following short definitions, followed by practical applications.
Input
(sinking)
+
PLC
Input
Sensing
Common
Sinking Output
Input
Common
PLC
Input
Sensing
Sourcing Input
Common
+
Input
PLC
Output
Switch
Output
Load
+
Common
Sourcing Output
PLC
Input
Sensing
PLC
Output
Switch
Common
+
Output
Load
Installation, Wiring,
and Specifications
First you will notice that these are only associated with DC circuits and not AC,
because of the reference to (+) and () polarities. Therefore, sinking and sourcing
terminology only applies to DC input and output circuits. Input and output points that
are either sinking or sourcing can conduct current in only one direction. This means it
is possible to connect the external supply and field device to the I/O point with current
trying to flow in the wrong direction, and the circuit will not operate. However, we can
successfully connect the supply and field device every time by understanding
sourcing and sinking.
216
Installation, Wiring, and Specifications
Installation, Wiring,
and Specifications
I/O Common
In order for a PLC I/O circuit to operate,
Terminal Concepts current must enter at one terminal and exit
at another. This means at least two
terminals are associated with every I/O
point. In the figure to the right, the Input or
Output terminal is the main path for the
current. One additional terminal must
provide the return path to the power
supply.
If we had unlimited space and budget for
I/O terminals, then every I/O point could
have two dedicated terminals just as the
figure above shows. However, providing
this level of flexibility is not practical or
even necessary for most applications. So,
most Input or Output point groups on
PLCs share the return path among two or
more I/O points. The figure to the right
shows a group (or bank) of 4 input points
which share a common return path. In this
way, the four inputs require only five
terminals instead of eight.
Field
Device
PLC
Main Path
(I/O Point)
I/O
Circuit
Return Path
PLC
Input 1
Input
Sensing
Input 2
Input 3
Input 4
+
Common
Note: In the circuit above, the current in the common path is 4 times any channels
input current when all inputs are energized. This is especially important in output
circuits, where heavier gauge wire is sometimes necessary on commons.
Most DL05 input and output circuits are
grouped into banks that share a common
return path. The best indication of I/O
common grouping is on the wiring label.
The I/O common grouping bar, labeled at
the right, occurs in the section of wiring
label below it. It indicates X0, X1, X2, and
X3 share the common terminal located to
the left of X1.
The following complete label shows two banks of four inputs and two banks of three
outputs. One common is provided for each bank.
The following label is for DC output versions. One common is provided for all of the
outputs and the terminal on the bottom right accepts power for the output stage.
217
Installation, Wiring, and Specifications
Connecting DC I/O In the previous section on Sourcing and Sinking concepts, we explained that DC I/O
circuits sometimes will only allow current to flow one way. This is also true for many of
to Solid State
the field devices which have solid-state (transistor) interfaces. In other words, field
Field Devices
devices can also be sourcing or sinking. When connecting two devices in a series
DC circuit, one must be wired as sourcing and the other as sinking.
The DL05s DC inputs are flexible in that they detect current flow in either direction,
Solid State
so they can be wired as either sourcing or sinking. In the following circuit, a field
Input Sensors
device has an open-collector NPN transistor output. It sinks current from the PLC
input point, which sources current. The power supply can be the FA-24PS +24 VDC
power supply or another supply (+12 VDC or +24VDC), as long as the input
specifications are met.
Installation, Wiring,
and Specifications
Field Device
PLC DC Input
Input
(sourcing)
Output
(sinking)
Supply
Ground
Common
In the next circuit, a field device has an open-emitter PNP transistor output. It
sources current to the PLC input point, which sinks the current back to ground. Since
the field device is sourcing current, no additional power supply is required.
Field Device
+V
PLC DC Input
Input
Output (sourcing)
Ground
Solid State
Output Loads
(sinking)
Common
Field Device
Power
+V
Output
(sinking)
Common
Input
(sourcing)
20-28 VDC
Ground
218
Installation, Wiring, and Specifications
In the next example we connect a PLC DC output point to the sinking input of a field
device. This is a bit tricky, because both the PLC output and field device input are
sinking type. Since the circuit must have one sourcing and one sinking device, we
add sourcing capability to the PLC output by using a pull-up resistor. In the circuit
below, we connect Rpull-up from the output to the DC output circuit power input.
PLC DC Output
Power
+DC pwr
Field Device
R pull-up
(sourcing)
Installation, Wiring,
and Specifications
(sinking)
Output
+
Input
(sinking)
Ground
R input
Supply
Common
NOTE: DO NOT attempt to drive a heavy load (>25 mA) with this pull-up method.
NOTE 2: Using the pull-up resistor to implement a sourcing output has the effect of
inverting the output point logic. In other words, the field device input is energized
when the PLC output is OFF, from a ladder logic point-of-view. Your ladder program
must comprehend this and generate an inverted output. Or, you may choose to
cancel the effect of the inversion elsewhere, such as in the field device.
It is important to choose the correct value of R pull-up. In order to do so, we need to
know the nominal input current to the field device (I input) when the input is energized.
If this value is not known, it can be calculated as shown (a typical value is 15 mA).
Then use I input and the voltage of the external supply to compute R pull-up. Then
calculate the power Ppull-up (in watts), in order to size R pull-up properly.
input
R pull-up =
input (turnon)
R input
V supply 0.7
I
R input
pull-up
input
V supply
R pullup
The drawing below shows the actual wiring of the DL05 Micro PLC to the supply and
pull-up resistor.
Common
Supply +
Output
219
Installation, Wiring, and Specifications
Relay Output
Wiring Methods
Assuming relays are right for your application, were now ready to explore various
ways to wire relay outputs to the loads. Note that there are six normally-open SPST
relays available. They are organized with three relays per common. The figure below
shows the relays and the internal wiring of the PLC. Note that each group is isolated
from the other group of outputs.
Y0 Com
Y1
Y2
Y3
Y4 Com
Y5
In the circuit below, all loads use the same AC power supply which powers the DL05
PLC. In this example, all commons are connected together.
Fuse or
Circuit
Breaker
Line
Ground
Neutral
In the circuit on the following page, loads for Y0 Y2 use the same AC power supply
which powers the DL05 PLC. Loads for Y3 Y5 use a separate DC supply. In this
example, the commons are separated according to which supply powers the
associated load.
Installation, Wiring,
and Specifications
The D005AR and the D005DR models feature relay outputs. Relays are best for
the following applications:
S Loads that require higher currents than the solid-state DL05 outputs can
deliver
S Cost-sensitive applications
S Some output channels need isolation from other outputs (such as when
some loads require AC while others require DC)
Some applications in which NOT to use relays:
S Loads that require currents under 10 mA
S Loads which must be switched at high speed and duty cycle
220
Installation, Wiring, and Specifications
Installation, Wiring,
and Specifications
Fuse or
Circuit
Breaker
Line
Ground
Neutral
Surge Suppresion
For Inductive
Loads
Inductive load devices (devices with a coil) generate transient voltages when
de-energized with a relay contact. When a relay contact is closed it bounces, which
energizes and de-energizes the coil until the bouncing stops. The transient
voltages generated are much larger in amplitude than the supply voltage, especially
with a DC supply voltage.
When switching a DC-supplied inductive load the full supply voltage is always
present when the relay contact opens (or bounces). When switching an
AC-supplied inductive load there is one chance in 60 (60 Hz) or 50 (50 Hz) that the
relay contact will open (or bounce) when the AC sine wave is zero crossing. If the
voltage is not zero when the relay contact opens there is energy stored in the
inductor that is released when the voltage to the inductor is suddenly removed. This
release of energy is the cause of the transient voltages.
When inductive load devices (motors, motor starters, interposing relays, solenoids,
valves, etc.) are controlled with relay contacts, it is recommended that a surge
suppression device be connected directly across the coil of the field device. If the
inductive device has plug-type connectors, the suppression device can be installed
on the terminal block of the relay output.
Transient Voltage Suppressors (TVS or transorb) provide the best surge and
transient suppression of AC and DC powered coils, providing the fastest response
with the smallest overshoot.
Metal Oxide Varistors (MOV) provide the next best surge and transient
suppression of AC and DC powered coils.
For example, the waveform in the figure below shows the energy released when
opening a contact switching a 24 VDC solenoid. Notice the large voltage spike.
+24 VDC
24 VDC
+24 VDC
221
Installation, Wiring, and Specifications
This figure shows the same circuit with a transorb (TVS) across the coil. Notice that
the voltage spike is significantly reduced.
+24 VDC
24 VDC
+24 VDC
42 VDC
Prolonging Relay
Contact Life
hhVendor / Catalog
Part Number
General Instrument
Transient Voltage
Suppressors, LiteOn
Diodes; from DigiKey
Catalog; Phone:
1-800-344-4539
TVS
110/120 VAC
P6KE180CAGICTND
TVS
220/240 VAC
P6KE350CA
TVS
P6K30CAGICTND
Diode
1N4004CTND
MOV
110/120 VAC
V150LA20C
MOV
220/240 VAC
V250LA20C
Relay contacts wear according to the amount of relay switching, amount of spark
created at the time of open or closure, and presence of airborne contaminants.
There are some steps you can take to help prolong the life of relay contacts, such as
switching the relay on or off only when it is necessary, and if possible, switching the
load on or off at a time when it will draw the least current. Also, take measures to
suppress inductive voltage spikes from inductive DC loads such as contactors and
solenoids.
For inductive loads in DC circuits we recommend using a suppression diode as
shown in the following diagram (DO NOT use this circuit with an AC power supply).
When the load is energized the diode is reverse-biased (high impedance). When the
load is turned off, energy stored in its coil is released in the form of a negative-going
voltage spike. At this moment the diode is forward-biased (low impedance) and
shunts the energy to ground. This protects the relay contacts from the high voltage
arc that would occur just as the contacts are opening.
Place the diode as close to the inductive field device as possible. Use a diode with a
peak inverse voltage rating (PIV) at least 100 PIV, 3A forward current or larger. Use a
fast-recovery type (such as Schottky type). DO NOT use a small-signal diode such
as 1N914, 1N941, etc. Be sure the diode is in the circuit correctly before operation. If
installed backwards, it short-circuits the supply when the relay energizes.
Inductive Field Device
Input
Output
Supply
Common
Common
Installation, Wiring,
and Specifications
Use the following table to help select a TVS or MOV suppressor for your application
based on the inductive load voltage.
222
Installation, Wiring, and Specifications
Installation, Wiring,
and Specifications
DC Input Wiring
Methods
PLC DC Input
Input
Common
In the first and simplest example below, all commons are connected together and all
inputs are sinking.
+24 VDC
+
In the next example, the first four inputs are sinking, and the last four are sourcing.
+24 VDC
+12 VDC
223
Installation, Wiring, and Specifications
DC Output
Wiring Methods
+24 VDC
+
Output Point Wiring
In the next example below, the outputs have split supplies. The first three outputs
are using a +12 VDC supply, and the last three are using a +24 VDC supply.
However, you can split the outputs among any number of supplies, as long as:
S all supply voltages are within the specified range
S all output points are wired as sinking
S all source () terminals are connected together
+12 VDC
+
Output Point Wiring
+24 VDC
Installation, Wiring,
and Specifications
224
Installation, Wiring, and Specifications
DL05 versions with DC type input or output points contain a dedicated High-Speed
I/O circuit (HSIO). The circuit configuration is programmable, and it processes select
I/O points independently from the CPU scan. Chapter 3 discusses the programming
options for HSIO. While the HSIO circuit has six modes, we show wiring diagrams for
two of the most popular modes in this chapter. The high-speed input interfaces to
points X0 X2. Properly configured, the DL05 can count quadrature pulses at up to
5 kHz from an incremental encoder as shown below.
Installation, Wiring,
and Specifications
High-Speed I/O
Wiring Methods
Signal Common
Phase B
+
12 24 VDC
Phase A
Encoder
DL05 versions with DC type output points can use the High Speed I/O Pulse Output
feature. It can generate high-speed pulses for specialized control such as stepper
motor / intelligent drive systems. Output Y0 and Y1 can generate pulse and direction
signals, or it can generate CCW and CW pulse signals respectively. See Chapter 3
on high-speed input and pulse output options.
+
Signal Common
Motor
Amplifier
Pulse
Direction
+24 VDC
225
Installation, Wiring, and Specifications
Discrete Output
One of six output connections from the PLC which converts an internal
ladder program result (0 or 1) to turn On or Off an output switching device.
This enables the program to turn on and off large field loads.
I/O Common
Maximum Voltage
ON Voltage Level
The minimum voltage level at which the input point will turn ON.
The maximum voltage level at which the input point will turn OFF
Input Impedance
Input Current
Minimum ON Current
The minimum current for the input circuit to operate reliably in the ON
state.
Maximum OFF Current The maximum current for the input circuit to operate reliably in the OFF
state.
OFF to ON Response
ON to OFF Response
Status Indicators
The LEDs that indicate the ON/OFF status of an input or output point. All
LEDs on DL05 Micro PLCs are electrically located on the logic side of the
input or output circuit.
Installation, Wiring,
and Specifications
Discrete Input
226
Installation, Wiring, and Specifications
Installation, Wiring,
and Specifications
D005AR
The D005AR Micro PLC features eight AC inputs and six relay contact outputs. The
I/O Wiring Diagram following diagram shows a typical field wiring example. The AC external power
connection uses four terminals at the left as shown.
Fuse
or
C.B.
Line
Neutral
Ground
Power
Input Wiring
AC or DC
Supply
AC
Supply
Input
Optical
Isolator
2A
6
To LED
Points
Y0 Y5
OUTPUT
L
+V
4
2
Common
COM
0
To other circuits in bank
0
32
10
20
30
40
50
55 C
50
68
86
104
122 131F
Ambient Temperature (C/F)
To LED
Line
627 VDC
6240 VAC
The eight AC input channels use terminals in the middle of the connector. Inputs are
organized into two banks of four. Each bank has a common terminal. The wiring
example above shows all commons connected together, but separate supplies and
common circuits may be used. The equivalent input circuit shows one channel of a
typical bank.
227
Installation, Wiring, and Specifications
The six relay output channels use terminals on the right side of the connector.
Outputs are organized into two banks of three normally-open relay contacts. Each
bank has a common terminal. The wiring example on the last page shows all
commons connected together, but separate supplies and common circuits may be
used. The equivalent output circuit shows one channel of a typical bank. The relay
contacts can switch AC or DC voltages.
D005AR
General
Specifications
Relay Output
Specifications
Y0 Y5
Communication Port 1
9600 baud (Fixed), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Slave)
MODBUS (Slave)
Communication Port 2
9600 baud (default), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Master/Slave)
MODBUS (Master/Slave)
Non-sequence / print
D2DSCBL
Operating Temperature
32 to 131 F (0 to 55_ C)
Storage Temperature
Relative Humidity
5 to 95% (non-condensing)
Environmental air
Vibration
Shock
Noise Immunity
NEMA ICS3304
Terminal Type
Removable
Wire Gauge
80 132 VAC, 47 - 63 Hz
Input Current
8 mA @ 100 VAC at 50 Hz
10 mA @ 100 VAC at 60 Hz
12 mA @ 132 VAC at 50 Hz
15 mA @ 132 VAC at 60 Hz
Input Impedance
ON Current/Voltage
>6 mA @ 75 VAC
OFF Current/Voltage
<2 mA @ 20 VAC
OFF to ON Response
< 40 mS
ON to OFF Response
< 40 mS
Status Indicators
Logic Side
Commons
Output Current
2A / point, 6A / common
0.1 mA @264VAC
5 mA @5 VDC
OFF to ON Response
< 15 mS
ON to OFF Response
< 10 mS
Status Indicators
Logic Side
Commons
Fuses
Installation, Wiring,
and Specifications
AC Input
Specifications
X0 X7
228
Installation, Wiring, and Specifications
Installation, Wiring,
and Specifications
These micro PLCs feature eight DC inputs and six relay contact outputs. The
D005DR
I/O Wiring Diagram following diagram shows a typical field wiring example. The AC external power
connection uses four terminals at the left as shown.
Fuse
or
C.B.
Line
Neutral
Ground
Power
Input Wiring
AC or DC
Supply
DC
Supply
Points
Internal module circuitry
+V
2A
Input
Optical
Isolator
Y0 Y5
OUTPUT
L
+V
4
To LED
Common
COM
0
0
32
Optical
Isolator
+
To LED
Common
To all other output circuits
10
20
30
40
50
55 C
50
68
86
104
122
131F
Ambient Temperature (C/F)
To LED
Line
627 VDC
6240 VAC
The six output channels use terminals on the right side of the connector. Outputs are
organized into two banks of three normally-open relay contacts. Each bank has a
common terminal. The wiring example above shows all commons connected
together, but separate supplies and common circuits may be used. The equivalent
output circuit shows one channel of a typical bank. The relay contacts can switch AC
or DC voltages.
229
Installation, Wiring, and Specifications
D005DR
General
Specifications
Relay Output
Specifications
Communication Port 1
9600 baud (Fixed), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Slave)
MODBUS (Slave)
Communication Port 2
9600 baud (default), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Master/Slave)
MODBUS (Master/Slave)
Non-sequence / print
D2DSCBL
Operating Temperature
32 to 131 F (0 to 55_ C)
Storage Temperature
Relative Humidity
5 to 95% (non-condensing)
Environmental air
Vibration
Shock
Noise Immunity
NEMA ICS3304
Terminal Type
Removable
Wire Gauge
Parameter
HighSpeed Inputs, X0 X2
Standard DC Inputs X3 X7
12 -24 VDC
12 -24 VDC
Peak Voltage
30 VDC
100 s
N/A
ON Voltage Level
> 10 VDC
> 10 VDC
Input Impedance
1.8 k @ 12 24 VDC
2.8 k @ 12 24 VDC
6mA @12VDC
13mA @24VDC
4mA @12VDC
8.5mA @24VDC
Minimum ON Current
>5 mA
>4 mA
< 0.5 mA
<0.5 mA
OFF to ON Response
<100 s
2 8 mS, 4 mS typical
ON to OFF Response
< 100 s
2 8 mS, 4 mS typical
Status Indicators
Logic side
Logic side
Commons
Operating Voltage
Output Current
2A / point
6A / common
Maximum Voltage
5 mA
OFF to ON Response
< 15 mS
ON to OFF Response
< 10 mS
Status Indicators
Logic Side
Commons
Fuses
Installation, Wiring,
and Specifications
DC Input
Specifications
230
Installation, Wiring, and Specifications
Installation, Wiring,
and Specifications
The D005AD Micro PLC features eight AC inputs and six DC outputs. The following
D005AD
I/O Wiring Diagram diagram shows a typical field wiring example. The AC external power connection
uses four terminals at the left as shown.
Fuse
or
C.B.
Line
Neutral
Ground
Power
Input Wiring
AC or DC
Supply
+24 VDC
+
Input Point Wiring Output Point Wiring
Optical
Isolator
+V
1A
6
To LED
Y0 Y5
4
2
24VDC
OUTPUT
+ 627
VDC
+V
Common
To other circuits in bank
Points
Optical
Isolator
To LED
COM
0
32
10
20
30
40
50
55 C
50
68
86
104
122 131F
Ambient Temperature (C/F)
The eight AC input channels use terminals in the middle of the connector. Inputs are
organized into two banks of four. Each bank has an isolated common terminal. The
wiring example above shows all commons connected together, but separate
supplies and common circuits may be used. The equivalent input circuit shows one
channel of a typical bank.
The six current sinking DC output channels use terminals on the right side of the
connector. All outputs actually share the same electrical common. Note the
requirement for external power on the end (right-most) terminal. The equivalent
output circuit shows one channel of the bank of six.
231
Installation, Wiring, and Specifications
D005AD
General
Specifications
DC Output
Specifications
Communication Port 1
9600 baud (Fixed), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Slave)
MODBUS (Slave)
Communication Port 2
9600 baud (default), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Master/Slave)
MODBUS (Master/Slave)
Non-sequence / print
D2DSCBL
Operating Temperature
32 to 131 F (0 to 55_ C)
Storage Temperature
Relative Humidity
5 to 95% (non-condensing)
Environmental air
Vibration
Shock
Noise Immunity
NEMA ICS3304
Terminal Type
Removable
Wire Gauge
80 132 VAC, 47 - 63 Hz
90 120 VAC, 47 - 63 Hz
Input Current
Input Impedance
ON Current/Voltage
>6 mA @ 75 VAC
OFF Current/Voltage
<2 mA @ 20 VAC
OFF to ON Response
< 40 mS
ON to OFF Response
< 40 mS
Status Indicators
Logic Side
Commons
Parameter
Pulse Outputs, Y0 Y1
Standard Outputs, Y2 Y5
5 30 VDC
5 30 VDC
Operating Voltage
6 27 VDC
6 27 VDC
Peak Voltage
< 50 VDC
On Voltage Drop
0.3 VDC @ 1A
0.3 VDC @ 1A
1.0 A / point
15 A @ 30 VDC
15 A @ 30 VDC
2 A for 100 mS
2 A for 100 mS
OFF to ON Response
<10 S
< 10 S
ON to OFF Response
<30 S
< 60 S
Status Indicators
Logic Side
Logic Side
Commons
Fuses
None
None
Installation, Wiring,
and Specifications
AC Input
Specifications
232
Installation, Wiring, and Specifications
Installation, Wiring,
and Specifications
D005DD
These micro PLCs feature eight DC inputs and six DC outputs. The following
I/O Wiring Diagram diagram shows a typical field wiring example. The AC external power connection
uses four terminals at the left as shown.
Fuse
or
C.B.
Line
Neutral
Ground
Power
Input Wiring
+24 VDC
DC
Supply
+
Input Point Wiring Output Point Wiring
Equivalent Circuit,
Standard Inputs (X3 X7)
+V
+V
+V
1A
Input
Optical
Isolator
Y0 Y5
4
2
Common
+V
Input
Optical
Isolator
+
To LED
Common
To all other output circuits
+V
Optical
Isolator
OUTPUT
To LED
COM
0
32
24VDC
+ 627
VDC
To LED
Points
10
20
30
40
50
55 C
50
68
86
104
122 131F
Ambient Temperature (C/F)
The six current sinking DC output channels use terminals on the right side of the
connector. All outputs actually share the same electrical common. Note the
requirement for external power on the end (right-most) terminal. The equivalent
output circuit shows one channel of the bank of six.
233
Installation, Wiring, and Specifications
D005DD
General
Specifications
DC Output
Specifications
Communication Port 1
9600 baud (Fixed), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Slave)
MODBUS (Slave)
Communication Port 2
9600 baud (default), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Master/Slave)
MODBUS (Master/Slave)
Non-sequence / print
D2DSCBL
Operating Temperature
32 to 131 F (0 to 55_ C)
Storage Temperature
Relative Humidity
5 to 95% (non-condensing)
Environmental air
Vibration
Shock
Noise Immunity
NEMA ICS3304
Terminal Type
Removable
Wire Gauge
Parameter
HighSpeed Inputs, X0 X2
Standard DC Inputs X3 X7
12 24 VDC
12 24 VDC
Peak Voltage
30 VDC
100 s
N/A
ON Voltage Level
Input Impedance
1.8 k @ 12 24 VDC
2.8 k @ 12 24 VDC
Minimum ON Current
>5 mA
>4 mA
< 0.5 mA
<0.5 mA
OFF to ON Response
<100 S
2 8 mS, 4 mS typical
ON to OFF Response
< 100 S
2 8 mS, 4 mS typical
Status Indicators
Logic side
Logic side
Commons
Parameter
Pulse Outputs, Y0 Y1
Standard Outputs, Y3 Y5
5 30 VDC
5 30 VDC
Operating Voltage
6 27 VDC
6 27 VDC
Peak Voltage
< 50 VDC
On Voltage Drop
0.3 VDC @ 1 A
0.3 VDC @ 1 A
1.0 A / point
15 A @ 30 VDC
15 A @ 30 VDC
2 A for 100 mS
2 A for 100 mS
20 - 28 VDC
OFF to ON Response
< 10 s
< 10 s
ON to OFF Response
< 30 s
< 60 s
Status Indicators
Logic Side
Logic Side
Commons
Fuses
Max 150mA
20 - 28 VDC
Max 150mA
Installation, Wiring,
and Specifications
DC Input
Specifications
234
Installation, Wiring, and Specifications
Installation, Wiring,
and Specifications
The D005AA Micro PLC features eight AC inputs and six AC outputs. The following
D005AA
I/O Wiring Diagram diagram shows a typical field wiring example. The AC external power connection
uses four terminals at the left as shown.
Fuse
or
C.B.
Line
Neutral
Ground
Power
Input Wiring
AC
Supply
AC
Supply
Input
Optical
Isolator
0.5 A
6
To LED
Points
Y0 Y5
+V
OUTPUT
L
Optical
Isolator
4
2
Common
COM
0
To other circuits in bank
Line
0
32
10
20
30
40
50
55 C
50
68
86
104
122 131F
Ambient Temperature (C/F)
17240
VAC
COM
To LED
The eight AC input channels use terminals in the middle of the connector. Inputs are
organized into two banks of four. Each bank has an isolated common terminal. The
wiring example above shows all commons connected together, but separate
supplies and common circuits may be used. The equivalent input circuit shows one
channel of a typical bank.
The six output channels use terminals on the right side of the connector. Outputs are
organized into two banks of three triac switches. Each bank has a common terminal.
The wiring example above shows all commons connected together, but separate
supplies and common circuits may be used. The equivalent output circuit shows one
channel of a typical bank.
235
Installation, Wiring, and Specifications
D005AA
General
Specifications
AC Output
Specifications
Communication Port 1
9600 baud (Fixed), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Slave)
MODBUS (Slave)
Communication Port 2
9600 baud (default), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Master/Slave)
MODBUS (Master/Slave)
Non-sequence / print
D2DSCBL
Operating Temperature
32 to 131 F (0 to 55_ C)
Storage Temperature
Relative Humidity
5 to 95% (non-condensing)
Environmental air
Vibration
Shock
Noise Immunity
NEMA ICS3304
Terminal Type
Removable
Wire Gauge
80 132 VAC, 47 - 63 Hz
90 120 VAC, 47 - 63 Hz
Input Current
8 mA @100 VAC at 50 Hz
10 mA @100 VAC at 60 Hz
12 mA @132 VAC at 50 Hz
15 mA @132 VAC at 60 Hz
Input Impedance
ON Current/Voltage
> 6 mA @ 75 VAC
OFF Current/Voltage
< 2 mA @ 20 VAC
OFF to ON Response
< 40 mS
ON to OFF Response
< 40 mS
Status Indicators
Logic Side
Commons
15 264 VAC, 47 63 Hz
Operating Voltage
17 240 VAC, 47 63 Hz
On Voltage Drop
Max Current
10 A for 10 mS
Minimum Load
10 mA
OFF to ON Response
1 mS
ON to OFF Response
1 mS +1/2 cycle
Status Indicators
Logic Side
Commons
Fuses
Installation, Wiring,
and Specifications
AC Input
Specifications
236
Installation, Wiring, and Specifications
Installation, Wiring,
and Specifications
The D005DA Micro PLC features eight DC inputs and six AC outputs. The following
D005DA
I/O Wiring Diagram diagram shows a typical field wiring example. The AC external power connection
uses four terminals at the left as shown.
Fuse
or
C.B.
Line
Neutral
Ground
Power
Input Wiring
DC
Supply
AC
Supply
Points
+V
Optical
Isolator
0.5 A
Input
Y0 Y5
+V
OUTPUT
L
Optical
Isolator
4
To LED
2
COM
Common
Line
0
32
Optical
Isolator
+
To LED
Common
To all other output circuits
10
20
30
40
50
55 C
50
68
86
104
122 131F
Ambient Temperature (C/F)
17240
VAC
To LED
The six output channels use terminals on the right side of the connector. Outputs are
organized into two banks of three triac switches. Each bank has a common terminal.
The wiring example above shows all commons connected together, but separate
supplies and common circuits may be used. The equivalent output circuit shows one
channel of a typical bank.
237
Installation, Wiring, and Specifications
D005DA
General
Specifications
AC Output
Specifications
Communication Port 1
9600 baud (Fixed), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Slave)
MODBUS (Slave)
Communication Port 2
9600 baud (default), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Master/Slave)
MODBUS (Master/Slave)
Non-sequence/print
D2DSCBL
Operating Temperature
32 to 131 F (0 to 55_ C)
Storage Temperature
Relative Humidity
5 to 95% (non-condensing)
Environmental air
Vibration
Shock
Noise Immunity
NEMA ICS3304
Terminal Type
Removable
Wire Gauge
Parameter
HighSpeed Inputs, X0 X2
Standard DC Inputs X3 X7
12 24 VDC
12 24 VDC
Maximum Voltage
30 VDC
100 S
N/A
ON Voltage Level
> 10 VDC
> 10 VDC
Input Impedance
1.8 k @ 12 24 VDC
2.8 k @ 12 24 VDC
Minimum ON Current
>5 mA
>4 mA
< 0.5 mA
<0.5 mA
OFF to ON Response
<100 S
2 8 mS, 4 mS typical
ON to OFF Response
< 100 S
2 8 mS, 4 mS typical
Status Indicators
Logic side
Logic side
Commons
15 264 VAC, 47 63 Hz
Operating Voltage
17 240 VAC, 47 63 Hz
On Voltage Drop
Max Current
10 A for 10 mS
Minimum Load
10 mA
OFF to ON Response
1 mS
ON to OFF Response
1 mS +1/2 cycle
Status Indicators
Logic Side
Commons
Fuses
Installation, Wiring,
and Specifications
DC Input
Specifications
238
Installation, Wiring, and Specifications
These micro PLCs feature eight DC inputs and six relay contact outputs. The
D005DRD
I/O Wiring Diagram following diagram shows a typical field wiring example. The DC external power
connection uses three terminals at the left as shown.
1224 V
20 W max.
Installation, Wiring,
and Specifications
Fuse
+
1224 VDC
Ground
Power
Input Wiring
AC or DC
Supply
DC
Supply
Points
Internal module circuitry
+V
2A
Input
Optical
Isolator
Y0 Y5
OUTPUT
L
+V
4
To LED
Common
COM
0
0
32
Optical
Isolator
+
To LED
Common
To all other output circuits
10
20
30
40
50
55 C
50
68
86
104
122
131F
Ambient Temperature (C/F)
To LED
Line
627 VDC
6240 VAC
The six output channels use terminals on the right side of the connector. Outputs are
organized into two banks of three normally-open relay contacts. Each bank has a
common terminal. The wiring example above shows all commons connected
together, but separate supplies and common circuits may be used. The equivalent
output circuit shows one channel of a typical bank. The relay contacts can switch AC
or DC voltages.
239
Installation, Wiring, and Specifications
D005DRD
General
Specifications
Relay Output
Specifications
12 24 VDC, 20 W maximum,
Communication Port 1
9600 baud (Fixed), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Slave)
MODBUS (Slave)
Communication Port 2
9600 baud (default), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Master/Slave)
MODBUS (Master/Slave)
Non-sequence / print
D2DSCBL
Operating Temperature
32 to 131 F (0 to 55_ C)
Storage Temperature
Relative Humidity
5 to 95% (non-condensing)
Environmental air
Vibration
Shock
Noise Immunity
NEMA ICS3304
Terminal Type
Removable
Wire Gauge
Parameter
HighSpeed Inputs, X0 X2
Standard DC Inputs X3 X7
12 -24 VDC
12 -24 VDC
Peak Voltage
30 VDC
100 s
N/A
ON Voltage Level
> 10 VDC
> 10 VDC
Input Impedance
1.8 k @ 12 24 VDC
2.8 k @ 12 24 VDC
6mA @12VDC
13mA @24VDC
4mA @12VDC
8.5mA @24VDC
Minimum ON Current
>5 mA
>4 mA
< 0.5 mA
<0.5 mA
OFF to ON Response
<100 s
2 8 mS, 4 mS typical
ON to OFF Response
< 100 s
2 8 mS, 4 mS typical
Status Indicators
Logic side
Logic side
Commons
Operating Voltage
Output Current
2A / point
6A / common
Maximum Voltage
5 mA
OFF to ON Response
< 15 mS
ON to OFF Response
< 10 mS
Status Indicators
Logic Side
Commons
Fuses
Installation, Wiring,
and Specifications
DC Input
Specifications
240
Installation, Wiring, and Specifications
D005DDD
These micro PLCs feature eight DC inputs and six DC outputs. The following
I/O Wiring Diagram diagram shows a typical field wiring example. The DC external power connection
uses four terminals at the left as shown.
1224 V
20 W max.
Installation, Wiring,
and Specifications
Fuse
+
1224 VDC
Ground
Power
Input Wiring
+24 VDC
DC
Supply
+
Input Point Wiring Output Point Wiring
Equivalent Circuit,
Standard Inputs (X3 X7)
+V
+V
+V
1A
Input
Optical
Isolator
Y0 Y5
4
2
Common
+V
Input
Optical
Isolator
+
To LED
Common
To all other output circuits
+V
Optical
Isolator
OUTPUT
To LED
COM
0
32
24VDC
+ 627
VDC
To LED
Points
10
20
30
40
50
55 C
50
68
86
104
122 131F
Ambient Temperature (C/F)
The six current sinking DC output channels use terminals on the right side of the
connector. All outputs actually share the same electrical common. Note the
requirement for external power on the end (right-most) terminal. The equivalent
output circuit shows one channel of the bank of six.
241
Installation, Wiring, and Specifications
D005DDD
General
Specifications
DC Output
Specifications
12 24 VDC, 20 W maximum,
Communication Port 1
9600 baud (Fixed), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Slave)
MODBUS (Slave)
Communication Port 2
9600 baud (default), 8 data bits, 1 stop bit,
odd parity
KSequence (Slave)
DirectNET (Master/Slave)
MODBUS (Master/Slave)
Non-sequence / print
D2DSCBL
Operating Temperature
32 to 131 F (0 to 55_ C)
Storage Temperature
Relative Humidity
5 to 95% (non-condensing)
Environmental air
Vibration
Shock
Noise Immunity
NEMA ICS3304
Terminal Type
Removable
Wire Gauge
Parameter
HighSpeed Inputs, X0 X2
Standard DC Inputs X3 X7
12 24 VDC
12 24 VDC
Peak Voltage
30 VDC
100 s
N/A
ON Voltage Level
Input Impedance
1.8 k @ 12 24 VDC
2.8 k @ 12 24 VDC
Minimum ON Current
>5 mA
>4 mA
< 0.5 mA
<0.5 mA
OFF to ON Response
<100 S
2 8 mS, 4 mS typical
ON to OFF Response
< 100 S
2 8 mS, 4 mS typical
Status Indicators
Logic side
Logic side
Commons
Parameter
Pulse Outputs, Y0 Y1
Standard Outputs, Y3 Y5
5 30 VDC
5 30 VDC
Operating Voltage
6 27 VDC
6 27 VDC
Peak Voltage
< 50 VDC
On Voltage Drop
0.3 VDC @ 1 A
0.3 VDC @ 1 A
1.0 A / point
15 A @ 30 VDC
15 A @ 30 VDC
2 A for 100 mS
2 A for 100 mS
20 - 28 VDC
OFF to ON Response
< 10 s
< 10 s
ON to OFF Response
< 30 s
< 60 s
Status Indicators
Logic Side
Logic Side
Commons
Fuses
Max 150mA
20 - 28 VDC
Max 150mA
Installation, Wiring,
and Specifications
DC Input
Specifications
242
Installation, Wiring, and Specifications
Installation, Wiring
and Specifications
D010ND3 DC Input
Inputs per module
10 (sink/source)
10.826.4 VDC
1224 VDC
Peak voltage
30.0 VDC
Input current
Typical:
4.0 mA @ 12 VDC
8.5 mA @ 24 VDC
11 mA @ 26.4 VDC
Input impedance
ON voltage level
Minimum ON current
3.5 mA
0.5 mA
OFF to ON response
28 ms, typical 4 ms
ON to OFF response
28 ms, typical 4 ms
Status indicators
Module activity:
one green LED
2 nonisolated
Fuse
N/A
Installation and
Safety Guidelines
Derating Chart
0
32
10
20
30
40
50 55 C
50
68
86
104
122 131 F
Ambient Temperature (C/F)
Equivalent circuit
Internal module circuitry
V+
INPUT
To LED
COM
Optical
Isolator
1224VDC
COM
Configuration shown is current sinking
Note: The DL05 must have firmware version V4.10 (or later) for this module to function properly.
243
Installation, Wiring, and Specifications
D016ND3 DC Input
16 (sink/source)
2028 VDC
24 VDC
Peak voltage
30.0 VDC
Input current
Typical:
4.0 mA @ 24 VDC
6 mA @ 28 VDC
Input impedance
4.7k @ 24 VDC
ON voltage level
Minimum ON current
3.5 mA
1.5 mA
OFF to ON response
28 ms, typical 4 ms
ON to OFF response
28 ms, typical 4 ms
Status indicators
Module activity:
one green LED
4 nonisolated
Fuse
N/A
Derating Chart
0
32
Configuration shown is
for current sinking
Installation and
Safety Guidelines
10
20
30
40
50 55 C
50
68
86
104
122 131 F
Ambient Temperature (C/F)
Installation, Wiring,
and Specifications
244
Installation, Wiring, and Specifications
Installation, Wiring
and Specifications
D010TD1 DC Output
Outputs per module
10 (sinking)
627 VDC
530 VDC
Peak voltage
50.0 VDC
0.5 mA
15 A @ 30.0 VDC
ON voltage drop
1 A for 10 ms
OFF to ON response
< 10 s
ON to OFF response
< 60 s
Status indicators
Module activity:
one green LED
2 nonisolated
(5 points/common)
Fuse
N/A
Installation and
Safety Guidelines
Derating Chart
0
32
10
20
30
40
50 55 C
50
68
86
104
122 131 F
Ambient Temperature (C/F)
Equivalent circuit
Note: The DL05 must have firmware version V4.10 (or later) for this module to function properly.
245
Installation, Wiring, and Specifications
D016TD1 DC Output
16 (sinking)
627 VDC
530 VDC
Peak Voltage
50.0 VDC
0.5 mA
15 A @ 30.0 VDC
On voltage drop
1 A for 10 ms
OFF to ON response
< 0.5 ms
ON to OFF response
< 0.5 ms
Status indicators
Module activity:
one green LED
2 isolated (8 points/common)
Fuse
N/A
Installation, Wiring,
and Specifications
Derating Chart
24 VDC
627 VDC
10
20
30
40
50 55 C
50
68
86
104
122 131 F
Ambient Temperature (C/F)
Installation and
Safety Guidelines
0
32
627
VDC
246
Installation, Wiring, and Specifications
Installation, Wiring
and Specifications
D010TD2 DC Output
Outputs per module
10 (sourcing)
1224 VDC
10.826.4 VDC
Peak voltage
50.0 VDC
0.5 mA
ON voltage drop
1 A for 10 ms
OFF to ON response
< 10 s
ON to OFF response
< 60 s
Status indicators
Module activity:
one green LED
2 nonisolated
(5 points/common)
Fuse
N/A
Installation and
Safety Guidelines
Derating Chart
0
32
10
20
30
40
50 55 C
50
68
86
104
122 131 F
Ambient Temperature (C/F)
Equivalent circuit
Note: The DL05 must have firmware version V4.10 (or later) for this module to function properly.
247
Installation, Wiring, and Specifications
D016TD2 DC Output
16 (sourcing)
1224 VDC
10.826.4 VDC
Peak Voltage
50.0 VDC
0.5 mA
ON voltage drop
1 A for 10 ms
OFF to ON response
< 0.5 ms
ON to OFF response
< 0.5 ms
Status indicators
Module activity:
one green LED
2 nonisolated
(8 points/common)
Fuse
N/A
Derating Chart
10
20
30
40
50 55 C
50
68
86
104
122 131 F
Ambient Temperature (C/F)
Installation and
Safety Guidelines
0
32
Installation, Wiring,
and Specifications
248
Installation, Wiring, and Specifications
Installation, Wiring
and Specifications
Input Specification
Output Specification
4 (sink/source)
1224 VDC
10.826.4 VDC
Output type
Peak voltage
30.0 VDC
Peak voltage
11 mA @ 26.4 VDC
1 A/point, 4 A/common
Input current
Typical: 4 mA @ 12 VDC
8.5 mA @ 24 VDC
5 mA @ 5 VDC
Input impedance
ON voltage drop
N/A
ON voltage level
Output: 3 A for 10 ms
Common: 10 A for 10 ms
Minimum ON current
3.5 mA
OFF to ON response
< 15 ms
0.5 mA
ON to OFF response
< 10 ms
ON to OFF response
28 ms, typical 4 ms
Status indicators
OFF to ON response
28 ms, typical 4 ms
Module activity:
one green LED
Commons
1 (4 points / common)
Commons
1 (3 points/common)
Fuse
N/A
Installation and
Safety Guidelines
0
32
10
20
30
40
50 55 C
50
68
86
104
122 131 F
Ambient Temperature (C/F)
0
32
10
20
30
40
50 55 C
50
68
86
104
122 131 F
Ambient Temperature (C/F)
Note: The DL05 must have firmware version V4.10 (or later) for this module to function properly.
249
Installation, Wiring, and Specifications
Output type
Peak voltage
1 A/point, 4 A/common
0.5 mA
ON voltage drop
N/A
Output: 3 A for 10 ms
Common: 10 A for 10 ms
OFF to ON response
< 15 ms
ON to OFF response
< 10 ms
Status indicators
Module activity:
one green LED
2 isolated
(4 points/common)
Fuse
N/A
Installation, Wiring,
and Specifications
Derating Chart
10
20
30
40
50 55 C
50
68
86
104
122 131 F
Ambient Temperature (C/F)
Equivalent circuit
Note: The DL05 must have firmware version V4.10 (or later) for this module to function properly.
Installation and
Safety Guidelines
0
32
250
Installation, Wiring, and Specifications
Installation, Wiring
and Specifications
Input Specification
Output Specification
4 (sink/source)
4 (sinking)
10.826.4 VDC
627 VDC
1224 VDC
530 VDC
Peak voltage
30.0 VDC
Peak voltage
50.0 VDC
11 mA @ 26.4 VDC
Input current
Typical: 4 mA @ 12 VDC
8.5 mA @ 24 VDC
0.5 mA
Input impedance
ON voltage drop
ON voltage level
1 A for 10 ms
OFF to ON response
< 10 s
Minimum ON current
3.5 mA
ON to OFF response
< 60 s
0.5 mA
Status indicators
ON to OFF response
28 ms, typical 4 ms
Module activity:
one green LED
OFF to ON response
28 ms, typical 4 ms
Commons
2 nonisolated (4 pts./common)
Commons
2 nonisolated (4 pts./common)
Fuse
N/A
Installation and
Safety Guidelines
0
32
10
20
30
40
50 55 C
50
68
86
104
122 131 F
Ambient Temperature (C/F)
0
32
10
20
30
40
50 55 C
50
68
86
104
122 131 F
Ambient Temperature (C/F)
Note: The DL05 must have firmware version V4.10 (or later) for this module to function properly.
251
Installation, Wiring, and Specifications
I/O Addressing
Module I/O Points
and Addressing
Each option module has a set number of I/O points. This holds true for both the
discrete modules and the analog modules. The following chart shows the number of
I/O points per module when used in the DL05 PLC.
DC Input Modules
D010ND3
D016ND
DC Output Modules
I/O Points
10 Input
16 Input
I/O Points
10 Output
D016TD1
16 Output
D010TD2
10 Output
D016TD2
16 Output
I/O Points
8 Output
Combination Modules
I/O Points
D007CDR
4 Input, 3 Output
D008CDD1
4 Input, 4 Output
Installation, Wiring,
and Specifications
D010TD1
Installation and
Safety Guidelines
Introduction
Choosing the HSIO Operating Mode
Mode 10: HighSpeed Counter
Mode 20: Quadrature Counter
Mode 30: Pulse Output
Mode 40: HighSpeed Interrupt
Mode 50: Pulse Catch Input
Mode 60: Filtered Inputs
13
32
High-speed Input and Pulse Output Features
Introduction
Built-in Motion
Control Solution
Availability of
HSIO Features
Discrete
Input Type
Discrete
Output Type
High-Speed
Input
Pulse
Output
D005AR
AC
Relay
No
No
D005DR
DC
Relay
Yes
No
D005AD
AC
DC
No
Yes
D005DD
DC
DC
Yes
Yes
D005AA
AC
AC
No
No
D005DA
DC
AC
Yes
No
D005DRD
DC
Relay
Yes
No
D005DDD
DC
DC
Yes
Yes
33
High-Speed Input and Pulse Output Features
The internal CPUs main task is to execute the ladder program and read/write all I/O
points during each scan. In order to service high-speed I/O events, the DL05
includes a special circuit which is dedicated to a portion of the I/O points. Refer to the
DL05 block diagram in the figure below.
6 Discrete Outputs
DL05
PLC
Output Circuit
Y0, Y1
Y2 - Y5
High-Speed
I/O Circuit
CPU
X0 - X2
X3- X7
Input Circuit
8 Discrete Inputs
Wiring Diagrams
for Each HSIO
Mode
After choosing the appropriate HSIO mode for your application, youll need to refer to
the section in this chapter for that specific mode. Each section includes wiring
diagram(s) to help you connect the High-Speed I/O points correctly to field devices.
An example of the quadrature counter mode diagram is shown below.
Signal Common
Phase B
+
Phase A
12 24 VDC
The high-speed I/O circuit (HSIO) is dedicated to the first three inputs (X0 X2) and
the first two outputs (Y0 Y1). We might think of this as a CPU helper. In the default
operation (called Mode 60) the HSIO circuit just passes through the I/O signals to
or from the CPU, so that all eight inputs behave equally and all six outputs behave
equally. When the CPU is configured in any other HSIO Mode, the HSIO circuit
imposes a specialized function on the portion of inputs and outputs shown. The
HSIO circuit operates independently of the CPU program scan. This provides
accurate measurement and capturing of high-speed I/O activity while the CPU is
busy with ladder program execution.
34
High-speed Input and Pulse Output Features
Understanding the The High-Speed I/O circuit operates in one of 6 basic modes as listed in the table
below. The number in the left column is the mode number (later, well use these
Six Modes
numbers to configure the PLC). Choose one of the following modes according to the
primary function you want from the dedicated High-Speed I/O circuit. You can simply
use all eight inputs and six outputs as regular I/O points with Mode 60.
Mode
Number
Mode Name
10
High-Speed
Counter
20
Quadrature
Counter
30
Pulse Output
40
High-Speed
Interrupt
50
Pulse Catch
60
Mode Features
In choosing one of the six high-speed I/O modes, the I/O points listed in the table
below operate only as the function listed. If an input point is not specifically used to
support a particular mode, it usually operates as a filtered input by default. Similarly,
output points operate normally unless Pulse Output mode is selected.
Physical I/O Point Usage
DC Input Points
DC Output Points
Mode
X0
X1
X2
Y0
Y1
High-Speed
Counter
Counter clock
Filtered Input
Filtered Input
or Reset Cnt
Regular Output
Regular Output
Quadrature
Counter
Phase A Input
Phase B Input
Filtered Input
or Reset Cnt
Regular Output
Regular Output
High-Speed
Interrupt
Interrupt Input
Filtered Input
Filtered Input
Regular Output
Regular Output
Pulse Catch
Pulse Input
Filtered Input
Filtered Input
Regular Output
Regular Output
Pulse Output
Filtered Input
Filtered Input
Filtered Input,
Pulse
or
CW Pulse
Direction
or
CCW Pulse
Filtered Input
Filtered Input
Filtered Input
Filtered Input
Regular Output
Regular Output
Default Mode
Mode 60 (Filtered Inputs) is the default mode. The DL05 is initialized to this mode at
the factory, and any time you reset V-memory scratchpad. In the default condition,
X0X2 are filtered inputs (10 mS delay) and Y0Y1 are standard outputs.
35
High-Speed Input and Pulse Output Features
Configuring the
HSIO Mode
If you have chosen a mode suited to the high-speed I/O needs of your application,
were ready to proceed to configure the PLC to operate accordingly. In the block
diagram below, notice the V-memory detail in the expanded CPU block. V-memory
location V7633 determines the functional mode of the high-speed I/O circuit. This is
the most important V-memory configuration value for HSIO functions!
Output Circuit
DL05
PLC
Y0, Y1
Y2 - Y5
CPU
I/O data
HighSpeed
I/O Circuit
Vmemory
Mode Select
V7633
X0 - X2
xxxx
X3- X7
Input Circuit
15
14
13
12 11
10
Bits 0 7 define the mode number 00, 10.. 60 previously referenced in this chapter.
The example data 2050 shown selects Mode 50 Pulse Catch (BCD = 50). The
DL05 PLC ignores bits 8 - 15 in V7633.
Configuring
Inputs X0 X2
Vmemory
Mode
X0
X1
X2
V7633
V7634
V7635
V7636
xxxx
xxxx
xxxx
xxxx
36
High-speed Input and Pulse Output Features
Functional Block
Diagram
The HSIO circuit contains one high-speed counter. A single pulse train from an
external source (X0) clocks the counter on each signal leading edge. The counter
counts only upwards, from 0 to 99999999. The counter compares the current count
with up to 24 preset values, which you define. The purpose of the presets is to quickly
cause an action upon arrival at specific counts, making it ideal for such applications
as cut-to-length. It uses counter registers CT76 and CT77 in the CPU.
Refer to the block diagram below. When the lower byte of HSIO Mode register V7633
contains a BCD 10, the high-speed up counter in the HSIO circuit is enabled. X0
automatically becomes the clock input for the high-speed counter, incrementing it
upon each off-to-on transition. The external reset input on X2 is the default
configuration for Mode 10. Input X1 is the filtered input, available to the ladder
program.
DL05
PLC
Output Circuit
Y0, Y1
HSIO
I/O data
COUNTER
CLK
Reset
X0
X2
Y2 - Y5
FILTER
Mode Select
X1
CPU
Vmemory
V7633
0010
X3- X7
Input Circuit
DL05
PLC
Output Circuit
Y0, Y1
HSIO
I/O data
COUNTER
CLK
X0
Reset
Y2 - Y5
FILTER
Mode Select
X1, X2
CPU
Vmemory
V7633
0010
X3- X7
Input Circuit
Next, we will discuss how to program the high-speed counter and its presets.
37
High-Speed Input and Pulse Output Features
Wiring Diagram
Signal
Signal Common
Interfacing to
Counter Outputs
The DL05s DC inputs are flexible in that they detect current flow in either direction,
so they can be wired to a counter with either sourcing or sinking outputs. In the
following circuit, a counter has open-collector NPN transistor outputs. It sinks
current from the PLC input point, which sources current. The power supply can be
the FA24PS or another supply (+12VDC or +24VDC), as long as the input
specifications are met.
Counter Output
X0 Input
Input
(sourcing)
Output
(sinking)
1224 VDC Supply
Ground
Common
In the next circuit, an encoder has open-emitter PNP transistor outputs. It sources
current to the PLC input point, which sinks the current back to ground. Since the
encoder sources current, no additional power supply is required. However, note that
the encoder output must be 12 to 24 volts (5V encoder outputs will not work).
Counter Output
X0 Input
+12 to 24VDC
Input
Output (sourcing)
Ground
(sinking)
Common
38
High-speed Input and Pulse Output Features
Recall that V7633 is the HSIO Mode Select register. Refer to the diagram below. Use
BCD 10 in the lower byte of V7633 to select the High-Speed Counter Mode. The
DL05 does not use bits 8 - 15 in V7633.
Memory Location V7633
Bits
15
14
13
12 11
10
10 = High-Speed Counter
Presets and
Special Relays
Choose the most convenient method of programming V7633 from the following:
S Include load and out instructions in your ladder program
S DirectSOFTs memory editor or Data View
S Use the Handheld Programmer D2HPP
We recommend using the first method above so that the HSIO setup becomes an
integral part of your application program. An example program later in this section
shows how to do this.
The goal of counting is to do a special action when the count reaches a preset value.
Refer to the figure below. The counter features 24 presets, which you can program.
A preset is a number you derive and store so that the counter will constantly compare
the current count with the preset. When the two are equal, a special relay contact is
energized and program execution jumps to the interrupt routine. We recommend
using the special relay(s) in the interrupt service routine to cause any immediate
action you desire. After the interrupt service routine is complete, the CPU returns to
the ladder program, resuming program execution from the point of interruption. The
compare function is ready for the next preset event.
CPU Scan
Counter
Input
Update
Current
Value
Reset
0000
0000
0000
0000
1000
2000
2500
3175
V2376
0921
0000
Does
Count =
Preset?
Ladder
Program
Execution
Current
instruction
Output
Update
INT
HSIO
Interrupt
Routine
Program
SPxxx
IRT
39
High-Speed Input and Pulse Output Features
Preset Data
Starting Location
V7630
2000
Preset Data
LDA
O2000
OUT
V7630
V2000
V2002
V2004
V2006
0000
0000
0000
0000
1000
2000
2500
3175
V2076
0000
0000
Preset Data
V2320
V2322
V2324
V2326
V2330
0000
0000
0000
0000
0000
1000
2000
2500
3175
FFFF
NOTE: Each successive preset must be greater than the previous preset value. If a
preset value is less than a lower-numbered preset value, the CPU cannot compare
for that value, since the counter can only count upwards.
Equal Relay
Numbers
The following table lists all 24 preset register default locations. Each occupies two
16-bit V-memory registers. The corresponding special relay contact number is in the
next column. We might also call these equal relay contacts, because they are true
(closed) when the present high-speed counter value is equal to the preset value.
Each contact remains closed until the counter value equals the next preset value.
Preset
Preset
V-memory Register
Special
Relay
Number
Preset
Preset
V-memory Register
Special
Relay
Number
V2321 / V2320
SP540
13
V2351 / V2350
SP554
V2323 / V2322
SP541
14
V2353 / V2352
SP555
V2325 / V2324
SP542
15
V2355 / V2354
SP556
V2327 / V2326
SP543
16
V2357 / V2356
SP557
V2331 / V2330
SP544
17
V2361 / V2360
SP560
V2333 / V2332
SP545
18
V2363 / V2362
SP561
V2335 / V2334
SP546
19
V2365 / V2364
SP562
V2337 / V2336
SP547
20
V2367 / V2366
SP563
V2341 / V2340
SP550
21
V2371 / V2370
SP564
10
V2343 / V2342
SP551
22
V2373 / V2372
SP565
11
V2345 / V2344
SP552
23
V2375 / V2374
SP566
12
V2347 / V2346
SP553
24
V2377 / V2376
SP567
310
High-speed Input and Pulse Output Features
Calculating Your
Preset Values
The preset values occupy two data words each. They can range in value from 0000
0000 to 9999 9999, just like the high-speed counter value. All 24 values are absolute
values, meaning that each one is an offset from the counter zero value.
The preset values must be individually derived for each application. In the industrial
lathe diagram below, the PLC monitors the position of the lead screw by counting
pulses. At points A, B, and C along the linear travel, the cutter head pushes into the
work material and cuts a groove.
PLC
Industrial Lathe
A
Counter
Device
Motor
Start
The timing diagram below shows the duration of each equal relay contact closure.
Each contact remains on until the next one closes. All go off when the counter resets.
Equal Relays
SP540
SP541
SP542
NOTE: Each successive preset must be two numbers greater than the previous
preset value. In the industrial lathe example, B>A+1 and C>B+1.
X Input
Configuration
The configurable discrete input options for High-Speed Counter Mode are listed in
the table below. Input X0 is dedicated for the counter clock input. Input X1 can be a
normal or filtered input. The section on Mode 60 operation at the end of this chapter
describes programming the filter time constants. Input X2 can be configured as the
counter reset, with or without the interrupt option. The interrupt option allows the
reset input (X2) to cause an interrupt like presets do, but there is no SP relay contact
closure (instead, X2 will be on during the interrupt routine, for 1 scan). Or finally, X2
may be left simply as a filtered input.
311
High-Speed Input and Pulse Output Features
Input
Configuration
Register
Function
Hex Code
Required
X0
V7634
Counter Clock
0001
X1
V7635
Filtered Input
X2
V7636
0007* (default)
0207*
0107*
0307*
FIltered Input
*With the counter reset, you have the option of a normal reset or a faster reset.
However, the fast reset does not recognize changed preset values during program
execution. When 0007 or 0107 are set in V7636 and preset values are changed
during program execution, the DL05 recognizes the changed preset values at the
time of the reset. When 0207 or 0307 are set in V7636 the CPU does not check for
changed preset values, so the DL05 has a faster reset time.
You may recall that the counter instruction is a standard instruction in the DL05
instruction set. Refer to the figure below. The mnemonic for the counter is UDC
(up-down counter).The DL05 can have up to 128 counters, labeled CT0 through
CT177. The high speed counter in the HSIO circuit is accessed in ladder logic by
using UDC CT76. It uses counter registers CT76 and CT77 exclusively when the
HSIO mode 10 is active (otherwise, CT76 and CT77 are available for standard
counter use). The HSIO counter needs two registers because it is a double-word
counter. It has three inputs as shown. The first input (Enable) allows counting when
active. The middle input is a dummy and has no fuction other than it is required by the
built-in compiler. The bottom signal is the reset. The Dummy Input must be off while
the counter is counting.
Standard Counter Function
UP Count
UDC
CTxx
DOWN Count
Reset Input
UDC
CT76
Dummy Input
Kxxxxxxxx
Reset Input
Kxxxxxxxx
D Counts UP only
D Can use Dummy Input to change count
D Reset may be internal or external
Writing Your
Control Program
312
High-speed Input and Pulse Output Features
The next figure shows how the HSIO counter will appear in a ladder program. Note
that the Enable Interrupt (ENI) command must execute before the counter value
reaches the first preset value. We do this at powerup by using the first scan relay.
When using the counter but not the presets and interrupt, we can omit the ENI.
DirectSOFT
SP1
ENI
Required
XX
Enable Input
XX
XX
Dummy Input
Reset Input
UDC
CT76
Kxxxxxxxx
Preset Range:
1-99999999
When the enable input is energized, the high-speed counter will respond to pulses
on X0 and increment the counter at CT76 CT77. The reset input contact behaves in
a logical OR fashion with the physical reset input X2 (when selected). So,the high
speed counter can receive a reset form either the contact(s) on the reset rung in the
ladder, OR the external reset X2 if you have configured X2 as an external reset.
Program Example: The following example is the simplest way to use the high-speed counter, which
does not use the presets and special relays in the interrupt routine. The program
Counter Without
configures the HSIO circuit for Mode 10 operation, so X0 is automatically the counter
Preset
clock input. It uses the Compare-double (CMPD) instruction to cause action at
certain count values. Note that this allows you to have more than 24 presets.Then it
configures X2 to be the external reset of the counter.
313
High-Speed Input and Pulse Output Features
Program
Example Contd
DirectSOFT
LD
K10
Mode 10
OUT
V7633
LD
K1
OUT
V7634
Configure
Inputs
LD
K1006
OUT
V7635
LD
K7
SP1
UDC
CT76
SP1
Kxxxxxxxx
SP1
SP1
LDD
V1076
CMPD
K309482
SP62
Y0
OUT
END
The compare double instruction above uses the current count of the HSIO counter to
turn on Y0. This technique can make more than 24 comparisons, but it is scan-time
dependent. However, use the 24 built-in presets with the interrupt routine if your
application needs a very fast response time, as shown in the next example.
OUT
V7636
314
High-speed Input and Pulse Output Features
Counter With
Presets
Program Example
Preset Data
The following example shows how to program the HSIO circuit to trigger on three
preset values. You may recall the industrial lathe example from the beginning of this
chapter. This example program shows how to control the lathe cutter head to make
three grooves in the work-piece at precise positions. When the lead screw turns, the
counter device generates pulses which the DL05 can count. The three preset
variables A, B, and C represent the positions (number of pulses) corresponding to
each of the three grooves.
A V2320 0000
B V2322 0000
C V2324 0000
V2326
I/O
Assignments
0000
1500
3780
4850
FFFF
Industrial Lathe
A
Counter
Device
Start
Cutter head
Lead screw
DirectSOFT
SP0
ENI
SP0
LD
K10
OUT
V7633
LD
K1
OUT
V7634
Select Mode 10
SP0
Load Presets
LD
K107
OUT
V7636
LDA
O2320
OUT
V7630
LDD
K1500
OUTD
V2320
LDD
K3780
OUTD
V2322
315
High-Speed Input and Pulse Output Features
LDD
K4850
OUTD
V2324
LDD
Kffff
OUTD
V2326
SP1
UDC
CT76
SP1
Kxxxxxxxx
SP1
The third rungs Reset input is normally off,
because we will use the external reset. You can
optionally reset the counter value on each powerup
using the SP0 contact.
SP0
Y1
RST
X4
Y0
SET
END
INT
O0
SP540
Preset 1
Y0
RSTI
Y1
SETI
SP541
Preset 2
SP542
Preset 3
X2
C10
SETI
IRT
Some applications will require a different type of action at each preset. It is possible
for the interrupt routine to distinguish one preset event from another, by turning on a
unique output for each equal relay contact SPxxx. We can determine the source of
the interrupt by examining the equal relay contacts individually, as well as X2. The X2
contact will be on (inside the interrupt routine only) if the interrupt was caused by the
external reset, X2 input.
X3
316
High-speed Input and Pulse Output Features
Counter With
Preload
Program Example
The following example shows how you can preload the current count with another
value. When the preload command input (X4 in this example) is energized, we
disable the counter from counting with C0. Then we write the value K3000 to the
count register (V1076-V1077). We preload the current count of the counter with
K3000. When the preload command (X4) is turned off, the counter resumes counting
any pulses, but now starting from K3000.
DirectSOFT
SP0
LD
K10
Select Mode 10
OUT
V7633
LD
K1
OUT
V7634
LD
K107
OUT
V7636
C0
SET
C0
UDC
CT76
C1
K99999999
C2
The third rungs Reset input is normally off,
because we will use the external reset. You can
optionally reset the counter value on each powerup
using the SP0 contact.
SP0
X4
C0
RST
LDD
K3000
OUTD
V1076
C0
C1
C1
PD
C0
SET
END
317
High-Speed Input and Pulse Output Features
Troubleshooting
Guide for Mode 10
If youre having trouble with Mode 10 operation, please study the following
symptoms and possible causes. The most common problems are listed below.
318
High-speed Input and Pulse Output Features
Functional Block
Diagram
The counter in the HSIO circuit can count two quadrature signal pulses instead of a
single pulse train (mode 10 operation). Quadrature signals are commonly generated
from incremental encoders, which may be rotary or linear. The quadrature counter
has two ranges from 0 to 99999999 or -8388608 to 8388607. Using CT76 and CT77,
the quadrature counter can count at up to a 5 kHz rate. Unlike Mode 10 operation,
Mode 20 operation can count UP or DOWN, but does not feature automated preset
values or interrupt on external reset capability. However, you have the standard
ladder instruction preset of CT76.
The diagram below shows HSIO functionality in Mode 20. When the lower byte of
HSIO Mode register V7633 contains a BCD 20, the quadrature counter in the HSIO
circuit is enabled. Input X0 is dedicated to the Phase A quadrature signal, and input
X1 receives Phase B signal. X2 is dedicated to reset the counter to zero value when
energized.
DL05
PLC
Output Circuit
Y0, Y1
HSIO
I/O data
COUNTER
Phase
A
Mode Select
Phase
Reset
B
X0
X1
Y2 - Y5
X2
CPU
Vmemory
V7633
0020
X3- X7
Input Circuit
Quadrature
Encoder Signals
Quadrature encoder signals contain position and direction information, while their
frequency represents speed of motion. Phase A and B signals shown below are
phase-shifted 90 degrees, thus the quadrature name. When the rising edge of
Phase A precedes Phase Bs leading edge (indicates clockwise motion by
convention), the HSIO counter counts UP. If Phase Bs rising edge precedes Phase
As rising edge (indicates counter-clockwise motion), the counter counts DOWN.
Leading Edge Signal
90 phase shift
Clockwise sequence
Phase A
Phase B
Counterclockwise sequence
Phase A
Phase B
Leading Edge Signal
one cycle
319
High-Speed Input and Pulse Output Features
Wiring Diagram
A general wiring diagram for encoders to the DL05 in HSIO Mode 20 is shown below.
Encoders with sinking outputs (NPN open collector) are probably the best choice for
interfacing. If the encoder sources to the inputs, it must output 12 to 24 VDC. Note
that encoders with 5V sourcing outputs will not work with DL05 inputs.
Signal Common
Phase B
+
Phase A
12 24 VDC
The DL05s DC inputs are flexible in that they detect current flow in either direction,
so they can be wired to an encoder with either sourcing or sinking outputs. In the
following circuit, an encoder has open-collector NPN transistor outputs. It sinks
current from the PLC input point, which sources current. The power supply can be
the +24VDC auxiliary supply or another supply (+12VDC or +24VDC), as long as the
input specifications are met.
Encoder Output,
(one phase)
Phase A or B Input
Input
(sourcing)
Output
(sinking)
1224 VDC Supply
Ground
Common
In the next circuit, an encoder has open-emitter PNP transistor outputs. It sources
current to the PLC input point, which sinks the current back to ground. Since the
encoder sources current, no additional power supply is required. However, note that
the encoder output must be 12 to 24 volts (5V encoder outputs will not work).
Encoder Output,
(one phase)
Phase A or B Input
+12 to 24VDC
Input
Output (sourcing)
Ground
(sinking)
Common
Interfacing to
Encoder Outputs
320
High-speed Input and Pulse Output Features
Recall that V7633 is the HSIO Mode Select register. Refer to the diagram below. Use
BCD 20 in the lower byte of V7633 to select the High-Speed Counter Mode. The
DL05 does not use bits 8 - 15 in V7633.
Memory Location V7633
Bits
15
14
13
12 11
10
20 = Quadrature Counter
Choose the most convenient method of programming V7633 from the following:
S Include load and out instructions in your ladder program
S DirectSOFTs memory editor
S Use the Handheld Programmer D2HPP
We recommend using the first method above so that the HSIO setup becomes an
integral part of your application program. An example program later in this section
shows how to do this.
X Input
Configuration
The configurable discrete input options for High-Speed Counter Mode are listed in
the table below. Input X0 is dedicated for Phase A, and input X1 is for Phase B. Input
X2 is the reset input to the quadrature counter, but it does not cause an interrupt. The
section on Mode 60 operation at the end of this chapter describes programming the
filter time constants.
Input
Configuration
Register
X0
V7634
Function
Phase A
Hex Code
Required
0002 (default)
quadrature, absolute
0 to 99999999
0012
quadrature, absolute
-8388608 to 8388607
X1
V7635
Phase B
0000
X2
V7636
0007
1006
321
High-Speed Input and Pulse Output Features
Writing Your
Control Program
You may recall that the Up-Down counter instruction is standard in the DL05
instruction set. Refer to the figure below. The mnemonic for the counter is UDC
(up-down counter).The DL05 can have up to 128 counters, labeled CT0 through
CT177. The quadrature counter in the HSIO circuit is accessed in ladder logic by
using UDC CT76. It uses counter registers CT76 and CT77 exclusively when the
HSIO mode 20 is active (otherwise, CT76 and CT77 are available for standard
counter use). The HSIO counter needs two registers because it is a double-word
counter. It also has three inputs as shown, but they are redefined. The first input is
the enable signal, the middle is a preload (write), and the bottom is the reset. The
enable input must be on before the counter will count. The enable input must be off
during a preload.
Standard Counter Function
UP Count
UDC
CTxx
DOWN Count
Reset Input
UDC
CT76
Dummy Input
Kxxxxxxxx
Kxxxxxxxx
The next figure shows the how the HSIO quadrature counter will appear in a ladder
program.
Enable Input
UDC
CT76
Dummy Input
Reset Input
Kxxxxxxxx
Preset Range:
1-99999999
When the enable input is energized, the counter will respond to quadrature pulses
on X0 and X1, incrementing or decrementing the counter at CT76 CT77. The reset
input contact behaves in a logical OR fashion with the physical reset input X2. This
means the quadrature counter can receive a reset from either the contact(s) on the
reset rung in the ladder, OR the external reset X2.
Since presets are not available in quadrature counting, this mode is best suited for
Quadrature
Counter w/Preload simple counting and measuring. The example program on the following page shows
Program Example how to configure the quadrature counter. The program configures the HSIO circuit
for Mode 20 operation, so X0 is Phase A and X1 is Phase B clock inputs.
Reset Input
322
High-speed Input and Pulse Output Features
Program
Example Contd
DirectSOFT
SP0
Select Mode 20
LD
K20
OUT
V7633
LD
K2
OUT
V7634
LD
K0
OUT
V7635
LD
K7
OUT
V7636
C0
SET
C0
UDC
CT76
C1
Kxxxxxxxx
C2
SP0
SP1
Select Mode 20
SP61
LDD
V1076
CMPD
K44292
Y0
SET
Y1
SET
SP62
SP61
SP60
END
* Note: You can reset Y0 later in the program by using the RST insturuction.
To preload the counter, just add the following example rungs to the program above.
323
High-Speed Input and Pulse Output Features
Counter Preload
Program Example
X4
C0
RST
Preload counter
LDD
K3000
OUTD
V1076
C0
Troubleshooting
Guide for Mode 20
C1
C1
PD
C0
SET
If youre having trouble with Mode 20 operation, please study the following
symptoms and possible causes. The most common problems are listed below.
324
High-speed Input and Pulse Output Features
Velocity
Trapezoidal Profile
Accel
Decel
Time
S
S
Drive
Amplifier
DL05 Micro PLC
Pulse
Direction
CCW Pulse
CW Pulse
Drive
Amplifier
NOTE: The pulse output is designed for open loop stepper motor systems. This, plus
its minimum velocity of 40 pps make it unsuitable for servo motor control.
325
High-Speed Input and Pulse Output Features
Functional Block
Diagram
The diagram below shows HSIO functionality in Mode 30. When the lower byte of
HSIO Mode register V7633 contains a BCD 30, the pulse output capability in the
HSIO circuit is enabled. The pulse outputs use Y0 and Y1 terminals on the output
connector. Remember that the outputs can only be DC type to operate.
Output Circuit
DL05
PLC
Y0
(Pulse / CW)
Y1
(Direction / CCW)
Y2 - Y5
HSIO
SP 104 Profile Complete
Y0 Start Profile
PULSE GEN.
CPU
X1 Filtered Input
Mode Select
X0, X1, X2
Vmemory
V7633
xx30
X3- X7
Input Circuit
X2 during
Registration
Profile only
FILTER
326
High-speed Input and Pulse Output Features
Wiring Diagram
The generalized wiring diagram below shows pulse outputs Y0 and Y1 connected to
the drive amplifier inputs of a motion control system.
+
Signal Common
Motor
Amplifier
+24 VDC
Pulse
Direction
Power Input
Interfacing to
Drive Inputs
The pulse signals from Y0 and Y1 outputs will typically go to drive input circuits as
shown above. Remember that the DL05s DC outputs are sinking-only. It will be
helpful to locate equivalent circuit schematics of the drive amplifier. The following
diagram shows how to interface to a sourcing drive input circuit.
Y0, Y1 Pulse Output
Power
+DC pwr
Drive Input
+V
Output
(sinking)
Input
(sourcing)
Common
Ground
The following circuit shows how to interface to a sinking drive input using a pullup
resistor. Please refer to Chapter 2 to learn how to calculate and install Rpullup.
Y0, Y1 Pulse Output
+DC pwr
Power
R pullup
Drive Input
(sourcing)
(sinking)
Output
Common
Supply
Input
(sinking)
Ground
R input
327
High-Speed Input and Pulse Output Features
Motion Profile
Specifications
The motion control profiles generated in Pulse Output Mode have the following
specifications:
Parameter
Specification
Profiles
Physical I/O
Configuration
88388608 to 88388607
Positioning
Velocity Range
40 Hz to 7 kHz
V-memory registers
Current Position
The configurable discrete I/O options for Pulse Output Mode are listed in the table
below. The CPU uses SP 104 contact to sense profile complete. V7637 is used to
select pulse/direction or CCW/CW modes for the pulse outputs. Input X2 is
dedicated as the external interrupt for use in registration mode.
Physical
Input
Configuration
Register
V7637
Function
Hex Code
Required
Y0 = Pulse
Y1 = Direction
0103
Y0 = CW Pulse
Y1 = CCW Pulse
0003
xx06, xx = filter time
0 - 99 ms (BCD)
X0
V7634
X1
V7635
X2
V7636
The following logical I/O references define functions that allow the HSIO to
communicate with the ladder program.
Logical
I/O
Function
SP 104
Profile Complete the HSIO turns on SP104 to the CPU when the
profile completes. Goes back off when Start Profile (Y0) turns on.
Y0
Y1
Logical I/O
Functions
Position Range
328
High-speed Input and Pulse Output Features
Recall that V7633 is the HSIO Mode Select register. Refer to the diagram below. Use
BCD 30 in the lower byte of V7633 to select the High-Speed Counter Mode. The
DL05 does not use bits 8 - 15 in V7633.
Memory Location V7633
Bits
15
14
13
12 11
10
30 = Pulse Output
Choose the most convenient method of programming V7633 from the following:
S Include load and out instructions in your ladder program
S DirectSOFTs memory editor
S Use the Handheld Programmer D2HPP
We recommend using the first method above so that the HSIO setup becomes an
integral part of your application program. An example program later in this section
shows how to do this.
Profile / Velocity
Select Register
The first location in the Profile Parameter Table stores two key pieces of information.
The upper four bits (1215) select the type of profile required. The lower 12 bits
(011) select the Target Velocity.
Memory Location V2320 (default)
Bits
15
14
13
12 11
10
The ladder program must program this location before initiating any of the three
profiles. The LD and OUT instruction will write all 16 bits, so be sure to fully specify
the full four-digit BCD value for the Position / Velocity Select Register each time.
The absolute and relative selection determines how the HSIO circuit will interpret
your specified target position. Absolute position targets are referenced to zero.
Relative position targets are referenced to the current position (previous target
position). You may choose whichever reference method that is most convenient for
your application.
329
High-Speed Input and Pulse Output Features
Profile
Parameter Table
Trapezoidal Profile
V2320
V2321
V2323
V2324
V2325
2320
00xx
Range
Units
0=absolute,
8=relative
4 to 700
x 10 pps
V2321/ 2322
8388608 to
8388607
Pulses
V2323
Starting Velocity
4 to 100
x 10 pps
V2324
Acceleration Time
1 to 100
x 100 mS
V2325
Deceleration Time
1 to 100
x 100 mS
V2326
Error Code
Range
Units
9=relative
V-Memory
V2320, bits 1215
Velocity Profile
Trapezoidal Profile
V7630
Function
Registration Profile
4 to 700
x 10 pps
V2321/ 2322
8388608 to
8388607
Pulses
V2323
Starting Velocity
4 to 100
x 10 pps
V2324
Acceleration Time
1 to 100
x 100 mS
V2325
Deceleration Time
1 to 100
x 100 mS
V2326
Error Code
Range
Units
V-Memory
Function
V2320
Velocity Profile
2000 only
V2321/ 2322
Direction Select
80000000=CCW,
0=CW
Pulses
4 to 700
x 10 pps
V2323
Velocity
V2326
Error Code
Registration Profile
Function
330
High-speed Input and Pulse Output Features
Choosing the
Profile Type
Pulse Output Mode generates three types of motion profiles. Most applications use
one type for most moves. However, each move can be different if required.
S Trapezoidal Accel Slope to Target Velocity to Decel Slope
S Registration Velocity to Position Control on Interrupt
S Velocity Control Speed and Direction only
Trapezoidal
Profile Defined
Trapezoidal profiles are best for simple point-to-point moves, when the distance
between the starting and ending positions of the move is known in advance.
Registration and
Home Search
Profiles Defined
Velocity Profile
Defined
Velocity
Velocity Profile
Time
331
High-Speed Input and Pulse Output Features
Decel
Starting
Velocity
Time
Start position
Y0
Profile
Complete
SP104
The time line of signal traces below the profile indicates the order of events.
The HSIO uses logical output Y0 as the Start input to the HSIO, which starts the
profile. Immediately the HSIO turns off the Profile Complete signal (SP104), so the
ladder program can monitor the progress of the move. Typically a ladder program
will monitor this bit so it knows when to initiate the next profile move.
If you are familiar with motion control, youll notice that we do not have to specify the
direction of the move. The HSIO function examines the target position relative to the
current position, and automatically outputs the correct direction information to the
motor drive.
Notice that the motion accelerates immediately to the starting velocity. This segment
is useful in stepper systems so we can jump past low speed areas when low-torque
problems or a resonant point in the motor might cause a stall. (When a stepper motor
stalls, we have lost the position of the load in open-loop positioning systems).
However, is is preferable not to make the starting velocity too large, because the
stepper motor will also slip some pulses due to the inertia of the system.
When you need to change the current position value, use logical Y1 output coil to
load a new value into the HSIO counter. If the ladder program loads a new value in
CT76/CT77 (V1076/V1077), then energizing Y1 will copy that value into the HSIO
circuit counter. This must occur before the profile begins, because the HSIO ignores
Y1 during motion.
Start
Target position
332
High-speed Input and Pulse Output Features
Trapezoidal Profile The trapezoidal profile we want to perform is drawn and labeled in the following
Program Example figure. It consists of a non-zero starting velocity, and moderate target velocity.
Trapezoidal Profile
Velocity
Target Velocity = 1 kHz
Accel = 2 sec
Decel = 4 sec
Starting
Velocity = 40
Time
Start position
The following program will realize the profile drawn above, when executed. The
beginning of the program contains all the necessary setup parameters for Pulse
Output Mode 30. We only have to do this once in the program, so we use first-scan
contact SP0 to trigger the setup.
High-Speed Input and
Pulse Output Features
DirectSOFT
SP0
LD
K30
Mode 30
OUT
V7633
Locate Parameter
Table (optional)
LDA
O2320
OUT
V7630
Select Pulse /
Direction
Filtered Inputs
LD
K103
OUT
V7637
LD
K1006
OUT
V7635
OUT
V7636
333
High-Speed Input and Pulse Output Features
Program
Example Contd
SP0
Profile / Target
Velocity
Target Position
LD
K100
OUT
V2320
LDD
K5000
OUTD
V2321
Starting Velocity
LD
K4
OUT
V2323
Acceleration
LD
K20
Deceleration
Start Profile
X3
LD
K40
OUT
V2325
Y0
OUT
Profile Complete
SP 104
Preload
Position Value
Y2
OUT
At any time you can write (preload) a new position into the current position value.
This often done after a home search (see the registration example programs).
SP0
Profile / Target
Velocity
LDD
K1000
OUTD
V1076
Y1
PD
OUT
V2324
334
High-speed Input and Pulse Output Features
1.
Scrap
Area
direction of motion
Registration marks
Detect contact
3.
The home search move allows a motion system to calibrate its position on
startup. In this case, the positioning system makes an indefinite move and waits for
the load to pass by a home limit switch. This creates an interrupt at the moment when
the load is in a known position. We then stop motion and preload the position value
with a number which equates to the physical home position.
The registration profile begins with only velocity control. When an interrupt pulse
occurs on physical input X2, the starting position is declared to be the present count
(current load position). The velocity control switches to position control, moving the
load to the target position. Note that the minimum starting velocity is 40 pps. This
instantaneous velocity accommodates stepper motors that can stall at low speeds.
Registration Profile
Velocity
Target Velocity
Accel
Decel
Starting
Velocity
Start
position
Start
Target
position
Time
Y0
External Interrupt X2
Profile Complete
SP104
The time line of signal traces below the profile indicates the order of events. The
CPU uses logical output Y0 to start the profile. Immediately the HSIO turns off the
Profile Complete signal (SP104), so the ladder program can monitor the moves
completion by sensing the signals on state.
335
High-Speed Input and Pulse Output Features
Registration Profile The registration profile we want to perform is drawn and labeled in the following
Program Example figure. It consists of a non-zero starting velocity, and moderate target velocity.
Registration Profile
Velocity
Decel = 4 sec
Starting
Velocity = 40
Time
Start position
The following program will realize the profile drawn above, when executed. The first
program rung contains all the necessary setup parameters. We only have to do this
once in the program, so we use first-scan contact SP0 to trigger the setup.
DirectSOFT
SP0
Mode 30
OUT
V7633
Locate Parameter
Table (optional)
LDA
O2320
OUT
V7630
Select Pulse /
Direction
LD
K103
OUT
V7637
Filtered Inputs
LD
K2006
OUT
V7635
LD
K1006
OUT
V7636
LD
K30
336
High-speed Input and Pulse Output Features
Program
Example Contd
SP0
Profile / Target
Velocity
Target Position
LD
K9100
OUT
V2320
LDD
K5000
OUTD
V2321
Starting Velocity
LD
K20
OUT
V2324
Deceleration
LD
K4
OUT
V2323
Acceleration
LD
K40
OUT
V2325
Start Profile
X3
Y0
SET
Profile Complete
SP104
Y2
OUT
C0
PD
C0
Y0
RST
The profile will begin when the start input (X3) is given. Then the motion begins an
indefinite move, which lasts until an external interrupt on X2 occurs. Then the motion
continues on for 5000 more pulses before stopping.
337
High-Speed Input and Pulse Output Features
Home Search
Program Example
One of the more challenging aspects of motion control is the establishment of actual
position at powerup. This is especially true for open-loop systems which do not have
a position feedback device. However, a simple limit switch located at an exact
location on the positioning mechanism can provide position feedback at one point.
For most stepper control systems, this method is a good and economical solution.
Load
Motor
Positioning System
Limit Switches
Motion
Numbering System
-3000
-2000
-1000
1000
CW limit (X3)
2000
3000
DirectSOFT
SP0
LD
K30
Mode 30
OUT
V7633
Locate
Parameter
Table (optional)
LDA
O2320
Selects Mode 30 as
the HSIO mode.
LD
K2006
Configure the address
of the parameter table.
OUT
V7630
Select Pulse /
Direction
LD
K103
OUT
V7637
Filtered Inputs
OUT
V7635
LD
K1006
OUT
V7636
In the drawing above, the load moves left or right depending on the CCW/CW
direction of motor rotation. The PLC ladder program senses the CCW and CW limit
switches to stop the motor, before the load moves out-of-bounds and damages the
machine. The home limit switch is used at powerup to establish the actual position.
The numbering system is arbitrary, depending on a machines engineering units.
At powerup, we do not know whether the load is located to the left or to the right of the
home limit switch. Therefore, we will initiate a home search profile, using the
registration mode. The home limit switch is wired to X2, causing the interrupt. We
choose an arbitrary initial search direction, moving in the CW (left-to-right) direction.
S If the home limit switch closes first, then we stop and initialize the
position (this value is typically 0, but it may be different if preferred).
S However, if the CW limit switch closes first, we must reverse the motor
and move until the home limit switch closes, stopping just past it.
In the latter case, we repeat the first move, because we always need to make the
final approach to the home limit switch from the same direction, so that the final
physical position is the same in either case!
338
High-speed Input and Pulse Output Features
LD
K9100
OUT
V2320
Starting Velocity
C1
TMR
T0
K5
T0
The constant K4 selects a
starting velocity of 40 Hz
(4 x 10 pps).
LD
K4
Acceleration
C2
C3
X2
LD
K20
Deceleration
OUT
V2325
X7
C10
SET
C0
Target Position
C3
OUTD
V2321
Y0
SET
C0
SET
X2
C1
X3
C4
T1
LDD
K80000200
OUTD
V2321
C1
SET
C3
SET
Y0
RST
C4
SET
Go CW back to
home.
Add a timer to
create a slight
delay before
reversing motor.
C5
SET
CW delay done.
Y0
SET
Y0
RST
TMR
T1
K5
CW Limit found
C0
Y0
SET
LDD
K50
OUTD
V2321
Search in CW direction
C10
C2
SET
LDD
K50
OUT
V2324
Add a timer to
create a slight
delay before
reversing motor.
C5
Y0
RST
LDD
K0
OUTD
V1076
The home search profile will execute specific parts of the program, based on the
order of detection of the limit switches. Ladder logic sets C0 to initiate a home search
in the CW direction. If the CW limit is encountered, the program searches for home in
the CCW direction, passes it slightly, and does the final CW search for home. After
reaching home, the last ladder rung preloads the current position to 0.
339
High-Speed Input and Pulse Output Features
The velocity profile is best suited for applications which involve motion but do not
require moves to specific points. Conveyor speed control is a typical example.
Velocity Profile
Velocity
Time
Y0
Profile
Complete
SP104
The time line of signal traces below the profile indicates the order of events.
Assuming the velocity is set greater than zero, motion begins when the Start input
(Y0) energizes. Since there is no end position target, the profile is considered in
progress as long as the Start input remains active. The profile complete logical input
to ladder logic (X0) correlates directly to the Start input status when velocity profiles
are in use.
While the Start input is active, the ladder program can command a velocity change
by writing a new value to the velocity register (V2323 by default). The full speed
range of 40 Hz to 7 kHz is available. Notice from the drawing that there are no
acceleration or deceleration ramps between velocity updates. This is how velocity
profiling works with the HSIO. However, the ladder program can command more
gradual velocity changes by incrementing or decrementing the velocity value more
slowly. A counter or timer can be useful in creating your own
acceleration/deceleration ramps. Unless the load must do a very complex move, it is
easier to let the HSIO function generate the accel/decel ramps by selecting the
trapezoidal or registration profiles instead.
Unlike the trapezoidal and registration profiles, you must specify the desired
direction of travel with velocity profiles. Load the direction select register
(V2321/V2322 by default) with 8000 0000 hex for CCW direction, or 0 for CW
direction.
Start
340
High-speed Input and Pulse Output Features
Velocity Profile
Program Example
The velocity profile we want to perform is drawn and labeled in the following figure.
Each velocity segment is of indefinite length. The velocity only changes when ladder
logic (or other device writing to V-memory) updates the velocity parameter.
Velocity Profile
Velocity
Time
The following program uses dedicated discrete inputs to load in new velocity values.
This is a fun program to try, because you can create an infinite variety of profiles with
just two or three input switches. The intent is to turn on only one of X1, X2, or X3 at a
time. The beginning of the program contains all the necessary setup parameters for
Pulse Output Mode 30. We only have to do this once in the program, so we use
first-scan contact SP0 to trigger the setup.
DirectSOFT
SP0
LD
K30
Mode 30
OUT
V7633
Locate Parameter
Table (optional)
LDA
O2320
OUT
V7630
Select Pulse /
Direction
LD
K103
OUT
V7637
Filtered Inputs
LD
K1006
OUT
V7635
OUT
V7636
341
High-Speed Input and Pulse Output Features
Program
Example Contd
SP0
Profile / Target
Velocity
Select Direction
LD
K2000
OUT
V2320
LDD
K80000000
OUTD
V2321
Set Velocity
LD
K10
OUT
V2323
Start Profile
X1
Go Slow
X2
LD
K50
OUT
V2323
Go Moderately
X3
Go Fast
X4
LD
K200
OUT
V2323
LD
K600
OUT
V2323
Y0
OUT
342
High-speed Input and Pulse Output Features
Pulse Output Error The Profile Parameter Table starting at V2320 (default location) defines the profile.
Certain numbers will result in a error when the HSIO attempts to use the parameters
Codes
to execute a move profile. When an error occurs, the HSIO writes an error code in
V2326.
Error Code
Error Description
0000
No error
0010
0020
0021
0022
0030
0040
0041
0042
0050
0051
0052
0060
0061
0062
Most errors can be corrected by rechecking the Profile Parameter Table values. The
error is automatically cleared at powerup and at Program-to-Run Mode transitions.
Troubleshooting
Guide for Mode 30
If youre having trouble with Mode 30 operation, please study the following
symptoms and possible causes. The most common problems are listed below:
343
High-Speed Input and Pulse Output Features
4. Wiring Verify the wiring to the stepper motor is correct. Remember the
signal ground connection from the PLC to the motion system is required.
5. Motion system Verify that the drive is powered and enabled. To verify the
motion system is working, you can use Mode 60 operation (normal PLC
inputs/outputs) as shown in the test program below. With it, you can
manually control Y0 and Y1 with X0 and X1, respectively. Using an input
simulator is ideal for this type of manual debugging. With the switches you
can single-step the motor in either direction. If the motor will not move with
this simple control, Mode 30 operation will not be possible until the problem
with the motor drive system or wiring is corrected.
DirectSOFT
SP0
LD
K60
Mode 60
OUT
V7633
Filtered Inputs
LD
K1006
OUT
V7635
OUT
V7636
X0
X1
Y0
OUT
Y1
OUT
END
OUT
V7634
344
High-speed Input and Pulse Output Features
Functional Block
Diagram
The HSIO Mode 40 provides a high-speed interrupt to the ladder program. This
capability is provided for your choice of the following application scenarios:
S An external event needs to trigger an interrupt subroutine in the CPU.
Using immediate I/O instructions in the subroutine is typical.
S An interrupt routine needs to occur on a timed basis which is different
from the CPU scan time (either faster or slower). The timed interrupt is
programmable, from 5 to 999 mS.
The HSIO circuit creates the high-speed interrupt to the CPU. The following diagram
shows the external interrupt option, which uses X0. In this configuration X1 and X2
are normal filtered inputs.
DL05
PLC
Output Circuit
Y0, Y1
Y2 - Y5
I/O data
HSIO
Interrupt
Interrupt
FILTER
X0
Mode Select
X1, X2
CPU
Vmemory
V7633
0040
X3- X7
Input Circuit
Alternately, you may configure the HSIO circuit to generate interrupts based on a
timer, as shown below. In this configuration, inputs X0 through X2 are filtered inputs.
DL05
PLC
Output Circuit
Y0, Y1
I/O data
HSIO
FILTER
Y2 - Y5
Interrupt
Interrupt
Timer
Mode Select
CPU
Vmemory
V7633
X3- X7
X0, X1, X2
Input Circuit
0040
345
High-Speed Input and Pulse Output Features
Recall that V7633 is the HSIO Mode Select register. Refer to the diagram below. Use
BCD 40 in the lower byte of V7633 to select the High-Speed Counter Mode. The
DL05 does not use bits 8 - 15 in V7633.
Memory Location V7633
Bits
15
14
13
12 11
10
The resulting interrupt uses label INT 0 in the ladder program. Be sure to include the
Enable Interrupt (ENI) instruction at the beginning of your program. Otherwise, the
interrupt routine will not be executed.
CPU Scan
Input
Update
TIMER
Interrupt source /
Time select
V7634
xxx4
Ladder
Program
Execution
current
instruction
Input
Update
INT
Interrupt
Routine
Program
IRT
Choose the most convenient method of programming V7633 from the following:
S Include load and out instructions in your ladder program
S DirectSOFTs memory editor
S Use the Handheld Programmer D2HPP
We recommend using the first method above so that the HSIO setup becomes an
integral part of your application program. An example program later in this section
shows how to do this.
Refer to the drawing below. The source of the interrupt may be external (X0), or the
HSIO timer function. The setup parameter in V7634 serves a dual purpose:,
S It selects between the two interrupt sources, external (X0) or an internal
timer.
S In the case of the timer interrupt, it programs the interrupt timebase
between 5 and 999 mS.
346
High-speed Input and Pulse Output Features
External Interrupt Signal pulses at X0 must meet certain timing criteria to guarantee an interrupt will
Timing Parameters result. Refer to the timing diagram below. The input characteristics of X0 are fixed (it
is not a programmable filtered input). The minimum pulse width is 0.1 mS. There
must be some delay before the next interrupt pulse arrives, such that the interrupt
period cannot be smaller than 0.5 mS.
0.5 mS minimum
0.1 mS minimum
External
Interrupt
X0
Time
Timed Interrupt
Parameters
When the timed interrupt is selected, the HSIO generates the interrupt to ladder
logic. There is no interrupt pulse width in this case, but the interrupt period can be
adjusted from 5 to 999 mS.
5 mS to 999 mS
Timed
Interrupt
Time
X Input / Timed
INT Configuration
The configurable discrete input options for High-Speed Interrupt Mode are listed in
the table below. Input X0 is the external interrupt when 0004 is in V7634. If you
need a timed interrupt instead, then V7634 contains the interrupt time period, and
input X0 becomes a filtered input (uses X1s filter time constant by default). Inputs
X1, and X2, can only be filtered inputs, having individual configuration registers and
filter time constants. However, X0 will have the same filter time constant as X1 when
the timed interrupt is selected.
Input
Configuration
Register
X0
V7634
Function
External Interrupt
Hex Code
Required
0004 (default)
xxx4, xxx = INT timebase
5 - 999 ms (BCD)
X1
V7635
Filtered Input
X2
V7636
Filtered Input
Independent Timed Interrupt O1 is also available as an interrupt. This interrupt is independent of the
HSIO features. Interrupt O1 uses an internal timer that is configured in V memory
Interrupt
location V7647. The interrupt period can be adjusted from 5 to 9999 mS. Once the
interrupt period is set and the interrupt is enabled in the program, the CPU will
continuously call the interrupt routine based on the time setting in V7647.
Input
Configuration
Register
Function
Hex Code
Required
V7647
High-Speed
Timed Interrupt
347
High-Speed Input and Pulse Output Features
External Interrupt
Program Example
The following program selects Mode 40, then selects the external interrupt option.
Inputs X1 and X2 are configured as filtered inputs with a 10 mS time constant. The
program is otherwise generic, and may be adapted to your application.
DirectSOFT
SP0
LD
K40
Mode 40
OUT
V7633
External Interrupt
LD
K4
OUT
V7634
Filtered Inputs
LD
K1006
OUT
V7635
ENI
END
O0
Interrupt Routine
SP1
Y5
RST
Main Program
INT
Y5
SETI
IRT
OUT
V7636
INT Enable
348
High-speed Input and Pulse Output Features
Timed Interrupt
Program Example
The following program selects Mode 40, then selects the timed interrupt option, with
an interrupt period of 100 mS.
100 mS
Timed
Interrupt
Time
Inputs X0, X1, and X2, are configured as filtered inputs with a 10 mS time constant.
Note that X0 uses the time constant from X1. The program is otherwise generic, and
may be adapted to your application.
DirectSOFT
SP0
LD
K40
Mode 40
OUT
V7633
Timed Interrupt
LD
K1004
OUT
V7634
Filtered Inputs
LD
K1006
OUT
V7635
OUT
V7636
INT Enable
ENI
Main Program
END
INT
O0
Interrupt Routine
SP1
LD
K1
ADD
V2000
OUT
V2000
IRT
349
High-Speed Input and Pulse Output Features
Functional Block
Diagram
The HSIO circuit has a pulse-catch mode of operation. It monitors the signal on input
X0, preserving the occurrence of a narrow pulse. The purpose of the pulse catch
mode is to enable the ladder program to see an input pulse which is shorter in
duration than the current scan time. The HSIO circuit latches the input event on input
X0 for one scan. This contact automatically goes off after one scan.
Refer to the block diagram below. When the lower byte of HSIO Mode register V7633
contains a BCD 50, the pulse catch mode in the HSIO circuit is enabled. X0
automatically becomes the pulse catch input, which sets the latch on each rising
edge. The HSIO resets the latch at the end of the next CPU scan. Inputs X1 and X2
are available as filtered discrete inputs.
DL05
PLC
Output Circuit
Y0, Y1
HSIO
Y2 - Y5
I/O data
CPU
Set
Reset
X0
scan
FILTER
Mode Select
X1, X2
LATCH
Vmemory
V7633
0050
X3- X7
Input Circuit
Pulse Catch
Signal pulses at X0 must meet certain timing criteria to guarantee a pulse capture
Timing Parameters will result. Refer to the timing diagram below. The input characteristics of X0 are
fixed (it is not a programmable filtered input). The minimum pulse width is 0.1 mS.
There must be some delay before the next pulse arrives, such that the pulse period
cannot be smaller than 0.5 mS. If the pulse period is smaller than 0.5 mS, the next
pulse will be considered part of the current pulse.
0.5 mS minimum
0.1 mS minimum
Pulse
Input
X0
Time
Note that the pulse catch and filtered input functions are opposite in nature. The
pulse catch feature on X0 seeks to capture narrow pulses, while the filter input
feature on X1 and X2 seeks to reject narrow pulses.
350
High-speed Input and Pulse Output Features
Recall that V7633 is the HSIO Mode Select register. Refer to the diagram below. Use
BCD 50 in the lower byte of V7633 to select the High-Speed Counter Mode. The
DL05 does not use bits 8 - 15 in V7633.
Memory Location V7633
Bits
15
14
13
12 11
10
Choose the most convenient method of programming V7633 from the following:
S Include load and out instructions in your ladder program
S DirectSOFTs memory editor
S Use the Handheld Programmer D2HPP
We recommend using the first method above so that the HSIO setup becomes an
integral part of your application program. An example program later in this section
shows how to do this.
X Input
Configuration
The configurable discrete input options for Pulse Catch Mode are listed in the table
below. Input X0 is the pulse input, and must have 0005 loaded into it configuration
register V7634. Inputs X1 and X2 can only be filtered inputs. Each input has its own
configuration register and filter time constant.
Input
Configuration
Register
Function
Hex Code
Required
X0
V7634
0005
X1
V7635
Filtered Input
X2
V7636
Filtered Input
351
High-Speed Input and Pulse Output Features
Pulse Catch
Program Example
The following program selects Mode 50, then programs the pulse catch code for X0.
Inputs X1 and X2 are configured as filtered inputs with 10 and 30 mS time constants
respectively. The program is otherwise generic, and may be adapted to your
application.
DirectSOFT
SP0
LD
K50
Mode 50
OUT
V7633
Pulse Catch
LD
K5
OUT
V7634
Filtered Inputs
LD
K1006
LD
K3006
OUT
V7636
Main Program
X0
Y0
SET
END
Use the pulse catch input to set output Y0 on. This will
work even for a very short pulse on X0.
END coil marks the end of the main program..
OUT
V7635
352
High-speed Input and Pulse Output Features
Functional Block
Diagram
The last mode we will discuss for the HSIO circuit is Mode 60, Discrete Inputs with
Filter. The purpose of this mode is to allow the input circuit to reject narrow pulses
and accept wide ones, as viewed from the ladder program. This is useful in
especially noisy environments or other applications where pulse width is important.
In all other modes in this chapter, X0 to X2 usually support the mode functions as
special inputs. Only spare inputs operate as filtered inputs by default. Now in Mode
60, all three inputs X0 through X2 function only as discrete filtered inputs.
Refer to the block diagram below. When the lower byte of HSIO Mode register V7633
contains a BCD 60, the input filter in the HSIO circuit is enabled. Each input X0
through X2 has its own filter time constant. The filter circuit assigns the outputs of the
filters as logical references X0 through X2.
DL05
PLC
Output Circuit
Y0, Y1
Y2 - Y5
HSIO
I/O data
FILTERS
X0-X2
Mode Select
X0
X1
X2
CPU
Vmemory
V7633
0060
X3- X7
Input Circuit
Input Filter
Signal pulses at inputs X0 X2 are filtered by using a delay time. In the figure below,
Timing Parameters the input pulse on the top line is longer than the filter time. The resultant logical input
to ladder is phase-shifted (delayed) by the filter time on both rising and falling edges.
In the bottom waveforms, the physical input pulse width is smaller than the filter time.
In this case, the logical input to the ladder program remains in the OFF state (input
pulse was filtered out).
Filter Time
Physical Input
X0
Logical Input
X0
Filter Time
Time
Physical Input
X0
Logical Input
X0
353
High-Speed Input and Pulse Output Features
Recall that V7633 is the HSIO Mode Select register. Refer to the diagram below. Use
BCD 60 in the lower byte of V7633 to select the High-Speed Counter Mode. The
DL05 does not use bits 8 - 15 in V7633.
Memory Location V7633
Bits
15
14
13
12 11
10
X Input
Configuration
The configurable discrete input options for Discrete Filtered Inputs Mode are listed
in the table below. The filter time constant (delay) is programmable from 0 to 99 mS
(the input acts as a normal discrete input when the time constant is set to 0). The
code for this selection occupies the upper byte of the configuration register in BCD.
We combine this number with the required 06 in the lower byte to get xx06, where
xx = 0 to 99. Input X0, X1, and X2 can only be filtered inputs. Each input has its own
configuration register and filter time constant.
Input
Configuration
Register
Function
Hex Code
Required
X0
V7634
Filtered Input
X1
V7635
Filtered Input
X2
V7636
Filtered Input
Choose the most convenient method of programming V7633 from the following:
S Include load and out instructions in your ladder program
S DirectSOFTs memory editor
S Use the Handheld Programmer D2HPP
We recommend using the first method above so that the HSIO setup becomes an
integral part of your application program. An example program later in this section
shows how to to this.
354
High-speed Input and Pulse Output Features
Filtered Inputs
Program Example
The following program selects Mode 60, then programs the filter delay time
constants for inputs X0, X1, and X2. Each filter time constant is different, for
illustration purposes. The program is otherwise generic, and may be adapted to your
application.
DirectSOFT
SP0
LD
K60
Mode 60
OUT
V7633
Filtered Inputs
LD
K1006
OUT
V7634
LD
K2006
OUT
V7635
LD
K5006
OUT
V7636
Main Program
END
CPU Specifications
and Operation
In This Chapter. . . .
Introduction
CPU Specifications
CPU Hardware Setup
CPU Operation
Program Mode Operation
Run Mode Operation
I/O Response Time
CPU Scan Time Considerations
PLC Numbering Systems
Memory Map
DL05 System V-Memory
X Input Bit Map
Y Output Bit Map
Staget Control / Status Bit Map
Control Relay Bit Map
Timer Status Bit Map
Counter Status Bit Map
Network Configuration
Network Slave Operation
Network Master Operation
14
42
CPU Specifications and Operation
Introduction
The Central Processing Unit (CPU) is the heart of the Micro PLC. Almost all PLC
operations are controlled by the CPU, so it is important that it is set up correctly. This
chapter provides the information needed to understand:
S Steps required to set up the CPU
S Operation of ladder programs
S Organization of Variable Memory
To Programming Device
or Operator Interface
DL05
PLC
CPU
2 Comm.
Ports
Main
Power
Supply
Input Circuit
Power
Input
Output Circuit
CPU Specifications
and Operation
NOTE: The High-Speed I/O function (HSIO) consists of dedicated but configurable
hardware in the DL05. It is not considered part of the CPU, because it does not
execute the ladder program. For more on HSIO operation, see Chapter 3.
DL05
CPU Features
The DL05 Micro PLC which has 6K words of memory comprised of 2.0K of ladder
memory and 4K words of V-memory (data registers). Program storage is in the
FLASH memory which is a part of the CPU board in the PLC. In addition, there is
RAM with the CPU which will store system parameters, V-memory, and other data
which is not in the application program. The RAM is backed up by a
super-capacitor, storing the data for several hours in the event of a power outage.
The capacitor automatically charges during powered operation of the PLC.
The DL05 supports fixed I/O which includes eight discrete input points and six output
points. No provision for expansion beyond these fourteen I/O points is available in
the DL05 model PLCs.
Over 120 different instructions are available for program development as well as
extensive internal diagnostics that can be monitored from the application program or
from an operator interface. Chapters 5, 6, and 7 provide detailed descriptions of the
instructions.
The DL05 provides two built-in RS232C communication ports, so you can easily
connect a handheld programmer, operator interface, or a personal computer without
needing any additional hardware.
43
CPU Specifications and Operation
CPU Specifications
Feature
DL05
6K
2048
4096
3968
128
2.0uS
2.73.2mS
Yes
RLL and
RLL PLUS
Programming
Yes
Yes
Scan
Variable / fixed
Handheld programmer
Yes
Yes
Yes
FLASH Memory
Standard on CPU
14
None
Yes, 2
8 inputs, 6 outputs
129
Control relays
512
512
256
Timers
128
Counters
128
Immediate I/O
Yes
Yes
Subroutines
Yes
For/Next Loops
Yes
Math
Integer
Yes
No
Internal diagnostics
Yes
Password security
Yes
No
No
Battery backup
No (builtin supercap)
Yes, with mem cartridge
CPU Specifications
and Operation
44
CPU Specifications and Operation
Cables are available that allow you to quickly and easily connect a Handheld
Programmer or a personal computer to the DL05 PLCs. However, if you need to
build your own cables, use the pinout diagrams shown. The DL05 PLCs require an
RJ-12 phone plug to fit the built-in jacks.
The Micro PLC has two built-in RS232C communication ports. Port 1 is generally
used for connecting to a D2-HPP, DirectSOFT, operator interface, MODBUS
slave, or a DirectNET slave. . The baud rate is fixed at 9600 baud for port 1. Port 2
can be used to connect to a D2-HPP, DirectSOFT, operator interface, MODBUS
master/slave, or a DirectNET master/slave. Port 2 has a range of speeds from
300 baud to 38.4K baud.
Port 1 Pin Descriptions
1234 5 6
6-pin Female
Modular Connector
1
2
3
4
5
6
0V
5V
RXD
TXD
5V
0V
1
2
3
4
5
6
0V
5V
RXD
TXD
RTS
0V
CPU Specifications
and Operation
Top View
Communication Port 1
Communication Port 2
DirectNET (Master/Slave)
MODBUS (Master/Slave)
Non-sequence/Print
45
CPU Specifications and Operation
Connecting the
Programming
Devices
For replacement
cable, use part no.
DV1000CBL
Even if you have years of experience using PLCs, there are a few things you need to
do before you can start entering programs. This section includes some basic things,
such as changing the CPU mode, but it also includes some things that you may
never have to use. Heres a brief list of the items that are discussed.
S Selecting and Changing the CPU Modes
S Using Auxiliary Functions
S Clearing the program (and other memory areas)
S How to initialize system memory
S Setting retentive memory ranges
The following paragraphs provide the setup information necessary to get the CPU
ready for programming. They include setup instructions for either type of
programming device you are using. The D2HPP Handheld Programmer Manual
provides the Handheld keystrokes required to perform all of these operations. The
DirectSOFT Manual provides a description of the menus and keystrokes required
to perform the setup procedures via DirectSOFT.
CPU Specifications
and Operation
CPU Setup
Information
46
CPU Specifications and Operation
Mode Switch
Status Indicators
Status Indicators
The status indicator LEDs on the CPU front panels have specific functions which can
help in programming and troubleshooting.
Indicator
Status
Meaning
PWR
ON
Power good
OFF
Power failure
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
RUN
CPU
TX1
RX1
CPU Specifications
and Operation
TX2
RX2
Mode Switch
Functions
The mode switch on the DL05 PLC provides positions for enabling and disabling
program changes in the CPU. Unless the mode switch is in the TERM position, RUN
and STOP mode changes will not be allowed by any interface device, (handheld
programmer, DirectSOFT programing package or operator interface). Programs
may be viewed or monitored but no changes may be made. If the switch is in the
TERM position and no program password is in effect, all operating modes as well as
program access will be allowed through the connected programming or monitoring
device.
47
CPU Specifications and Operation
Modeswitch Position
CPU Action
RUN
(Run Program)
TERM
(Terminal)
RUN, PROGRAM and the TEST modes are available. Mode and
program changes are allowed by the programming/monitoring device.
STOP
CPU is forced into the STOP mode. No changes are allowed by the
programming/monitoring device.
Changing Modes in There are two ways to change the CPU mode. You can use the CPU mode switch to
select the operating mode, or you can place the mode switch in the TERM position
the DL05 PLC
and use a programming device to change operating modes. With the switch in this
position, the CPU can be changed between Run and Program modes. You can use
either DirectSOFT or the Handheld Programmer to change the CPU mode of
operation. With DirectSOFT you use a menu option in the PLC menu. With the
Handheld Programmer, you use the MODE key.
Menu Options
MODE
Key
WARNING: Once the super capacitor has discharged, the system memory
may not retain the previous mode of operation. When this occurs, the PLC can
power-up in either Run or Program Mode if the mode switch is in the term
position. There is no way to determine which mode will be entered as the
startup mode. Failure to adhere to this warning greatly increases the risk of
unexpected
equipment
startup.
CPU Specifications
and Operation
Mode of Operation The DL05 CPU will normally power-up in the mode that it was in just prior to the
power interruption. For example, if the CPU was in Program Mode when the power
at Power-up
was disconnected, the CPU will power-up in Program Mode (see warning note
below).
48
CPU Specifications and Operation
Auxiliary Functions Many CPU setup tasks involve the use of Auxiliary (AUX) Functions. The AUX
Functions perform many different operations, ranging from clearing ladder memory,
displaying the scan time, copying programs to EEPROM in the handheld
programmer, etc. They are divided into categories that affect different system
parameters. Appendix A provides a description of the AUX functions.
You can access the AUX Functions from DirectSOFT or from the D2HPP
Handheld Programmer. The manuals for those products provide step-by-step
procedures for accessing the AUX Functions. Some of these AUX Functions are
designed specifically for the Handheld Programmer setup, so they will not be
needed (or available) with the DirectSOFT package. The following table shows a list
of the Auxiliary functions for the Handheld Programmer.
AUX 2* RLL Operations
22
Change Reference
23
61
24
62
Beeper On / Off
65
Clear V Memory
41
CPU Specifications
and Operation
5D
Check Program
72
73
51
74
53
75
54
Initialize Scratchpad
76
55
56
81
Modify Password
57
82
Unlock CPU
58
Test Operations
83
Lock CPU
59
Override Setup
Before you enter a new program, be sure to always clear ladder memory. You can
use AUX Function 24 to clear the complete program.
You can also use other AUX functions to clear other memory areas.
S
S
S
Initializing System
Memory
HSIO Configuration
21
31
Clearing an
Existing Program
5B
The DL05 Micro PLC maintain system parameters in a memory area often referred
to as the scratchpad. In some cases, you may make changes to the system setup
that will be stored in system memory. For example, if you specify a range of Control
Relays (CRs) as retentive, these changes are stored in system memory.
AUX 54 resets the system memory to the default values.
49
CPU Specifications and Operation
WARNING: You may never have to use this feature unless you want to clear any
setup information that is stored in system memory. Usually, youll only need to
initialize the system memory if you are changing programs and the old program
required a special system setup. You can usually load in new programs without ever
initializing system memory.
Remember, this AUX function will reset all system memory. If you have set special
parameters such as retentive ranges, etc. they will be erased when AUX 54 is used.
Make sure you that you have considered all ramifications of this operation before
you select it.
Setting Retentive
Memory Ranges
The DL05 PLCs provide certain ranges of retentive memory by default. The default
ranges are suitable for many applications, but you can change them if your
application requires additional retentive ranges or no retentive ranges at all. The
default settings are:
Memory Area
DL05
Default Range
Available Range
Control Relays
C400 C777
C0 C777
V Memory
V1400 V7777
V0 V7777
Timers
None by default
T0 T177
Counters
CT0 CT177
CT0 CT177
Stages
None by default
S0 S377
You can use AUX 57 to set the retentive ranges. You can also use DirectSOFT
menus to select the retentive ranges. Appendix A contains detailed information
about auxiliary
CPU Specifications
and Operation
WARNING: The DL05 PLCs do not have battery back-up (unless the memory
cartridge, D001MC, is installed) The super capacitor will retain the values in the
event of a power loss, but only for a short period of time, depending on conditions.
410
CPU Specifications and Operation
Using a Password
The DL05 PLCs allow you to use a password to help minimize the risk of
unauthorized program and/or data changes. Once you enter a password you can
lock the PLC against access. Once the CPU is locked you must enter the password
before you can use a programming device to change any system parameters.
You can select an 8-digit numeric password. The Micro PLCs are shipped from the
factory with a password of 00000000. All zeros removes the password protection. If
a password has been entered into the CPU you cannot just enter all zeros to remove
it. Once you enter the correct password, you can change the password to all zeros to
remove the password protection.
WARNING: Make sure you remember your password. If you forget your password
you will not be able to access the CPU. The Micro PLC must be returned to the
factory to have the password removed.
You can use the D2HPP Handheld
Programmer or DirectSOFT to enter a
password. The following diagram shows how
you can enter a password with the Handheld
Programmer.
DirectSOFT
D2HPP
Select AUX 81
CLR
CLR
B
8
AUX
ENT
PASSWORD
00000000
CPU Specifications
and Operation
ENT
PASSWORD
XXXXXXXX
411
CPU Specifications and Operation
CPU Operation
Achieving the proper control for your equipment or process requires a good
understanding of how DL05 CPUs control all aspects of system operation. There are
four main areas to understand before you create your application program:
S CPU Operating System the CPU manages all aspects of system
control. A quick overview of all the steps is provided in the next section.
S CPU Operating Modes The two primary modes of operation are
Program Mode and Run Mode.
S CPU Timing The two important areas we discuss are the I/O
response time and the CPU scan time.
S CPU Memory Map DL05 CPUs offer a wide variety of resources,
such as timers, counters, inputs, etc. The memory map section shows
the organization and availability of these data types.
CPU Operating
System
Power up
Initialize hardware
Initialize various memory
based on retentive
configuration
Update input
Service peripheral
Update Special Relays
PGM
Mode?
CPU Specifications
and Operation
RUN
Execute program
Update output
Do diagnostics
OK
OK?
YES
NO
Report error, set flag
register, turn on LED
Fatal error
YES
Force CPU into
PGM mode
NO
412
CPU Specifications and Operation
Program Mode
CPU Specifications
and Operation
Run Mode
Download
Program
You can also edit the program during Run Mode. The Run Mode Edits are not
bumpless to the outputs. Instead, the CPU maintains the outputs in their last state
while it accepts the new program information. If an error is found in the new program,
then the CPU will turn all the outputs off and enter the Program Mode. This feature is
discussed in more detail in Chapter 9.
WARNING: Only authorized personnel fully familiar with all aspects of the
application should make changes to the program. Changes during Run Mode
become effective immediately. Make sure you thoroughly consider the impact of any
changes to minimize the risk of personal injury or damage to equipment.
413
CPU Specifications and Operation
Read Inputs
The CPU reads the status of all inputs, then stores it in the image register. Input
image register locations are designated with an X followed by a memory location.
Image register data is used by the CPU when it solves the application program.
Of course, an input may change after the CPU has just read the inputs. Generally,
the CPU scan time is measured in milliseconds. If you have an application that
cannot wait until the next I/O update, you can use Immediate Instructions. These do
not use the status of the input image register to solve the application program. The
Immediate instructions immediately read the input status directly from the I/O
modules. However, this lengthens the program scan since the CPU has to read the
I/O point status again. A complete list of the Immediate instructions is included in
Chapter 5.
Service Peripherals After the CPU reads the inputs from the input modules, it reads any attached
peripheral devices. This is primarily a communications service for any attached
and Force I/O
devices. For example, it would read a programming device to see if any input, output,
or other memory type status needs to be modified. There are two basic types of
forcing available with the DL05 CPUs.
S Forcing from a peripheral not a permanent force, good only for one
scan
S Bit Override holds the I/O point (or other bit) in the current state. Valid
bits are X, Y, C, T, CT, and S. (These memory types are discussed in
more detail later in this chapter).
Regular Forcing This type of forcing can temporarily change the status of a
discrete bit. For example, you may want to force an input on, even though it is really
off. This allows you to change the point status that was stored in the image register.
This value will be valid until the image register location is written to during the next
scan. This is primarily useful during testing situations when you need to force a bit on
to trigger another event.
CPU Specifications
and Operation
Bit Override Bit override can be enabled on a point-by-point basis by using AUX
59 from the Handheld Programmer or, by a menu option from within DirectSOFT.
Bit override basically disables any changes to the discrete point by the CPU. For
example, if you enable bit override for X1, and X1 is off at the time, then the CPU will
not change the state of X1. This means that even if X1 comes on, the CPU will not
acknowledge the change. So, if you used X1 in the program, it would always be
evaluated as off in this case. Of course, if X1 was on when the bit override was
enabled, then X1 would always be evaluated as on.
There is an advantage available when you use the bit override feature. The regular
forcing is not disabled because the bit override is enabled. For example, if you
enabled the Bit Override for Y0 and it was off at the time, then the CPU would not
change the state of Y0. However, you can still use a programming device to change
the status. Now, if you use the programming device to force Y0 on, it will remain on
and the CPU will not change the state of Y0. If you then force Y0 off, the CPU will
maintain Y0 as off. The CPU will never update the point with the results from the
application program or from the I/O update until the bit override is removed.
The following diagram shows a brief overview of the bit override feature. Notice the
CPU does not update the Image Register when bit override is enabled.
414
CPU Specifications and Operation
Input Update
Force from
Programmer
Result of Program
Solution
Input Update
X128
OFF
Y128
OFF
C377
OFF
...
...
...
...
...
...
X2
ON
Y2
ON
C2
ON
X1
ON
Y1
ON
C1
OFF
X0
OFF
Y0
OFF
C0
OFF
Force from
Programmer
Bit Override ON
Result of Program
Solution
WARNING: Only authorized personnel fully familiar with all aspects of the
application should make changes to the program. Make sure you thoroughly
consider the impact of any changes to minimize the risk of personal injury or damage
to equipment.
There are certain V-memory locations that contain Special Relays and other
Update Special
Relays and Special dedicated register information. This portion of the execution cycle makes sure these
locations get updated on every scan. Also, there are several different Special
Registers
Relays, such as diagnostic relays, etc., that are also updated during this segment.
CPU Specifications
and Operation
Solve Application
Program
You may recall that you can force various types of points in the system. (This was
discussed earlier in this chapter.) If any I/O points or memory data have been forced,
the output image register also contains this information.
415
CPU Specifications and Operation
Write Outputs
Once the application program has solved the instruction logic and constructed the
output image register, the CPU writes the contents of the output image register to the
corresponding output points. Remember, the CPU also made sure that any forcing
operation changes were stored in the output image register, so the forced points get
updated with the status specified earlier.
Diagnostics
During this part of the scan, the CPU performs all system diagnostics and other tasks
such as calculating the scan time and resetting the watchdog timer. There are many
different error conditions that are automatically detected and reported by the DL05
PLCs. Appendix B contains a listing of the various error codes.
Probably one of the more important things that occurs during this segment is the
scan time calculation and watchdog timer control. The DL05 CPU has a watchdog
timer that stores the maximum time allowed for the CPU to complete the solve
application segment of the scan cycle. If this time is exceeded the CPU will enter the
Program Mode and turn off all outputs. The default value set from the factory is 200
ms. An error is automatically reported. For example, the Handheld Programmer
would display the following message E003 S/W TIMEOUT when the scan overrun
occurs.
You can use AUX 53 to view the minimum, maximum, and current scan time. Use
AUX 55 to increase or decrease the watchdog timer value.
Normal Minimum
I/O Response
The I/O response time is shortest when the input changes just before the Read
Inputs portion of the execution cycle. In this case the input status is read, the
application program is solved, and the output point gets updated. The following
diagram shows an example of the timing for this situation.
CPU Specifications
and Operation
Is Timing Important I/O response time is the amount of time required for the control system to sense a
change in an input point and update a corresponding output point. In the majority of
for Your
applications, the CPU performs this task in such a short period of time that you may
Application?
never have to concern yourself with the aspects of system timing. However, some
applications do require extremely fast update times. In these cases, you may need to
know how to to determine the amount of time spent during the various segments of
operation.
There are four things that can affect the I/O response time.
S The point in the scan cycle when the field input changes states
S Input Off to On delay time
S CPU scan time
S Output Off to On delay time
The next paragraphs show how these items interact to affect the response time.
416
CPU Specifications and Operation
Scan
Scan
Solve
Program
Solve
Program
Read
Inputs
Solve
Program
Solve
Program
Write
Outputs
Field Input
CPU Reads
Inputs
CPU Writes
Outputs
Input
Off/On Delay
Output
Off/On Delay
In this case, you can calculate the response time by simply adding the following
items:
Input Delay + Scan Time + Output Delay = Response Time
Normal Maximum
I/O Response
The I/O response time is longest when the input changes just after the Read Inputs
portion of the execution cycle. In this case the new input status is not read until the
following scan. The following diagram shows an example of the timing for this
situation.
Scan
CPU Specifications
and Operation
Scan
Solve
Program
Solve
Program
Read
Inputs
Solve
Program
Solve
Program
Write
Outputs
Field Input
CPU Reads
Inputs
CPU Writes
Outputs
Input
Off/On Delay
Output
Off/On Delay
In this case, you can calculate the response time by simply adding the following
items:
Input Delay +(2 x Scan Time) + Output Delay = Response Time
417
CPU Specifications and Operation
Improving
Response Time
There are a few things you can do the help improve throughput.
S You can choose instructions with faster execution times
S You can use immediate I/O instructions (which update the I/O points
during the program execution)
S You can use the HSIO Mode 50 Pulse Catch features designed to
operate in high-speed environments. See the Chapter 3 for details on
using this feature.
Of these three things the Immediate I/O instructions are probably the most important
and most useful. The following example shows how an immediate input instruction
and immediate output instruction would affect the response time.
Scan
Scan
Solve
Program
Solve
Program
Normal
Read
Input
Read
Input
Immediate
Solve
Program
Write
Output
Immediate
Solve
Program
Normal
Write
Outputs
Field Input
Input
Off/On Delay
Output
Off/On Delay
In this case, you can calculate the response time by simply adding the following
items.
The instruction execution time would be calculated by adding the time for the
immediate input instruction, the immediate output instruction, and any other
instructions in between the two.
NOTE: Even though the immediate instruction reads the most current status from
I/O, it only uses the results to solve that one instruction. It does not use the new
status to update the image register. Therefore, any regular instructions that follow
will still use the image register values. Any immediate instructions that follow will
access the I/O again to update the status.
CPU Specifications
and Operation
418
CPU Specifications and Operation
CPU Specifications
and Operation
Power up
Initialize hardware
Initialize various memory
based on retentive
configuration
Update input
Service peripheral
Update Special Relays
PGM
Mode?
RUN
Execute program
Update output
Do diagnostics
OK
OK?
YES
NO
Report error, set flag
register, turn on LED
Fatal error
NO
YES
Force CPU into
PGM mode
Reading Inputs
The time required during each scan to read the input status is 40 mS. Dont confuse
this with the I/O response time that was discussed earlier.
Writing Outputs
The time required to write the output status is 629 mS. Dont confuse this with the I/O
response time that was discussed earlier.
419
CPU Specifications and Operation
The CPU processes the program from address 0 to the END instruction. The CPU
Application
Program Execution executes the program left to right and top to bottom. As each rung is evaluated the
appropriate image register or memory location is updated. The time required to
solve the application program depends on the type and number of instructions used,
and the amount of execution overhead.
Just add the execution times for all the instructions in your program to determine to
total execution time. Appendix C provides a complete list of the instruction execution
times for the DL05 Micro PLC. For example, the execution time for running the
program shown below is calculated as follows:
Instruction
Time
STR X0
OR C0
ANDN X1
OUT Y0
STRN C100
LD K10
STRN C101
OUT V2002
STRN C102
LD K50
STRN C103
OUT V2006
STR X5
ANDN X10
OUT Y3
END
2 ms
1.6 ms
1.6 ms
6.8 ms
2.3 ms
42.7 ms
2.3 ms
16.6 ms
2.3 ms
42.7 ms
2.3 ms
16.6 ms
2 ms
1.6 ms
6.8 ms
24 ms
SUBTOTAL
174.2 ms
X1
Y0
OUT
C0
C100
LD
K10
C101
OUT
C102
V2002
LD
K50
C103
X5
DL05
0.66 mS
2.5 ms
OUT
X10
V2006
Y3
OUT
END
CPU Specifications
and Operation
Overhead
Minimum
Maximum
X0
420
CPU Specifications and Operation
PLC Resources
BCD
binary
0402 ?
7 961428 ASCII
hexadecimal
1001011011
177
1011
?
decimal
A
72B
?
300124
3A9
As any good computer does, PLCs store and manipulate numbers in binary form:
just ones and zeros. So why do we have to deal with numbers in so many different
forms? Numbers have meaning, and some representations are more convenient
than others for particular purposes. Sometimes we use numbers to represent a size
or amount of something. Other numbers refer to locations or addresses, or to time. In
science we attach engineering units to numbers to give a particular meaning.
PLCs offer a fixed amount of resources, depending on the model and configuration.
We use the word resources to include variable memory (V-memory), I/O points,
timers, counters, etc. Most modular PLCs allow you to add I/O points in groups of
eight. In fact, all the resources of our PLCs are counted in octal. Its easier for
computers to count in groups of eight than ten, because eight is an even power of 2.
Octal means simply counting in groups of
eight things at a time. In the figure to the
right, there are eight circles. The quantity
in decimal is 8, but in octal it is 10 (8 and
9 are not valid in octal). In octal, 10
means 1 group of 8 plus 0 (no individuals).
CPU Specifications
and Operation
octal
1482
Decimal 1 2 3 4 5 6 7 8
Octal
1 2 3 4 5 6 7 10
In the figure below, we have two groups of eight circles. Counting in octal we have
20 items, meaning 2 groups of eight, plus 0 individuals Dont say twenty, say
twozero octal. This makes a clear distinction between number systems.
Decimal 1 2 3 4 5 6 7 8
Octal
2 3 4
7 10
9 10 11 12 13 14 15 16
11 12 13 14 15 16 17 20
After counting PLC resources, its time to access PLC resources (theres a
difference). The CPU instruction set accesses resources of the PLC using octal
addresses. Octal addresses are the same as octal quantities, except they start
counting at zero. The number zero is significant to a computer, so we dont skip it.
Our circles are in an array of square
containers to the right. To access a
resource, our PLC instruction will address
its location using the octal references
shown. If these were counters, CT14
would access the black circle location.
X= 0
X
1X
2X
2 3
421
CPU Specifications and Operation
VMemory
Variable memory (called V-memory) stores data for the ladder program and for
configuration settings. V-memory locations and V-memory addresses are the same
thing, and are numbered in octal. For example, V2073 is a valid location, while
V1983 is not valid (9 and 8 are not valid octal digits).
Each V-memory location is one data word wide, meaning 16 bits. For configuration
registers, our manuals will show each bit of a V-memory word. The least significant
bit (LSB) will be on the right, and the most significant bit (MSB) on the left. We use the
word significant, referring to the relative binary weighting of the bits.
V-memory address
(octal)
V2017
Binary-Coded
Decimal Numbers
V-memory data
(binary)
MSB
LSB
0 1 0 0 1 1 1 0 0 0 1 0 1 0 0 1
V-memory data is 16-bit binary, but we rarely program the data registers one bit at a
time. We use instructions or viewing tools that let us work with decimal, octal, and
hexadecimal numbers. All these are converted and stored as binary for us.
A frequently-asked question is How do I tell if a number is octal, BCD, or hex? The
answer is that we usually cannot tell just by looking at the data... but it does not really
matter. What matters is: the source or mechanism which writes data into a
V-memory location and the thing which later reads it must both use the same data
type (i.e., octal, hex, binary, or whatever). The V-memory location is just a storage
box... thats all. It does not convert or move the data on its own.
Since humans naturally count in decimal (10 fingers, 10 toes), we prefer to enter and
view PLC data in decimal as well. However, computers are more efficient in using
pure binary numbers. A compromise solution between the two is Binary-Coded
Decimal (BCD) representation. A BCD digit ranges from 0 to 9, and is stored as four
binary bits (a nibble). This permits each V-memory location to store four BCD digits,
with a range of decimal numbers from 0000 to 9999.
BCD number
0 1 0 0
1 0 0 1
0 0 1 1
0 1 1 0
In a pure binary sense, a 16-bit word can represent numbers from 0 to 65535. In
storing BCD numbers, the range is reduced to only 0 to 9999. Many math
instructions use Binary-Coded Decimal (BCD) data, and DirectSOFT and the
handheld programmer allow us to enter and view data in BCD.
Hexadecimal
Numbers
Hexadecimal numbers are similar to BCD numbers, except they utilize all possible
binary values in each 4-bit digit. They are base-16 numbers so we need 16 different
digits. To extend our decimal digits 0 through 9, we use A through F as shown.
Decimal
Hexadecimal
0 1 2 3
0 1 2 3
4 5
4 5
6
6
7
7
8 9 10 11 12 13 14 15
8 9 A B C D E F
A 4-digit hexadecimal number can represent all 65536 values in a V-memory word.
The range is from 0000 to FFFF (hex). PLCs often need this full range for sensor
data, etc. Hexadecimal is just a convenient way for humans to view full binary data.
Hexadecimal number
V-memory storage
1 0 1 0
0 1 1 1
1 1 1 1
0 1 0 0
CPU Specifications
and Operation
V-memory storage
422
CPU Specifications and Operation
Memory Map
With any PLC system, you generally have many different types of information to
process. This includes input device status, output device status, various timing
elements, parts counts, etc. It is important to understand how the system represents
and stores the various types of data. For example, you need to know how the system
identifies input points, output points, data words, etc. The following paragraphs
discuss the various memory types used in DL05 Micro PLCs. A memory map
overview for the CPU follows the memory descriptions.
Octal Numbering
System
X1
X2
X3
X4
X5
X6
X7
X10 X11
CPU Specifications
and Operation
V Memory
Locations for
Discrete Memory
Areas
The discrete memory area is for inputs, outputs, control relays, special relays,
stages, timer status bits and counter status bits. However, you can also access the
bit data types as a V-memory word. Each V-memory location contains 16
consecutive discrete locations. For example, the following diagram shows how the X
input points are mapped into V-memory locations.
8 Discrete (X) Input Points
Bit # 15
14
13
12
11
10
X7
X6
X5
X4
X3
X2
X1
X0
V40400
These discrete memory areas and their corresponding V memory ranges are listed
in the memory area table for DL05 Micro PLCs on the following pages.
423
CPU Specifications and Operation
Input Points
(X Data Type)
Output Points
(Y Data Type)
Control Relays
(C Data Type)
Y0
OUT
X1
Y1
OUT
X6
C5
OUT
C5
Y10
OUT
Y20
OUT
X0
TMR
T1
K30
T1
Y12
OUT
CPU Specifications
and Operation
Timers and
Timer Status Bits
(T Data type)
X0
424
CPU Specifications and Operation
Timer Current
Values
(V Data Type)
Counters and
Counter Status
Bits
(CT Data type)
X0
TMR
T1
K1000
V1
K30
Y2
OUT
V1
K50
Y3
OUT
V1
K75
V1
X0
K100
CNT
Y4
OUT
CT3
K10
X1
CT3
Y2
OUT
Each time contact X0 transitions from off to on, the counter increments by one. (If X1
comes on, the counter is reset to zero.) When the counter reaches the preset of 10
counts (K of 10) counter status contact CT3 turns on. When CT3 turns on, output Y2
turns on.
CPU Specifications
and Operation
Counter Current
Values
(V Data Type)
X0
CNT
CT3
K10
X1
V1003
K1
Y2
OUT
V1003
K3
Y3
OUT
V1003
K5
V1003
K8
Y4
OUT
425
CPU Specifications and Operation
Word Memory
(V Data Type)
X0
LD
K1345
OUT
V2000
Stages
(S Data type)
Ladder Representation
ISG
S0000
Wait forStart
Start
S1
JMP
X0
S500
JMP
SG
S0001
Part
Present
S2
JMP
X1
Part
Present
S6
JMP
X1
SG
S0002
Clamp
SET
S400
S3
JMP
Part
Locked
X2
SP5
C10
OUT
CPU Specifications
and Operation
Special Relays
(SP Data Type)
426
CPU Specifications and Operation
CPU Specifications
and Operation
System
V-memory
Description of Contents
V2320V2377
The default location for multiple preset values for the High-Speed Counter
V7620V7627
V0 V2377
V0 V2377
1 16
V7623 Sets the V-memory location that contains the numbers to be displayed.
V0 V2377
V7624 Sets the V-memory location that contains the character code to be displayed.
V0 V2377
V7625 Contains the function number that can be assigned to each key.
0, 1, 2, 12, 3
0000 to 9999
V7630
Starting location for the multistep presets for channel 1. The default value is
2320, which indicates the first value should be obtained from V2320. Since
there are 24 presets available, the default range is V2320 V2377. You can
change the starting point if necessary.
Default: V2320
Range: V0 V2320
V7631V7632
Reserved
N/A
V7633
Sets the desired function code for the high speed counter, interrupt, pulse
catch, pulse train, and input filter. Location can also be used to set the
power-up in Run Mode option.
Default: 0060
Lower Byte Range:
Range: 10 Counter
20 Quadrature
30 Pulse Out
40 Interrupt
50 Pulse Catch
60 Filtered
discrete In.
Upper Byte Range:
Bits 812, 14, 15: Unused
Bit 13: Powerup in RUN,
only if Mode Switch is in
TERM position.
V7634
Default: 1006
V7635
Default: 1006
V7636
Default: 1006
V7637V7646
Reserved
N/A
V7647
Timed Interrupt
Default: 0000
Range: 000303E7h
(39999ms)
V7650V7654
Reserved
N/A
V7655
Port 2: Setup for the protocol, time-out, and the response delay time.
Default: 00E0
V7656
Port 2: Setup for the station number, baud rate, STOP bit, and parity.
Default: 8501
427
CPU Specifications and Operation
System
V-memory
Description of Contents
V7657
Port 2: Setup completion code used to notify the completion of the parameter
setup.
Default: 0A00
V7660
Default: 0000
V7661
Setup timer over counter: Counts the times the actual scan time exceeds the
user setup time.
N/A
V7662V7717
Reserved
N/A
V7720V7722
N/A
N/A
V7721
N/A
V7722
HiByte-Titled Timer preset block size, LoByte-Titled Counter preset block size
N/A
V7723V7750
Reserved
N/A
V7751
Fault Message Error Code stores the 4-digit code used with the FAULT
instruction when the instruction is executed.
N/A
V7752V7754
Reserved
N/A
V7755
V7756
V7757
V7760V7762
Reserved
V7763
N/A
V7764
N/A
V7765
Scan stores the total number of scan cycles that have occurred since the
last Program Mode to Run Mode transition.
N/A
V7766V7774
Reserved
N/A
V7775
N/A
V7776
Scan stores the minimum scan time that has occurred since the last
Program Mode to Run Mode transition (milliseconds).
N/A
V7777
Scan stores the maximum scan time that has occurred since the last
Program Mode to Run Mode transition (milliseconds).
N/A
CPU Specifications
and Operation
V7720
428
CPU Specifications and Operation
Discrete Memory
Reference
(octal)
Word Memory
Reference
(octal)
Qty.
Decimal
Symbol
Input Points
(See note 1)
X0 X377
V40400 - V40417
256
X0
Output Points
(See note 1)
Y0 Y377
V40500 V40517
256
Y0
Control Relays
C0 C777
V40600 - V40637
512
Special Relays
SP0 SP777
V41200 V41237
512
Timers
T0 T177
V41100 V41107
128
Timer Current
Values
None
V0 V177
128
V41100 V41107
128
Counters
V41140 V41147
128
CT0 CT177
C0
C0
SP0
TMR
K100
V0
T0
K100
T0
CNT CT0
CPU Specifications
and Operation
K10
Counter
Current Values
None
V1000 V1177
128
Counter Status
Bits
CT0 CT177
V41140 V41147
128
Data Words
None
V1200 V7377
3968
Data Words
Nonvolatile
None
V7400 V7577
128
Stages
S0 S377
V41000 V41017
256
V1000
K100
CT0
S0
SG
S 001
System
parameters
None
V7600 V7777
128
1 The DL05 systems are limited to 8 discrete inputs and 6 discrete outputs with the present available hardware, but 256 point addresses exist.
429
CPU Specifications and Operation
LSB
17
16
15
14
13
12
11
10
007
006
005
004
003
002
001
000
Address
V40400
LSB
17
16
15
14
13
12
11
10
005
004
003
002
001
000
Address
V40500
LSB
Address
16
15
14
13
12
11
10
017
016
015
014
013
012
011
010
007
006
005
004
003
002
001
000
V41000
037
036
035
034
033
032
031
030
027
026
025
024
023
022
021
020
V41001
057
056
055
054
053
052
051
050
047
046
045
044
043
042
041
040
V41002
077
076
075
074
073
072
071
070
067
066
065
064
063
062
061
060
V41003
117
116
115
114
113
112
111
110
107
106
105
104
103
102
101
100
V41004
137
136
135
134
133
132
131
130
127
126
125
124
123
122
121
120
V41005
157
156
155
154
153
152
151
150
147
146
145
144
143
142
141
140
V41006
177
176
175
174
173
172
171
170
167
166
165
164
163
162
161
160
V41007
217
216
215
214
213
212
211
210
207
206
205
204
203
202
201
200
V41010
237
236
235
234
233
232
231
230
227
226
225
224
223
222
221
220
V41011
257
256
255
254
253
252
251
250
247
246
245
244
243
242
241
240
V41012
277
276
275
274
273
272
271
270
267
266
265
264
263
262
261
260
V41013
317
316
315
314
313
312
311
310
307
306
305
304
303
302
301
300
V41014
337
336
335
334
333
332
331
330
327
326
325
324
323
322
321
320
V41015
357
356
355
354
353
352
351
350
347
346
345
344
343
342
341
340
V41016
377
376
375
374
373
372
371
370
367
366
365
364
363
362
361
360
V41017
CPU Specifications
and Operation
17
430
CPU Specifications and Operation
CPU Specifications
and Operation
MSB
17
16
15
14
13
12
017
016
015
014
013
037
036
035
034
033
057
056
055
054
077
076
075
117
116
137
LSB
Address
11
10
012
011
010
007
006
005
004
003
002
001
000
V40600
032
031
030
027
026
025
024
023
022
021
020
V40601
053
052
051
050
047
046
045
044
043
042
041
040
V40602
074
073
072
071
070
067
066
065
064
063
062
061
060
V40603
115
114
113
112
111
110
107
106
105
104
103
102
101
100
V40604
136
135
134
133
132
131
130
127
126
125
124
123
122
121
120
V40605
157
156
155
154
153
152
151
150
147
146
145
144
143
142
141
140
V40606
177
176
175
174
173
172
171
170
167
166
165
164
163
162
161
160
V40607
217
216
215
214
213
212
211
210
207
206
205
204
203
202
201
200
V40610
237
236
235
234
233
232
231
230
227
226
225
224
223
222
221
220
V40611
257
256
255
254
253
252
251
250
247
246
245
244
243
242
241
240
V40612
277
276
275
274
273
272
271
270
267
266
265
264
263
262
261
260
V40613
317
316
315
314
313
312
311
310
307
306
305
304
303
302
301
300
V40614
337
336
335
334
333
332
331
330
327
326
325
324
323
322
321
320
V40615
357
356
355
354
353
352
351
350
347
346
345
344
343
342
341
340
V40616
377
376
375
374
373
372
371
370
367
366
365
364
363
362
361
360
V40617
417
416
415
414
413
412
411
410
407
406
405
404
403
402
401
400
V40620
437
436
435
434
433
432
431
430
427
426
425
424
423
422
421
420
V40621
457
456
455
454
453
452
451
450
447
446
445
444
443
442
441
440
V40622
477
476
475
474
473
472
471
470
467
466
465
464
463
462
461
460
V40623
517
516
515
514
513
512
511
510
507
506
505
504
503
502
501
500
V40624
537
536
535
534
533
532
531
530
527
526
525
524
523
522
521
520
V40625
557
556
555
554
553
552
551
550
547
546
545
544
543
542
541
540
V40626
577
576
575
574
573
572
571
570
567
566
565
564
563
562
561
560
V40627
617
616
615
614
613
612
611
610
607
606
605
604
603
602
601
600
V40630
637
636
635
634
633
632
631
630
627
626
625
624
623
622
621
620
V40631
657
656
655
654
653
652
651
650
647
646
645
644
643
642
641
640
V40632
677
676
675
674
673
672
671
670
667
666
665
664
663
662
661
660
V40633
717
716
715
714
713
712
711
710
707
706
705
704
703
702
701
700
V40634
737
736
735
734
733
732
731
730
727
726
725
724
723
722
721
720
V40635
757
756
755
754
753
752
751
750
747
746
745
744
743
742
741
740
V40636
777
776
775
774
773
772
771
770
767
766
765
764
763
762
761
760
V40637
431
CPU Specifications and Operation
LSB
Address
17
16
15
14
13
12
11
10
017
016
015
014
013
012
011
010
007
006
005
004
003
002
001
000
V41100
037
036
035
034
033
032
031
030
027
026
025
024
023
022
021
020
V41101
057
056
055
054
053
052
051
050
047
046
045
044
043
042
041
040
V41102
077
076
075
074
073
072
071
070
067
066
065
064
063
062
061
060
V41103
117
116
115
114
113
112
111
110
107
106
105
104
103
102
101
100
V41104
137
136
135
134
133
132
131
130
127
126
125
124
123
122
121
120
V41105
157
156
155
154
153
152
151
150
147
146
145
144
143
142
141
140
V41106
177
176
175
174
173
172
171
170
167
166
165
164
163
162
161
160
V41107
LSB
Address
16
15
14
13
12
11
10
017
016
015
014
013
012
011
010
007
006
005
004
003
002
001
000
V41140
037
036
035
034
033
032
031
030
027
026
025
024
023
022
021
020
V41141
057
056
055
054
053
052
051
050
047
046
045
044
043
042
041
040
V41142
077
076
075
074
073
072
071
070
067
066
065
064
063
062
061
060
V41143
117
116
115
114
113
112
111
110
107
106
105
104
103
102
101
100
V41144
137
136
135
134
133
132
131
130
127
126
125
124
123
122
121
120
V41145
157
156
155
154
153
152
151
150
147
146
145
144
143
142
141
140
V41146
177
176
175
174
173
172
171
170
167
166
165
164
163
162
161
160
V41147
CPU Specifications
and Operation
17
432
CPU Specifications and Operation
This section describes how to configure the CPUs built-in networking ports for either
MODBUS or DirectNET. This will allow you to connect the DL05 PLC system directly
to MODBUS networks using the RTU protocol, or to other devices on a DirectNET
network. MODBUS host systems must be capable of issuing the MODBUS
commands to read or write the appropriate data. For details on the MODBUS
protocol, check with your MODBUS supplier for the lastest version of the Gould
MODBUS Protocol reference Guide. For more details on DirectNET, order our
DirectNET manual, part number DADNETM.
Communication Port 1
Communication Port 2
DirectNET (Master/Slave)
MODBUS (Master/Slave)
Non-sequence/Print
CPU Specifications
and Operation
You will need to make sure the network connection is a 3-wire RS232 type.
Normally, the RS232 signals are used for for communications between two devices
with distances up to a maximum of 15 meters.
Networking
DL05 to DL05
RS232C
1234 5 6
0V
5V
RXD
TXD
5V
0V
0V
5V
RXD
TXD
RTS
0V
6-pin Female
Modular Connector
DL05
PORT 1 or 2
DL05
PORT 2
1 0V
3 RXD
4 TXD
0V 1
RXD 3
TXD 4
433
CPU Specifications and Operation
Networking
PC to DL05s
RS422
1234 5 6
6-pin Female
Modular Connector
F2UNICON
0V
RXD
0V 1
RXD 3
TXD
RTS
GND
GND
DL05
1 or 6 0V 0V 1 or 6 PORT 2
TXD+
RXD+
3 RXD
RXD 3
TXD
RXD
TXD 4
RXD
TXD
4 TXD
2 CTS
TXD 4
5V 2
RTS 5
RXD+
TXD+
5 5V
RTS 5
FAISONET
F2UNICON
GND
RXD+
RXD
TXD
TXD+
Networking
DL05 Master
to Other PLCs
5 5V
TXD 4
5V 2
RTS 5
F2UNICON
1 or 6 0V 0V 1 or 6
3 RXD
RXD 3
GND
GND
TXD+
TXD
RXD+
RXD
4 TXD
TXD 4
RXD
TXD
2 CTS
5V 2
RXD+
TXD+
5 5V
4 TXD
2 CTS
DL05
1 or 6 0V 0V 1 or 6 PORT 2
3 RXD
RXD 3
4 TXD
2 CTS
5 5V
TXD 4
5V 2
RTS 5
RTS 5
FAISONET
F2UNICON
DL240
GND
1 0V
RXD+
3 RXD
0V 1 PORT 2
RXD 3
RXD
4 TXD
TXD 4
TXD
TXD+
2 CTS
5 5V
5V 2
RTS 5
CPU Specifications
and Operation
DL05
PORT 2
DL05
1 or 6 0V 0V 1 or 6 PORT 2
3 RXD
RXD 3
434
CPU Specifications and Operation
MODBUS Port
Configuration
In DirectSOFT, choose the PLC menu, then Setup, then Secondary Comm Port.
S Port: From the port number list box at the top, choose Port 2.
S Protocol: Click the check box to the left of MODBUS (use AUX 56 on
the HPP, andselect MBUS), and then youll see the dialog box below.
Setup Communication Ports
Port:
Protocol:
Timeout:
2 mS
Stop Bits:
Parity:
CPU Specifications
and Operation
S
S
Close
Help
800 mS
5 mS
Baud Rate:
K-sequence
DirectNET
MODBUS
Non-sequence
Station Number:
Port 2
1
38400
1
None
Timeout: amount of time the port will wait after it sends a message to get
a response before logging an error.
RTS ON / OFF Delay Time: The RTS ON Delay Time specifies the time
the DL05 waits to send the data after it has raised the RTS signal line.
The RTS OFF Delay Time specifies the time the DL05 waits to release
the RTS signal line after the data has been sent. When using the DL05 on
a multi-drop network, the RTS ON Delay time must be set to at least 5ms
and the RTS OFF Delay time must be set to at least 2ms. If you
encounter problems, the time can be increased.
Station Number: For making the CPU port a MODBUSR master, choose
1. The possible range for MODBUS slave numbers is from 1 to 247, but
the DL05 network instructions used in Master mode will access only
slaves 1 to 99. Each slave must have a unique number. At powerup, the
port is automatically a slave, unless and until the DL05 executes ladder
logic network instructions which use the port as a master. Thereafter, the
port reverts back to slave mode until ladder logic uses the port again.
Baud Rate: The available baud rates include 300, 600, 1200, 2400,
4800, 9600, 19200, and 38400 baud. Choose a higher baud rate initially,
reverting to lower baud rates if you experience data errors or noise
problems on the network. Important: You must configure the baud rates of
all devices on the network to the same value. Refer to the appropriate
product manual for details.
Stop Bits: Choose 1 or 2 stop bits for use in the protocol.
Parity: Choose none, even, or odd parity for error checking.
Then click the button indicated to send the Port configuration to
the CPU, and click Close.
435
CPU Specifications and Operation
DirectNET Port
Configuration
In DirectSOFT, choose the PLC menu, then Setup, then Secondary Comm Port.
S Port: From the port number list box, choose Port 2 .
S Protocol: Click the check box to the left of DirectNET (use AUX 56 on
the HPP, then select DNET), and then youll see the dialog box below.
Setup Communication Ports
Port:
Protocol:
Timeout:
2 mS
Stop Bits:
Parity:
Format:
S
S
S
Help
1
38400
1
None
Hex
Timeout: amount of time the port will wait after it sends a message to
get a response before logging an error.
RTS ON / OFF Delay Time: The RTS ON Delay Time specifies the time
the DL05 waits to send the data after it has raised the RTS signal line.
The RTS OFF Delay Time specifies the time the DL05 waits to release
the RTS signal line after the data has been sent. When using the DL05
on a multi-drop network, the RTS ON Delay time must be set to at least
5ms and the RTS OFF Delay time must be set to at least 2ms. If you
encounter problems, the time can be increased.
Station Number: For making the CPU port a DirectNET master,
choose 1. The allowable range for DIrectNET slaves is from 1 to 90
(each slave must have a unique number). At powerup, the port is
automatically a slave, unless and until the DL05 executes ladder logic
instructions which attempt to use the port as a master. Thereafter, the
port reverts back to slave mode until ladder logic uses the port again.
Baud Rate: The available baud rates include 300, 600, 1200, 2400,
4800, 9600, 19200, and 38400 baud. Choose a higher baud rate initially,
reverting to lower baud rates if you experience data errors or noise
problems on the network. Important: You must configure the baud rates
of all devices on the network to the same value.
Stop Bits: Choose 1 or 2 stop bits for use in the protocol.
Parity: Choose none, even, or odd parity for error checking.
Format: Choose between hex or ASCII formats.
Then click the button indicated to send the Port configuration to
the CPU, and click Close.
CPU Specifications
and Operation
Close
800 mS
5 mS
Baud Rate:
K-sequence
DirectNET
MODBUS
Non-sequence
Station Number:
Port 2
436
CPU Specifications and Operation
CPU Specifications
and Operation
01
Y, CR, T, CT
02
X, SP
05
Y, CR, T, CT
15
Y, CR, T, CT
03, 04
Determining the
MODBUS Address
Function
06
16
There are typically two ways that most host software conventions allow you to
specify a PLC memory location. These are:
S By specifying the MODBUS data type and address
S By specifying a MODBUS address only.
437
CPU Specifications and Operation
If Your Host Software Many host software packages allow you to specify the MODBUS data type and the
Requires the Data
MODBUS address that corresponds to the PLC memory location. This is the easiest
Type and Address... method, but not all packages allow you to do it this way.
The actual equation used to calculate the address depends on the type of PLC data
you are using. The PLC memory types are split into two categories for this purpose.
S
QTY
(Dec.)
PLC Range
(Octal)
MODBUS
Address Range
(Decimal)
+
Start of Range
MODBUS
Data Type
+ Data Type
Inputs (X)
256
X0
X377
2048
2303
Input
512
SP0
SP777
3072
3583
Input
Outputs (Y)
256
Y0
Y377
2048
2303
Coil
512
C0
C777
3072
4583
Coil
128
T0
T177
6144
6271
Coil
128
CT0
CT177
6400
6527
Coil
256
S0
S377
5120
5375
Coil
V0
V177
128
V1000
3968
V1200
V7600
Data Type
127
Input Register
V1177
512
639
Input Register
V7377
640
3839
Holding Register
V7777
3968
4095
Holding Register
CPU Specifications
and Operation
438
CPU Specifications and Operation
The following examples show how to generate the MODBUS address and data type
for hosts which require this format.
Example 1: V2100
Example 2: Y20
3200
V1200
V7377
256
Y0
Y377
CPU Specifications
and Operation
640
3839
Holding Register
Example 4: C54
128
V0
V177
2048
2303
Coil
127
Input Register
Find the MODBUS address for Control Relay PLC Addr. (Dec) + Start Addr. +Data Type
C54.
C54 = 44 decimal
1. Find Control Relays in the table.
44 + 3072 + Coil = Coil 3116
2. Convert C54 into decimal (44).
3. Add the starting address for the range
(3072).
4. Use the MODBUS data type from the table.
Control Relays (CR)
512
C0
C777
3072
3583
Coil
439
CPU Specifications and Operation
If Your MODBUS
Host Software
Requires an
Address ONLY
Some host software does not allow you to specify the MODBUS data type and
address. Instead, you specify an address only. This method requires another step to
determine the address, but its still fairly simple. Basically, MODBUS also separates
the data types by address ranges as well. So this means an address alone can
actually describe the type of data and location. This is often referred to as adding the
offset. One important thing to remember here is that two different addressing
modes may be available in your host software package. These are:
S 484 Mode
S 584/984 Mode
We recommend that you use the 584/984 addressing mode if your host
software allows you to choose. This is because the 584/984 mode allows access
to a higher number of memory locations within each data type. If your software only
supports 484 mode, then there may be some PLC memory locations that will be
unavailable. The actual equation used to calculate the address depends on the type
of PLC data you are using. The PLC memory types are split into two categories for
this purpose.
S Discrete X, SP, Y, CR, S, T, C (contacts)
S Word V, Timer current value, Counter current value
In either case, you basically convert the PLC octal address to decimal and add the
appropriate MODBUS addresses (as required). The table below shows the exact
equation used for each group of data.
QTY
(Dec.)
PLC Range
(Octal)
MODBUS
Address Range
(Decimal)
Start of Range
484 Mode
Address
584/984
Mode
Address
MODBUS
Data Type
256
X0
X377
2048
2303
1001
10001
Input
512
SP0
SP777
3072
3583
1001
10001
Input
Outputs (Y)
256
Y0
Y377
2048
2303
Coil
512
C0
C777
3072
3583
Coil
128
T0
T177
6144
6271
Coil
128
CT0
CT177
6400
6527
Coil
256
S0
S377
5120
5375
Coil
128
V0
V377
128
V1000
3200
V1400
256
127
3001
30001
Input Reg.
V1177
512
639
3001
30001
Input Reg
V7377
768
3839
4001
40001
Hold Reg.
V7400
V7577
3840
3967
4001
40001
Hold Reg.
V7600
V7777
3968
4095
4001
40001
Hold Reg.
CPU Specifications
and Operation
Inputs (X)
440
CPU Specifications and Operation
The following examples show how to generate the MODBUS addresses for hosts
which require this format.
Example 1: V2100
584/984 Mode
128
V1200
V7377
Example 2: Y20
584/984 Mode
Outputs (Y)
256
Y0
Y377
3480
3735
4001
40001
Hold Reg.
2048
2303
Coil
CPU Specifications
and Operation
128
V0
V177
127
3001
30001
Input Reg.
Find the MODBUS address for Control Relay PLC Addr. (Dec) + Start Address + Mode
C54.
C54 = 44 decimal
1. Find Control Relays in the table.
44 + 3072 + 1 = 3117
2. Convert C54 into decimal (44).
3. Add the starting address for the range
(3072).
4. Add the MODBUS address for the mode
(1).
Example 4: C54
584/984 Mode
Determining the
DirectNET Address
512
C0
C777
3072
3583
Coil
Addressing the memory types for DirectNET slaves is very easy. Use the ordinary
native address of the slave device itself. To access a slave PLCs memory address
V2000 via DirectNET, for example, the network master will request V2000 from the
slave.
441
CPU Specifications and Operation
Slave #1
Slave #2
Slave #3
Master
When using the DL05 PLC as the master station, simple RLL instructions are used
to initiate the requests. The WX instruction initiates network write operations, and
the RX instruction initiates network read operations. Before executing either the WX
or RX commands, we will need to load data related to the read or write operation
onto the CPUs accumulator stack. When the WX or RX instruction executes, it uses
the information on the stack combined with data in the instruction box to completely
define the task, which goes to the port.
WX (write)
RX (read)
Slave
Master
The following step-by-step procedure will provide you the information necessary to
set up your ladder program to receive data from a network slave.
CPU Specifications
and Operation
Network
442
CPU Specifications and Operation
Step 1:
Identify Master
Port # and Slave #
Step 2:
Load Number of
Bytes to Transfer
(BCD)
# of bytes to transfer
LD
K64
The number of bytes specified also depends on the type of data you want to obtain.
For example, the DL05 Input points can be accessed by V-memory locations or as X
input locations. However, if you only want X0 X27, youll have to use the X input
data type because the V-memory locations can only be accessed in 2-byte
increments. The following table shows the byte ranges for the various types of
DirectLOGIC products.
CPU Specifications
and Operation
Bytes
V memory
T / C current value
16
16
2
2
Outputs
(Y, C, Stage, T/C bits)
Diagnostic Status
Bytes
Data registers
T / C accumulator
8
16
1
2
16
10
443
CPU Specifications and Operation
Step 3:
Specify Master
Memory Area
(octal)
Starting address of
master transfer area
LDA
O40600
MSB
V40600
LSB
15
MSB
V40601
LSB
15
NOTE: Since V memory words are always 16 bits, you may not always use the whole
word. For example, if you only specify 3 bytes and you are reading Y outputs from the
slave, you will only get 24 bits of data. In this case, only the 8 least significant bits of
the last word location will be modified. The remaining 8 bits are not affected.
Step 4:
Specify Slave
Memory Area
SP116
LD
KF201
LD
K64
LDA
O40600
S
S
S
DL305 Series CPU Memory TypetoMODBUS Cross Reference (excluding 350 CPU)
PLC Memory type
PLC base
address
MODBUS
base addr.
PLC base
address
MODBUS
base addr.
R600
V0
CT600
GY600
I/O Points
IO 000
GY0
Control Relays
CR160
GY160
Data Registers
R401,
R400
V100
Shift Registers
SR400
GY400
S0
GY200
CPU Specifications
and Operation
RX
Y0
444
CPU Specifications and Operation
Communications
from a
Ladder Program
SP117
Y1
SET
SP116
LD
KF201
LD
K0003
Port Busy
LDA
O40600
RX
Y0
Port 2, which can be a master, has two Special Relay contacts associated with it (see
Appendix D for comm port special relays).One indicates Port busy(SP116), and
the other indicates Port Communication Error(SP117). The example above shows
the use of these contacts for a network master that only reads a device (RX). The
Port Busy bit is on while the PLC communicates with the slave. When the bit is off
the program can initiate the next network request.
The Port Communication Error bit turns on when the PLC has detected an error.
Use of this bit is optional. When used, it should be ahead of any network instruction
boxes since the error bit is reset when an RX or WX instruction is executed.
CPU Specifications
and Operation
Interlocking Relay
SP116 C100
LD
KF201
LD
K0003
LDA
O40600
Interlocking
Relay
SP116 C100
RX
Y0
C100
SET
LD
KF201
LD
K0003
LDA
O40400
WX
Y0
C100
RST
Standard RLL
Instructions
In This Chapter. . . .
15
Boolean Instructions
Comparative Boolean
Immediate Instructions
Timer, Counter and Shift Register Instructions
Accumulator / Stack Load and Output Data Instructions
Logical Instructions (Accumulator)
Math Instructions
Bit Operation Instructions (Accumulator)
Number Conversion Instructions (Accumulator)
Table Instructions
CPU Control Instructions
Program Control Instructions
Interrupt Instructions
Message Instructions
52
Introduction
DL05 Micro PLCs offer a wide variety of instructions to perform many different types
of operations. This chapter shows you how to use each standard Relay Ladder Logic
(RLL) instruction. In addition to these instructions, you may also need to refer to the
Drum instruction in Chapter 6, or the Stage programming instructions in Chapter 7.
There are two ways to quickly find the instruction you need.
Instruction
If you know the individual instruction name, use the following table to find
the page(s) that discusses the instruction.
Page
Instruction
Page
ACON
5107
ENCO
580
ADDB
573
END
594
ADD
563
ENI
5103
ADDD
564
AND
511,
555
AND STR
512
ANDD
556
ANDE
525,
522
FAULT
5106
FOR
596
GRAY
588
GTS
598
HTA
586
INC
571
ANDI
527
INCB
572
ANDN
511, 525
INT
5103
INV
584
ANDND
Standard
RLL Instructions
517
ANDNE
522
IRT
5103
ANDNI
527
IRTC
5103
Instruction
Page
OR
510,
557
OR OUT
513
ORE
521
ORI
526
ORN
510, 524
ORND
516
ORNE
521
OR OUTI
528
OR STR
512
ORD
558
ORNI
526
OROUTI
528
ORPD
516
OUT
513, 552
OUTD
552
OUTF
553
OUTI
528
ANDPD
517
ISG
722
ATH
585
JMP
722
BCD
583
LD
548
BIN
582
LDA
551
PAUSE
519
CMP
561
LDD
549
PD
514
CMPD
562
LDF
550
POP
553
CNT
536
LDLBL
592
5109
CV
723
MLR
5101
RST
518
CVJMP
723
MLS
5101
RSTI
529
DEC
571
MOV
591
RSTWT
595
DECB
572
MOVMC
592
RT
598
DECO
581
MUL
567
RTC
598
DISI
5104
MULB
575
RX
5113
DIV
569
MULD
568
SBR
598
DIVB
576
NCON
5107
SET
518
DIVD
570
NEXT
596
SETI
529
DLBL
5107
NJMP
722
SFLDGT
589
DRUM
612
NOP
594
SG
721
EDRUM
62, NO TAG
NOT
514
SGCNT
538
524,
53
Instruction Set
Instruction
Page
Instruction
Page
Instruction
Page
SHFL
577
STRND
515
TMR
531
SHFR
579
STRNE
520
TMRA
533
SR
542
STRNI
526
TMRAF
533
STOP
594
STRPD
515
TMRF
531
STR
59, 523
SUB
565
UDC
540
STRE
520
SUBB
574
WX
5115
STRI
526
SUBD
566
XOR
559
STRN
59, 523
SUM
577
XORD
560
Standard
RLL Instructions
54
END Statement
Do you ever wonder why so many PLC manufacturers always quote the scan time
for a 1K boolean program? Simple. Most all programs utilize many boolean
instructions. These are typically very simple instructions designed to join input and
output contacts in various series and parallel combinations. Since the DirectSOFT
package allows you to use graphic symbols to build the program, you dont
absolutely have to know the mnemonics of the instructions. However, it may helpful
at some point, especially if you ever have to troubleshoot the program with a
Handheld Programmer.The following paragraphs show how these instructions are
used to build simple ladder programs.
All DL05 programs require an END statement as the last instruction. This tells the
CPU that this is the end of the program. Normally, any instructions placed after the
END statement will not be executed. There are exceptions to this such as interrupt
routines, etc. Chapter 5 discusses the instruction set in detail.
X0
Y0
OUT
END
Simple Rungs
You use a contact to start rungs that contain both contacts and coils. The boolean
instruction that does this is called a Store or, STR instruction. The output point is
represented by the Output or, OUT instruction. The following example shows how to
enter a single contact and a single output coil.
DirectSOFT Example
X0
Handheld Mnemonics
Y0
OUT
STR X0
OUT Y0
END
END
Standard
RLL Instructions
Normally Closed
Contact
Normally closed contacts are also very common. This is accomplished with the
Store Not or, STRN instruction. The following example shows a simple rung with a
normally closed contact.
DirectSOFT Example
X0
Handheld Mnemonics
Y0
OUT
END
STRN X0
OUT Y0
END
Contacts in Series
55
Use the AND instruction to join two or more contacts in series. The following
example shows two contacts in series and a single output coil. The instructions used
would be STR X0, AND X1, followed by OUT Y0.
DirectSOFT Example
X0
Handheld Mnemonics
Y0
X1
OUT
STR X0
AND X1
OUT Y0
END
END
Midline Outputs
Sometimes it is necessary to use midline outputs to get additional outputs that are
conditional on other contacts. The following example shows how you can use the
AND instruction to continue a rung with more conditional outputs.
DirectSOFT Example
X0
Handheld Mnemonics
Y0
X1
OUT
Y1
X2
OUT
X3
STR X0
AND X1
OUT Y0
AND X2
OUT Y1
AND X3
OUT Y2
END
Y2
OUT
END
Parallel Elements
You also have to join contacts in parallel. The OR instruction allows you to do this.
The following example shows two contacts in parallel and a single output coil. The
instructions would be STR X0, OR X1, followed by OUT Y0.
DirectSOFT Example
X0
Handheld Mnemonics
Y0
OUT
X1
Standard
RLL Instructions
END
STR X0
OR X1
OUT Y0
END
56
Joining Series
Branches in
Parallel
Quite often it is necessary to join several groups of series elements in parallel. The
Or Store (ORSTR) instruction allows this operation. The following example shows a
simple network consisting of series elements joined in parallel.
DirectSOFT Example
X0
Handheld Mnemonics
Y0
X1
OUT
X2
X3
END
STR X0
AND X1
STR X2
AND X3
ORSTR
OUT Y0
END
You can also join one or more parallel branches in series. The And Store (ANDSTR)
Joining Parallel
Branches in Series instruction allows this operation. The following example shows a simple network
with contact branches in series with parallel contacts.
DirectSOFT Example
X0
Handheld Mnemonics
Y0
X1
OUT
X2
STR X0
STR X1
OR X2
ANDSTR
OUT Y0
END
END
Combination
Networks
You can combine the various types of series and parallel branches to solve most any
application problem. The following example shows a simple combination network.
X0
X2
X5
Y0
OUT
X1
X3
X4
X6
END
Standard
RLL Instructions
Comparative
Boolean
V1400
K1234
Y3
OUT
Boolean Stack
57
There are limits to how many elements you can include in a rung. This is because the
DL05 PLCs use an 8-level boolean stack to evaluate the various logic elements. The
boolean stack is a temporary storage area that solves the logic for the rung. Each
time the program encounters a STR instruction, the instruction is placed on the top of
the stack. Any other STR instructions already on the boolean stack are pushed down
a level. The ANDSTR, and ORSTR instructions combine levels of the boolean stack
when they are encountered. An error will occur during program compilation if the
CPU encounters a rung that uses more than the eight levels of the boolean stack.
The following example shows how the boolean stack is used to solve boolean logic.
X0
STR
STR
ORSTR
X1
AND X4
Y0
OUT
X2
STR
AND X3
X5
Output
ANDSTR
OR
STR X0
STR X1
STR X1
STR X2
X2 AND X3
STR X0
STR X1
STR X1
STR X0
STR X0
STR X0
STR X2
AND X3
ORSTR
AND X4
ORNOT X5
STR X0
STR X0
STR X0
3
S
S
3
S
S
S
S
ANDSTR
1
S
S
Standard
RLL Instructions
58
Immediate Boolean The DL05 Micro PLCs can usually complete an operation cycle in a matter of
milliseconds. However, in some applications you may not be able to wait a few
milliseconds until the next I/O update occurs. The DL05 PLCs offer Immediate input
and outputs which are special boolean instructions that allow reading directly from
inputs and writing directly to outputs during the program execution portion of the
CPU cycle. You may recall that this is normally done during the input or output
update portion of the CPU cycle. The immediate instructions take longer to execute
because the program execution is interrupted while the CPU reads or writes the I/O
point. This function is not normally done until the read inputs or the write outputs
portion of the CPU cycle.
NOTE: Even though the immediate input instruction reads the most current status
from the input point, it only uses the results to solve that one instruction. It does not
use the new status to update the image register. Therefore, any regular instructions
that follow will still use the image register values. Any immediate instructions that
follow will access the I/O again to update the status. The immediate output
instruction will write the status to the I/O and update the image register.
CPU Scan
Read Inputs
X11
OFF
...
X2
X1
X0
...
ON OFF OFF
Input Image Register
OFF
X0
OFF
X1
Standard
RLL Instructions
X0
I
Y0
Write Outputs
Write Outputs to Specialty I/O
Diagnostics
ON
X0
OFF
X1
59
Boolean Instructions
Store
(STR)
Store Not
(STRN)
Aaaa
DL05 Range
A
aaa
Inputs
0377
Outputs
0377
Control Relays
0777
Stage
0377
Timer
Aaaa
0177
Counter
CT
0177
Special Relay
SP
0777
In the following Store example, when input X1 is on, output Y2 will energize.
DirectSOFT
X1
B
STR
OUT
GX
OUT
1
C
2
ENT
ENT
In the following Store Not example, when input X1 is off output Y2 will energize.
DirectSOFT
X1
SP
STRN
GX
OUT
1
2
ENT
ENT
Standard
RLL Instructions
510
Or
(OR)
Or Not
(ORN)
Aaaa
Aaaa
DL05 Range
A
aaa
Inputs
0377
Outputs
0377
Control Relays
0777
Stage
0377
Timer
0177
Counter
CT
0177
Special Relay
SP
0777
B
STR
OUT
1
C
OR
X2
GX
OUT
2
F
5
ENT
ENT
ENT
Standard
RLL Instructions
X2
B
STR
R
ORN
GX
OUT
2
5
ENT
ENT
ENT
And
(AND)
And Not
(ANDN)
511
Aaaa
Aaaa
DL05 Range
A
aaa
Inputs
0377
Outputs
0377
Control Relays
0777
Stage
0377
Timer
0177
Counter
CT
0177
Special Relay
SP
0777
In the following And example, when input X1 and X2 are on output Y5 will energize.
DirectSOFT
X1
Y5
B
STR
OUT
V
AND
GX
OUT
2
5
ENT
ENT
ENT
In the following And Not example, when input X1 is on and X2 is off output Y5 will
energize.
DirectSOFT
X1
Y5
OUT
B
1
STR
W
ANDN
GX
OUT
2
5
ENT
ENT
ENT
Standard
RLL Instructions
512
And Store
(AND STR)
Or Store
(OR STR)
OUT
OUT
In the following And Store example, the branch consisting of contacts X2, X3, and X4
have been anded with the branch consisting of contact X1.
DirectSOFT
X1
X3
Y5
B
STR
OUT
C
STR
X4
V
AND
OR
L
ANDST
ENT
ENT
ENT
ENT
ENT
GX
OUT
F
5
ENT
In the following Or Store example, the branch consisting of X1 and X2 have been
ored with the branch consisting of X3 and X4.
DirectSOFT
X1
Y5
X3
X4
B
STR
OUT
V
AND
STR
V
AND
M
ORST
Standard
RLL Instructions
GX
OUT
E
4
ENT
ENT
ENT
ENT
ENT
F
5
ENT
513
Out
(OUT)
Aaaa
OUT
Multiple Out instructions referencing the same discrete location should not be used
since only the last Out instruction in the program will control the physical output
point. Instead, use the next instruction, the Or Out.
Operand Data Type
DL05 Range
A
aaa
0377
Outputs
0377
Control Relays
0777
Inputs
In the following Out example, when input X1 is on, output Y2 and Y5 will energize.
DirectSOFT
X1
Y2
Y5
OUT
Or Out
(OR OUT)
B
STR
OUT
ENT
GX
OUT
GX
OUT
ENT
ENT
DL05 Range
A
aaa
0177
Outputs
0177
Control Relays
0777
Inputs
A aaa
OR OUT
B
STR
OR OUT
O
INST#
1
D
F
3
5
E
4
STR
X4
Y2
OR OUT
O
INST#
F
3
ENT
ENT
ENT
ENT
ENT
ENT
ENT
ENT
Standard
RLL Instructions
DirectSOFT
514
Not
(NOT)
In the following example when X1 is off, Y2 will energize. This is because the Not
instruction inverts the status of the rung at the Not instruction.
DirectSOFT
X1
Y2
SHFT
ENT
STR
OUT
N
TMR
GX
OUT
O
INST#
T
MLR
ENT
ENT
NOTE: DirectSOFT Release 1.1i and later supports the use of the NOT instruction.
The above example rung is merely intended to show the visual representation of the
NOT instruction. The rung cannot be created or displayed in DirectSOFT versions
earlier than 1.1i.
Positive
Differential
(PD)
DL05 Range
A
aaa
0377
Outputs
0377
Control Relays
0777
Inputs
A aaa
PD
DirectSOFT
X1
C0
B
STR
PD
Standard
RLL Instructions
SHFT
1
P
CV
SHFT
ENT
D
A
3
ENT
515
Store Positive
Differential
(STRPD)
Store Negative
Differential
(STRND)
aaa
Inputs
0377
Outputs
0377
Control Relays
0777
Stage
0377
0177
CT
0177
Counter
Aaaa
DL05 Range
A
Timer
Aaaa
DirectSOFT
X1
Y4
OUT
$
STR
SHFT
GX
OUT
CV
E
4
ENT
ENT
Y4
OUT
$
STR
GX
OUT
SHFT
N
TMR
E
4
B
3
ENT
ENT
Standard
RLL Instructions
DirectSOFT
516
Or Positive
Differential
(ORPD)
Or Negative
Differential
(ORND)
Aaaa
Aaaa
DL05 Range
A
aaa
Inputs
0377
Outputs
0377
Control Relays
0777
Stage
0377
Timer
0177
CT
0177
Counter
In the following example, Y 5 will energize whenever X1 is on, or for one CPU scan
when X2 transitions from Off to On.
Handheld Programmer Keystrokes
DirectSOFT
X1
$
Y5
OUT
B
STR
Q
OR
X2
1
SHFT
C
3
CV
F
GX
OUT
ENT
ENT
ENT
In the following example, Y 5 will energize whenever X1 is on, or for one CPU scan
when X2 transitions from On to Off.
Handheld Programmer Keystrokes
DirectSOFT
X1
Y5
OUT
B
STR
Standard
RLL Instructions
OR
X2
GX
OUT
1
SHFT
N
TMR
F
5
ENT
D
C
3
ENT
ENT
517
And Positive
Differential
(ANDPD)
And Negative
Differential
(ANDND)
Aaaa
Aaaa
DL05 Range
A
aaa
Inputs
0377
Outputs
0377
Control Relays
0777
Stage
0377
Timer
0177
CT
0177
Counter
In the following example, Y5 will energize for one CPU scan whenever X1 is on and
X2 transitions from Off to On.
Handheld Programmer Keystrokes
DirectSOFT
X1
X2
$
Y5
OUT
B
STR
Q
OR
1
SHFT
C
3
CV
F
GX
OUT
ENT
ENT
ENT
In the following example, Y5 will energize for one CPU scan whenever X1 is on and
X2 transitions from On to Off.
Handheld Programmer Keystrokes
DirectSOFT
X1
X2
Y5
OUT
B
STR
Q
OR
SHFT
N
TMR
F
5
ENT
D
C
3
ENT
ENT
Standard
RLL Instructions
GX
OUT
518
Set
(SET)
Reset
(RST)
A aaa
aaa
SET
Optional
memory range
A aaa
aaa
RST
DL05 Range
A
aaa
Inputs
0377
Outputs
0377
Control Relays
0777
Stage
0377
Timer
0177
CT
0177
Counter
Optional
memory range
Y5
SET
B
STR
X
SET
ENT
F
2
ENT
Y5
Standard
RLL Instructions
RST
B
STR
S
RST
1
C
ENT
F
ENT
Pause
(PAUSE)
519
Y aaa
aaa
PAUSE
DL05 Range
aaa
Outputs
0377
In the following example, when X1 is ON, Y3Y5 will be turned OFF. The execution of
the ladder program will not be affected.
DirectSOFT
X1
Y5
Y7
PAUSE
Since the D2HPP Handheld Programmer does not have a specific Pause key, you
can use the corresponding instruction number for entry (#960), or type each letter of
the command.
Handheld Programmer Keystrokes
$
B
STR
O
INST#
1
J
G
9
ENT
A
ENT
ENT
F
3
ENT
In some cases, you may want certain output points in the specified pause range to
operate normally. In that case, use Aux 58 to over-ride the Pause instruction.
Standard
RLL Instructions
520
Comparative Boolean
Store If Equal
(STRE)
V aaa
B bbb
V aaa
B bbb
DL05 Range
B
aaa
bbb
V memory
Pointer
Constant
09999
In the following example, when the value in V memory location V2000 = 4933 , Y3 will
energize.
Handheld Programmer Keystrokes
DirectSOFT
V2000
K4933
Y3
$
STR
OUT
SHFT
J
4
GX
OUT
C
4
D
A
0
D
3
9
D
A
2
A
0
ENT
ENT
In the following example, when the value in V memory location V2000 5060, Y3
will energize.
Handheld Programmer Keystrokes
DirectSOFT
V2000
K5060
Y3
SP
STRN
OUT
SHFT
A
5
Standard
RLL Instructions
GX
OUT
C
G
0
D
3
A
2
4
A
6
ENT
A
0
ENT
A
0
Or If Equal
(ORE)
Or If Not Equal
(ORNE)
V aaa
B bbb
V aaa
B bbb
521
DL05 Range
B
aaa
bbb
V memory
Pointer
Constant
09999
In the following example, when the value in V memory location V2000 = 4500 or
V2002 = 2345 , Y3 will energize.
DirectSOFT
V2000
Y3
OUT
$
STR
E
SHFT
4
V2002
K2345
OR
C
SHFT
GX
OUT
A
0
4
D
3
A
2
F
5
A
0
A
0
ENT
A
2
C
4
A
0
C
2
ENT
ENT
In the following example, when the value in V memory location V2000 = 3916 or
V2002 050, Y3 will energize.
Handheld Programmer Keystrokes
DirectSOFT
V2000
K3916
Y3
OUT
$
STR
D
SHFT
3
V2002
K2500
SHFT
G
6
0
D
3
A
2
A
0
A
0
A
0
ENT
C
A
2
R
ORN
GX
OUT
C
4
A
0
C
0
ENT
ENT
Standard
RLL Instructions
522
And If Equal
(ANDE)
V aaa
B bbb
V aaa
B bbb
DL05 Range
A/B
aaa
bbb
V memory
Pointer
Constant
09999
In the following example, when the value in V memory location V2000 = 5000 and
V2002 = 2345, Y3 will energize.
DirectSOFT
V2000
V2002
K2345
Y3
$
STR
OUT
SHFT
SHFT
A
0
4
D
3
A
2
F
5
A
0
A
0
ENT
C
A
2
V
AND
GX
OUT
C
4
A
0
C
2
ENT
ENT
In the following example, when the value in V memory location V2000 = 2550 and
V2002 050, Y3 will energize.
DirectSOFT
V2000
V2002
K2500
Y3
OUT
$
STR
C
F
5
W
ANDN
SHFT
GX
OUT
C
4
Standard
RLL Instructions
SHFT
A
5
0
D
3
A
2
A
0
ENT
A
0
A
0
ENT
C
A
2
ENT
A
0
C
0
Store
(STR)
Store Not
(STRN)
A aaa
B bbb
A aaa
B bbb
523
DL05 Range
A/B
aaa
bbb
V memory
Pointer
Constant
09999
Timer
0177
CT
0177
Counter
In the following example, when the value in V memory location V2000 1000, Y3
will energize.
Handheld Programmer Keystrokes
DirectSOFT
V2000
K1000
Y3
$
STR
OUT
SHFT
V
AND
1
GX
OUT
A
2
A
0
A
0
ENT
ENT
In the following example, when the value in V memory location V2000 < 4050, Y3 will
energize.
Handheld Programmer Keystrokes
DirectSOFT
V2000
K4050
Y3
SP
STRN
OUT
SHFT
V
AND
4
GX
OUT
D
3
A
2
0
A
0
A
0
ENT
ENT
Standard
RLL Instructions
524
Or
(OR)
The
Comparative
Or
instruction
connects a normally open comparative
contact in parallel with another contact.
The contact will be on when Aaaa
Bbbb.
Or Not
(ORN)
A aaa
A aaa
B bbb
DL05 Range
A/B
aaa
bbb
V memory
Pointer
Constant
09999
Timer
0177
CT
0177
Counter
B bbb
In the following example, when the value in V memory location V2000 = 6045 or
V2002 2345, Y3 will energize.
Handheld Programmer Keystrokes
DirectSOFT
V2000
K6045
Y3
OUT
$
STR
G
SHFT
6
V2002
OR
C
D
2
GX
OUT
F
5
SHFT
V
AND
4
D
3
A
2
K2345
C
4
A
0
A
0
ENT
C
A
2
A
0
C
2
ENT
ENT
In the following example when the value in V memory location V2000 = 1000 or
V2002 < 050, Y3 will energize.
Handheld Programmer Keystrokes
DirectSOFT
$
V2000
K1000
Y3
OUT
STR
B
SHFT
1
V2002
K2500
F
2
Standard
RLL Instructions
R
ORN
GX
OUT
C
A
0
SHFT
V
AND
A
0
5
D
A
2
0
ENT
A
0
A
0
ENT
C
A
2
ENT
A
0
C
0
And
(AND)
And Not
(ANDN)
B bbb
A aaa
B bbb
DL05 Range
A/B
aaa
bbb
V memory
Pointer
Constant
09999
Timer
0177
CT
0177
Counter
A aaa
525
In the following example, when the value in V memory location V2000 = 5000, and
V2002 2345, Y3 will energize.
Handheld Programmer Keystrokes
DirectSOFT
V2000
K5000
V2002
K2345
Y3
$
STR
OUT
SHFT
D
2
A
0
SHFT
V
AND
GX
OUT
A
0
ENT
C
A
2
A
0
C
2
ENT
A
0
V
AND
C
4
ENT
In the following example, when the value in V memory location V2000 = 7000 and
V2002 < 050, Y3 will energize.
DirectSOFT
V2000
V2002
K2500
Y3
OUT
$
STR
H
SHFT
W
ANDN
C
F
2
GX
OUT
C
4
A
0
SHFT
V
AND
A
0
SHFT
Y
AND
A
0
A
0
ENT
C
A
2
A
0
C
0
ENT
D
3
ENT
Standard
RLL Instructions
526
Immediate Instructions
Store
Immediate
(STRI)
Store Not
Immediate
(STRNI)
X aaa
X aaa
DL05 Range
aaa
Inputs
0377
$
STR
SHFT
B
8
ENT
OUT
GX
OUT
C
2
ENT
DirectSOFT
X1
Y2
OUT
SP
STRN
GX
OUT
Standard
RLL Instructions
Or Immediate
(ORI)
Or Not Immediate
(ORNI)
SHFT
B
8
C
2
1
ENT
X aaa
X aaa
ENT
527
OR Immediate
Instructions Contd
DL05 Range
aaa
Inputs
0377
X1
OUT
B
STR
Q
OR
X2
1
SHFT
GX
OUT
ENT
C
2
8
F
5
ENT
ENT
DirectSOFT
Y5
X1
B
STR
OUT
R
ORN
X2
1
SHFT
GX
OUT
And Immediate
(ANDI)
ENT
C
2
8
F
5
ENT
ENT
X aaa
X aaa
DL05 Range
aaa
Inputs
0377
Y5
B
STR
OUT
V
AND
1
SHFT
C
2
8
F
5
ENT
ENT
Y5
OUT
B
1
STR
W
ANDN
GX
OUT
SHFT
ENT
C
2
8
F
5
ENT
ENT
Standard
RLL Instructions
GX
OUT
ENT
528
Out Immediate
(OUTI)
Or Out Immediate
(OROUTI)
Y aaa
OUTI
Y aaa
OROUTI
DL05 Range
aaa
Outputs
0377
In the following example, when X1 is on, output point Y2 on the output module will
turn on. For instruction entry on the Handheld Programmer, you can use the
instruction number (#350) as shown, or type each letter of the command.
DirectSOFT
X1
B
STR
OUTI
O
INST#
ENT
1
D
F
3
A
5
ENT
ENT
ENT
DirectSOFT
X1
Y2
OR OUTI
X4
B
1
STR
O
INST#
F
3
Y2
OR OUTI
Standard
RLL Instructions
2
$
A
5
E
4
D
F
3
C
2
ENT
ENT
ENT
ENT
ENT
STR
O
INST#
ENT
ENT
A
5
ENT
Set Immediate
(SETI)
The
Set
Immediate
instruction
immediately sets, or turns on an output or
a range of outputs in the image register
and the corresponding output point(s) at
the time the instruction is executed. Once
the outputs are set it is not necessary for
the input to remain on. The Reset
Immediate instruction can be used to
reset the outputs.
Reset
Immediate
(RSTI)
The
Reset
Immediate
instruction
immediately resets, or turns off an output
or a range of outputs in the image register
and the output point(s) at the time the
instruction is executed. Once the outputs
are reset it is not necessary for the input to
remain on.
Operand Data Type
529
Y aaa
aaa
SETI
Y aaa
aaa
RSTI
DL05 Range
aaa
Outputs
0377
In the following example, when X1 is on, Y2 through Y5 will be set on in the image
register and on the corresponding output points.
Handheld Programmer Keystrokes
DirectSOFT
X1
Y2
Y5
SETI
B
STR
X
SET
1
SHFT
ENT
F
2
ENT
In the following example, when X1 is on, Y5 through Y22 will be reset (off) in the
image register and on the corresponding output module(s).
Handheld Programmer Keystrokes
DirectSOFT
X1
Y2
Y5
RSTI
B
1
STR
S
RST
SHFT
ENT
C
F
2
ENT
Standard
RLL Instructions
530
Timers are used to time an event for a desired length of time. The single input timer
will time as long as the input is on. When the input changes from on to off the timer
current value is reset to 0. There is a tenth of a second and a hundredth of a second
timer available with a maximum time of 999.9 and 99.99 seconds respectively. There
is a discrete bit associated with each timer to indicate that the current value is equal
to or greater than the preset value. The timing diagram below shows the relationship
between the timer input, associated discrete bit, current value, and timer preset.
1
Seconds
4
X1
TMR
T1
K30
X1
Timer preset
T1
T1
0
Current
Value
10
20
30
40
1/10 Seconds
50
60
Y0
OUT
There are those applications that need an accumulating timer, meaning it has the
ability to time, stop, and then resume from where it previously stopped. The
accumulating timer works similarly to the regular timer, but two inputs are required.
The start/stop input starts and stops the timer. When the timer stops, the elapsed
time is maintained. When the timer starts again, the timing continues from the
elapsed time. When the reset input is turned on, the elapsed time is cleared and the
timer will start at 0 when it is restarted. There is a tenth of a second and a hundredth
of a second timer available with a maximum time of 9999999.9 and 999999.99
seconds respectively. The timing diagram below shows the relationship between the
timer input, timer reset, associated discrete bit, current value, and timer preset.
0
Seconds
4
X1
Start/Stop
X1
X2
X2
Reset Input
T0
Standard
RLL Instructions
Current
Value
10
10
20
30
1/10 Seconds
40
50
TMRA
T0
K30
531
T aaa
TMR
B bbb
Preset
Timer #
TMRF
T aaa
B bbb
Preset
Timer #
Timers
DL05 Range
A/B
aaa
0177
bbb
12007377
74007577
12007377
74007577
Constants
(preset only)
09999
T/V
0177 or V4110041107
V /T*
0177
You can perform functions when the timer reaches the specified preset using the
discrete status bit. Or, use comparative contacts to perform functions at different
time intervals, based on one timer. The examples on the following page show these
two methods of programming timers.
Standard
RLL Instructions
NOTE: * With the HPP, both the Timer discrete status bits and current value are
accessed with the same data reference. DirectSOFT uses separate references,
such as T2 for discrete status bit for Timer T2, and TA2 for the current value of
Timer T2.
532
Timer Example
Using Discrete
Status Bits
In the following example, a single input timer is used with a preset of 3 seconds. The
timer discrete status bit (T2) will turn on when the timer has timed for 3 seconds. The
timer is reset when X1 turns off, turning the discrete status bit off and resetting the
timer current value to 0.
Timing Diagram
DirectSOFT
X1
TMR
T2
K30
10
20
Seconds
4
30
40
50
60
X1
Y0
T2
OUT
T2
Y0
B
STR
N
TMR
SHFT
Current
Value
ENT
D
STR
GX
OUT
A
0
A
0
3
T
MLR
C
2
1/10 Seconds
ENT
ENT
ENT
In the following example, a single input timer is used with a preset of 4.5 seconds.
Timer Example
Using Comparative Comparative contacts are used to energize Y3, Y4, and Y5 at one second intervals
respectively. When X1 is turned off the timer will be reset to 0 and the comparative
Contacts
contacts will turn off Y3, Y4, and Y5.
Timing Diagram
DirectSOFT
X1
TMR
Seconds
T20
K45
TA20
OUT
TA20
10
20
30
40
50
60
Y3
Y4
K20
X1
Y3
K10
Y4
OUT
Y5
TA20
Y5
K30
T2
OUT
Current
Value
1/10 Seconds
Handheld Programmer Keystrokes
$
B
1
STR
N
TMR
C
2
SHFT
T
MLR
STR
Standard
RLL Instructions
ENT
A
GX
OUT
SHFT
STR
GX
OUT
SHFT
STR
GX
OUT
F
5
F
4
A
2
ENT
B
A
1
ENT
ENT
T
MLR
A
2
C
0
A
0
ENT
ENT
T
MLR
ENT
A
2
D
0
A
3
ENT
Accumulating
Timer (TMRA)
Enable
533
T aaa
TMRA
B bbb
Reset
Preset
Enable
Timer #
T aaa
TMRAF
B bbb
Reset
Preset
Timer #
NOTE: The accumulating type timer uses two consecutive V-memory locations
for the 8-digit value, and therefore two consecutive timer locations. For example, if
TMR 1 is used, the next available timer number is TMR 3.
Operand Data Type
DL05 Range
A/B
aaa
bbb
Timers
0176
12007377
74007577
12007377
74007577
Constants
(preset only)
099999999
T/V
0176 or V4110041107
V /T*
0176
NOTE: * With the HPP, both the Timer discrete status bits and current value are
accessed with the same data reference. DirectSOFT uses separate references,
such as T2 for discrete status bit for Timer T2, and TA2 for the current value of
Timer T2.
The following examples show two methods of programming timers. One performs
functions when the timer reaches the preset value using the discrete status bit, or
use comparative contacts to perform functions at different time intervals.
Standard
RLL Instructions
534
Accumulating
Timer Example
using Discrete
Status Bits
In the following example, a two input timer (accumulating timer) is used with a preset
of 3 seconds. The timer discrete status bit (T6) will turn on when the timer has timed
for 3 seconds. Notice in this example that the timer times for 1 second , stops for one
second, then resumes timing. The timer will reset when C10 turns on, turning the
discrete status bit off and resetting the timer current value to 0.
Timing Diagram
DirectSOFT
X1
TMRA
T6
10
10
Seconds
4
20
30
40
50
X1
K30
C10
C10
T6
Y7
T6
Current
Value
OUT
B
1
STR
$
SHFT
STR
N
TMR
SHFT
ENT
C
A
3
B
2
1/10 Seconds
A
1
ENT
STR
G
0
ENT
GX
OUT
SHFT
T
MLR
ENT
ENT
Accumulator Timer In the following example, a single input timer is used with a preset of 4.5 seconds.
Comparative contacts are used to energized Y3, Y4, and Y5 at one second intervals
Example Using
respectively. The comparative contacts will turn off when the timer is reset.
Comparative
Contacts
Timing Diagram
DirectSOFT
X1
TMRA
T20
K45
10
10
Seconds
4
20
30
40
50
X1
C10
C10
TA20
Y3
Y3
K10
OUT
Y4
TA20
Y4
K20
Y5
OUT
T20
TA20
Y5
K30
Current
Value
OUT
1/10 Seconds
Handheld Programmer Keystrokes (cont)
B
1
Standard
RLL Instructions
STR
$
SHFT
STR
N
TMR
$
STR
SHFT
B
2
A
1
C
0
SHFT
GX
OUT
SHFT
STR
ENT
0
A
2
T
MLR
ENT
E
F
4
5
A
ENT
ENT
ENT
T
MLR
A
2
C
0
SHFT
STR
GX
OUT
A
2
ENT
A
3
GX
OUT
ENT
T
MLR
ENT
F
5
ENT
A
2
Using Counters
535
Counters are used to count events . The counters available are up counters,
up/down counters, and stage counters (used with RLL PLUS programming).
The up counter has two inputs, a count input and a reset input. The maximum count
value is 9999. The timing diagram below shows the relationship between the counter
input, counter reset, associated discrete bit, current value, and counter preset.
X1
X1
CNT
Up
CT1
K3
X2
X2
Reset
CT1
Current
Value
Counts
Counter preset
The up down counter has three inputs, a count up input, count down input and reset
input. The maximum count value is 99999999. The timing diagram below shows the
relationship between the counter input, counter reset, associated discrete bit,
current value, and counter preset.
X1
X1
Up
CT2
K3
X2
X2
Down
X3
X3
Reset
CT2
Current
Value
UDC
1
Counts
Counter preset
The stage counter has a count input and is reset by the RST instruction. This
instruction is useful when programming using the RLL PLUS structured programming.
The maximum count value is 9999. The timing diagram below shows the relationship
between the counter input, associated discrete bit, current value, counter preset and
reset instruction.
X1
X1
Up
CT2
Current
Value
Counts
CT2
Counter preset
Standard
RLL Instructions
RST
CT2
SGCNT
K3
536
Counter
(CNT)
Counter #
Count
CNT
CT aaa
B bbb
Reset
Preset
Discrete Status Bit: The discrete status bit is accessed by referencing the
associated CT memory location. It will be on if the value is equal to or greater than the
preset value. For example the discrete status bit for counter 2 would be CT2.
NOTE: Counter preset constants (K) may be changed by using a programming
device, even when the CPU is in Run Mode. Therefore, a V-memory preset is
required only if the ladder program must change the preset.
bbb
CT
0177
V memory
(preset only)
12007377
74007577
12007377
74007577
Constants
(preset only)
09999
Counters
Standard
RLL Instructions
DL05 Range
A/B
Counter discrete
status bits
CT/V
0177 or V4114041147
Counter current
values
V/CT*
0177
NOTE: * With the HPP, both the Counter discrete status bits and current value are
accessed with the same data reference. DirectSOFT uses separate references,
such as CT2 for discrete status bit for Counter CT2, and CTA2 for the current
value of Counter CT2.
537
Counter Example
Using Discrete
Status Bits
In the following example, when X1 makes an off to on transition, counter CT2 will
increment by one. When the current value reaches the preset value of 3, the counter
status bit CT2 will turn on and energize Y7. When the reset C10 turns on, the counter
status bit will turn off and the current value will be 0. The current value for counter
CT2 will be held in V memory location V1002.
Counting diagram
DirectSOFT
X1
CNT
CT2
X1
K3
C10
C10
Y7
CT2
OUT
Y10
1
Current
Value
B
1
STR
$
SHFT
STR
GY
CNT
SHFT
STR
B
A
1
ENT
C
D
2
GX
OUT
ENT
SHFT
T
MLR
C
2
ENT
ENT
ENT
In the following example, when X1 makes an off to on transition, counter CT2 will
Counter Example
Using Comparative increment by one. Comparative contacts are used to energize Y3, Y4, and Y5 at
different counts. When the reset C10 turns on, the counter status bit will turn off and
Contacts
the counter current value will be 0, and the comparative contacts will turn off.
Counting diagram
DirectSOFT
X1
CNT
CT2
X1
K3
C10
C10
CTA2
Y3
K1
Y3
OUT
Y4
CTA2
Y4
K2
OUT
CTA2
Y5
K3
Y5
1
Current
Value
OUT
B
STR
1
SHFT
STR
GY
CNT
SHFT
B
2
B
1
A
1
D
3
STR
GX
OUT
C
2
SHFT
ENT
ENT
T
MLR
C
2
SHFT
STR
D
3
ENT
GX
OUT
C
2
SHFT
T
MLR
SHFT
T
MLR
ENT
GX
OUT
ENT
D
SHFT
STR
ENT
C
2
ENT
F
5
ENT
Standard
RLL Instructions
ENT
538
Stage Counter
(SGCNT)
Counter #
CT aaa
SGCNT
B bbb
Preset
Instruction Specifications
Counter Reference (CTaaa): Specifies
the counter number.
Preset Value (Bbbb): Constant value (K)
or a V memory location.
Current Values: Counter current values
are accessed by referencing the
associated V or CT memory locations*.
The V-memory location is the counter
location + 1000. For example, the counter
current value for CT3 resides in V memory
location V1003.
Discrete Status Bit: The discrete status
bit is accessed by referencing the
associated CT memory location. It will be
on if the value is equal to or greater than the
preset value. For example the discrete
status bit for counter 2 would be CT2.
Operand Data Type
aaa
bbb
CT
0177
V memory
(preset only)
12007377
74007577
12007377
74007577
Constants
(preset only)
09999
Counters
Standard
RLL Instructions
DL05 Range
A/B
Counter discrete
status bits
CT/V
0177 or V4114041147
Counter current
values
V/CT*
10001177
NOTE: * With the HPP, both the Counter discrete status bits and current value are
accessed with the same data reference. DirectSOFT uses separate references,
such as CT2 for discrete status bit for Counter CT2, and CTA2 for the current
value of Counter CT2.
539
Stage Counter
Example Using
Discrete Status
Bits
In the following example, when X1 makes an off to on transition, stage counter CT7
will increment by one. When the current value reaches 3, the counter status bit CT7
will turn on and energize Y7. The counter status bit CT7 will remain on until the
counter is reset using the RST instruction. When the counter is reset, the counter
status bit will turn off and the counter current value will be 0. The current value for
counter CT7 will be held in V memory location V1007.
Counting diagram
DirectSOFT
X1
SGCNT
K3
CT7
X1
Y7
CT7
Y10
OUT
C5
CT7
1
S
RST
SHFT
D
3
7
$
SHFT
STR
SHFT
GY
CNT
GX
OUT
SHFT
SHFT
S
RST
SHFT
T
MLR
H
7
ENT
STR
ENT
C
ENT
G
RST
CT7
RST
Current
Value
F
2
ENT
T
MLR
SHFT
H
7
ENT
ENT
In the following example, when X1 makes an off to on transition, counter CT2 will
increment by one. Comparative contacts are used to energize Y3, Y4, and Y5 at
different counts. Although this is not shown in the example, when the counter is reset
using the Reset instruction, the counter status bit will turn off and the current value
will be 0. The current value for counter CT2 will be held in V memory location V1002.
Stage Counter
Example Using
Comparative
Contacts
Counting diagram
DirectSOFT
X1
SGCNT
CT2
K10
X1
CT2
Y3
K1
OUT
Y3
Y4
CT2
Y4
K2
OUT
CT2
Y5
K3
Y5
Current
Value
OUT
B
STR
S
RST
G
6
B
SHFT
STR
B
1
GX
OUT
SHFT
ENT
0
C
2
GY
CNT
C
2
ENT
SHFT
T
MLR
C
2
SHFT
STR
D
3
ENT
GX
OUT
C
2
SHFT
T
MLR
SHFT
T
MLR
ENT
GX
OUT
ENT
D
SHFT
STR
ENT
C
2
ENT
F
5
ENT
Standard
RLL Instructions
SHFT
540
Up Down Counter
(UDC)
Down
Reset
UDC
CT aaa
B bbb
Counter #
Preset
DL05 Range
A/B
aaa
bbb
CT
0176
V memory
(preset only)
12007377
74007577
12007377
74007577
Constants
(preset only)
099999999
Counters
Standard
RLL Instructions
Up
Counter discrete
status bits
CT/V
0176 or V4114041147
Counter current
values
V/CT*
0176
NOTE: * With the HPP, both the Counter discrete status bits and current value are
accessed with the same data reference. DirectSOFT uses separate references,
such as CT2 for discrete status bit for Counter CT2, and CTA2 for the current
value of Counter CT2.
541
Up / Down Counter
Example Using
Discrete Status
Bits
In the following example if X2 and X3 are off ,when X1 toggles from off to on the
counter will increment by one. If X1 and X3 are off the counter will decrement by one
when X2 toggles from off to on. When the count value reaches the preset value of 3,
the counter status bit will turn on. When the reset X3 turns on, the counter status bit
will turn off and the current value will be 0.
DirectSOFT
Counting Diagram
X1
UDC
CT2
X1
K3
X2
X2
X3
X3
CT2
CT2
Y7
OUT
B
STR
C
STR
D
3
STR
SHFT
D
ISG
Current
Value
ENT
ENT
ENT
GX
OUT
STR
C
3
ENT
SHFT
2
0
SHFT
T
MLR
C
2
ENT
ENT
C
2
Up / Down Counter
Example Using
Comparative
Contacts
In the following example, when X1 makes an off to on transition, counter CT2 will
increment by one. Comparative contacts are used to energize Y3 and Y4 at different
counts. When the reset (X3) turns on, the counter status bit will turn off, the current
value will be 0, and the comparative contacts will turn off.
DirectSOFT
X1
Counting Diagram
UDC
CT2
V2000
X1
X2
X2
X3
X3
CTA2
Y3
K1
Y3
OUT
Y4
CTA2
Y4
K2
OUT
B
1
C
STR
D
STR
SHFT
SHFT
V
AND
$
STR
D
ISG
ENT
1
GX
OUT
ENT
SHFT
SHFT
A
0
C
2
C
2
STR
C
ENT
ENT
A
0
SHFT
T
MLR
2
ENT
C
2
GX
OUT
ENT
C
2
ENT
E
4
ENT
SHFT
T
MLR
C
2
Standard
RLL Instructions
STR
Current
Value
542
Shift Register
(SR)
DATA
SR
From A aaa
CLOCK
To
B bbb
RESET
With each off to on transition of the clock input, the bits which make up the shift
register block are shifted by one bit position and the status of the data input is placed
into the starting bit position in the shift register. The direction of the shift depends on
the entry in the From and To fields. From C0 to C17 would define a block of sixteen
bits to be shifted from left to right. From C17 to C0 would define a block of sixteen
bits, to be shifted from right to left. The maximum size of the shift register block
depends on the number of available control relays. The minimum block size is 8
control relays.
Operand Data Type
Control Relay
DL05 Range
A/B
aaa
bbb
0777
0777
DirectSOFT
X1
Data Input
B
STR
SR
$
From
X2
STR
C0
Clock Input
D
3
STR
To
X3
C17
Reset Input
SHFT
S
RST
SHFT
H
1
Standard
RLL Instructions
Data
Clock
Reset
0-1-0
0-1-0
0-1-0
0-1-0
0-1-0
- indicates on
C17
- indicates off
ENT
ENT
ENT
R
ORN
ENT
SHFT
A
0
543
Copying Data to
the Accumulator
The accumulator in the DL05 internal CPUs is a 32 bit register which is used as a
temporary storage location for data that is being copied or manipulated in some
manor. For example, you have to use the accumulator to perform math operations
such as add, subtract, multiply, etc. Since there are 32 bits, you can use up to an
8-digit BCD number. The accumulator is reset to 0 at the end of every CPU scan.
The Load and Out instructions and their variations are used to copy data from a
V-memory location to the accumulator, or, to copy data from the accumulator to V
memory. The following example copies data from V-memory location V2000 to
V-memory location V2010.
X1
V2000
LD
V2000
Copy data from V2000 to the
lower 16 bits of the accumulator
OUT
V2010
V2010
Since the accumulator is 32 bits and V memory locations are 16 bits the Load Double
and Out Double (or variations thereof) use two consecutive V-memory locations or 8
digit BCD constants to copy data either to the accumulator from a V-memory
address or from a V-memory address to the accumulator. For example if you wanted
to copy data from V2000 and V2001 to V2010 and V2011 the most efficient way to
perform this function would be as follows:
X1
V2001
LDD
V2000
V2000
Acc. 6
OUTD
V2010
Copy data from the accumulator to
V2010 and V2011
V2011
V2010
Standard
RLL Instructions
544
Changing the
Accumulator Data
X1
Instructions that manipulate data also use the accumulator. The result of the
manipulated data resides in the accumulator. The data that was being manipulated
is cleared from the accumulator. The following example loads the constant value
4935 into the accumulator, shifts the data right 4 bits, and outputs the result to
V2010.
Constant
LD
K4935
Load the value 4935 into the
accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Acc.
6 5
4 3
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
SHFR
Acc.
K4
1
0
S S
Shifted out of
accumulator
6 5
4 3
OUT
V2010
0
V2010
Some of the data manipulation instructions use 32 bits. They use two consecutive V
memory locations or an 8 digit BCD constant to manipulate data in the accumulator.
In the following example, when X1 is on, the value in V2000 and V2001 will be loaded
into the accumulator using the Load Double instruction. The value in the
accumulator is added with the value in V2006 and V2007 using the Add Double
instruction. The value in the accumulator is copied to V2010 and V2011 using the
Out Double instruction.
V2001
X1
LDD
V2000
V2000
Load the value in V2000 and
V2001 into the accumulator
ADDD
V2006
Add the value in the
accumulator with the value
in V2006 and V2007
(Accumulator)
+ 2
Acc. 8
Standard
RLL Instructions
OUTD
V2010
Copy the value in the
accumulator to V2010 and
V2011
V2011
V2010
545
The accumulator stack is used for instructions that require more than one parameter
Using the
Accumulator Stack to execute a function or for user defined functionality. The accumulator stack is used
when more than one Load instruction is executed without the use of an Out
instruction. The first load instruction in the scan places a value into the accumulator.
Every Load instruction thereafter without the use of an Out instruction places a value
into the accumulator and the value that was in the accumulator is placed onto the
accumulator stack. The Out instruction nullifies the previous load instruction and
does not place the value that was in the accumulator onto the accumulator stack
when the next load instruction is executed. Every time a value is placed onto the
accumulator stack the other values in the stack are pushed down one location. The
accumulator is eight levels deep (eight 32 bit registers). If there is a value in the
eighth location when a new value is placed onto the stack, the value in the eighth
location is pushed off the stack and cannot be recovered.
X1
Constant
LD
K3245
Load the value 3245 into the accumulator
Constant
LD
K5151
Load the value 5151 into the accumulator, pushing the value 3245 onto the
stack
Acc. 0
Level 2
Level 3
Level 4
Level 5
Level 6
Level 7
Level 8
LD
Bucket
Accumulator Stack
Constant
Load the value 6363 into the accumulator, pushing the value 5151 to the 1st
stack location and the value 3245 to
the 2nd stack location
Acc. 0
K6363
Accumulator Stack
Level 1
Level 1
Level 2
Level 3
Level 4
Level 5
Level 6
Level 7
Level 8
Bucket
Accumulator Stack
Level 1
Level 2
1
5
Level 3
Level 4
Level 5
Level 6
Level 7
Level 8
The POP instruction rotates values upward through the stack into the accumulator.
When a POP is executed the value which was in the accumulator is cleared and the
value that was on top of the stack is in the accumulator. The values in the stack are
shifted up one position in the stack.
Standard
RLL Instructions
Bucket
546
X1
POP
Acc. X
POP the 1st value on the stack into the
accumulator and move stack values
up one location
Accumulator Stack
OUT
V2000
V2000
Level 1
Level 2
2
0
Level 3
Level 4
Level 5
Level 6
Level 7
Level 8
Level 1
Level 2
Level 3
Level 4
Level 5
Level 6
Level 7
Level 8
Level 1
Level 2
Level 3
Level 4
Level 5
Level 6
Level 7
Level 8
POP
Acc. 0
POP the 1st value on the stack into the
accumulator and move stack values
up one location
Accumulator Stack
OUT
V2001
V2001
Acc. 0
Accumulator Stack
OUT
V2002
V2002
Using Pointers
Acc. X
Many of the DL05 series instructions will allow V-memory pointers as a operand
(commonly known as indirect addressing). Pointers allow instructions to obtain data
from V-memory locations referenced by the pointer value.
Standard
RLL Instructions
547
X1
LD
P2000
V1400 (P1400) contains the value 440
HEX. 440 HEX. = 2100 Octal which
contains the value 2635.
V2000
0
V2076
V2077
V2100
V2101
V2102
V2103
V2104
V2105
Accumulator
2
OUT
S
S
V2200
Copy the data from the lower 16 bits of
the accumulator to V2200.
V2200
V2201
The following example is identical to the one above with one exception. The LDA
(Load Address) instruction automatically converts the Octal address to Hex.
X1
LDA
O 2100
0
2100 Octal is converted to Hexadecimal
440 and loaded into the accumulator
OUT
V 2000
V2000
S
S
LD
P 2000
OUT
V 2200
V2076
V2077
V2100
V2101
V2102
V2103
V2104
V2105
Accumulator
0
S
S
V2200
V2201
Standard
RLL Instructions
548
Load
(LD)
LD
A aaa
DL05 Range
A
aaa
V memory
Pointer
Constant
0FFFF
Description
SP53
SP70
on when the value loaded into the accumulator by any instruction is zero.
SP76
NOTE: Two consecutive Load instructions will place the value of the first load
instruction onto the accumulator stack.
In the following example, when X1 is on, the value in V2000 will be loaded into the
accumulator and output to V2010.
DirectSOFT
V2000
X1
LD
V2000
The unused accumulator
bits are set to zero
Acc. 0
OUT
V2010
Copy the value in the lower
16 bits of the accumulator to
V2010
V2010
B
1
STR
SHFT
L
ANDST
Standard
RLL Instructions
2
GX
OUT
X
SET
3
A
0
SHFT
V
AND
ENT
C
A
2
B
0
A
1
ENT
549
Load Double
(LDD )
LDD
A aaa
DL05 Range
A
aaa
V memory
Pointer
Constant
0FFFFFFFF
Description
SP53
SP70
on when the value loaded into the accumulator by any instruction is zero.
SP76
on when the value loaded into the accumulator by any instruction is zero.
NOTE: Two consecutive Load instructions will place the value of the first load
instruction onto the accumulator stack.
In the following example, when X1 is on, the 32 bit value in V2000 and V2001 will be
loaded into the accumulator and output to V2010 and V2011.
DirectSOFT
X1
V2001
LDD
V2000
V2000
Acc. 6
OUTD
V2010
V2011
V2010
B
STR
SHFT
L
ANDST
GX
OUT
SHFT
3
A
ENT
3
A
1
ENT
Standard
RLL Instructions
D
3
ENT
550
Load
Formatted
(LDF)
LDF
A aaa
K bbb
DL05 Range
A
aaa
bbb
Inputs
0377
Outputs
0377
Control Relays
0777
Stage Bits
0377
Timer Bits
0177
Counter Bits
CT
0177
Special Relays
SP
0777
132
Constant
Description
SP70
on when the value loaded into the accumulator by any instruction is zero.
SP76
on when the value loaded into the accumulator by any instruction is zero.
NOTE: Two consecutive Load instructions will place the value of the first load
instruction onto the accumulator stack.
In the following example, when C0 is on, the binary pattern of C10C16 (7 bits) will
be loaded into the accumulator using the Load Formatted instruction. The lower 7
bits of the accumulator are output to Y0Y6 using the Out Formatted instruction.
DirectSOFT
C0
LDF
C10
K7
Location
Constant
C10
K7
OUTF
6 5
4 3
Y0
K7
Standard
RLL Instructions
SHFT
SHFT
L
ANDST
SHFT
GX
OUT
SHFT
STR
ENT
H
0
F
5
7
5
A
H
0
A
2
ENT
ENT
Location
Constant
Y0
K7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
Load Address
(LDA)
551
LDA
O aaa
DL05 Range
aaa
Octal Address
Description
SP70
on when the value loaded into the accumulator by any instruction is zero.
SP76
on when the value loaded into the accumulator by any instruction is zero.
NOTE: Two consecutive Load instructions will place the value of the first load
instruction onto the accumulator stack.
In the following example when X1 is on, the octal number 40400 will be converted to
a HEX 4100 and loaded into the accumulator using the Load Address instruction.
The value in the lower 16 bits of the accumulator is copied to V2000 using the Out
instruction.
DirectSOFT
X1
Octal
LDA
4
O 40400
Hexadecimal
0
OUT
V2000
V2000
Copy the value in lower 16
bits of the accumulator to
V2000
Handheld Programmer Keystrokes
$
B
1
STR
SHFT
L
ANDST
A
3
0
A
SHFT
V
AND
0
C
ENT
A
A
0
A
0
ENT
Standard
RLL Instructions
GX
OUT
ENT
552
Out
(OUT)
OUT
A aaa
DL05 Range
A
aaa
V memory
Pointer
Description
SP53
In the following example, when X1 is on, the value in V2000 will be loaded into the
lower 16 bits of the accumulator using the Load instruction. The value in the lower 16
bits of the accumulator are copied to V2010 using the Out instruction.
Handheld Programmer Keystrokes
DirectSOFT
X1
V2000
LD
8
V2000
Load the value in V2000 into
the lower 16 bits of the
accumulator
B
STR
SHFT
L
ANDST
GX
OUT
OUT
ENT
3
A
ENT
SHFT
V
AND
A
2
B
0
A
1
ENT
V2010
Copy the value in the lower
16 bits of the accumulator to
V2010
Out Double
(OUTD)
V2010
OUTD
A aaa
DL05 Range
A
aaa
V memory
Pointer
Description
SP53
Standard
RLL Instructions
In the following example, when X1 is on, the 32 bit value in V2000 and V2001 will be
loaded into the accumulator using the Load Double instruction. The value in the
accumulator is output to V2010 and V2011 using the Out Double instruction.
V2001
DirectSOFT
6
X1
V2000
9
LDD
B
1
STR
V2000
Acc. 6
OUTD
V2010
Copy the value in the
accumulator to V2010 and
V2011
V2011
V2010
SHFT
L
ANDST
GX
OUT
SHFT
ENT
D
3
A
ENT
3
A
1
ENT
553
Out
Formatted
(OUTF)
OUTF
A aaa
K bbb
DL05 Range
A
aaa
bbb
Inputs
0377
Outputs
0377
Control Relays
0777
Constant
132
In the following example, when C0 is on, the binary pattern of C10C16 (7 bits) will
be loaded into the accumulator using the Load Formatted instruction. The lower 7
bits of the accumulator are output to Y0Y6 using the Out Formatted instruction.
DirectSOFT
C0
LDF
C10
K7
Location
Constant
C10
K7
OUTF
Y0
6 5
4 3
Accumulator
K7
Copy the value of the
specified number of bits
from the accumulator to
Y20Y26
Location
Constant
Y0
K7
SHFT
C
F
SHFT
L
ANDST
SHFT
GX
OUT
SHFT
Pop
(POP)
ENT
5
H
0
ENT
F
5
H
A
1
A
2
ENT
Description
SP63
on when the result of the instruction causes the value in the accumulator
to be zero.
POP
Standard
RLL Instructions
554
Pop Instruction
Continued
In the example below, when C0 is on, the value 4545 that was on top of the stack is
moved into the accumulator using the Pop instruction The value is output to V2000
using the Out instruction. The next Pop moves the value 3792 into the accumulator
and outputs the value to V2001. The last Pop moves the value 7930 into the
accumulator and outputs the value to V2002. Please note if the value in the stack
were greater than 16 bits (4 digits) the Out Double instruction would be used and 2 V
memory locations for each Out Double must be allocated.
DirectSOFT
C0
POP
Acc. X
Accumulator Stack
Acc. 0
OUT
V2000
V2000
Level 1
Level 2
2
0
Level 3
Level 4
Level 5
Level 6
Level 7
Level 8
Level 1
Level 2
Level 3
Level 4
Level 5
Level 6
Level 7
Level 8
Level 1
Level 2
Level 3
Level 4
Level 5
Level 6
Level 7
Level 8
POP
Previous Acc. value
Acc. 0
Pop the 1st. value on the stack into the
accumulator and move stack values
up one location
5
Accumulator Stack
OUT
V2001
Copy the value in the lower 16 bits of
the accumulator to V2001
V2001
POP
Acc. 0
Accumulator Stack
OUT
V2002
Copy the value in the lower 16 bits of
the accumulator to V2002
V2002
Handheld Programmer Keystrokes
$
STR
SHFT
P
CV
Standard
RLL Instructions
GX
OUT
SHFT
P
CV
GX
OUT
SHFT
GX
OUT
P
CV
SHFT
SHFT
O
INST#
SHFT
V
AND
SHFT
O
INST#
SHFT
V
AND
SHFT
O
INST#
SHFT
V
AND
0
CV
ENT
ENT
A
2
CV
A
0
A
0
ENT
B
0
ENT
ENT
A
ENT
2
CV
A
0
A
0
C
0
ENT
555
AND
A aaa
DL05 Range
A
aaa
V memory
Pointer
Description
SP63
SP70
on when the value loaded into the accumulator by any instruction is zero.
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example, when X1 is on, the value in V2000 will be loaded into the
accumulator using the Load instruction. The value in the accumulator is anded
with the value in V2006 using the And instruction. The value in the lower 16 bits of the
accumulator is output to V2010 using the Out instruction.
DirectSOFT
X1
V2000
LD
V2000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
6 5
4 3
Acc.
6A38
AND (V2006)
1
0
Acc.
AND
V2006
AND the value in the
accumulator with
the value in V2006
Acc.
OUT
V2010
V2010
B
STR
SHFT
V
AND
GX
OUT
1
L
ANDST
ENT
A
2
3
SHFT
V
AND
SHFT
V
AND
A
0
A
2
A
0
A
2
A
0
0
B
0
G
A
ENT
ENT
ENT
Standard
RLL Instructions
556
And Double
(ANDD)
ANDD
K aaa
DL05 Range
aaa
V memory
Pointer
Constant
0FFFFFFFF
Description
SP63
SP70
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example, when X1 is on, the value in V2000 and V2001 will be loaded
into the accumulator using the Load Double instruction. The value in the
accumulator is anded with 36476A38 using the And double instruction. The value in
the accumulator is output to V2010 and V2011 using the Out Double instruction.
V2000
V2001
DirectSOFT
X1
LDD
V2000
Load the value in V2000 and
V2001 into the accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
6 5
4 3
Acc.
AND 36476A38
0
1
0
1
0
1
0
1
Acc.
ANDD
K36476A38
AND the value in the
accumulator with
the constant value
36476A38
Acc.
OUTD
1
Standard
RLL Instructions
V2010
V2011
V2010
B
STR
SHFT
L
ANDST
V
AND
SHFT
SHFT
GX
OUT
ENT
D
3
3
3
C
3
SHFT
K
JMP
A
0
G
3
E
6
A
1
ENT
H
4
ENT
G
7
SHFT
A
0
SHFT
I
3
ENT
557
Or
(OR)
OR
A aaa
DL05 Range
A
aaa
V memory
Pointer
Description
SP63
SP70
on when the value loaded into the accumulator by any instruction is zero.
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example, when X1 is on, the value in V2000 will be loaded into the
accumulator using the Load instruction. The value in the accumulator is ored with
V2006 using the Or instruction. The value in the lower 16 bits of the accumulator are
output to V2010 using the Out instruction.
DirectSOFT
X1
V2000
LD
V2000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
6 5
4 3
Acc.
6A38
OR (V2006)
1
0
Acc.
OR
V2006
Or the value in the
accumulator with
the value in V2006
Acc.
OUT
V2010
SHFT
Q
OR
GX
OUT
1
L
ANDST
ENT
C
3
SHFT
V
AND
SHFT
V
AND
A
0
2
A
2
A
0
A
2
A
0
G
6
0
B
A
1
ENT
ENT
ENT
Standard
RLL Instructions
STR
V2010
558
Or Double
(ORD)
ORD
K aaa
DL05 Range
aaa
V memory
Pointer
Constant
0FFFFFFFF
Description
SP63
SP70
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example, when X1 is on, the value in V2000 and V2001 will be loaded
into the accumulator using the Load Double instruction. The value in the
accumulator is ored with 36476A38 using the Or Double instruction. The value in the
accumulator is output to V2010 and V2011 using the Out Double instruction.
DirectSOFT
X1
V2001
LDD
V2000
V2000
E
6 5
4 3
Acc.
OR 36476A38
Acc.
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Acc.
ORD
K36476A38
OR the value in the
accumulator with
the constant value
36476A38
OUTD
Standard
RLL Instructions
V2010
7
V2011
V2010
B
STR
SHFT
L
ANDST
SHFT
SHFT
OR
GX
OUT
ENT
D
3
3
3
C
3
A
2
SHFT
K
JMP
A
0
A
0
G
3
E
6
A
1
ENT
H
4
ENT
G
7
SHFT
A
0
SHFT
I
3
ENT
559
Exclusive Or
(XOR)
XOR
A aaa
DL05 Range
A
aaa
V memory
Pointer
Description
SP63
SP70
on when the value loaded into the accumulator by any instruction is zero.
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example, when X1 is on, the value in V2000 will be loaded into the
accumulator using the Load instruction. The value in the accumulator is exclusive
ored with V2006 using the Exclusive Or instruction. The value in the lower 16 bits of
the accumulator are output to V2010 using the Out instruction.
DirectSOFT
X1
V2000
LD
V2000
Load the value in V2000 into
the lower 16 bits of the
accumulator
6 5
4 3
Acc.
6A38
XOR (V2006)
1
0
Acc.
XOR
V2006
XOR the value in the
accumulator with
the value in V2006
Acc.
OUT
V2010
V2010
STR
X
SET
SHFT
L
ANDST
SHFT
X
SET
SHFT
SHFT
V
AND
GX
OUT
B
1
SHFT
3
OR
C
2
ENT
V
AND
SHFT
V
AND
A
2
A
0
A
0
A
2
0
0
A
0
ENT
ENT
G
ENT
Standard
RLL Instructions
560
Exclusive Or
Double
(XORD)
XORD
K aaa
DL05 Range
A
aaa
V memory
Pointer
Constant
0FFFFFFFF
Description
SP63
SP70
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example, when X1 is on, the value in V2000 and V2001 will be loaded
into the accumulator using the Load Double instruction. The value in the
accumulator is exclusively ored with 36476A38 using the Exclusive Or Double
instruction. The value in the accumulator is output to V2010 and V2011 using the Out
Double instruction.
V2001
DirectSOFT
X1
LDD
V2000
E
V2000
Load the value in V2000 and
V2001 into the accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
6 5
4 3
Acc.
XORD 36476A38
0
1
0
1
1
0
0
1
0
1
0
1
0
1
0
1
XORD
Acc.
K36476A38
XORD the value in the
accumulator with
the constant value
36476A38
OUTD
Acc.
V2010
Standard
RLL Instructions
V2011
B
STR
SHFT
L
ANDST
SHFT
X
SET
3
GX
OUT
D
3
OR
6
SHFT
ENT
4
D
SHFT
G
7
6
2
A
0
A
0
SHFT
K
JMP
SHFT
SHFT
C
3
A
2
A
1
ENT
I
3
ENT
ENT
V2010
Compare
(CMP)
561
CMP
A aaa
DL05 Range
A
aaa
V memory
Pointer
Description
SP60
On when the value in the accumulator is less than the instruction value.
SP61
SP62
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example when X1 is on, the constant 4526 will be loaded into the
lower 16 bits of the accumulator using the Load instruction. The value in the
accumulator is compared with the value in V2000 using the Compare instruction.
The corresponding discrete status flag will be turned on indicating the result of the
comparison. In this example, if the value in the accumulator is less than the value
specified in the Compare instruction, SP60 will turn on energizing C30.
DirectSOFT
X1
Constant
LD
K4526
Load the constant value
4526 into the lower 16 bits of
the accumulator
Compared
with
CMP
V2000
ENT
SHFT
L
ANDST
SHFT
SHFT
M
ORST
SHFT
SP
STRN
SHFT
STR
GX
OUT
SHFT
K
JMP
F
4
C
A
6
0
A
A
2
CV
C
5
ENT
ENT
G
2
A
0
6
A
ENT
ENT
Standard
RLL Instructions
C30
STR
V2000
562
Compare Double
(CMPD)
CMPD
A aaa
DL05 Range
A
aaa
V memory
Pointer
Constant
0FFFFFFFF
Description
SP60
On when the value in the accumulator is less than the instruction value.
SP61
SP62
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example when X1 is on, the value in V2000 and V2001 will be loaded
into the accumulator using the Load Double instruction. The value in the
accumulator is compared with the value in V2010 and V2011 using the CMPD
instruction. The corresponding discrete status flag will be turned on indicating the
result of the comparison. In this example, if the value in the accumulator is less than
the value specified in the Compare instruction, SP60 will turn on energizing C30.
DirectSOFT
X1
V2000
V2001
LDD
Acc. 4
V2000
Load the value in V2000 and
V2001 into the accumulator
Compared
with
CMPD
V2010
6
Standard
RLL Instructions
SP60
V2011
V2010
C30
B
STR
ENT
SHFT
L
ANDST
D
3
SHFT
SHFT
M
ORST
SHFT
SP
STRN
SHFT
$
STR
GX
OUT
A
2
A
0
C
3
CV
A
6
0
A
A
0
A
2
ENT
ENT
ENT
B
A
1
ENT
563
Math Instructions
Add
(ADD)
ADD
A aaa
DL05 Range
A
aaa
V memory
Pointer
Description
SP63
On when the result of the instruction causes the value in the accumulator
to be zero.
SP66
SP67
SP70
SP75
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example, when X1 is on, the value in V2000 will be loaded into the
accumulator using the Load instruction. The value in the lower 16 bits of the
accumulator are added to the value in V2006 using the Add instruction. The value in
the accumulator is copied to V2010 using the Out instruction.
DirectSOFT
V2000
X1
(Accumulator)
(V2006)
LD
V2000
Load the value in V2000 into
the lower 16 bits of the
accumulator
ADD
V2006
Acc.
B
STR
SHFT
L
ANDST
SHFT
GX
OUT
ENT
C
A
2
3
D
A
0
SHFT
V
AND
A
2
A
2
A
0
A
0
B
0
G
0
A
1
ENT
6
ENT
ENT
Standard
RLL Instructions
V2010
564
Add Double
(ADDD)
ADDD
A aaa
DL05 Range
A
aaa
V memory
Pointer
Constant
099999999
Description
SP63
On when the result of the instruction causes the value in the accumulator
to be zero.
SP66
SP67
SP70
SP75
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example, when X1 is on, the value in V2000 and V2001 will be loaded
into the accumulator using the Load Double instruction. The value in the
accumulator is added with the value in V2006 and V2007 using the Add Double
instruction. The value in the accumulator is copied to V2010 and V2011 using the
Out Double instruction.
V2001
DirectSOFT
X1
LDD
V2000
V2000
Load the value in V2000 and
V2001 into the accumulator
ADDD
V2006
Add the value in the
accumulator with the value
in V2006 and V2007
(Accumulator)
+ 2
Acc. 8
OUTD
Standard
RLL Instructions
V2010
V2011
V2010
B
1
STR
SHFT
L
ANDST
SHFT
GX
OUT
SHFT
ENT
D
C
3
3
D
3
D
3
A
2
D
3
A
0
C
3
SHFT
A
2
2
V
AND
A
0
G
6
0
B
ENT
A
1
ENT
ENT
Subtract
(SUB)
565
SUB
A aaa
DL05 Range
A
aaa
V memory
Pointer
Description
SP63
On when the result of the instruction causes the value in the accumulator
to be zero.
SP64
SP65
SP70
SP75
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example, when X1 is on, the value in V2000 will be loaded into the
accumulator using the Load instruction. The value in V2006 is subtracted from the
value in the accumulator using the Subtract instruction. The value in the accumulator
is copied to V2010 using the Out instruction.
V2000
DirectSOFT
X1
(Accumulator)
(V2006)
LD
V2000
Load the value in V2000 into
the lower 16 bits of the
accumulator
SUB
V2006
Acc.
Subtract the value in V2006
from the value in the lower
16 bits of the accumulator
OUT
V2010
V2010
B
1
STR
SHFT
L
ANDST
SHFT
S
RST
GX
OUT
ENT
C
A
2
3
B
ISG
SHFT
V
AND
C
2
SHFT
V
AND
ENT
A
2
0
A
0
ENT
G
0
ENT
Standard
RLL Instructions
566
Subtract Double
(SUBD)
SUBD
A aaa
DL05 Range
A
aaa
V memory
Pointer
Constant
099999999
Description
SP63
On when the result of the instruction causes the value in the accumulator
to be zero.
SP64
SP65
SP70
SP75
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example, when X1 is on, the value in V2000 and V2001 will be loaded
into the accumulator using the Load Double instruction. The value in V2006 and
V2007 is subtracted from the value in the accumulator. The value in the accumulator
is copied to V2010 and V2011 using the Out Double instruction.
V2001
DirectSOFT
X1
V2000
LDD
V2000
Load the value in V2000 and
V2001 into the accumulator
y
SUBD
V2006
ACC.
(Accumulator)
Standard
RLL Instructions
V2010
V2011
V2010
B
STR
SHFT
L
ANDST
SHFT
S
RST
SHFT
GX
OUT
SHFT
ENT
D
B
ISG
A
0
A
2
A
0
B
0
A
1
0
A
1
C
A
2
ENT
A
0
ENT
G
0
ENT
Multiply
(MUL)
567
MUL
A aaa
DL05 Range
A
aaa
V memory
Pointer
Constant
09999
Description
SP63
On when the result of the instruction causes the value in the accumulator
to be zero.
SP70
SP75
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example, when X1 is on, the value in V2000 will be loaded into the
accumulator using the Load instruction. The value in V2006 is multiplied by the value
in the accumulator. The value in the accumulator is copied to V2010 and V2011
using the Out Double instruction.
DirectSOFT
V2000
X1
LD
(Accumulator)
(V2006)
V2000
The unused accumulator
bits are set to zero
MUL
Acc.
V2006
OUTD
V2010
V2010
V2010
B
STR
SHFT
L
ANDST
SHFT
M
ORST
GX
OUT
SHFT
ENT
C
ISG
A
2
3
L
ANDST
A
2
A
0
2
C
A
0
A
0
B
0
G
0
A
1
ENT
6
ENT
ENT
Standard
RLL Instructions
568
Multiply Double
(MULD)
MULD
A aaa
DL05 Range
A
aaa
Vmemory
Pointer
Description
SP63
On when the result of the instruction causes the value in the accumulator to be zero.
SP70
SP75
NOTE: Status flags are valid only until another instruction uses the same flag.
In the following example, when X1 is on, the constant Kbc614e hex will be loaded
into the accumulator. When converted to BCD the number is 12345678. That
numberis stored in V1400 and V1401. After loading the constant K2 into the
accumulator, we multiply it times 12345678, which is 24691356.
DirectSOFT Display
X1
Kbc614e
V1400
OUTD
Acc.
K2
V1400
V1402
MULD
OUTD
2
2
V1403
V1500
Standard
RLL Instructions
SHFT
GX
OUT
SHFT
SHFT
L
ANDST
SHFT
M
ORST
SHFT
GX
OUT
ENT
G
SHFT
L
ANDST
1
B
ISG
SHFT
L
ANDST
D
3
ENT
SHFT
A
4
K
JMP
A
0
C
2
B
E
1
A
4
K
JMP
ENT
A
4
C
0
SHFT
ENT
3
B
LD
STR
(Accumulator)
V1400
V1401
BCD
LDD
A
0
ENT
SHFT
ENT
(Accumulator)
569
Divide
(DIV)
DIV
A aaa
DL05 Range
A
aaa
V memory
Pointer
Constant
19999
Description
SP53
On when the value of the operand is larger than the accumulator can work
with.
SP63
On when the result of the instruction causes the value in the accumulator
to be zero.
SP70
SP75
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example, when X1 is on, the value in V2000 will be loaded into the
accumulator using the Load instruction. The value in the accumulator will be divided
by the value in V2006 using the Divide instruction. The value in the accumulator is
copied to V2010 using the Out instruction.
V2000
DirectSOFT
X1
(Accumulator)
(V2006)
LD
V2000
Load the value in V2000 into
the lower 16 bits of the
accumulator
DIV
V2006
1
Acc.
1
V2010
SHFT
L
ANDST
SHFT
GX
OUT
ENT
C
SHFT
A
2
3
8
V
AND
V
AND
A
0
A
2
A
2
A
0
A
0
B
0
G
0
A
1
ENT
6
ENT
ENT
Standard
RLL Instructions
V2010
STR
OUT
570
Divide Double
(DIVD)
DIVD
A aaa
DL05 Range
A
aaa
Vmemory
Pointer
Description
SP53
On when the value of the operand is larger than the accumulator can work with.
SP63
On when the result of the instruction causes the value in the accumulator to be zero.
SP70
SP75
NOTE: Status flags are valid only until another instruction uses the same flag.
In the following example, when X1 is on, the value in V1400 and V1401 will be loaded
into the accumulator using the Load Double instruction. The value in the
accumulator is divided by the value in V1420 and V1421 using the Divide Double
instruction. The first part of the quotient resides in the accumulator an the remainder
resides in the first stack location. The value in the accumulator is copied to V1500
and V1501 using the Out Double instruction.
DirectSOFT Display
V1401
X1
LDD
V1400
V1400
Load the value in V1400 and
V1401 into the accumulator
DIVD
V1420
(Accumulator)
Acc.
Standard
RLL Instructions
V1500
V1501
1
E
A
4
1
B
A
0
E
1
0
C
4
F
ENT
ENT
A
2
A
SHFT
0
A
OUTD
L
ANDST
SHFT
ENT
ENT
D
3
3
I
GX
OUT
SHFT
V
AND
D
3
V1500
Increment
(INC)
INC
Decrement
(DEC)
DEC
571
A aaa
A aaa
DL05 Range
A
aaa
Vmemory
Pointer
Description
SP63
on when the result of the instruction causes the value in the accumulator to be zero.
SP75
NOTE: Status flags are valid only until another instruction uses the same flag.
V1400
C5
INC
V1400
Increment the value in
V1400 by 1.
V1400
3
C
STR
SHFT
F
5
2
I
N
TMR
ENT
B
2
E
1
A
0
V1400
DEC
V1400
Decrement the value in
V1400 by 1.
V1400
Handheld Programmer Keystrokes
$
C
STR
SHFT
F
2
E
3
ENT
B
E
1
A
0
Standard
RLL Instructions
C5
572
Increment Binary
(INCB)
The
Increment
Binary
instruction
increments a binary value in a specified V
memory location by 1 each time the
instruction is executed.
INCB
A aaa
DL05 Range
A
aaa
V memory
Pointer
Description
SP63
on when the result of the instruction causes the value in the accumulator
to be zero.
In the following example when C5 is on, the binary value in V2000 is increased by 1.
V2000
DirectSOFT
C5
INCB
$
STR
V2000
N
TMR
F
2
ENT
C
1
A
2
A
0
A
0
ENT
V2000
4
Decrement Binary
(DECB)
SHFT
SHFT
DECB
A aaa
DL05 Range
A
aaa
V memory
Pointer
Description
SP63
on when the result of the instruction causes the value in the accumulator
to be zero.
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
Standard
RLL Instructions
DirectSOFT
C5
DECB
V2000
SHFT
V2000
4
D
3
SHFT
C
4
F
2
5
B
ENT
C
A
2
A
0
A
0
ENT
Add Binary
(ADDB)
573
ADDB
A aaa
DL05 Range
A
aaa
Vmemory
Pointer
Constant
0FFFF
Description
SP63
On when the result of the instruction causes the value in the accumulator to be zero.
SP66
SP67
SP70
SP73
NOTE: Status flags are valid only until another instruction uses the same flag.
In the following example, when X1 is on, the value in V1400 will be loaded into the
accumulator using the Load instruction. The binary value in the accumulator will be
added to the binary value in V1420 using the Add Binary instruction. The value in the
accumulator is copied to V1500 and V1501 using the Out instruction.
DirectSOFT Display
X1
V1400
0
LD
V1400
Load the value in V1400 into the
lower 16 bits of the accumulator
ADDB
(Accumulator)
(V1420)
C C
V1420
Acc.
OUTD
V1500
V1500
Standard
RLL Instructions
B
1
STR
B
E
1
A
0
4
E
C
4
ENT
0
A
L
ANDST
ENT
SHFT
ENT
GX
OUT
SHFT
SHFT
3
D
D
3
0
D
B
3
1
B
F
1
A
5
A
0
ENT
574
Subtract Binary
(SUBB)
SUBB
A aaa
DL05 Range
A
aaa
Vmemory
Pointer
Constant
0FFFF
Description
SP63
On when the result of the instruction causes the value in the accumulator to be zero.
SP64
SP65
SP70
NOTE: Status flags are valid only until another instruction uses the same flag.
In the following example, when X1 is on, the value in V1400 will be loaded into the
accumulator using the Load instruction. The binary value in V1420 is subtracted
from the binary value in the accumulator using the Subtract Binary instruction. The
value in the accumulator is copied to V1500 using the Out instruction.
DirectSOFT Display
V1400
1
X1
LD
V1400
Load the value in V1400 into the
lower 16 bits of the accumulator
SUBB
(Accumulator)
(V1420)
V1420
Acc.
OUT
V1500
V1500
Standard
RLL Instructions
B
1
STR
SHFT
L
ANDST
SHFT
S
RST
SHFT
GX
OUT
SHFT
ENT
B
E
1
B
B
A
0
B
1
ISG
A
4
B
1
F
1
E
1
A
5
A
0
ENT
C
4
ENT
A
2
ENT
Multiply Binary
(MULB)
575
MULB
A aaa
DL05 Range
A
aaa
Vmemory
Pointer
Constant
1FFFF
Description
SP63
On when the result of the instruction causes the value in the accumulator to be zero.
SP70
NOTE: Status flags are valid only until another instruction uses the same flag.
In the following example, when X1 is on, the value in V1400 will be loaded into the
accumulator using the Load instruction. The binary value in V1420 is multiplied by
the binary value in the accumulator using the Multiply Binary instruction. The value in
the accumulator is copied to V1500 using the Out instruction.
DirectSOFT Display
V1400
X1
LD
V1400
Load the value in V1400 into the
lower 16 bits of the accumulator
MULB
V1420
Acc.
(Accumulator)
(V1420)
OUTD
V1500
V1501
V1500
B
STR
1
L
ANDST
SHFT
M
ORST
GX
OUT
SHFT
ISG
E
1
3
L
ANDST
A
0
B
1
B
3
A
4
A
5
A
0
ENT
C
1
F
0
E
A
2
ENT
ENT
Standard
RLL Instructions
SHFT
ENT
576
Divide Binary
(DIVB)
DIVB
A aaa
DL05 Range
A
aaa
Vmemory
Pointer
Constant
0FFFF
Description
SP53
On when the value of the operand is larger than the accumulator can work with.
SP63
On when the result of the instruction causes the value in the accumulator to be zero.
SP70
NOTE: Status flags are valid only until another instruction uses the same flag.
In the following example, when X1 is on, the value in V1400 will be loaded into the
accumulator using the Load instruction. The binary value in the accumulator is
divided by the binary value in V1420 using the Divide Binary instruction. The value in
the accumulator is copied to V1500 using the Out instruction.
DirectSOFT Display
V1400
F
X1
(Accumulator)
(V1420)
LD
V1400
Load the value in V1400 into the
lower 16 bits of the accumulator
DIVB
V1420
Acc.
0
V1500
V1500
B
STR
SHFT
L
ANDST
SHFT
GX
OUT
SHFT
ENT
B
U
8
E
1
A
0
B
1
B
3
A
4
B
ISG
0
E
A
5
A
0
ENT
C
1
F
OUT
Standard
RLL Instructions
A
2
ENT
ENT
577
SUM
In the following example, when X1 is on, the value formed by discrete locations
X10X17 is loaded into the accumulator using the Load Formatted instruction. The
number of bits in the accumulator set to 1 is counted using the Sum instruction. The
value in the accumulator is copied to V1500 using the Out instruction.
Discrete Bit Flags
Description
SP63
On when the result of the instruction causes the value in the accumulator to be zero.
DirectSOFT Display
X1
LDF
X10
K8
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Acc.
Acc. 0
SUM
6 5
4 3
OUT
V1500
V1500
B
1
STR
ENT
SHFT
L
ANDST
SHFT
S
RST
SHFT
GX
OUT
B
5
ISF
M
ORST
A
A
1
ENT
ENT
A
I
0
ENT
SHFL
A aaa
Standard
RLL Instructions
Shift Left
(SHFL)
F
3
578
DL05 Range
A
aaa
V memory
Constant
132
Description
SP63
On when the result of the instruction causes the value in the accumulator to be zero.
SP70
In the following example, when X1 is on, the value in V2000 and V2001 will be loaded
into the accumulator using the Load Double instruction. The bit pattern in the
accumulator is shifted 2 bits to the left using the Shift Left instruction. The value in the
accumulator is copied to V2010 and V2011 using the Out Double instruction.
DirectSOFT
V2001
X1
LDD
V2000
5
V2000
Load the value in V2000 and
V2001 into the accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
SHFL
Acc.
6 5
4 3
K2
The bit pattern in the
accumulator is shifted 2 bit
positions to the left
S S
S S
OUTD
V2010
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Acc.
0
1
0
1
0
1
Standard
RLL Instructions
STR
SHFT
L
ANDST
SHFT
S
RST
SHFT
GX
OUT
SHFT
ENT
D
C
3
3
H
A
2
F
7
5
C
V2011
L
ANDST
A
A
0
C
2
B
0
A
0
A
1
0
ENT
ENT
ENT
0
1
0
1
6 5
4 3
V2010
579
Shift Right
(SHFR)
SHFR
A aaa
DL05 Range
A
aaa
V memory
Constant
132
Description
SP63
On when the result of the instruction causes the value in the accumulator to be zero.
SP70
In the following example, when X1 is on, the value in V2000 and V2001 will be loaded
into the accumulator using the Load Double instruction. The bit pattern in the
accumulator is shifted 2 bits to the right using the Shift Right instruction. The value in
the accumulator is copied to V2010 and V2011 using the Out Double instruction.
DirectSOFT
V2001
X1
Constant 6
LDD
V2000
5
V2000
Load the value in V2000 and
V2001 into the accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
SHFR
Acc.
6 5
4 3
K2
The bit pattern in the
accumulator is shifted 2 bit
positions to the right
S S
S S
OUTD
V2010
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Acc.
0
1
0
1
1
0
0
1
0
1
0
1
V2011
0
1
6 5
4 3
V2010
B
1
STR
L
ANDST
SHFT
S
RST
SHFT
GX
OUT
SHFT
F
7
5
C
A
2
R
ORN
A
A
0
C
2
B
0
A
0
A
1
0
ENT
ENT
ENT
Standard
RLL Instructions
SHFT
ENT
580
Encode
(ENCO)
ENCO
Description
SP53
On when the value of the operand is larger than the accumulator can work
with.
NOTE: The status flags are only valid until another instruction that uses the same
flags is executed.
In the following example, when X1 is on, The value in V2000 is loaded into the
accumulator using the Load instruction. The bit position set to a 1 in the
accumulator is encoded to the corresponding 5 bit binary value using the Encode
instruction. The value in the lower 16 bits of the accumulator is copied to V2010
using the Out instruction.
V2000
DirectSOFT
1
X1
LD
V2000
Load the value in V2000 into
the lower 16 bits of the
accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Acc.
6 5
4 3
Bit postion 12 is
converted
to binary
ENCO
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Encode the bit position set
to 1 in the accumulator to a
5 bit binary value
Acc.
6 5
4 3
OUT
Standard
RLL Instructions
V2010
0
B
STR
ENT
SHFT
L
ANDST
SHFT
N
TMR
SHFT
V
AND
GX
OUT
A
2
3
2
O
INST#
C
A
0
A
0
ENT
ENT
A
V2010
B
0
A
1
ENT
C
Binary value
for 12.
581
Decode
(DECO)
DECO
In the following example when X1 is on, the value formed by discrete locations
X10X14 is loaded into the accumulator using the Load Formatted instruction. The
five bit binary pattern in the accumulator is decoded by setting the corresponding bit
position to a 1 using the Decode instruction.
DirectSOFT
X1
OFF ON OFF ON ON
LDF
X10
K5
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Acc.
6 5
4 3
DECO
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Decode the five bit binary
pattern in the accumulator
and set the corresponding
bit position to a 1
Acc.
6 5
4 3
B
1
STR
SHFT
L
ANDST
SHFT
E
3
ENT
F
C
4
A
1
5
O
INST#
F
0
ENT
ENT
Standard
RLL Instructions
582
BIN
In the following example, when X1 is on, the value in V2000 and V2001 is loaded into
the accumulator using the Load Double instruction. The BCD value in the
accumulator is converted to the binary (HEX) equivalent using the BIN instruction.
The binary value in the accumulator is copied to V2010 and V2011 using the Out
Double instruction. (The handheld programmer will display the binary value in
V2010 and V2011 as a HEX value.)
Discrete Bit Flags
Description
SP63
On when the result of the instruction causes the value in the accumulator to be zero.
SP70
SP75
V2001
DirectSOFT
X1
LDD
V2000
V2000
Load the value in V2000 and
V2001 into the accumulator
8
Acc. 0
BCD Value
BIN
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Convert the BCD value in
the accumulator to the
binary equivalent value
Acc.
OUTD
V2010
6 5
4 3
2
1
4
7
4
4
8
3
6
4
8
1
0
7
3
7
4
1
8
2
4
5
3
6
8
7
0
9
1
2
2
6
8
4
3
5
4
5
6
1
3
4
2
1
7
7
2
8
6
7
1
0
8
8
6
4
3
3
5
5
4
4
3
2
1
6
7
7
7
2
1
6
8
3
8
8
6
0
8
4
1
9
4
3
0
4
2
0
9
7
1
5
2
1
0
4
8
5
7
6
5
2
4
2
8
8
2
6
2
1
4
4
1
3
1
0
7
2
6
5
5
3
6
3
2
7
6
8
1
6
3
8
4
8
1
9
2
4
0
9
6
2
0
4
8
1
0
2
4
5
1
2
2
5
6
1 6
2 4
8
3
2
1 8
6
Standard
RLL Instructions
B
STR
SHFT
L
ANDST
SHFT
GX
OUT
1
SHFT
N
TMR
A
2
A
0
A
0
ENT
C
V2011
ENT
A
2
B
0
A
1
ENT
ENT
V2010
583
Binary Coded
Decimal
(BCD)
BCD
In the following example, when X1 is on, the binary (HEX) value in V2000 and V2001
is loaded into the accumulator using the Load Double instruction. The binary value in
the accumulator is converted to the BCD equivalent value using the BCD instruction.
The BCD value in the accumulator is copied to V2010 and V2011 using the Out
Double instruction.
Discrete Bit Flags
Description
SP63
On when the result of the instruction causes the value in the accumulator to be zero.
SP70
DirectSOFT
X1
LDD
V2000
0
Binary Value
V2000
Load the value in V2000 and
V2001 into the accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Acc.
6 5
4 3
2
1
4
7
4
4
8
3
6
4
8
1
0
7
3
7
4
1
8
2
4
5
3
6
8
7
0
9
1
2
2
6
8
4
3
5
4
5
6
1
3
4
2
1
7
7
2
8
6
7
1
0
8
8
6
4
3
3
5
5
4
4
3
2
1
6
7
7
7
2
1
6
8
3
8
8
6
0
8
4
1
9
4
3
0
4
2
0
9
7
1
5
2
1
0
4
8
5
7
6
5
2
4
2
8
8
2
6
2
1
4
4
1
3
1
0
7
2
6
5
5
3
6
3
2
7
6
8
1
6
3
8
4
8
1
9
2
4
0
9
6
2
0
4
8
1
0
2
4
5
1
2
2
5
6
1 6
2 4
8
3
2
1 8
6
BCD
Acc.
OUTD
V2010
0
V2011
V2010
STR
SHFT
L
ANDST
SHFT
GX
OUT
SHFT
ENT
D
D
C
3
A
0
A
0
ENT
C
A
2
A
2
B
0
A
1
ENT
ENT
Standard
RLL Instructions
584
Invert
(INV)
INV
In the following example, when X1 is on, the value in V2000 and V2001 will be loaded
into the accumulator using the Load Double instruction. The value in the
accumulator is inverted using the Invert instruction. The value in the accumulator is
copied to V2010 and V2011 using the Out Double instruction.
V2001
DirectSOFT
X1
LDD
V2000
5
V2000
Load the value in V2000 and
V2001 into the accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Acc.
INV
Acc.
6 5
4 3
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
6 5
4 3
OUTD
V2010
Copy the value in the
accumulator to V2010 and
V2011
B
STR
ENT
SHFT
L
ANDST
D
3
SHFT
N
TMR
V
AND
GX
OUT
Standard
RLL Instructions
8
SHFT
A
2
A
0
A
0
ENT
C
V2011
A
2
B
0
A
1
ENT
ENT
V2010
ASCII to HEX
(ATH)
585
DL05 Range
aaa
Vmemory
Description
SP53
On when the value of the operand is larger than the accumulator can work with.
In the example on the following page, when X1 is ON the constant (K4) is loaded into
the accumulator using the Load instruction and will be placed in the first level of the
accumulator stack when the next Load instruction is executed. The starting location
for the ASCII table (V1400) is loaded into the accumulator using the Load Address
instruction. The starting location for the HEX table (V1600) is specified in the ASCII
to HEX instruction. The table below lists valid ASCII values for ATH conversion.
ASCII Values Valid for ATH Conversion
Hex Value
ASCII Value
Hex Value
30
38
31
39
32
41
33
42
34
43
35
44
36
45
37
46
Standard
RLL Instructions
ASCII Value
586
DirectSOFT Display
Hexadecimal
Equivalents
ASCII TABLE
X1
LD
K4
V1400
O 1400
V1401
31 32
V1402
37 38
V1600
SHFT
L
ANDST
SHFT
L
ANDST
SHFT
T
MLR
SHFT
A
HEX to ASCII
(HTA)
V1403
ENT
K
JMP
0
H
V1600
5678
V1601
G
1
A
0
0
A
35 36
ENT
1
B
1234
ATH
33 34
LDA
A
0
ENT
ENT
HTA
V aaa
This means a HEX table of two V memory locations would require four V memory
locations for the equivalent ASCII table. The function parameters are loaded into the
accumulator stack and the accumulator by two additional instructions. Listed below
are the steps necessary to program a HEX to ASCII table function. The example on
the following page shows a program for the HEX to ASCII table function.
Step 1: Load the number of V memory locations in the HEX table into the first level
of the accumulator stack.
Step 2: Load the starting V memory location for the HEX table into the
accumulator. This parameter must be a HEX value.
Standard
RLL Instructions
Step 3: Specify the starting V memory location (Vaaa) for the ASCII table in the
HTA instruction.
Helpful Hint: For parameters that require HEX values when referencing memory
locations, the LDA instruction can be used to convert an octal address to the HEX
equivalent and load the value into the accumulator.
587
DL05 Range
aaa
Vmemory
Description
SP53
On when the value of the operand is larger than the accumulator can work with.
In the following example, when X1 is ON the constant (K2) is loaded into the
accumulator using the Load instruction. The starting location for the HEX table
(V1500) is loaded into the accumulator using the Load Address instruction. The
starting location for the ASCII table (V1400) is specified in the HEX to ASCII
instruction.
DirectSOFT Display
X1
Hexadecimal
Equivalents
LD
ASCII TABLE
K2
Load the constant value into
the lower 16 bits of the
accumulator. This value
defines the number of V
locations in the HEX table.
33 34
V1400
31 32
V1401
37 38
V1402
35 36
V1403
1234
V1500
LDA
O 1500
Convert octal 1500 to HEX
340 and load the value into
the accumulator
HTA
V1400
5678
V1501
B
STR
SHFT
L
ANDST
SHFT
L
ANDST
SHFT
T
MLR
ENT
SHFT
3
A
3
K
JMP
0
B
0
A
5
ENT
E
1
A
0
0
A
A
0
ENT
ENT
The table below lists valid ASCII values for HTA conversion.
ASCII Values Valid for HTA Conversion
ASCII Value
Hex Value
ASCII Value
30
38
31
39
32
41
33
42
34
43
35
44
36
45
37
46
Standard
RLL Instructions
Hex Value
588
Gray Code
(GRAY)
GRAY
Description
SP63
On when the result of the instruction causes the value in the accumulator to be zero.
SP70
DirectSOFT
X1
LDF
S S
K16
S S
ON OFF ON
X10
Load the value represented
by X10X27 into the lower
16 bits of the accumulator
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Acc.
6 5
4 3
GRAY
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Acc.
6 5
4 3
OUT
V2010
Copy the value in the lower
16 bits of the accumulator to
V2010
Gray Code
Standard
RLL Instructions
B
1
STR
SHFT
SHFT
GX
OUT
L
ANDST
R
ORN
ENT
F
5
SHFT
A
0
V
AND
A
1
Y
MLS
C
G
1
ENT
A
B
0
A
1
ENT
ENT
BCD
0000000000
0000
0000000001
0001
0000000011
0002
0000000010
0003
0000000110
0004
0000000111
0005
0000000101
0006
0000000100
0007
S
S
S
S
1000000001
1022
1000000000
1023
V2010
589
Shuffle Digits
(SFLDGT)
SFLDGT
Step 1: Load the value (digits) to be shuffled into the first level of the accumulator
stack.
Step 2: Load the order that the digits will be shuffled to into the accumulator.
Note: If the number used to specify the order contains a 0 or 9F, the
corresponding position will be set to 0.
See example on the next page.
Note:If the number used to specify the order contains duplicate numbers, the
most significant duplicate number is valid. The result resides in the accumulator.
See example on the next page.
Step 3: Insert the SFLDGT instruction.
Shuffle Digits
Block Diagram
Description
SP63
On when the result of the instruction causes the value in the accumulator to be zero.
SP70
Digits to be
shuffled (first stack location)
9
C D
Bit Positions
Result (accumulator)
Standard
RLL Instructions
590
In the following example when X1 is on, The value in the first level of the accumulator
stack will be reorganized in the order specified by the value in the accumulator.
Example A shows how the shuffle digits works when 0 or 9 F is not used when
specifying the order the digits are to be shuffled. Also, there are no duplicate
numbers in the specified order.
Example B shows how the shuffle digits works when a 0 or 9F is used when
specifying the order the digits are to be shuffled. Notice when the Shuffle Digits
instruction is executed, the bit positions in the first stack location that had a
corresponding 0 or 9F in the accumulator (order specified) are set to 0.
Example C shows how the shuffle digits works when duplicate numbers are used
specifying the order the digits are to be shuffled. Notice when the Shuffle Digits
instruction is executed, the most significant duplicate number in the order specified
is used in the result.
DirectSOFT
X1
V2001
LDD
9
V2000
Load the value in V2000 and
V2001 into the accumulator
V2000
C
Original
8 7 6 5
bit
Positions 9 A B C
V2006
Load the value in V2006 and
V2007 into the accumulator
Specified
order
New bit
Positions
SFLDGT
8
1
7
2
5
7
Acc.
V2001
8 7 6 5
0 F E D
4
C
3
B
2
A
1
9
Acc.
Acc.
V2007
4
C
V2000
V2006
7
V2007
LDD
V2001
7
0
6
4
Acc.
5
3
V2000
C
V2006
3
V2007
Acc.
Acc.
8 7 6 5
0 0 0 0
4
E
3
D
2
A
1
9
V2006
V2010
V2010
V2011
V2011
B
1
Standard
RLL Instructions
STR
SHFT
L
ANDST
SHFT
L
ANDST
SHFT
S
RST
SHFT
GX
OUT
SHFT
ENT
D
F
5
L
ANDST
A
2
A
0
A
2
A
2
A
0
T
MLR
ENT
ENT
B
0
0
G
0
G
A
0
ENT
ENT
V2010
V2011
Acc.
V2010
Acc.
Acc.
591
Table Instructions
Move
(MOV)
MOV
V aaa
S
S
Helpful Hint: For parameters that require HEX values when referencing memory
locations, the LDA instruction can be used to convert an octal address to the HEX
equivalent and load the value into the accumulator.
Operand Data Type
DL05 Range
aaa
V memory
Pointer
Description
SP53
On when the value of the operand is larger than the accumulator can work with.
In the following example, when X1 is on, the constant value (K6) is loaded into the
accumulator using the Load instruction. This value specifies the length of the table
and is placed in the first stack location after the Load Address instruction is
executed. The octal address 2000 (V2000), the starting location for the source table
is loaded into the accumulator. The destination table location (V2030) is specified in
the Move instruction.
S
S
DirectSOFT
X1
K6
O 2000
LD
LDA
S
S
V2030
Handheld Programmer Keystrokes
$
B
STR
ENT
SHFT
L
ANDST
SHFT
L
ANDST
D
3
SHFT
M
ORST
O
INST#
V
AND
SHFT
3
A
K
JMP
2
C
A
0
A
2
A
0
D
0
0
A
ENT
ENT
X V2026
X V2027
3 V2000
3 V2030
0 V2001
0 V2031
9 V2002
9 V2032
4 V2003
4 V2033
9 V2004
9 V2034
0 V2005
0 V2035
X V2006
X V2036
X V2007
X V2037
S
S
ENT
S
S
Standard
Rll Instructions
MOV
592
Move Memory
Cartridge /
Load Label
(MOVMC), (LDLBL)
Standard
RLL Instructions
LDLBL
K aaa
Step 1: Load the number of words to be copied into the second level
of the accumulator stack.
Step 2: Load the offset for the data label area in ladder memory and
the beginning of the V memory block into the first level of the stack.
Step 3: Load the source data label (LDLBL Kaaa) into the
accumulator when copying data from ladder memory to V memory. This
is the source location of the value.
Step 4: Insert the MOVMC instruction which specifies destination in
V-memory (Vaaa). This is the copy destination.
V memory
MOVMC
V aaa
DL05 Range
A
aaa
593
In the example to the right, data is copied from a Data Label Area to V memory.
When X1 is on, the constant value (K4) is loaded into the accumulator using the
Load instruction. This value specifies the length of the table and is placed in the
second stack location after the next Load and Load Label (LDLBL) instructions
are executed. The constant value (K0) is loaded into the accumulator, specifying
the offset for the source and destination data. It is placed in the first stack location
after the LDLBL instruction is executed. The source address where data is being
copied from is loaded into the accumulator using the LDLBL instruction. The
MOVMC instruction specifies the destination starting location and executes the
copying of data from the Data Label Area to V memory.
Data Label Area
Programmed
After the END
Instruction
DirectSOFT
X1
DLBL K1
N
C O N
C O N
C O N
C O N
5
1
8
LD
K4
S
S
1
V2000
V2001
V2002
V2003
V2004
LD
K0
Load the value 0 into the
accumulator specifying the
offset for source and
destination locations
LDLBL
K1
S
S
MOVMC
B
1
STR
SHFT
L
ANDST
SHFT
L
ANDST
SHFT
L
ANDST
D
3
SHFT
M
ORST
O
INST#
ENT
V2000
SHFT
K
JMP
SHFT
K
JMP
L
ANDST
L
ANDST
V
AND
M
ORST
3
3
4
0
ENT
ENT
ENT
A
A
0
A
0
ENT
Standard
Rll Instructions
594
DirectSOFT
SHFT
NOP
End
(END)
N
TMR
ENT
CV
END
END
Stop
(STOP)
O
INST#
N
TMR
ENT
STOP
Standard
RLL Instructions
In the following example, when C0 turns on, the CPU will stop operation and switch
to the program mode.
DirectSOFT
C0
STR
STOP
SHFT
S
RST
SHFT
C
2
SHFT
T
MLR
O
INST#
Description
SP16
SP53
ENT
P
CV
ENT
595
R
ORN
S
RST
T
MLR
W
ANDN
T
MLR
ENT
RSTWT
Standard
RLL Instructions
596
Standard
Rll Instructions
DL05 Range
A
aaa
V memory
Constant
19999
A aaa
FOR
NEXT
597
In the following example, when X1 is on, the application program inside the For /
Next loop will be executed three times. If X1 is off the program inside the loop will not
be executed. The immediate instructions may or may not be necessary depending
on your application. Also, The RSTWT instruction is not necessary if the For / Next
loop does not extend the scan time larger the Watch Dog Timer setting. For more
information on the Watch Dog Timer, refer to the RSTWT instruction.
DirectSOFT
X1
K3
FOR
RSTWT
X20
Y5
OUT
NEXT
B
1
STR
ENT
SHFT
F
5
O
INST#
R
ORN
SHFT
R
ORN
S
RST
T
MLR
SHFT
STR
GX
OUT
SHFT
8
F
5
N
TMR
E
4
D
3
ENT
W
ANDN
T
MLR
ENT
ENT
T
MLR
ENT
ENT
X
SET
Standard
RLL Instructions
598
Goto Subroutine
(GTS)
(SBR)
K aaa
GTS
K aaa
SBR
DL05 Range
aaa
Constant
Subroutine Return
(RT)
Standard
Rll Instructions
Subroutine Return
Conditional
(RTC)
1FFFF
RT
RTC
599
In the following example, when X1 is on, Subroutine K3 will be called. The CPU will
jump to the Subroutine Label K3 and the ladder logic in the subroutine will be
executed. If X35 is on the CPU will return to the main program at the RTC instruction.
If X35 is not on Y0Y17 will be reset to off and then the CPU will return to the main
body of the program.
X1
DirectSOFT Display
K3
GTS
C0
LD
K10
S
S
S
END
SBR
K3
X20
Y5
OUTI
X21
Y10
OUTI
X35
RTC
X35
Y0
Y17
RSTI
RT
B
1
STR
SHFT
ENT
T
MLR
S
RST
N
TMR
D
3
ENT
S
S
E
SHFT
S
RST
SHFT
SHFT
GX
OUT
SHFT
SHFT
GX
OUT
SHFT
SHFT
SHFT
R
ORN
T
MLR
SP
STRN
SHFT
S
RST
SHFT
SHFT
R
ORN
T
MLR
STR
STR
STR
3
1
ENT
R
ORN
C
D
3
A
2
F
5
C
B
1
A
1
8
D
8
0
F
5
3
C
2
F
3
ENT
ENT
ENT
B
0
ENT
ENT
ENT
8
8
ENT
ENT
2
B
ENT
H
1
ENT
Standard
RLL Instructions
SHFT
5100
In the following example, when X1 is on, Subroutine K3 will be called. The CPU will
jump to the Subroutine Label K3 and the ladder logic in the subroutine will be
executed. The CPU will return to the main body of the program after the RT
instruction is executed.
DirectSOFT
X1
K3
GTS
S
S
S
END
SBR
K3
X20
Y5
OUT
X21
Y10
OUT
RT
B
1
STR
SHFT
SHFT
SHFT
S
RST
SHFT
SHFT
ENT
T
MLR
S
RST
N
TMR
D
3
ENT
S
S
$
STR
Standard
Rll Instructions
GX
OUT
SHFT
D
3
A
ENT
ENT
C
8
B
R
ORN
R
ORN
C
5
SHFT
ENT
GX
OUT
STR
B
2
A
1
T
MLR
ENT
ENT
ENT
ENT
5101
K aaa
MLS
DL05 Range
aaa
Constant
17
K aaa
MLR
DL05 Range
aaa
Constant
Understanding
Master Control
Relays
07
The Master Line Set (MLS) and Master Line Reset (MLR) instructions allow you to
quickly enable (or disable) sections of the RLL program. This provides program
control flexibility. The following example shows how the MLS and MLR instructions
operate by creating a sub power rail for control logic.
X0
MLS
K1
Y7
X1
OUT
X2
MLS
K2
X3
MLR
K0
K1
The MLR instructions note the end of the Master Control area. (They will be entered in
adjacent addresses.)
Standard
RLL Instructions
X10
MLR
5102
MLS/MLR Example In the following MLS/MLR example logic between the first MLS K1 (A) and MLR K0
(B) will function only if input X0 is on. The logic between the MLS K2 (C) and MLR K1
(D) will function only if input X10 and X0 is on. The last rung is not controlled by either
of the MLS coils.
DirectSOFT
X0
K1
X1
Y
MLS
C1
Y0
OUT
X10
K2
Y1
GX
OUT
SHFT
C
STR
GX
OUT
SHFT
Y2
GX
OUT
OUT
X6
Y3
K0
MLR
X7
Y4
OUT
GX
OUT
GX
OUT
T
MLR
2
1
STR
GX
OUT
SHFT
OUT
STR
GX
OUT
T
MLR
3
0
7
STR
Standard
Rll Instructions
GX
OUT
ENT
ENT
C
A
2
B
2
ENT
ENT
ENT
ENT
ENT
ENT
ENT
ENT
ENT
ENT
ENT
ENT
C
C
2
ENT
ENT
ENT
ENT
C
ENT
STR
C2
ENT
STR
MLR
X5
Y
MLS
OUT
K1
STR
STR
OUT
X4
STR
MLS
X5
C0
OUT
X3
A
STR
OUT
X2
MLS
ENT
ENT
5103
Interrupt Instructions
Interrupt
(INT)
INT
INT
Interrupt Return
(IRT)
Interrupt Return
Conditional
(IRTC)
0, 1
IRT
IRTC
ENI
Standard
RLL Instructions
Enable Interrupts
(ENI)
DL05 Range
O
5104
Disable Interrupts
(DISI)
External Interrupt
Program Example
SP0
In the following example, we do some initialization on the first scan, using the
first-scan contact SP0. The interrupt feature is the HSIO Mode 40. Then we
configure X0 as the external interrupt by writing to its configuration register, V7634.
See Chapter 3, Mode 40 Operation for more details.
During program execution, when X2 is on the interrupt is enabled. When X2 is off the
interrupt will be disabled. When an interrupt signal (X0) occurs the CPU will jump to
the interrupt label INT O 0. The application ladder logic in the interrupt routine will be
performed. The CPU will return to the main body of the program after the IRT
instruction is executed.
Handheld Programmer Keystrokes
DirectSOFT
LD
K40
V7633
K4
V7634
OUT
LD
OUT
SHFT
STR
SHFT
L
ANDST
GX
OUT
SHFT
3
SHFT
ENI
SHFT
DISI
SP
STRN
V
AND
D
V
AND
E
4
N
TMR
C
2
SHFT
SHFT
SHFT
SHFT
X
SET
SHFT
SHFT
X
SET
SHFT
SHFT
R
ORN
A
0
ENT
SHFT
K
JMP
SHFT
D
6
ENT
S
RST
N
TMR
4
8
N
TMR
T
MLR
I
8
ENT
S
S
S
S
END
O0
STR
X1
X3
Y5
SETI
Y7
SETI
IRT
STR
ENT
A
0
B
1
F
5
D
3
H
7
T
MLR
ENT
ENT
ENT
ENT
ENT
ENT
ENT
ENT
ENT
E
ENT
K
JMP
A
4
ENT
STR
X2
Standard
RLL Instructions
3
SHFT
L
ANDST
SP
STRN
GX
OUT
X2
INT
DISI
ENT
5105
Timed Interrupt
Program Example
In the following example, we do some initialization on the first scan, using the
first-scan contact SP0. The interrupt feature is the HSIO Mode 40. Then we
configure the HSIO timer as a 10 mS interrupt by writing K104 to the configuration
register for X0 (V7634). See Chapter 3, Mode 40 Operation for more details.
When X4 turns on, the interrupt will be enabled. When X4 turns off, the interrupt will
be disabled. Every 10 mS the CPU will jump to the interrupt label INT O 0. The
application ladder logic in the interrupt routine will be performed. If X3 is not on
Y0Y7 will be reset to off and then the CPU will return to the main body of the
program.
DirectSOFT
LD
K40
B
STR
SHFT
Copy the value in the lower
16 bits of the accumulator to
V7633
OUT
V7633
LD
K104
L
ANDST
GX
OUT
SHFT
D
3
SHFT
L
ANDST
V7634
GX
OUT
SHFT
SHFT
V
AND
STR
OUT
ENT
V
AND
SP
STRN
N
TMR
K
JMP
0
D
SHFT
K
JMP
A
4
3
A
ENT
E
4
0
E
ENT
ENT
ENT
ENT
4
E
SHFT
ENT
ENT
X4
ENI
SHFT
SHFT
SHFT
SHFT
SHFT
SP
STRN
SHFT
X
SET
SHFT
SHFT
R
ORN
S
RST
N
TMR
4
8
N
TMR
T
MLR
I
8
ENT
S
S
X4
DISI
S
S
END
INT
STR
O0
X
SET
X2
Y5
SETI
X3
Y0
Y7
ENT
A
0
C
2
F
5
D
3
8
A
T
MLR
ENT
ENT
ENT
H
ENT
ENT
ENT
RSTI
IRT
Input
Configuration
Register
Function
Hex Code
Required
V7647
High-Speed
Timed Interrupt
Standard
RLL Instructions
Independent Timed Interrupt O1 is also available as an interrupt. This interrupt is independent of the
HSIO features. Interrupt O1 uses an internal timer that is configured in V memory
Interrupt
location V7647. The interrupt period can be adjusted from 5 to 9999 mS. Once the
interrupt period is set and the interrupt is enabled in the program, the CPU will
continuously call the interrupt routine based on the time setting in V7647.
5106
Message Instructions
Fault
(FAULT)
FAULT
A aaa
To display the value in a V memory location, specify the V memory location in the
instruction. To display the data in ACON (ASCII constant) or NCON (Numerical
constant) instructions, specify the constant (K) value for the corresponding data
label area.
Operand Data Type
Fault Example
DirectSOFT
S
S
X1
DL05 Range
A
aaa
V memory
Constant
1FFFF
Description
SP50
FAULT
K1
END
DLBL
K1
ACON
A SW
NCON
K 2031
NCON
K 3436
B
1
STR
S
S
Standard
RLL Instructions
SW 146
SHFT
SHFT
SHFT
SHFT
SHFT
N
TMR
SHFT
N
TMR
ENT
U
ISG
L
ANDST
T
MLR
N
TMR
L
ANDST
B
1
L
ANDST
C
2
O
INST#
N
TMR
S
RST
W
ANDN
N
TMR
O
INST#
O
INST#
N
TMR
ENT
S
S
ENT
ENT
B
3
0
E
ENT
D
D
1
G
ENT
ENT
Data Label
(DLBL)
DLBL
5107
K aaa
DL05 Range
aaa
Constant
ASCII Constant
(ACON)
1FFFF
ACON
A aaa
DL05 Range
aaa
ASCII
Numerical
Constant
(NCON)
09 AZ
NCON
K aaa
DL05 Range
aaa
Constant
0FFFF
Standard
RLL Instructions
5108
Data Label
Example
In the following example, an ACON and two NCON instructions are used within a
DLBL instruction to build a text message. See the FAULT instruction for information
on displaying messages. The DV-1000 Manual also has information on displaying
messages.
DirectSOFT
S
S
S
END
DLBL
K1
ACON
A SW
NCON
K 2031
NCON
K 3436
Standard
RLL Instructions
S
S
SHFT
N
TMR
SHFT
L
ANDST
B
1
L
ANDST
SHFT
C
2
O
INST#
N
TMR
S
RST
W
ANDN
SHFT
N
TMR
O
INST#
N
TMR
SHFT
N
TMR
O
INST#
N
TMR
ENT
ENT
B
3
0
E
ENT
D
4
1
G
ENT
ENT
Print Message
(PRINT)
Constant
5109
A aaa
DL05 Range
A
aaa
You may recall from the CPU specifications in Chapter 3 that the DL05s ports are
capable of several protocols. Port 1 cannot be configured for the non-sequence
portocol. To configure port 2 using the Handheld Programmer, use AUX 56 and
follow the prompts, making the same choices as indicated below on this page. To
configure a port in DirectSOFT, choose the PLC menu, then Setup, then Setup
Secondary Comm Port.
S Port: From the port number list box at the top, choose Port 2.
S Protocol: Click the check box to the left of Non-sequence, and then
youll see the dialog box shown below.
Baud Rate: Choose the baud rate that matches your printer.
Stop Bits, Parity: Choose number of stop bits and parity setting to
match your printer.
Memory Address: Choose a V-memory address for DirectSOFT to use
to store the port setup information. You will need to reserve 9 words in
V-memory for this purpose. Select Always use for printing if it applies.
Then click the button indicated to send the Port 2 configuration
to the CPU, and click Close. Then see Chapter 3 for port wiring
information, in order to connect your printer to the DL05.
Standard
RLL Instructions
S
S
5110
Port 2 on the DL05 has standard RS232 levels, and should work with most printer
serial input connections.
Text element this is used for printing character strings. The character strings are
defined as the character (more than 0) ranged by the double quotation marks. Two
hex numbers preceded by the dollar sign means an 8-bit ASCII character code. Also,
two characters preceded by the dollar sign is interpreted according to the following
table:
#
Character code
Description
$$
Double quotation ()
$L or $l
$N or $n
$P or $p
Form feed
$R or $r
$T or $t
Tab
The following examples show various syntax conventions and the length of the
output to the printer.
Example:
Standard
RLL Instructions
X1
PRINT
K2
Hello, this is a PLC message.$N
5111
V-memory element this is used for printing V-memory contents in the integer
format or real format. Use V-memory number or V-memory number with : and data
type. The data types are shown in the table below. The Character code must be
capital letters.
NOTE: There must be a space entered before and after the V-memory address to
separate it from the text string. Failure to do this will result in an error code 499.
#
Character code
none
:B
4 digit BCD
:D
:DB
Example:
V2000
V2000 : B
V2000 : D
V2000 : D B
Description
16-bit binary (decimal number)
8 digit BCD
Example: The following example prints a message containing text and a variable.
The reactor temperature labels the data, which is at V2000. You can use the : B
qualifier after the V2000 if the data is in BCD format, for example. The final string
adds the units of degrees to the line of text, and the $N adds a carriage return / line
feed.
X1
PRINT
K2
Reactor temperature = V2000 deg. $N
Standard
RLL Instructions
V-memory text element this is used for printing text stored in V-memory. Use the
% followed by the number of characters after V-memory number for representing the
text. If you assign 0 as the number of characters, the print function will read the
character count from the first location. Then it will start at the next V-memory location
and read that number of ASCII codes for the text from memory.
Example:
V2000 % 16
16 characters in V2000 to V2007 are printed.
V2000 % 0
The characters in V2001 to Vxxxx (determined by the number
in V2000) will be printed.
5112
Bit element this is used for printing the state of the designated bit in V-memory or a
relay bit. The bit element can be assigned by the designating point (.) and bit number
preceded by the V-memory number or relay number. The output type is described as
shown in the table below.
#
Data format
none
: BOOL
: ONOFF
Example:
V2000 . 15
C100
C100 : BOOL
C100 : ON/OFF
V2000.15 : BOOL
Description
Print 1 for an ON state, and 0 for an
OFF state
Print TRUE for an ON state, and
FALSE for an OFF state
Print ON for an ON state, and OFF
for an OFF state
The maximum numbers of characters you can print is 128. The number of characters
for each element is listed in the table below:
Standard
RLL Instructions
Element type
Maximum
Characters
Text, 1 character
16 bit binary
32 bit binary
11
4 digit BCD
8 digit BCD
12
12
V-memory/text
5113
Network Instructions
Read from Network The Read from Network instruction
(RX)
causes the master device on a network to
read a block of data from a slave device on
the same network. The function
parameters are loaded into the
accumulator and the first and second level
of the stack. Listed below are the program
steps necessary to execute the Read from
Network function.
RX
A aaa
Step 1: Load the slave address (090 BCD) into the low byte and F2 into the
high byte of the accumulator (the next two instructions push this word down to the
second layer of the stack).
Step 2: Load the number of bytes to be transferred into the accumulator (the
next instruction pushes this word onto the top of the stack).
Step 3: Load the starting Master CPU address into the accumulator. This is the
memory location where the data read from the slave will be put. This parameter
requires a HEX value.
Step 4: Insert the RX instruction which specifies the starting V memory location
(Aaaa) where the data will be read from in the slave.
Helpful Hint: For parameters that require HEX values, the LDA instruction can
be used to convert an octal address to the HEX equivalent and load the value into
the accumulator.
Operand Data Type
DL05 Range
A
aaa
V memory
Pointer
Inputs
0377
Outputs
0377
Control Relays
0777
Stage
0377
Timer
0177
Counter
CT
0177
Special Relay
SP
0777
Program Memory
Standard RLL
Instructions
5114
In the following example, when X1 is on and the port busy relay SP116 (see special
relays) is not on, the RX instruction will access port 2 operating as a master. Ten
consecutive bytes of data (V2000 V2004) will be read from a CPU at station
address 5 and copied into V memory locations V2300V2304 in the CPU with the
master port.
DirectSOFT
X1
SP116
LD
KF205
Master
CPU
Slave
CPU
S
S
LD
K10
The constant value K10
specifies the number of
bytes to be read
LDA
O 2300
Octal address 2300 is
converted to 4C0 HEX and
loaded into the accumulator.
V2300 is the starting
location for the Master CPU
where the specified data will
be read into
S
S
V2277
X V1777
V2300
V2301
V2001
V2302
V2002
V2303
V2003
V2304
V2004
V2305
X V2005
S
S
V2000
S
S
RX
V2000
V2000 is the starting
location in the for the Slave
CPU where the specified
data will be read from
Standard RLL
Instructions
B
STR
W
ANDN
SHFT
SHFT
L
ANDST
SHFT
L
ANDST
SHFT
L
ANDST
SHFT
R
ORN
X
SET
ENT
SP
STRN
3
3
B
1
ENT
SHFT
K
JMP
SHFT
SHFT
K
JMP
A
3
G
1
A
2
A
0
A
2
ENT
A
0
A
SHFT
0
ENT
ENT
F
0
ENT
Write to Network
(WX)
5115
WX
A aaa
Step 1: Load the slave address (090 BCD) into the low byte and F2 into the
high byte of the accumulator (the next two instructions push this word down to the
second layer of the stack).
Step 2: Load the number of bytes to be transferred into the accumulator (the
next instruction pushes this word onto the top of the stack).
Step 3: Load the starting Master CPU address into the accumulator. This is the
memory location where the data will be written from. This parameter requires a
HEX value.
Step 4: Insert the WX instruction which specifies the starting V memory location
(Aaaa) where the data will be written to in the slave.
Helpful Hint: For parameters that require HEX values, the LDA instruction can
be used to convert an octal address to the HEX equivalent and load the value into
the accumulator.
Operand Data Type
DL05 Range
A
aaa
V memory
Pointer
Inputs
0377
Outputs
0377
Control Relays
0777
Stage
0377
Timer
0177
Counter
CT
0177
Special Relay
SP
0777
Program Memory
Standard RLL
Instructions
5116
In the following example when X1 is on and the module busy relay SP116 (see
special relays) is not on, the WX instruction will access port 2 operating as a master.
Ten consecutive bytes of data is read from the Master CPU and copied to V memory
locations V2000V2004 in the slave CPU at station address 5.
DirectSOFT
X1
SP116
LD
KF205
Master
CPU
Slave
CPU
S
S
LD
K10
The constant value K10
specifies the number of
bytes to be written
LDA
O 2300
Octal address 2300 is
converted to 4C0 HEX and
loaded into the accumulator.
V2300 is the starting
location for the Master CPU
where the specified data will
be read from.
S
S
V2277
X V1777
V2300
V2301
V2001
V2302
V2002
V2303
V2003
V2304
V2004
V2305
X V2005
S
S
V2000
S
S
WX
V2000
V2000 is the starting
location in the for the Slave
CPU where the specified
data will be written to
Handheld Programmer Keystrokes
Standard RLL
Instructions
B
STR
W
ANDN
SHFT
SHFT
L
ANDST
SHFT
L
ANDST
SHFT
L
ANDST
SHFT
W
ANDN
X
SET
ENT
SP
STRN
3
3
C
1
SHFT
K
JMP
SHFT
A
E
1
6
SHFT
K
JMP
0
A
2
0
A
3
A
2
C
ENT
A
2
ENT
A
0
A
SHFT
0
ENT
ENT
F
0
ENT
Drum Instruction
Programming
In This Chapter. . . .
Introduction
Step Transitions
Overview of Drum Operation
Drum Control Techniques
Drum Instruction
EDrum Instruction
16
62
Drum Instruction Programming
Drum Instruction
Programming
Introduction
Purpose
Drum Terminology
The Event Drum (EDRUM) instruction in the DL05 CPU electronically simulates an
electro-mechanical drum sequencer. The instruction offers enhancements to the
basic principle, which we describe first.
Drum instructions are best suited for repetitive processes that consist of a finite
number of steps. They can do the work of many rungs of ladder logic with elegant
simplicity. Therefore, drums can save a lot of programming and debugging time.
We introduce some terminology associated with the drum instruction by describing
the original mechanical drum shown below. The mechanical drum generally has
pegs on its curved surface. The pegs are populated in a particular pattern,
representing a set of desired actions for machine control. A motor or solenoid rotates
the drum a precise amount at specific times. During rotation, stationary wipers sense
the presence of pegs (present = on, absent = off). This interaction makes or breaks
electrical contact with the wipers, creating electrical outputs from the drum. The
outputs are wired to devices on a machine for On/Off control.
Drums usually have a finite number of positions within one rotation, called steps.
Each step represents some process step. At powerup, the drum resets to a
particular step. The drum rotates from one step to the next based on a timer, or on
some external event. During special conditions, a machine operator can manually
increment the drum step using a jog control on the drums drive mechanism. The
contact closure of each wiper generates a unique on/off pattern called a sequence,
designed for controlling a specific machine. Because the drum is circular, it
automatically repeats the sequence once per rotation. Applications vary greatly, and
a particular drum may rotate once per second, or as slowly as once per week.
Pegs
Wipers
Drum
Outputs
Electronic drums provide the benefits of mechanical drums and more. For example,
they have a preset feature that is impossible for mechanical drums: The preset
function lets you move from the present step directly to any other step on command!
63
Drum Instruction Programming
For editing purposes, the electronic drum is presented in chart form in DirectSOFT
and in this manual. Imagine slicing the surface of a hollow drum cylinder between
two rows of pegs, then pressing it flat. Now you can view the drum as a chart as
shown below. Each row represents a step, numbered 1 through 16. Each column
represents an output, numbered 0 through 15 (to match word bit numbering). The
solid circles in the chart represent pegs (On state) in the mechanical drum, and the
open circles are empty peg sites (Off state).
OUTPUTS
STEP 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1
f F f F f f F f f f F f f F f f
2
f F f F F f F f f f f F f f F f
3
f F F F F f F F f f f f f f f f
4
F F f F F f F f F f f f f f f F
5
f f f F f f F f F f F f F f f F
6
f f f F f f F f F f F f F F f F
7
F f f F f f F F F F f F F F f F
8
F f F f f F f F F f f f F f f F
9
f f f f f f f F F f f f F f f f
10
f f f f f f f F F F f f f f f f
11
F f f f F f f f f F f f f f F f
12
f F f f F F f f F f F F f F F f
13
f f F f f f f f f f f F F f F f
14
f f f f f f f F f f f F F f F F
15
F f f f f F f F f F f F f f F F
16
f f F f f f f F f F f F F f f F
Output Sequences The mechanical drum sequencer derives its name from sequences of control
changes on its electrical outputs. The following figure shows the sequence of On/Off
controls generated by the drum pattern above. Compare the two, and you will find
that they are equivalent! If you can see their equivalence, you are well on your way to
understanding drum instruction operation.
Step
Output
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
10
11
12
13
14
15
16
Drum Instruction
Programming
Drum Chart
Representation
64
Drum Instruction Programming
Drum Instruction
Programming
Step Transitions
Drum Instruction
Types
Timer-Only
Transitions
Outputs:
F f f f F f F f f f f F F f f f
Outputs:
f f f F f f f f F F f F f f F F
Increment
count timer
No
Step 2
The drum stays in Step 1 for a specific duration (user-programmable). The timebase
of the timer is programmable, from 0.01 seconds to 99.99 seconds. This establishes
the resolution, or the duration of each tick of the clock. Each step uses the same
timebase, but has its own unique counts per step, which you program. When the
counts for Step 1 have expired, then the drum moves to Step 2. The outputs change
immediately to match the new pattern for Step 2.
The drum spends a specific amount of time in each step, given by the formula:
Time in step = 0.01 seconds X Timebase x Counts per step
65
Drum Instruction Programming
NOTE: When first choosing the timebase resolution, a good rule of thumb is to make
it about 1/10 the duration of the shortest step in your drum. Then you will be able to
optimize the duration of that step in 10% increments. Other steps with longer
durations allow optimizing by even smaller increments (percentage-wise). Also,
note that the drum instruction executes once per CPU scan. Therefore, it is pointless
to specify a drum timebase that is much faster than the CPU scan time.
Step transitions may also occur based on time and/or external events. The figure
below shows how step transitions work in these cases.
Step 1
No
Outputs:
F f f f F f F f f f f F F f f f
Is Step event
true?
Yes
Increment
count timer
No
Has step
counts expired?
Yes
Step 2
Outputs:
f f f F f f f f F F f F f f F F
When the drum enters Step 1, it sets the output pattern as shown. Then it begins
polling the external input programmed for that step. You can define event inputs as
X, Y, or C discrete point types. Suppose we select X0 for the Step 1 event input. If X0
is off, then the drum remains in Step 1. When X0 is On, the event criteria is met and
the timer increments. The timer increments as long as the event (X0) remains true.
When the counts for Step 1 have expired, then the drum moves to Step 2. The
outputs change immediately to match the new pattern for Step 2.
Drum Instruction
Programming
For example, if you program a 5 second time base and 12 counts for Step 1, then the
drum will spend 60 seconds in Step 1. The maximum time for any step is given by the
formula:
Max Time per step = 0.01 seconds X 9999 X 9999
= 999,800 seconds = 277.7 hours = 11.6 days
66
Drum Instruction
Programming
Event-Only
Transitions
Step transitions do not require both the event and the timer criteria programmed for
each step. You have the option of programming just one of the two, and even mixing
transition types among all the steps of the drum. For example, you might want Step 1
to transition on an event, Step 2 to transition on time only, and Step 3 to transition on
both time and an event. Furthermore, you may elect to use only part of the 16 steps,
and only part of the 16 outputs.
Step 1
No
Outputs:
F f f f F f F f f f f F F f f f
Outputs:
f f f F f f f f F F f F f f F F
Is Step event
true?
Yes
Step 2
Counter
Assignments
Each drum instruction uses the resources of four counters in the CPU. When
programming the drum instruction, you select the first counter number. The drum
also uses the next three counters automatically. The counter bit associated with the
first counter turns on when the drum has completed its cycle, going off when the
drum is reset. These counter values and the counter bit precisely indicate the
progress of the drum instruction, and can be monitored by your ladder program.
Suppose we program a timer drum to have
8 steps, and we select CT10 for the
counter number (remember, counter
numbering is in octal). Counter usage is
shown to the right. The right column holds
typical values, interpreted below.
Counter Assignments
CT10 Counts in step V1010
1528
V1011
0200
V1012
0001
V1013
0004
CT10 shows that we are at the 1528th count in the current step, which is step 4
(shown in CT13). If we have programmed step 4 to have 3000 counts, then the step
is just over half completed. CT11 is the count timer, shown in units of 0.01 seconds.
So, each least-significant-digit change represents 0.01 seconds. The value of 200
means that we have been in the current count (1528) for 2 seconds (0.01 x 100).
Finally, CT12 holds the preset step value which was programmed into the drum
instruction. When the drums Reset input is active, it presets to step 1 in this case.
The value of CT12 changes only if the ladder program writes to it, or the drum
instruction is edited and the program is restarted. Counter bit CT10 turns on when
the drum cycle is complete, and turns off when the drum is reset.
67
Drum Instruction Programming
The last step in a drum sequence may be any step number, since partial drums are
valid. Refer to the following figure. When the transition conditions of the last step are
met, the drum sets the counter bit corresponding to the counter named in the drum
instruction box (such as CT0). Then it moves to a final drum complete state. The
drum outputs remain in the pattern defined for the last step. Having finished a drum
cycle, the Start and Jog inputs have no effect at this point.
The drum leaves the drum complete state when the Reset input becomes active (or
on a program-torun mode transition). It resets the drum complete bit (such as CT0),
and then goes directly to the appropriate step number defined as the preset step.
Last step
No
Outputs:
Are transition
conditions met?
F F F f f f F f f F f F F F f F
(Timer and/or
Event criteria)
Yes
Set
CT0 = 1
Complete
No
Outputs:
F F F f f f F f f F f F F F f F
Reset Input
Active?
Yes
Reset
CT0 = 0
Go to Preset Step
Drum Instruction
Programming
Last Step
Completion
68
Drum Instruction Programming
Drum Instruction
Programming
The drum instruction utilizes various inputs and outputs in addition to the drum
pattern itself. Refer to the figure below.
Inputs
DRUM INSTRUCTION
Block Diagram
Outputs
Start
Realtime
Inputs
(from ladder)
Jog
Reset
Drum
Preset Step
Counts/Step
Step
Control
Step
Pointer
Timebase
Programming
Selections
Events
f
f
f
F
f
f
f
f
f
f
f
F
F
F
F
F
F
f
f
f
F
F
f
F
f
f
f
F
f
f
f
f
f f
f f
F f
F f
F f
F F
F F
f F
Final Drum
Outputs
Counter #
Pattern
Counter Assignments
CT0
Counts in step
V1000
xxxx
CT1
Timer Value
V1001
xxxx
CT2
Preset Step
V1002
xxxx
CT3
Current Step
V1003
xxxx
The drum instruction accepts several inputs for step control, the main control of the
drum. The inputs and their functions are:
S
S
S
S
Start The Start input is effective only when Reset is off. When Start is
on, the drum timer runs if it is in a timed transition, and the drum looks
for the input event during event transitions. When Start is off, the drum
freezes in its current state (Reset must remain off), and the drum
outputs maintain their current on/off pattern.
Jog The jog input is only effective when Reset is off (Start may be
either on or off). The jog input increments the drum to the next step on
each off-to-on transition (only EDRUM supports the jog input).
Reset The Reset input has priority over the Start input. When Reset is
on, the drum moves to its preset step. When Reset is off, then the Start
input operates normally.
Preset Step A step number from 1 to 16 that you define (typically is
step 1). The drum moves to this step whenever Reset is on, and
whenever the CPU first enters run mode.
69
Drum Instruction Programming
S
WARNING: The outputs of a drum are enabled any time the CPU is in Run Mode.
The Start Input does not have to be on, and the Reset input does not disable the
outputs. Upon entering Run Mode, drum outputs automatically turn on or off
according to the pattern of the current step of the drum. This initial step number
depends on the counter memory configuration: non-retentive versus retentive.
Powerup State of
Drum Registers
The choice of the starting step on powerup and program-to-run mode transitions are
important to consider for your application. Please refer to the following chart. If the
counter memory is configured as non-retentive, the drum is initialized the same way
on every powerup or program-to-run mode transition. However, if the counter
memory is configured to be retentive, the drum will stay in its previous state.
Counter Number
Function
CT(n)
Initialization on Powerup
Non-Retentive Case
Retentive Case
Current Step
Count
Initialize = 0
CT(n + 1)
Counter Timer
Value
Initialize = 0
CT(n + 2)
Preset Step
CT(n + 3)
Current Step #
Applications with relatively fast drum cycle times typically will need to be reset on
powerup, using the non-retentive option. Applications with relatively long drum cycle
times may need to resume at the previous point where operations stopped, using the
retentive case. The default option is the retentive case. This means that if you
initialize scratchpad V-memory, the memory will be retentive.
Drum Instruction
Programming
S
S
610
Drum Instruction Programming
Drum Instruction
Programming
X0
Start
X1
Jog
X2
Setup
Info.
Outputs
Reset
Steps
f
f
f
F
f
f
f
f
f
f
f
F
F
F
F
F
F
f
f
f
F
F
f
F
f
f
f
F
f
f
f
f
f f
f f
F f
F f
F f
F F
F F
f F
The timing diagram below shows an arbitrary timer drum input sequence and how
the drum responds. As the CPU enters Run mode it initializes the step number to the
preset step number (typically it is Step 1). When the Start input turns on the drum
begins running, waiting for an event and/or running the timer (depends on the setup).
After the drum enters Step 2, Reset turns On while Start is still On. Since Reset has
priority over Start, the drum goes to the preset step (Step 1). Note that the drum is
held in the preset step during Reset, and that step does not run (respond to events or
run the timer) until Reset turns off.
After the drum has entered step 3, the Start input goes off momentarily, halting the
drums timer until Start turns on again.
Start
drum
Inputs
Start
1
0
Jog
1
0
Reset
1
0
Reset
drum
Hold
drum
Resume
drum
Drum
Reset
Complete drum
Drum Status
1
Step #
Drum
Complete (CT0)
Outputs (x 16)
...
15
16
16
16
1
0
1
0
When the drum completes the last step (Step 16 in this example), the Drum
Complete bit (CT0) turns on, and the step number remains at 16. When the Reset
input turns on, it turns off the Drum Complete bit (CT0), and forces the drum to enter
the preset step.
NOTE: The timing diagram shows all steps using equal time durations. Step times
can vary greatly, depending on the counts/step programmed.
611
Drum Instruction Programming
Jog
drum
Inputs
Start
1
0
Jog
1
0
Reset
1
0
Reset
drum
Jog
drum
Jog
drum
Drum
Complete
Drum Status
1
Step #
Drum
Complete (CT0)
Outputs (x 16)
Self-Resetting
Drum
Initializing Drum
Outputs
Using Complex
Event Step
Transitions
6,7
...
14
15
16
16
16
1
0
1
0
X0
Start
X1
Start
Setup
Info.
X2
Reset
Steps
CT0
Outputs
f
f
f
F
f
f
f
f
f
f
f
F
F
F
F
F
F
f
f
f
F
F
f
F
f
f
f
F
f
f
f
f
f f
f f
F f
F f
F f
F F
F F
f F
The outputs of a drum are enabled any time the CPU is in run mode. On
program-to-run mode transitions, the drum goes to the preset step, and the outputs
energize according to the pattern of that step. If your application requires all outputs
to be off at powerup, make the preset step in the drum a reset step, with all outputs
off.
Each event-based transition accepts only one contact reference for the event.
However, this does not limit events to just one contact. Just use a control relay
contact such as C0 for the step transition event. Elsewhere in ladder logic, you may
use C0 as an output coil, making it dependent on many other events (contacts).
Drum Instruction
Programming
In the figure below, we focus on how the Jog input works on event drums. To the left
of the diagram, note that the off-to-on transitions of the Jog input increments the
step. Start may be either on or off (however, Reset must be off). Two jogs takes the
drum to step three. Next, the Start input turns on, and the drum begins running
normally. During step 6 another Jog input signal occurs. This increments the drum to
step 7, setting the timer to 0. The drum begins running immediately in step 7,
because Start is already on. The drum advances to step 8 normally.
As the drum enters step 14, the Start input turns off. Two more Jog signals moves the
drum to step 16. However, note that a third Jog signal is required to move the drum
through step 16 to drum complete. Finally, a Reset input signal arrives which forces
the drum into the preset step and turns off the drum complete bit.
612
Drum Instruction Programming
Drum Instruction
Programming
Drum Instruction
The DL05 drum instructions may be programmed using DirectSOFT or for the
EDRUM instruction only you can use a handheld programmer (firmware version
v1.8 or later. This section covers entry using DirectSOFT for all instructions plus the
handheld mnemonics for the EDRUM instruction.
The Timed Drum with Discrete Outputs is the most basic of the DL05s drum
instructions. It operates according to the principles covered on the previous pages.
Below is the instruction in chart form as displayed by DirectSOFT.
Step Preset
Timebase
Counter Number
Start
Control
Inputs
Reset
Step Number
Counts per Step
Output Pattern
f= Off, F= On
DRUM
CT aaa
Step Preset
K bb
Counts
Kdddd
Kdddd
Kdddd
Kdddd
Kdddd
Kdddd
Kdddd
Kdddd
Kdddd
Kdddd
Kdddd
Kdddd
Kdddd
Kdddd
Kdddd
Kdddd
15
(Fffff)
(Fffff)
(Fffff)
(Fffff)
(Fffff)
(Fffff)
(Fffff)
(Fffff)
(Fffff)
(Fffff)
(Fffff)
(Fffff)
(Fffff)
(Fffff)
(Fffff)
(Fffff)
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
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f
The Timed Drum features 16 steps and 16 outputs. Step transitions occur only on a
timed basis, specified in counts per step. Unused steps must be programmed with
counts per step = 0 (this is the default entry). The discrete output points may be
individually assigned as X, Y, or C types, or may be left unused. The output pattern
may be edited graphically with DirectSOFT.
Whenever the Start input is energized, the drums timer is enabled. It stops when the
last step is complete, or when the Reset input is energized. The drum enters the
preset step chosen upon a CPU program-to-run mode transition, and whenever the
Reset input is energized.
Drum Parameters
Field
Data Types
Ranges
Counter Number
aaa
0 174
Preset Step
bb
1 16
Timer base
cccc
0 99.99 seconds
dddd
0 9999
Discrete Outputs
Fffff
X, Y, C
613
Drum Instruction Programming
Counter Number
Ranges of (n)
Function
CT(n)
0 174
Counts in step
CT( n+1)
1 175
Timer value
CT( n+2)
2 176
Preset Step
CT( n+3)
3 177
Current Step
The following ladder program shows the DRUM instruction in a typical ladder
program, as shown by DirectSOFT. Steps 1 through 10 are used, and twelve of the
sixteen output points are used. The preset step is step 1. The timebase runs at (K10
x 0.01) = 0.1 second per count. Therefore, the duration of step 1 is (25 x 0.1) = 2.5
seconds. In the last rung, the Drum Complete bit (CT0) turns on output Y0 upon
completion of the last step (step 10). A drum reset also resets CT0.
DirectSOFT Display
X0
X1
Start
Reset
DRUM
CT 0
Step Preset:
K1
0.01 sec/Count: K 10
Step #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CT0
Drum Complete
Counts
K0025
K0020
K1500
K0045
K0180
K0923
K1200
K8643
K1200
K4000
15
0
( )
( )
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
( )
( )
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
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f
f
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f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
(C14) (Y10)
(C4)
(Y5)
(Y13)
(C7)
(C30) (Y20)
(C2)
(Y6)
(Y42)
(C10)
F
F
f
f
f
F
F
f
F
f
f
f
f
f
f
f
f
f
F
f
F
f
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F
F
F
f
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F
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F
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F
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f
Y0
OUT
f
F
f
F
f
f
F
F
F
f
f
f
f
f
f
f
F
f
F
f
f
F
f
F
F
f
f
f
f
f
f
f
Drum Instruction
Programming
Drum instructions use four counters in the CPU. The ladder program can read the
counter values for the drums status. The ladder program may write a new preset
step number to CT(n+2) at any time. However, the other counters are for monitoring
purposes only.
614
Drum Instruction
Programming
Event Drum
(EDRUM)
The Event Drum (EDRUM) features time-based and event-based step transitions. It
operates according to the general principles of drum operation covered in the
beginning of this chapter. Below is the instruction as displayed by DirectSOFT.
Counter Number
Step Preset
Timebase
Control
Inputs
EDRUM
CT aa 15
Jog
Step Preset:
K bb
Reset
Step Number
Counts per Step
Event per step
Output Pattern
f= Off, F= On
Start
Counts Event
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
Kdddd Eeeee
(Ffff)
(Ffff)
(Ffff)
(Ffff)
(Ffff)
(Ffff)
(Ffff)
(Ffff)
(Ffff)
(Ffff)
(Ffff)
(Ffff)
(Ffff)
(Ffff)
(Ffff)
(Ffff)
f
f
f
f
f
f
f
f
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f
The Event Drum features 16 steps and 16 discrete outputs. Step transitions occur on
timed and/or event basis. The jog input also advances the step on each off-to-on
transition. Time is specified in counts per step, and events are specified as discrete
contacts. Unused steps and events must be left blank. The discrete output points
may be individually assigned.
Whenever the Start input is energized, the drums timer is enabled. As long as the
event is true for the current step, the timer runs during that step. When the step count
equals the counts per step, the drum transitions to the next step. This process stops
when the last step is complete, or when the Reset input is energized. The drum
enters the preset step chosen upon a CPU program-to-run mode transition, and
whenever the Reset input is energized.
Drum Parameters
Field
Data Types
Ranges
Counter Number
aa
0 174
Preset Step
bb
1 16
Timer base
cccc
dddd
0 9999
Event
eeee
X, Y, C, S, T, CT
Discrete Outputs
ffff
X, Y, C
0 99.99 seconds
615
Drum Instruction Programming
Counter Number
Ranges of (n)
Function
CT(n)
0 174
Counts in step
C( n+1)
1 175
Timer value
CT( n+2)
2 176
Preset Step
CT( n+3)
3 177
Current Step
The following ladder program shows the EDRUM instruction in a typical ladder
program, as shown by DirectSOFT. Steps 1 through 11 are used, and all sixteen
output points are used. The preset step is step 1. The timebase runs at (K10 x 0.01) =
0.1 second per count. Therefore, the duration of step 1 is (1 x 0.1) = 0.1 second. Note
that step 1 is time-based only (event is left blank). And, the output pattern for step 1
programs all outputs off, which is a typically desirable powerup condition. In the last
rung, the Drum Complete bit (CT4) turns on output Y0 upon completion of the last
step (step 11). A drum reset also resets CT4.
DirectSOFT Display
X0
Start
EDRUM
CT 4
15
X1
Jog
Step Preset
K1
(C34)
(Y6)
(C14)
(Y0)
(C4)
(Y5)
(Y1)
(C7)
(Y3)
(Y7)
(C30)
(Y2)
(C2)
(Y6)
(Y4)
(C10)
X2
Reset
0.01 sec/Count: K 10
Step #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CT4
Drum Complete
Counts Event
K0001
K0020 Y4
K0150 X1
K0048 X2
K0180 C0
K0923 C1
K0120 X0
K0864 X5
K1200 X3
K0400 Y7
K0000 C20
f
F
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f
f
f
f
f
f
F
F
f
f
f
f
F
f
f
f
f
f
f
f
F
F
F
f
f
f
F
f
f
f
f
f
f
f
f
f
f
f
f
F
f
f
F
F
f
f
f
f
f
f
f
f
f
F
F
f
f
F
f
f
F
F
f
f
f
f
f
Y0
OUT
f
F
f
F
f
F
F
f
F
f
F
f
f
f
f
f
f
f
f
f
F
F
f
F
f
f
F
f
f
f
f
f
Drum Instruction
Programming
Drum instructions use four counters in the CPU. The ladder program can read the
counter values for the drums status. The ladder program may write a new preset
step number to CT(n+2) at any time. However, the other counters are for monitoring
purposes only.
616
Drum Instruction
Programming
Handheld
Programmer
Drum Mnemonics
X0
Start
X1
Jog
Setup
Info.
Reset
Steps
X2
Outputs
Mask
f
f
f
F
f
f
f
f
f
f
f
F
F
F
F
F
F
f
f
f
F
F
f
F
f
f
f
F
f
f
f
f
f f
f f
F f
F f
F f
F F
F F
f F
Store X0
A
STR
ENT
After the Store instructions, enter the EDRUM (using Counter CT0) as shown:
Handheld Programmer Keystrokes
EDRUM CNT0
SHFT
D
4
R
ORN
U
ISG
M
ORST
A
0
ENT
After entering the EDRUM mnemonic as above, the handheld programmer creates
an input form for all the drum parameters. The input form consists of approximately
fifty or more default mnemonic entries containing DEF (define) statements. The
default mnemonics are already input for you, so they appear automatically. Use the
NXT and PREV keys to move forward and backward through the form. Only the
editing of default values is required, thus eliminating many keystrokes. The entries
required for the basic timer drum are in the chart below.
Drum Parameters
Multiple
Entries
Mnemonic / Entry
Default
Mnemonic
Valid Data
Types
Ranges
Start Input
Jog Input
Reset Input
Drum Mnemonic
DRUM CNT aa
CT
0 174
Preset Step
bb
DEF K0000
1 16
Timer base
cccc
DEF K0000
1 9999
Output points
16
ffff
DEF 0000
X, Y, C *
see page
428
16
dddd
DEF K0000
0 9999
Events
16
dddd
DEF K0000
X, Y, C, S,
T, CT
see page
428
Output pattern
16
gggg
DEF K0000
0 FFFF
NOTE: Default entries for output points and events are DEF 0000, which means
they are unassigned. If you need to go back and change an assigned output as
unused again, enter K0000. The entry will again show as DEF 0000.
617
Drum Instruction Programming
Step 1
f f f f F f f F f f f F F f F f
Outputs:
converts to:
15
The following diagram shows the method for entering the previous EDRUM example
on the HHP. The default entries of the form are in parenthesis. After the drum
instruction entry (on the fourth row), the remaining keystrokes over-write the
numeric portion of each default DEF statement. NOTE: Drum editing requires
Handheld Programmer firmware version 1.7 or later.
Handheld Programmer Keystrokes
Start
Jog
Reset
Drum Inst.
SHFT
STR
B
STR
ENT
1
C
STR
ENT
2
E
D
4
ENT
R
ORN
Preset Step
( DEF K0001)
NEXT
Time Base
( DEF K0000 )
( DEF 0000 )
SHFT
( DEF 0000 )
SHFT
( DEF 0000 )
SHFT
Y
MLS
( DEF 0000 )
SHFT
Y
MLS
( DEF 0000 )
SHFT
Y
MLS
( DEF 0000 )
SHFT
Y
MLS
( DEF 0000 )
SHFT
( DEF 0000 )
SHFT
( DEF 0000 )
SHFT
Y
MLS
( DEF 0000 )
SHFT
Y
MLS
( DEF 0000 )
SHFT
( DEF 0000 )
SHFT
( DEF 0000 )
SHFT
Y
MLS
( DEF 0000 )
SHFT
Y
MLS
( DEF 0000 )
SHFT
16 ( DEF 0000 )
SHFT
Y
MLS
ENT
NEXT
H
7
B
NEXT
A
1
1
4
5
6
4
C
Outputs
E
6
M
ORST
ISG
2
0
2
( DEF K0000 )
NEXT
( DEF K0000 )
NEXT
( DEF K0000 )
NEXT
( DEF K0000 )
NEXT
2
B
( DEF K0000 )
J
B
NEXT
( DEF K0000 )
NEXT
NEXT
( DEF K0000 )
NEXT
NEXT
( DEF K0000 )
NEXT
( DEF K0000 )
NEXT
16 ( DEF K0000 )
NEXT
NEXT
NEXT
( DEF K0000 )
NEXT
0
E
6
C
4
A
2
A
1
I
NEXT
A
NEXT
NEXT
NEXT
NEXT
A
0
A
NEXT
NEXT
NEXT
( DEF K0000 )
NEXT
NEXT
( DEF K0000 )
E
3
Counts/
Step
NEXT
NEXT
3
6
( DEF K0000 )
( DEF K0000 )
NEXT
NEXT
1 ( DEF K0000 )
NEXT
NEXT
skip over
unused steps
Drum Instruction
Programming
Using the DRUM entry chart (two pages before), we show the method of entry for the
basic time/event drum instruction. First, we convert the output pattern for each step
to the equivalent hex number, as shown in the following example.
618
Drum Instruction Programming
Drum Instruction
Programming
( DEF 0000 )
( DEF 0000 )
( DEF 0000 )
( DEF 0000 )
( DEF 0000 )
( DEF 0000 )
( DEF 0000 )
( DEF 0000 )
SHFT
SHFT
SHFT
SHFT
SHFT
SHFT
Events
( DEF 0000 )
( DEF 0000 )
( DEF 0000 )
16
NEXT
SHFT
SHFT
SHFT
SHFT
( DEF 0000 )
NEXT
( DEF 0000 )
NEXT
( DEF 0000 )
NEXT
( DEF 0000 )
NEXT
( DEF 0000 )
NEXT
Y
MLS
X
SET
X
SET
4
1
2
2
C
0
B
X
SET
X
SET
X
SET
Y
MLS
C
2
0
5
3
7
( DEF K0000 )
NEXT
( DEF K0000 )
NEXT
( DEF K0000 )
NEXT
( DEF K0000 )
NEXT
NEXT
NEXT
NEXT
Output
Pattern
NEXT
Last rung
( DEF K0000 )
J
D
F
8
I
5
I
NEXT
( DEF K0000 )
NEXT
( DEF K0000 )
NEXT
( DEF K0000 )
NEXT
( DEF K0000 )
NEXT
GY
CNT
Y
MLS
SHFT
J
9
SHFT
6
E
( DEF K0000 )
STR
C
1
B
8
( DEF K0000 )
( DEF K0000 )
16
NEXT
I
9
( DEF K0000 )
( DEF K0000 )
0
( DEF K0000 )
NEXT
( DEF K0000 )
NEXT
A
4
H
NEXT
NEXT
NEXT
NEXT
NEXT
NEXT
NEXT
NEXT
NEXT
NEXT
unused steps
0
0
NEXT
NEXT
RLL PLUS
Stage Programming
In This Chapter. . . .
17
72
RLL PLUS
Stage Programming
Overcoming
Stage Fright
73
Inputs
Ladder
Program
Outputs
PLC Scan
1) Read
Execute
Write
2) Read
Execute
Write
3) Read
(etc....)
RLL PLUS
Stage Programming
74
X0
OFF
ON
X1
Output equation: Y0 = ON
RLL PLUS
Stage Programming
First, well translate the state diagram to traditional RLL. Then well show how easy it
is to translate the diagram into a stage programming solution.
RLL Equivalent
Stage Equivalent
Set
Reset
X0
X1
Latch
Latch
C0
OUT
Output
C0
Y0
OUT
SG
S0
OFF State
Transition
S1
X0
JMP
SG
S1
ON State
Output
SP1 Always on
Y0
OUT
Transition
X1
S0
JMP
When the Off pushbutton (X1) is pressed, a transition back to the Off State occurs.
The JMP S0 instruction executes, which simply turns off the Stage bit S1 and turns
on Stage bit S0. On the next PLC scan, the CPU will not execute Stage S1, so the
motor output Y0 will turn off. The Off state (Stage 0) will be ready for the next cycle.
Lets Compare
75
Right now, you may be thinking I dont see the big advantage to Stage
Programming... in fact, the stage program is longer than the plain RLL program.
Well, now is the time to exercise a bit of faith. As control problems grow in complexity,
stage programming quickly out-performs RLL in simplicity, program size, etc.
For example, consider the diagram below.
Notice how easy it is to correlate the OFF
SG
and ON states of the state transition
OFF State
S0
diagram below to the stage program at the
S1
X0
right. Now, we challenge anyone to easily
identify the same states in the RLL
JMP
program on the previous page!
ON State
SP1
Y0
OUT
X1
S0
X0
OFF
ON
JMP
X1
Initial Stages
X1
C0
C0
OUT
Initial Stage
JMP
SG
S1
SP1
First Scan
Y0
OUT
S0
X1
JMP
Powerup in ON State
SG
S0
S1
X0
JMP
ISG
S1
Initial Stage
SP1
Y0
OUT
X1
S0
Y0
OUT
SP0
S1
X0
JMP
RLL PLUS
Stage Programming
SG
S1
76
RLL PLUS
Stage Programming
Powerup
X0
OFF
ON
X1
What Stage Bits Do You may recall that a stage is just a section of ladder program which is either active or
inactive at a given moment. All stage bits (S0 to S377) reside in the PLCs image
register as individual status bits. Each stage bit is either a boolean 0 or 1 at any time.
Program execution always reads ladder rungs from top to bottom, and from left to
right. The drawing below shows the effect of stage bit status. The ladder rungs below
the stage instruction continuing until the next stage instruction or the end of program
belong to stage 0. Its equivalent operation is shown on the right. When S0 is true, the
two rungs have power flow.
S If Stage bit S0 = 0, its ladder rungs are not scanned (executed).
S If Stage bit S0 = 1, its ladder rungs are scanned (executed).
Actual Program Appearance
SG
S0
S0
Stage Instruction
Characteristics
SG
S0
SG
S1
SG
S2
END
77
The Stage JMP instruction we have used deactivates the stage in which the
instruction occurs, while activating the stage in the JMP instruction. Refer to the
state transition shown below. When contact X0 energizes, the state transition from
S0 to S1 occurs. The two stage examples shown below are equivalent. So, the
Stage Jump instruction is equal to a Stage Reset of the current stage, plus a Stage
Set instruction for the stage to which we want to transition.
X0
S1
SG
S0
SG
S0
Equivalent
S1
X0
S0
X0
JMP
RST
S1
SET
Please Read Carefully The jump instruction is easily misunderstood. The jump
does not occur immediately like a GOTO or GOSUB program control instruction
when executed. Heres how it works:
S The jump instruction resets the stage bit of the stage in which it occurs.
All rungs in the stage still finish executing during the current scan, even
if there are other rungs in the stage below the jump instruction!
S The reset will be in effect on the following scan, so the stage that
executed the jump instruction previously will be inactive and bypassed.
S The stage bit of the stage named in the Jump instruction will be set
immediately, so the stage will be executed on its next occurrence. In the
left program shown below, stage S1 executes during the same scan as
the JMP S1 occurs in S0. In the example on the right, Stage S1
executes on the next scan after the JMP S1 executes, because stage
S1 is located above stage S0.
SG
S0
Executes on next
scan after Jmp
SG
S1
X0
S1
S1
JMP
Executes on same
scan as Jmp
SG
S1
S1
Y0
Y0
OUT
SG
S0
X0
OUT
Note: Assume we start with Stage 0 active and stage 1 inactive for both examples.
S1
JMP
RLL PLUS
Stage Programming
S0
78
RLL PLUS
Stage Programming
A 4State Process
Inputs
Toggle
X0
Outputs
Ladder
Program
Powerup
Y0
X0
OFF
ON
X0
Output equation: Y0 = ON
Note that this example differs from the motor example, because now we have just
one pushbutton. When we press the pushbutton, both transition conditions are met.
We would just transition around the state diagram at top speed. If implemented in
Stage, this solution would flash the light on or off each scan (obviously undesirable)!
The solution is to make the the push and the release of the pushbutton separate
events. Refer to the new state transition diagram below. At powerup we enter the
OFF state. When switch X0 is pressed, we enter the Press-ON state. When it is
released, we enter the ON state. Note that X0 with the bar above it denotes X0 NOT.
Powerup
X0
PushON
X0
OFF
ISG
S0
OFF State
S1
X0
ON
JMP
X0
PushOFF
X0
SG
S1
S2
X0
Output equation: Y0 = ON
PushOn State
JMP
SG
S2
ON State
Output
SP1
Y0
OUT
X0
S3
JMP
SG
S3
PushOff State
X0
S0
JMP
79
RLL PLUS
Stage Programming
Describe all functions of the process in your own words. Start by listing what
happens first, then next, etc. If you find there are too many things happening at once,
try dividing the problem into more than one process. Remember, you can still have
the processes communicate with each other to coordinate their overall activity.
710
RLL PLUS
Stage Programming
Garage Door
Opener Example
Up limit switch
Raise
Lower
Motor
Door
Command
Down limit switch
Outputs
To motor:
Ladder
Program Y1
Raise
Y2
Lower
Now we are ready to draw the state transition diagram. Like the previous light bulb
controller example, this application also has just one switch for the command input.
Refer to the figure below.
S When the door is down (DOWN state), nothing happens until X0
energizes. Its push and release brings us to the RAISE state, where
output Y1 turns on and causes the motor to raise the door.
S We transition to the UP state when the up limit switch (X1) energizes,
and turns off the motor.
S Then nothing happens until another X0 press-release cycle occurs. That
takes us to the LOWER state, turning on output Y2 to command the
motor to lower the door. We transition back to the DOWN state when the
down limit switch (X2) energizes.
X0
PushUP
RAISE
X1
ISG
S0
DOWN State
S1
X0
DOWN
UP
JMP
SG
S1
X2
LOWER
PushDOWN
X0
PushUP State
S2
X0
X0
Output equations: Y1 = RAISE Y2 = LOWER
JMP
SG
S2
RAISE State
SP1
Y1
OUT
S3
X1
JMP
SG
S3
UP State
S4
X0
JMP
SG
S4
PushDOWN State
S5
X0
JMP
SG
S5
LOWER State
SP1
X2
Y2
OUT
S0
JMP
RLL PLUS
Stage Programming
Powerup
X0
711
712
RLL PLUS
Stage Programming
Add Safety
Light Feature
Safety light
Modify the
To control the light bulb, we add an output Inputs
Block Diagram and to our controller block diagram, shown to
Toggle
the right, Y3 is the light control output.
State Diagram
X0
In the diagram below, we add an additional
state called LIGHT. Whenever the
garage owner presses the door control Up limit
X1
switch and releases, the RAISE or
LOWER state is active and the LIGHT
state is simultaneously active. The line to
Down limit
the Light state is dashed, because it is not
X2
the primary path.
Outputs
Y1
Ladder
Program Y2
Y3
Raise
Lower
Light
We can think of the Light state as a parallel process to the raise and lower state. The
paths to the Light state are not a transition (Stage JMP), but a State Set command. In
the logic of the Light stage, we will place a three-minute timer. When it expires, timer
bit T0 turns on and resets the Light stage. The path out of the Light stage goes
nowhere, indicating the Light stage just becomes inactive, and the light goes out!
Output equations:
X0
X0
RAISE
PushUP
X1
Y1 = RAISE
Y2 = LOWER
Y3 = LIGHT
X0
DOWN
LIGHT
UP
T0
X0
X2
LOWER
PushDOWN
X0
X0
713
Using a Timer
Inside a Stage
K=1800 counts
The timer has power flow whenever stage
S6 is active. The corresponding timer bit
T0 is set when the timer expires. So three
minutes later, T0=1 and the instruction
Reset S6 causes the stage to be inactive.
While Stage S6 is active and the light is on,
stage transitions in the primary path
continue normally and independently of
Stage 6. That is, the door can go up, down,
or whatever, but the light will be on for
precisely 3 minutes.
ISG
S0
DOWN State
S1
X0
JMP
SG
S1
PushUP State
S2
X0
JMP
S6
SET
SG
S2
RAISE State
SP1
Y1
OUT
S3
X1
JMP
SG
S3
UP State
S4
X0
JMP
SG
S4
PushDOWN State
S5
X0
JMP
S6
SET
SG
S5
LOWER State
SP1
Y2
OUT
X2
S0
JMP
SG
S6
LIGHT State
SP1
Y3
OUT
TMR T0
K1800
T0
S6
RST
RLL PLUS
Stage Programming
714
RLL PLUS
Stage Programming
Add Emergency
Stop Feature
Inputs
Toggle
Outputs
X0
Y1
X1
Ladder Y2
Program
Down limit
X2
Y3
Up limit
Raise
Lower
Light
Obstruction
X3
X0
X0
RAISE
PushUP
X1
X0
DOWN
X3
LIGHT
UP
T0
X0
X2 and X3
LOWER
PushDOWN
X0
X0
Exclusive
Transitions
It is theoretically possible that the down limit (X2) and the obstruction input (X3)
could energize at the same moment. In that case, we would jump to the Push-UP
and DOWN states simultaneously, which does not make sense.
Instead, we give priority to the obstruction
by changing the transition condition to the
SG
LOWER State
DOWN state to [X2 AND NOT X3]. This
S5
ensures the obstruction event has the
SP1
Y2
priority. The modifications we must make
OUT
to the LOWER Stage (S5) logic are shown
to the right. The first rung remains
to DOWN
S0
X2
X3
unchanged. The second and third rungs
JMP
implement the transitions we need. Note
X3
to Push-UP S2
the opposite relay contact usage for X3,
which ensures the stage will execute only
JMP
one of the JMP instructions.
715
Main Process
XXX
= ISG
Idle
Powerup Initialization
Powerup
Fill
Agitate
Rinse
Spin
Operator Interface
Monitor
Recipe
Control
Status
Operator Interface
Recipe
Control
Monitor
Set
E-Stop and
Alarm Monitoring
Status
RLL PLUS
Stage Programming
The examples so far in this chapter used one self-contained state diagram to
represent the main process. However, we can have multiple processes
implemented in stages, all in the same ladder program. New stage programmers
sometimes try to turn a stage on and off each scan, based on the false assumption
that only one stage can be on at a time. For ladder rungs that you want to execute
each scan, just put them in a stage that is always on.
The following figure shows a typical application. During operation, the primary
manufacturing activity Main Process, Powerup Initialization, E-Stop and Alarm
Monitoring, and Operator Interface are all running. At powerup, three initial stages
shown begin operation.
716
RLL PLUS
Stage Programming
Stage 0
Stage 1
Stage 2
Most all instructions work just like they do in standard RLL. You can think of a stage
just like a miniature RLL program which is either active or inactive.
Output Coils As expected, output coils in active stages will turn on or off outputs
according to power flow into the coil. However, note the following:
S Outputs work as usual, provided each output reference (such as Y3) is
used in only one stage.
S An output can be referenced from more than one stage, as long as only
one of the stages is active at a time.
S If an output coil is controlled by more than one stage simultaneously, the
active stage nearest the bottom of the program determines the final
output status during each scan. Therefore, use the OROUT instruction
instead when you want multiple stages to have a logical OR control of
an output.
One-Shot or PD coils Use care if you must use a Positive Differential coil in a
stage. Remember that the input to the coil must make a 01 transition. If the coil is
already energized on the first scan when the stage becomes active, the PD coil will
not work. This is because the 01 transition did not occur.
PD coil alternative: If there is a task which you want to do only once (on 1 scan), it can
be placed in a stage which transitions to the next stage on the same scan.
Counter In using a counter inside a stage, the stage must be active for one scan
before the input to the counter makes a 01 transition. Otherwise, there is no real
transition and the counter will not count.
The ordinary Counter instruction does have a restriction inside stages: it may not be
reset from other stages using the RST instruction for the counter bit. However, the
special Stage counter provides a solution (see next paragraph).
Stage Counter The Stage Counter has the benefit that its count may be globally
reset from other stages by using the RST instruction. It has a count input, but no reset
input. This is the only difference from a standard counter.
Drum Realize that the drum sequencer is its own process, and is a different
programming method than stage programming. If you need to use a drum with
stages, be sure to place the drum instruction in an ISG stage that is always active.
717
Ladder
Program
Y0
Powerup
Supervisor
Supervisor Process
OFF State
S1
X0
JMP
Powerup
X0
PushON
X0
SG
S1
PushOn State
S2
X0
Main Process
OFF
X0
PushOFF
ON
X0
JMP
SG
S2
ON State
SP1
Y0
OUT
S3
X0
JMP
SG
S3
PushOff State
S0
X0
JMP
ISG
S4
Supervisor State
S1
SGCNT
CT0
K5000
The counter in the above example is a special Stage Counter. Note that it does not
have a reset input. The count is reset by executing a Reset instruction, naming the
counter bit (CT0 in this case). The Stage Counter has the benefit that its count may
be globally reset from other stages. The standard Counter instruction does not have
this global reset capability. You may still use a regular Counter instruction inside a
stage... however, the reset input to the counter is the only way to reset it.
RLL PLUS
Stage Programming
ISG
S0
718
Power Flow
Transition
Technique
Our discussion of state transitions has shown how the Stage JMP instruction makes
the current stage inactive and the next stage (named in the JMP) active. As an
alternative way to enter this in DirectSOFT, you may use the power flow method for
stage transitions.
The main requirement is that the current stage be located directly above the next
(jump-to) stage in the ladder program. This arrangement is shown in the diagram
below, by stages S0 and S1, respectively.
X0
RLL PLUS
Stage Programming
S0
S1
SG
S0
SG
S0
S1
X0
Equivalent
JMP
X0
SG
S1
Power flow
transition
SG
S1
Recall that the Stage JMP instruction may occur anywhere in the current stage, and
the result is the same. However, power flow transitions (shown above) must occur as
the last rung in a stage. All other rungs in the stage will precede it. The power flow
transition method is also achievable on the handheld programmer, by simply
following the transition condition with the Stage instruction for the next stage.
The power flow transition method does eliminate one Stage JMP instruction, its only
advantage. However, it is not as easy to make program changes as using the Stage
JMP. Therefore, we advise using Stage JMP transitions for most programmers.
Stage View in
DirectSOFT
SG
The Stage View option in DirectSOFT will let you view the ladder program as a flow
chart. The figure below shows the symbol convention used in the diagrams. You may
find the stage view useful as a tool to verify that your stage program has faithfully
reproduced the logic of the state transition diagram you intend to realize.
Stage
Reference to
a Stage
Transition
Logic
Jump
Set Stage
Reset Stage
The following diagram is a typical stage view of a ladder program containing stages.
Note the left-to-right direction of the flow chart.
ISG
S0
SG
S1
SG
S2
SG
S4
SG
S3
SG
S5
719
SG
S1
S3
PushOn State
S2
X0
S0
S1
X0
Process B
Converging
Processes
JMP
S4
S4
S5
JMP
Note that if we want Stages S2 and S4 to energize exactly on the same scan, both
stages must be located below or above Stage S1 in the ladder program (see the
explanation at the bottom of page 77). Overall, parallel branching is easy!
Now we consider the opposite case of parallel branching, which is converging
processes. This simply means we stop doing multiple things and continue doing one
thing at a time. In the figure below, processes A and B converge when stages S2 and
S4 transition to S5 at some point in time. So, S2 and S4 are Convergence Stages.
Process A
S1
S2
= Convergence Stage
S5
Process B
Convergence
Stages
(CV)
S3
S6
S4
CV
S2
Convergence
Stages
CV
S4
X3
SG
S5
S5
CVJMP
RLL PLUS
Stage Programming
S2
RLL PLUS
Stage Programming
720
Convergence
Stage Guidelines
CV
S2
Convergence
Jump
CV
S4
X3
S5
CVJMP
SG
S5
S
S
S
S
S
S
S
721
S aaa
DL05 Range
aaa
Stage
0377
The following example is a simple RLL PLUS program. This program utilizes an initial
stage, stage, and jump instructions to create a structured program.
DirectSOFT
ISG
S0
A
ISG
0
A
STR
X0
Y0
OUT
GX
OUT
STR
X1
S2
SET
X
SET
SHFT
F
STR
X5
K
JMP
SG
S1
1
C
STR
X2
Y1
GX
OUT
SG
OUT
$
2
G
6
STR
SG
S2
GX
OUT
2
7
STR
X6
Y2
OUT
X7
ENT
ENT
ENT
S
RST
C
2
ENT
ENT
S1
JMP
SG
ENT
S1
S0
JMP
V
AND
SHFT
K
JMP
A
0
ENT
ENT
ENT
ENT
ENT
ENT
ENT
ENT
S
RST
ENT
B
1
ENT
RLL PLUS
Stage Programming
SG
722
Initial Staget
(ISG)
ISG
S aaa
DL05 Range
aaa
RLL PLUS
Stage Programming
Stage
0377
Initial Stages are also activated by transitional logic, a jump or a set stage executed
from an active stage.
JUMP
(JMP)
S aaa
JMP
DL05 Range
aaa
Stage
Not Jump
(NJMP)
0377
S aaa
NJMP
DL05 Range
aaa
Stage
0377
In the following example, only stage ISG0 will be active when program execution.
begins. When X1 is on, program execution will jump from Initial Stage 0 to Stage 1.
DirectSOFT
ISG
S0
A
ISG
$
X1
SG
S1
STR
JMP
K
JMP
S1
1
1
SG
$
X2
STR
OUT
GX
OUT
S2
JMP
X7
Y5
S3
NJMP
2
5
STR
K
JMP
SHFT
C
2
N
TMR
SHFT
ENT
ENT
ENT
ENT
ENT
ENT
ENT
ENT
K
JMP
D
3
S
S
S
Converge Stage
The Converge Stage instruction is used to
(CV) and Converge group certain stages together by defining
them as Converge Stages.
Jump (CVJMP)
When all of the Converge Stages within a
group become active, the CVJMP
instruction (and any additional logic in the
final CV stage) will be executed. All
preceding CV stages must be active before
the final CV stage logic can be executed. All
Converge Stages are deactivated one scan
after the CVJMP instruction is executed.
Additional logic instructions are only
allowed following the last Converge Stage
instruction and before the CVJMP
instruction. Multiple CVJUMP instructions
are allowed.
Converge Stages must be programmed in
the main body of the application program.
This means they cannot be programmed in
Subroutines or Interrupt Routines.
Operand Data Type
DL05 Range
aaa
S
0377
CV
S aaa
S aaa
CVJMP
ENT
RLL PLUS
Stage Programming
X7
Stage
723
724
In the following example, when Converge Stages S10 and S11 are both active the
CVJMP instruction will be executed when X4 is on. The CVJMP will deactivate S10
and S11, and activate S20. Then, if X5 is on, the program execution will jump back to
the initial stage, S0.
DirectSOFT Display
A
ISG
A
0
STR
RLL PLUS
Stage Programming
ISG
S0
X0
Y0
OUT
X1
S1
JMP
S10
JMP
SG
S1
X2
B
1
STR
K
JMP
K
JMP
S10
C
STR
K
JMP
B
C
X4
Y3
OUT
SHFT
S20
CVJMP
SG
S20
X5
S0
JMP
ENT
ENT
ENT
B
1
ENT
B
V
AND
D
STR
GX
OUT
3
4
C
2
A
0
ENT
ENT
ENT
ENT
ENT
C
F
0
B
SHFT
A
1
V
AND
STR
K
JMP
V
AND
ENT
SG
X3
ENT
SHFT
ENT
STR
S11
ENT
SG
SHFT
CV
S11
JMP
CV
GX
OUT
ENT
0
ENT
ENT
K
JMP
ENT
A
2
ENT
725
RLL PLUS
Stage Programming
Q. What does stage programming do that I cant do with regular RLL programs?
A. Stages allow you to identify all the states of your process before you begin
programming. This approach is more organized, because you divide up a ladder
program into sections. As stages, these program sections are active only when they
are actually needed by the process. Most processes can be organized into a
sequence of stages, connected by event-based transitions.
RLL PLUS
Stage Programming
726
Q. Isnt a Stage JMP just like a regular GOTO instruction used in software?
A. No, it is very different. A GOTO instruction sends the program execution
immediately to the code location named by the GOTO. A Stage JMP simply resets
the Stage Bit of the current stage, while setting the Stage Bit of the stage named in
the JMP instruction. Stage bits are 0 or 1, determining the inactive/active status of
the corresponding stages. A stage JMP has the following results:
S When the JMP is executed, the remainder of the current stages rungs
are executed, even if they reside past(under) the JMP instruction. On
the following scan, that stage is not executed, because it is inactive.
S The Stage named in the Stage JMP instruction will be executed upon its
next occurrence. If located past (under) the current stage, it will be
executed on the same scan. If located before (above) the current stage,
it will be executed on the following scan.
Q. How can I know when to use stage JMP, versus a Set Stage Bit or Reset Stage Bit?
A. These instructions are used according to the state diagram topology you have
derived:
S Use a Stage JMP instruction for a state transition... moving from one
state to another.
S Use a Set Stage Bit instruction when the current state is spawning a
new parallel state or stage sequence, or when a supervisory state is
starting a state sequence under its command.
S Use a Reset Bit instruction when the current state is the last state in a
sequence and its task is complete, or when a supervisory state is
ending a state sequence under its command.
Q. What is an initial stage, and when do I use it?
A. An initial stage (ISG) is automatically active at powerup. Afterwards, it works just
like any other stage. You can have multiple initial stages, if required. Use an initial
stage for ladder that must always be active, or as a starting point.
Q. Can I have place program ladder rungs outside of the stages, so they are always on?
A. It is possible, but its not good software design practice. Place ladder that must
always be active in an initial stage, and do not reset that stage or use a Stage JMP
instruction inside it. It can start other stage sequences at the proper time by setting
the appropriate Stage Bit(s).
Q. Can I have more than one active stage at a time?
A. Yes, and this is a normal occurrence for many programs. However, it is important
to organize your application into separate processes, each made up of stages. And a
good process design will be mostly sequential, with only one stage on at a time.
However, all the processes in the program may be active simultaneously.
In This Chapter. . . .
DL05 PID Loop Features
Loop Setup Parameters
Loop Sample Rate and Scheduling
Ten Steps to Successful Process Control
Basic Loop Operation
PID Loop Data Configuration
PID Algorithms
Loop Tuning Procedure
PV Analog Filter
Feedforward Control
Time Proportioning Control
Cascade Control
Process Alarms
Ramp/Soak Generator
Troubleshooting Tips
Bibliography
Glossary of PID Loop Terminology
18
82
PID Loop Operation
The DL05 process loop control offers a sophisticated set of features to address
many application needs. The main features are:
Up to 4 loops, individual programmable sample rates
Manual/ Automatic/Cascaded loop capability available
Two types of bumpless transfer available
Full-featured alarms
Ramp/soak generator with up to 16 segments
Auto Tuning
The DL05 CPU has process control loop capability in addition to ladder program
execution. You can select and configure up to four loops. All sensor and actuator
wiring connects directly to DL05 analog modules. All process variables, gain values,
alarm levels, etc., associated with each loop reside in a Loop Variable Table in the
CPU. The DL05 CPU reads process variable (PV) inputs during each scan. Then it
makes PID loop calculations during a dedicated time slice on each PLC scan,
updating the control output value. The control loops use a
Proportional-Integral-Derivative (PID) algorithm to generate the control output. This
chapter describes how the loops operate, and what you must do to configure and
tune the loops.
Analog Output
DL05
PID Loop Calculations
Manufacturing Process
Maintenance
and Troubleshooting
S
S
S
S
S
S
Analog Input
The best tool for configuring loops in the DL05 is the DirectSOFT32 programming
software, release 3.0c, or later. DirectSOFT32 uses dialog boxes to help you set up
the individual loops. After completing the setup, you can use DirectSOFT32s PID
Trend View to tune each loop. The configuration and tuning selections you make are
stored in the DL05s FLASH memory, which is retentive. The loop parameters also
may be saved to disk for recall later.
83
PID Loop Operation
Number of loops
Selectable, 4 maximum
PID algorithm
Loop modes
Ramp/Soak Generator
PV curves
Proportional Gain
Integrator (Reset)
Derivative (Rate)
Rate Limits
Bumpless Transfer I
Bumpless Transfer II
Automatically set the bias equal to the control output when control switches
from manual to automatic
Step Bias
Anti-windup
For position form of PID, this inhibits integrator action when the control
output reaches 0% or 100 % (speeds up loop recovery when output
recovers from saturation)
Error Deadband
Specify a tolerance (plus and minus) for the error term (SPPV), so that no
change in control output value is made
Alarm Feature
Specifications
Deadband
PV Alarm Points
Select PV alarm settings for Lowlow, Low, High, and High-high conditions
PV Deviation
Specify alarms for two ranges of PV deviation from the setpoint value
Rate of Change
Maintenance
Specifications
84
PID Loop Operation
The Basics of
PID Loops
The key parts of a PID control loop are shown in the block diagram below. The path
from the PLC to the Manufacturing Process and back to the PLC is the loop in
closed loop control.
External
Disturbances
Loop Configuring
and Monitoring
PLC System
Setpoint Value
+
Error Term
Loop
Calculation
Control Output
Manufacturing
Process
Maintenance
and Troubleshooting
Process Variable
Manufacturing Process the set of actions that adds value to raw materials. The
process can involve physical changes and/or chemical changes to the material. The
changes render the material more useful for a particular purpose, ultimately used in
a final product.
Process Variable a measurement of some physical property of the raw materials.
Measurements are made using some type of sensor. For example, if the
manufacturing process uses an oven, you will most likely want to control
temperature. Temperature is a process variable.
Setpoint Value the theoretically perfect quantity of the process variable, or the
desired amount which yields the best product. The machine operator knows this
value, and either sets it manually or programs it into the PLC for later automated use.
External Disturbances the unpredictable sources of error which the control
system attempts to cancel by offsetting their effects. For example, if the fuel input is
constant an oven will run hotter during warm weather than it does during cold
weather. An oven control system must counter-act this effect to maintain a constant
oven temperature during any season. Thus, the weather (which is not very
predictable), is one source of disturbance to this process.
Error Term the algebraic difference between the process variable and the
setpoint. This is the control loop error, and is equal to zero when the process variable
is equal to the setpoint (desired) value. A well-behaved control loop is able to
maintain a small error term magnitude.
Loop Calculation the real-time application of a mathematical algorithm to the
error term, generating a control output command appropriate for minimizing the
error magnitude. Various control algorithms are available, and the DL05 uses the
Proportional-Integral-Derivative (PID) algorithm (more on this later).
Control Output the result of the loop calculation, which becomes a command for
the process (such as the heater level in an oven).
Loop Configuring operator-initiated selections which set up and optimize the
performance of a control loop. The loop calculation function uses the configuration
parameters in real time to adjust gains, offsets, etc.
Loop Monitoring the function which allows an operator to observe the status and
performance of a control loop. This is used in conjunction with the loop configuring to
optimize the performance of a loop (minimize the error term).
85
PID Loop Operation
The diagram below shows each loop element in the form of its real-world physical
component. The example manufacturing process involves a liquid in a reactor
vessel. A sensor probe measures a process variable which may be pressure,
temperature, or another parameter. The sensor signal is amplified through a
transducer, and is sent through the wire in analog form to the PLC input module.
Using a analog I/O combination module, the PLC reads the PV from its analog input.
The CPU executes the loop calculation, and writes to the analog output. This signal
goes to a device in the manufacturing process, such as a heater, valve, pump, etc.
Over time, the liquid begins to change enough to be measured on the sensor probe.
The process variable changes accordingly. The next loop calculation occurs, and
the loop cycle repeats in this manner continuously.
Loop Configuration
and Monitoring
Process Variable
Control Output
Loop
Calculation
The personal computer shown is used to run DirectSOFT32, the PLC programming
software for DirectLOGIC programmable controllers. DirectSOFT32, release 3.0c
or later, can program the DL05 PLC (including the PID feature). The software
features a forms-based editor to configure loop parameters. It also features a PID
loop trending screen which will be helpful during the loop tuning process. Details on
how to use that software are in the DirectSOFT32 Manual.
Maintenance
Manufacturing
Process
86
PID Loop Operation
The DL05 PLC gets its PID loop processing instructions only from tables in
V-memory. A PID instruction type in RLL does not exist for the DirectLogic PLCs.
Instead, the CPU reads setup parameters from reserved V-memory locations.
Shown in the table below, you must program a value in V7640 to point to the main
loop table. Then you will need to program V7641 with the number of loops you want
the CPU to calculate. V7642 contains error flags which will be set if V7640 or V7641
are programmed improperly.
Maintenance
and Troubleshooting
Address
Setup Parameter
Data type
Ranges
Read/Write
V7640
Loop Parameter
Table Pointer
Octal
V1200 V7377
write
V7641
Number of Loops
BCD
04
write
V7642
Binary
0 or 1
read
If the number of loops is 0, the loop controller task is turned off during the ladder
program scan. The loop controller will allow use of loops in ascending order,
beginning with 1. For example, you cannot use loop 1 and 4 while skipping 2 and 3.
The loop controller attempts to control the full number of loops specified in V7641.
PID Error Flags
If you use the DirectSOFT32 loop setup dialog box, its automatic range checking
prohibits possible setup errors. However, the setup parameters may be written using
other methods such as RLL, so the error flag register may be helpful in those cases.
The following table lists the errors reported in V7642.
Bit
The starting address (in V7640) is out of the lower V-memory range.
The starting address (in V7640) is out of the upper V-memory range.
The loop table extends past (straddles) the boundary at V7377. Use an
address closer to V1200.
As a quick check, if the CPU is in Run mode and V7642=0000, there are no
programming errors.
87
PID Loop Operation
Establishing the
Loop Table Size
and Location
On a program -to-run mode transition, the CPU reads the loop setup parameters as
pictured below. At that moment, the CPU learns the location of the loop table and the
number of loops it configures. Then during the ladder program scan, the PID Loop
task uses the loop data to perform calculations, generate alarms, and so on. There
are some loop table parameters the CPU will read or write on every loop calculation.
CPU Tasks
VMemory Space
User Data
Ladder
Program
READ/
WRITE
LOOP
DATA
CONFIGURE/
MONITOR
PID Loop
Task
READ
(at powerup)
Setup Parameters
V7640, V7641
DirectSOFT32 Programming Software
VMemory
User Data
V2000
LOOP #1
V2037
V2040
LOOP #2
V2077
32 words
32 words
LOOP #3
32 words
LOOP #4
32 words
Maintenance
NOTE: The DL05 CPUs PID algorithm requires DirectSOFT32 Version 3.0c (or later)
and firmware version 2.1 (or later).
88
PID Loop Operation
Loop Table
Word Definitions
The parameters associated with each loop are listed in the following table. The
address offset is in octal, to help you locate specific parameters in a loop table. For
example, if a table begins at V2000, then the location of the reset (integral) term is
Addr+11, or V2011. Do not use the word# (in the first column) to calculate addresses.
Maintenance
and Troubleshooting
Word #
Address+Offset Description
Format
Addr + 0
bits
Addr + 1
bits
Addr + 2
word/binary
Addr + 3
word/binary
Addr + 4
word/binary
Addr + 5
word/binary
Addr + 6
Addr + 7
word/BCD
Addr + 10
word/BCD
10
Addr + 11
word/BCD
11
Addr + 12
word/BCD
12
Addr + 13
word/binary
13
Addr + 14
word/binary
14
Addr + 15
word/binary
15
Addr + 16
word/binary
16
Addr + 17
word/binary
17
Addr + 20
word/binary
18
Addr + 21
word/binary
19
Addr + 22
word/binary
20
Addr + 23
word/binary
21
Addr + 24
word/BCD
22
Addr + 25
word/BCD
23
Addr + 26
word/binary
24
Addr + 27
word/binary
25
Addr + 30
word/binary
26
Addr + 31
word/binary
27
Addr + 32
28
Addr + 33
29
Addr + 34
30
Addr + 35
31
Addr + 36
word/hex
32
Addr + 37
word/hex
bits
word/hex
bit
word/hex
bits
89
PID Loop Operation
PID Mode Setting 1 The individual bit definitions of the PID Mode Setting 1 word (Addr+00) are listed in
the following table. Additional information about the use of this word is available later
Bit Descriptions
in this chapter.
(Addr + 00)
Bit
Read/Write
Bit=0
Bit=1
write
01
request
write
01
request
write
01
request
write
Mode I
Mode II
write
Direct
Reverse
write
Position
Velocity
write
Linear
Sq. root
write
Linear
Squared
write
Disable
Enable
write
Off
On
10
write
Off
On
11
write
Off
On
12
write
Off
On
13
write
Off
On
14
write
Off
On
15
write
Loop with
CPU mode
Loop
Independent
of CPU mode
Maintenance
810
PID Loop Operation
PID Mode Setting 2 The individual bit definitions of the PID Mode Setting 2 word (Addr+01) are listed in
the following table. Additional information about the use of this word is available later
Bit Descriptions
in this chapter.
(Addr + 01)
Maintenance
and Troubleshooting
Bit
Read/Write
Bit=0
Bit=1
write
unipolar
bipolar
write
12 bit
15 bit
write
off
on
write
disable
enable
write
seconds
minutes
write
closed loop
open loop
Autotune selection
write
PID
PI only
(rate = 0)
Autotune start
read/write
autotune
done
force start
read
write
not
16 bit
select
16 bit
10
write
same
format
separate
formats
11
write
unipolar
bipolar
12
write
12 bit
15 bit
13
write
not
16 bit
select
16 bit
1415
Note 1: If the value in bit 9 is 0, then the values in bits 0 and 1 are read. If the value in
bit 9 is 1, then the values in bits 0 and 1 are not read, and bit 9 defines the
data format (the range is automatically unipolar).
Note 2: If the value in bit 10 is 0, then the values in bits 0, 1, and 9 define the input and
output ranges and data formats (the values in bits 11, 12, and 13 are not
read). If the value in bit 10 is 1, then the values in bits 0, 1, and 9 define only
the input range and data format, and bits 11, 12, and 13 are read and define
the output range and data format.
Note 3: If bit 10 has a value of 1 and bit 13 has a value of 0, then bits 11 and 12 are
read and define the output range and data format. If bit 10 and bit 13 each
have a value of 1, then bits 11 and 12 are not read, and bit 13 defines the data
format, (the output range is automatically unipolar).
811
PID Loop Operation
Mode / Alarm
Monitoring Word
(Addr + 06)
The individual bit definitions of the Mode / Alarm monitoring (Addr+06) word is listed
in the following table. More details are in the PID Mode section and Alarms section.
Bit
Read/Write
Bit=0
Bit=1
read
Manual
read
Auto
read
Cascade
read
Off
On
read
Off
On
read
Off
On
read
Off
On
read
Off
On
read
Off
On
read
Off
On
10
read
Error
11
read
Error
12
read
Off
On
13
read
Error
1415
Ramp / Soak Table The individual bit definitions of the Ramp / Soak Table Flag (Addr+33) word is listed
in the following table. Further details are given in the Ramp / Soak Operation section.
Flags
(Addr + 33)
Bit
Read/Write
Bit=0
Bit=1
write
01 Start
write
01 Hold
write
01
Resume
write
01 Jog
read
Complete
read
Off
On
read
Off
On
Reserved
read
read
815
Bits 815 must be read as a byte to indicate the current segment number of the
Ramp/Soak generator in the profile. This byte will have the values 1, 2, 3, 4, 5, 6, 7, 8,
9, A, B, C, D, E, F, and 10, which represent segments 1 to 16 respectively. If the
byte=0, then the Ramp/Soak table is not active.
Maintenance
812
PID Loop Operation
Ramp/Soak
Table Location
(Addr + 34)
Each loop that you configure has the option of using a built-in Ramp/Soak generator
dedicated to that loop. This feature generates SP values that follow a profile. To use
the Ramp Soak feature, you must program a separate table of 32 words with
appropriate values. A DirectSOFT32 dialog box makes this easy to do.
In the loop table, the Ramp / Soak Table Pointer at Addr+34 must point to the start of
the ramp/soak data for that loop. This may be anywhere in user memory, and does
not have to adjoin to the Loop Parameter table, as shown to the left. Each R/S table
requires 32 words, regardless of the number of segments programmed.
The ramp/soak table parameters are defined in the table below. Further details are in
the section on Ramp / Soak Operation in this chapter.
VMemory Space
Addr
Offset
Step
User Data
+ 00
+ 01
Addr
Offset
Step
Description
+ 20
Ramp Slope
+ 21
Ramp Slope
V2000
LOOP #1
V2037
32 words
+ 02
Soak Duration
+ 22
10
Soak Duration
LOOP #2
+ 03
Soak PV Deviation
+ 23
10
Soak PV Deviation
+ 04
+ 24
11
+ 05
Ramp Slope
+ 25
11
Ramp Slope
+ 06
Soak Duration
+ 26
12
Soak Duration
+ 07
Soak PV Deviation
+ 27
12
Soak PV Deviation
+ 10
+ 30
13
+ 11
Ramp Slope
+ 31
13
Ramp Slope
+ 12
Soak Duration
+ 32
14
Soak Duration
+ 13
Soak PV Deviation
+ 33
14
Soak PV Deviation
+ 14
+ 34
15
+ 15
Ramp Slope
+ 35
15
Ramp Slope
+ 16
Soak Duration
+ 36
16
Soak Duration
+ 17
Soak PV Deviation
+ 37
16
Soak PV Deviation
32 words
Maintenance
and Troubleshooting
Description
V3000
Ramp/Soak #1
32 words
Ramp/Soak Table
The individual bit definitions of the Ramp / Soak Table Programming Error Flags
Programming Error word (Addr+35) is listed in the following table. Further details are given in the PID
Loop Mode section and in the PV Alarm section later in this chapter.
Flags
(Addr + 35)
Bit
Read/
Write
Bit=0
Bit=1
read
Error
read
Error
read
Error
23
4
515
813
PID Loop Operation
Read
Inputs
Service
Peripherals
PLC
Scan
Ladder
Program
Calculate
PID Loops
Internal
Diagnostics
Write
Outputs
As a starting point, determine a sample rate for your loop which will be fast enough to
avoid control instability (which is extremely important). Follow the procedure on the
next page to find a starting sample rate:
Maintenance
Choosing the Best For any particular control loop, there is no single perfect sample rate to use. A good
sample rate is a compromise that simultaneously satisfies various guidelines:
Sample Rate
S The desired sample rate is proportional to the response time of the PV
to a change in control output. Usually, a process with a large mass will
have a slow sample rate, but a small mass needs a faster sample rate.
S Faster sample rates provide a smoother control output and accurate PV
performance, but use more CPU processing time. Sample rates much
faster than necessary serve only to waste CPU processing power.
S Slower sample rates provide a rougher control output and less accurate
PV performance, but use less CPU processing time.
S A sample rate which is too slow will cause system instability, particularly
when a change in the setpoint or a disturbance occurs.
814
PID Loop Operation
Control
Output
PV
Sample
Rate
Rise Time
In the figure above, suppose the measured rise time response of the PV was 25
seconds. The suggested sample rate from this measurement will be 2.5 seconds.
For illustration, the sample rate time line shows ten samples within the rise time
period. These show the frequency of PID calculations as the PV changes values. Of
course, the sample rate and PID calculations are continuous during operation.
NOTE: An excessively fast sample rate will diminish the available resolution in the
PV Rate-of-Change Alarm, because the alarm rate value is specified in terms of PV
change per sample period. For example, a 50 mS sample rate means the smallest
PV rate-of-change we can detect is 20 PV counts (least significant bit counts) per
second, or 1200 LSB counts per minute.
Programming the
Sample Rate
The Loop Parameter table for each loop has a data location for the sample rate.
Referring to the figure below, location V+07 contains a BCD number from 00.05 to
99.99 (with an implied decimal point). This represents 50 mS to 99.99 seconds. This
number may be programmed using DirectSOFT32s PID Setup screen, or any other
method of writing to V-memory. It must be programmed before the loop will operate
properly.
Setpoint
+
Error Term
Loop
Calculation
Process Variable
Sample RateV+07
X X
X X BCD
Sample Rate
00.05 to 99.99 sec
Control Output
815
PID Loop Operation
150 mS
Typical
250 mS
Maximum
350 mS
To calculate scan time increase, we also must know (or estimate) the scan time of
the ladder (without loops). A fast scan time will increase by a smaller percentage
than a slow scan time will, when adding the same PID loop calculation load in each
case. The formula for average scan time calculation is:
For example, suppose the estimated scan time without loop calculations is 50 mS,
and the loop sample time is 3 seconds. Now, calculate the new scan time:
3 sec.
250 mS
50 mS
50.004 mS
As the calculation shows, the addition of only one loop with a slow sample rate has a
very small effect on scan time. Next, expand the equation above to show the effect of
adding any number of loops:
n=L
50 mS
Scan time
without loops
n=1
Sample Rate
Summation Term
0.25 sec
50 mS
30 sec
0.42 mS
10 sec
1.25 mS
1.5 sec
8.3 mS
Now adding the summation terms, plus the original scan time value, we have:
Avg. Scan Time with PID loops =
50 mS
50.06 mS
Maintenance
In the new equation above, you calculate the summation term (inside the brackets)
for each loop from 1 to L (last loop), and add the right-most term scan time without
loops only once at the end. Suppose you have a DL05 PLC controlling four loops.
The table below shows the data and summation term values for each loop.
816
PID Loop Operation
The DL05 CPU only does PID calculation on a particular scan for the loop(s) which
have sample time periods that are due for an update (calculation). The built-in loop
scheduler applies the following rules:
S Loops with sample rates 2 seconds are processed at the rate of as
many loops per scan as is required to maintain each loops sample rate.
Specifying loops with fast sample rates will increase the PLC scan time.
So, use this capability only if you need it!
S Loops with sample rates > 2 seconds are processed at the rate of one
or fewer loops per scan, at the minimum rate required to maintain each
loops sample rate.
Maintenance
and Troubleshooting
The implementation of loop calculation scheduling is shown in the flow chart below.
This is a more detailed look at the contents of the Calculate PID Loops task in the
CPU scan activities flow chart. The pointers I and J correspond to the slow (> 2
sec) and fast ( 2 sec) loops, respectively. The flow chart allows the J pointer to
increment from loop 1 to the last loop, if there are any fast loops specified. The I
pointer increments only once per scan, and then only when the next slow loop is due
for an update. In this way, both I and J pointers cycle from 1 to the highest loop
number used, except at different rates. Their combined activity keeps all loops
properly updated.
Loop Sample Times 2 seconds:
No
Loop J
Sample rate 2 sec?
No
Yes
No
Loop I
Time up?
Yes
Loop I
PID Calculation
Loop J
Time up?
Yes
Loop J
PID Calculation
No
J > total
number of loops?
Set I = I+1
Set J = J+1
Yes
Set J = 0
Set I=0
817
PID Loop Operation
The most important knowledge is how to make your product. This knowledge is
the foundation for designing an effective control system. A good process recipe
will do the following:
S Identify all relevant Process Variables, such as temperature, pressure, or
flow rates, etc. which need precise control.
S Plot the desired Setpoint values for each process variables for the duration
of one process cycle.
Step 2:
Plan Loop
Control Strategy
This simply means choosing the method the machine will use to maintain control
over the Process Variables to follow their Setpoints. This involves many issues and
trade-offs, such as energy efficiency, equipment costs, ability to service the machine
during production, and more. You must also determine how to generate the Setpoint
value during the process, and whether a machine operator can change the SP.
Maintenance
Step 4:
After deciding the number of loops, PV variables to measure, and SP values, you
Select I/O Modules can choose the appropriate I/O modules. Refer to the figure on the next page. In
many cases, you will be able to share input or output modules, or use a analog I/O
combination module, among several control loops. The example shown sends the
PV and Control Output signals for two loops through the same set of modules.
We offer DL05 analog input modules with 4 channels per module
that accept 0 20mA or 4 20mA signals. Also, analog input and output combination
modules are now available.
Assuming the control strategy is sound, it is still crucial to properly size the actuators
Step 3:
and properly scale the sensors.
Size and Scale
Loop Components
S Choose an actuator (heater, pump. etc.) which matches the size of the
load. An oversized actuator will have an overwhelming effect on your
process after a SP change. However, an undersized actuator will allow
the PV to lag or drift away from the SP after a SP change or process
disturbance.
S Choose a PV sensor which matches the range of interest (and control)
for our process. Decide the resolution of control you need for the PV
(such as within 2 deg. C), and make sure the sensor input value
provides the loop with at least 5 times that resolution (at LSB level).
However, an over-sensitive sensor can cause control oscillations, etc.
The DL05 provides 12bit and 15bit unipolar and bipolar data format
options, and a 16bit unipolar option. This selection affects SP, PV,
Control Output and Integrator sum.
818
PID Loop Operation
DL05 CPU
V-memory
Input
Module
Digital
Output
Channel 1
PV
Loop 1 Data
OUT
SP
Channel 1
Process 1
Channel 2
Loop 2 Data
PV
OUT
SP
Channel 2
Process 2
Channel 3
Maintenance
and Troubleshooting
Channel 4
Step 5:
Wiring and
Installation
After selection and procurement of all loop components and I/O module(s), you can
perform the wiring and installation. Refer to the wiring guidelines in Chapter 2 of this
Manual, and to the D0OPTIONSM manual. The most common wiring errors when
installing PID loop controls are:
S Reversing the polarity of sensor or actuator wiring connections.
S Incorrect signal ground connections between loop components.
Step 6:
Loop Parameters
After wiring and installation, choose the loop setup parameters. The easiest method
for programming the loop tables is using DirectSOFT32 (3.0c or later). This software
provides PID Setup dialog boxes which simplify the task. Note: It is important to
understand the meaning of all loop parameters mentioned in this chapter before
choosing values to enter.
Step 7:
Check Open Loop
Performance
With the sensor and actuator wiring done, and loop parameters entered, we must
manually and carefully check out the new control system (use Manual Mode).
S Verify that the PV value from the sensor is correct.
S If it is safe to do so, gradually increase the control output up above 0%,
and see if the PV responds (and moves in the correct direction!).
Step 8:
Loop Tuning
If the Open Loop Test (see Loop Tuning on page 838) shows the PV reading is
correct and the control output has the proper effect on the process, you can follow
the closed loop tuning procedure (see Automatic Mode on page 839). In this step,
you tune the loop so the PV automatically follows the SP.
Step 9:
If the closed loop test shows the PV will follow small changes in the SP, consider
Run Process Cycle running an actual process cycle. You will need to have completed the programming
which will generate the desired SP in real time. In this step, you may want to run a
small test batch of product through the machine, watching the SP change according
to the recipe.
WARNING: Be sure the Emergency Stop and power-down provision is readily
accessible, in case the process goes out of control. Damage to equipment and/or
serious injury to personnel can result from loss of control of some processes.
Step 10:
Save Parameters
When the loop tests and tuning sessions are complete, be sure to save all loop setup
parameters to disk.
819
PID Loop Operation
Each PID loop is dependent on the instructions and data values in its respective loop
table. The following diagram shows an example of the loop table locations
corresponding to the main three loop variables: SP, PV, and Control Output. The
example below begins at V2000 (you can use any memory location compatible with
Loop Table requirements). The SP, PV and Control Output are located at the
addresses shown.
Setpoint V+02
+
Error
Term
Loop
Calculation
Setpoint
V2003
XXXX
Process Variable
V2005
XXXX
Control Output
The data for the SP, PV, and Control Output must interface with real-world devices.
In the figure below, the sources or destinations are shown for each loop variable. The
Control Output and Process Variable values move through the analog input/output
combination module to interface with the process itself.
A few rungs of ladder logic are required to copy data from the analog module to the
loop table, or vice versa. Refer to the analog module chapter of this manual for an
example of the required ladder logic.
Setpoint V+02
+
Operator Input
Ramp/soak generator
Ladder Program
Another loops output (cascade)
Analog
Output
Process
The Setpoint has several possible sources, as listed above. Many applications will
use two or more of the sources at different times, depending on the loop mode. In
addition, the loop control strategy and programming method also determine how the
setpoint is generated.
When using the built-in Ramp/Soak generator or when cascading a loop, the PID
controller automatically writes the setpoint data in location V+02 for you. If you want
to use a setpoint from any other source, the ladder program must write that
setpoint to the loop table location V+02.
Each of the three main loop parameters can have only one source or destination at
any given time. During the application development, it is a good idea to draw loop
schematic diagrams showing data sources, etc., to help avoid mistakes.
Maintenance
Setpoint Sources:
Loop
Calculation
Data Sources
V2002
820
PID Loop Operation
Direct Access
to Analog I/O
The loop controller in the DL05 PLC has the ability to directly access analog input
and output values independent of the ladder logic scan. These values represent the
process variable (PV) and the control output. The Direct Access feature makes it
possible for the loop controller to perform closed-loop control while the CPU is in
Program Mode.
The loop controller can read the analog PV value in the selected data format directly
from the desired analog input module and write the control output value in the same or
a different data format to the desired analog output. The Direct Access feature, when
enabled, accesses the analog values only once per PID calculation for each
respective loop. The ladder logic, however, may simultaneously access the same
analog input data by the standard method (LD instruction) or by the pointer method
whenever the CPU is in Run Mode.
NOTE: If PID direct access is used, do not use the analog output pointer logic to send
data to the outputs.
Maintenance
and Troubleshooting
You may optionally configure each loop to access its analog I/O (PV and control
output) by placing proper values in the associated loop table registers. The figure
below shows the loop table parameters at V+36 and V+37 and their role in direct
access to the analog values.
Setpoint V+02
+
Error
S
-
Loop
Calculation
0F XX
V2037
0F XX
0F XX
Channel number, 1 to 4
Stands for Option Module.Slot
You may program these loop table parameters directly, or use the appropriate
DirectSOFT32 dialog box for easy configuring. For example, a value of 0F02 in
register V2036 directs the loop controller to read the PV data from channel 1 of the
analog input module. A value of 0000 in either register tells the loop controller not to
access the corresponding analog value directly. In that case, ladder logic must
transfer the value between the loop table and the analog input module.
If the PV or control output values require some math manipulation by ladder logic,
then it will not be possible to use the direct access function of the loop controller. In
this case, ladder logic will have to perform the math and transfer the data from the
analog module as required.
NOTE: The loop controller restricts the transfer of analog data to or from the module
to one method. In other words, you must designate the analog module for direct
access or ladder logic access.
821
PID Loop Operation
Loop Modes
The DL05 gives you the three standard control modes: Manual, Automatic, and
Cascade. The sources of the three basic variables SP, PV, and control output are
different for each mode. An introduction to the three control modes and their signal
sources follows.
In Manual Mode, the loop is not executing PID calculations (however, loop alarms
are still active). With regard to the loop table, the CPU stops writing values to location
V+05 for that loop. It is expected that an operator or other intelligent source is
manually controlling the output, by observing the PV and writing data to V+05 as
necessary to keep the process under control. The drawing below shows the
equivalent schematic diagram of manual mode operation.
Manual
Auto
In Automatic Mode, the loop operates normally and generates new control output
values. It calculates the PID equation and writes the result in location V+05 every
sample period of that loop. The equivalent schematic diagram is shown below.
Auto
In Cascade Mode, the loop operates as it does in Automatic Mode, with one
important difference. The data source for the SP changes from its normal location at
V+02, using the control output value from another loop. So in Auto or Manual modes,
the loop calculation uses the data at V+02. In Cascade Mode, the loop calculation
reads the control output from another loops parameter table.
Loop
Calculation
Cascaded loop
Control Output V+05
Cascade
Setpoint
+
Normal SP V+02
Loop
Calculation
Control Output
Auto/Manual
Process Variable
As pictured below, A loop can be changed from one mode to another, but cannot go
from Manual Mode directly to Cascade, or vice versa. This mode change is
prohibited because a loop would be changing two data sources at the same time,
and could cause a loss of control.
Manual
Automatic
Cascade
Maintenance
Another loop
Manual
822
PID Loop Operation
The DL05 PLC has the ability to run PID calculations while the CPU is in Program
Mode. Usually, a CPU in Program Mode has halted all operations. However, a DL05
PLC in Program Mode may or may not be running PID calculations (and providing
PID control output), depending on your configuration settings. Having the ability to
run loops independent of the ladder logic makes it feasible to make a ladder logic
change while the process is still running. This is especially beneficial for large-mass
continuous processes that are difficult or costly to interrupt.
Loops that run independent of the ladder scan must have the ability to directly
access the analog module channels for the PV and control output values. The loop
controller does have this capability, which is covered in the section on direct access
of analog I/O (located prior to this section in this chapter).
The relationship between CPU modes and loop modes is depicted in the figure
below. The vertical dashed line shows the optional relationship between the mode
changes. Bit 15 of PID Mode 1 setting word (V+00) determines the selection. If set to
zero so the loop follows the CPU mode, then placing the CPU in Program Mode will
force all loops into Manual Mode. Similarly, placing the CPU in Run mode will allow
each loop to return to the mode it was in previously (which includes Manual,
Automatic, and Cascade). With this selection you automatically affect the modes of
the loops by changing the CPU mode.
Maintenance
and Troubleshooting
CPU Modes:
Program
Mode change
Run
Loop
Modes:
Manual
Mode change
Automatic
Mode change
Cascade
If Bit 15 is set to one, then the loops will run independent of the CPU mode. It is like
having two independent processors in the CPU... one is running ladders and the
other is running the process loops.
NOTE: To make changes to any loop table parameter values, the PID loop must be
in Manual Mode and the PLC must be stopped. If you have selected (as shown
above) to operate the PID loop independent of the CPU mode, then you must take
certain steps to make it possible to make loop parameter changes. You can
temporarily make the loops follow the CPU mode by changing bit 15 to 0. Then your
programming device (such as DirectSOFT32) will be able to place the loop into
Manual Mode. After you change the loops parameter setting, just restore bit 15 to a
value of 1 to re-establish PID operation independent of the CPU.
823
PID Loop Operation
How to Change
Loop Modes
Cascade
Manual
Automatic
The normal state of these mode request bits is 000. To request a mode change, you
must SET the corresponding bit to a 1, for one scan. The PID loop controller
automatically resets the bits back to 000 after it reads the mode change request.
Methods of requesting mode changes are:
S DirectSOFT32s PID View this is the easiest method. Click on one of
the radio buttons, and DirectSOFT32 sets the appropriate bit.
S HPP Use Word Status (WD ST) to monitor the contents of V+00,
which will be a 4-digit BCD/hex value. You must calculate and enter a
new value for V+00 that ORs the correct mode bit with its current value.
S Ladder program ladder logic can request any loop mode when the
PLC is in Run Mode. This will be necessary after application startup.
Go to Auto Mode
X0
B2000.1
SET
Cascade
Control Output
Setpoint
+
Normal Source
Error Term
Loop
Calculation
Auto/Manual
Auto/Cascade
Process Variable
Mode Select
PID Mode
Control
Mode Monitoring
Mode Request
Cascade
Manual
Automatic
Cascade
Manual
Automatic
Maintenance
Control Output
from another loop
824
PID Loop Operation
Since the modes Manual, Auto, and Cascade are the most fundamental and
important PID loop controls, you may want to hard-wire mode control switches to
an operators panel. Most applications will need only Manual and Auto selections
(Cascade is used in a few advanced applications). Remember that mode controls
are really mode request bits, and the actual loop mode is indicated elsewhere.
The following figure shows an operators panel using momentary push-buttons to
request PID mode changes. The panels mode indicators do not connect to the
switches, but interface to the corresponding data locations.
Operator Panel
Control of
PID Modes
Operators Panel
Manual
Auto
Mode Request
PID Mode 1 Setting V+00
Maintenance
and Troubleshooting
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Cascade
Mode Monitoring
If you have selected the option for the loops to follow the PLC mode, the PLC modes
(Program, Run) interact with the loops as a group. The following summarizes this
interaction:
S When the PLC is in Program Mode, all loops are placed in Manual Mode
and no loop calculations occur. However, note that output modules
(including analog outputs) turn off in PLC Program Mode. So, actual
manual control is not possible when the PLC is in Program Mode.
S The only time the CPU will allow a loop mode change is during PLC run
Mode operation. As such, the CPU records the modes of all 16 loops as
the desired mode of operation. If power failure and restoration occurs
during PLC Run Mode, the CPU returns all loops to their prior mode
(which could be Manual, Auto, or Cascade).
S On a Program-to-Run mode transition, the CPU forces each loop to
return to its prior mode recorded during the last PLC Run Mode.
S You can add and configure new loops only when the PLC is in Program
Mode. New loops automatically begin in Manual Mode.
Loop Mode
Override
In normal conditions the mode of a loop is determined by the request to V+00, bits 0,
1, and 2. However, some conditions exist which will prevent a requested mode
change from occurring:
S A loop that is not set independent of PLC mode cannot change modes
when the PLC is in Program mode.
S A major loop of a cascaded pair of loops cannot go from Manual to Auto
until its minor loop is in Cascade mode.
In other situations, the PID loop controller will automatically change the mode of the
loop to ensure safe operation:
S A loop which develops an error condition automatically goes to Manual.
S If the minor loop of a cascaded pair of loops leaves Cascade Mode for
any reason, its major loop automatically goes to Manual Mode.
825
PID Loop Operation
Bumpless
Transfers
In process control, the word transfer has a particular meaning. A loop transfer
occurs when we change its mode of operation, as shown below. When we change
loop modes, what we are really doing is causing a transfer of control of some loop
parameter from one source to another. For example, when a loop changes from
Manual Mode to Automatic Mode, control of the output changes from the operator to
the loop controller. When a loop changes from Automatic Mode to Cascade Mode,
control of the SP changes from its original source in Auto Mode to the output of
another loop (the major loop).
Manual
Operator
generates
loop output
Mode change
Transfer
Mode change
Automatic
Cascade
PID
calculates
loop output
SP
generated
local to loop
Transfer
SP
generated
remotely by
major loop
Transfer
Type
Transfer
Select Bit
PID Algorithm
Manual-to-Auto
Transfer Action
Auto-to-Cascade
Transfer Action
Bumpless
Transfer I
Position
Velocity
Forces SP = PV
Position
none
Velocity
none
none
Maintenance
The characteristics of Bumpless I and II transfer types are listed in the chart below.
Note that their operation also depends on which PID algorithm you are using, the
position or velocity form of the PID equation. Note that you must use Bumpless
Transfer type I when using the velocity form of the PID algorithm.
Bumpless
Transfer II
The basic problem of loop transfers is the two different sources of the loop parameter
being transferred will have different numerical values. This causes the PID
calculation to generate an undesirable step change, or bump on the control output,
thereby upsetting the loop to some degree. The bumpless transfer feature
arbitrarily forces one parameter equal to another at the moment of loop mode
change, so the transfer is smooth (no bump on the control output).
826
PID Loop Operation
In choosing the Process Variable range and resolution, a related choice to make is
the data format of the three main loop variables: SP, PV, and Control Output (the
Integrator sum in V+04 also uses this data format). The four data formats available
are 12 or 15 bit (right justified), signed or unsigned (MSB is sign bit in bipolar
formats). The four binary combinations of bits 0 and 1 of PID Mode 2 word V+01
choose the format. The DirectSOFT32 PID Setup dialog sets these bits
automatically when you select the data format from the menu.
Setpoint V+02
+
Loop
Calculation
Data formats
LSB
Maintenance
and Troubleshooting
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Select data
format using
bits 0 and 1.
00
12 bit unipolar
0 to 0FFF (0 to 4095)
01
12 bit bipolar
10
15 bit unipolar
0 to 32767
11
15 bit bipolar
= sign bit
The data format is a very powerful setting, because it determines the numerical
interface between the PID loop and the PV sensor, and the Control Output device.
The Setpoint must also be in the same data format. Normally, the data format is
chosen during the initial loop configuration and is not changed again.
Choosing Unipolar Choosing the data format involves deciding whether to use unipolar or bipolar
or Bipolar Format numbers. Most applications such as temperature control will use only positive
numbers, and therefore need unipolar format. Usually it is the Control Output which
determines bipolar/unipolar selection. For example, velocity control may include
control of forward and reverse directions. At a zero velocity setpoint the desired
control output is also zero. In that case, bipolar format must be used.
Unipolar
Bipolar
827
PID Loop Operation
Setpoint (SP)
Limits
The Setpoint in loop table location V+02 represents the desired value of the process
variable. After selecting the data format for these variables, you can set limits on the
range of SP values which the loop calculation will use. Many loops have two or more
possible sources writing the Setpoint at various times, and the limits you set will help
safeguard the process from the effects of a bad SP value.
In the figure below, the SP has a selectable limit function, enabled by PID Mode 2
Setting V+01 word, bit 3. If enabled, then locations V+26 and V+27 determine the
lower and upper SP limits, respectively. The loop calculation applies this limit
internally, so it is always possible to write any value to V+02.
No
Limits
Setpoint
With
Limits
Loop
Calculation
Control
Output
Loop Table
XXXX
SP Lower Limit
V+27
XXXX
SP Upper Limit
SP Limits enable
The loop calculation checks these SP upper and lower limits before each
calculation. This means ladder logic can change the limit settings while a process is
in progress, allowing you to keep a tighter guard band on the SP input value.
Maintenance
Handling
Data Offsets
828
PID Loop Operation
Remote Setpoint
(SP) Location
You may recall there are generally several possible data sources for the SP value.
The PID loop controller has the built-in ability to select between two sources
according to the current loop mode. Refer to the figure below. A loop reads its
setpoint from table location V+02 in Auto or Manual modes. If you plan to use
Cascade Mode for the loop at any time, then you must program its loop parameter
table with a remote setpoint pointer.
The Remote SP pointer resides in location V+32 in the loop table. For loops that will
be cascaded (made a minor loop), you will need to program this location with the
address of the major loops Control Output address. Find the starting location of the
major loops parameter table and add offset +05 to it.
Loop Table
V+32
Another loop
(major loop)
Loop
Calculation
XXXX
Remote SP Pointer
Cascaded loop
(minor loop)
Cascade
Setpoint
+
Normal SP V+02
Control Output
Auto/Manual
Maintenance
and Troubleshooting
Loop
Calculation
Process Variable
A DirectSOFT32 Loop Setup dialog box will allow you to enter the Remote SP
pointer if you know the address. Otherwise, you can enter it with a HPP or program it
through ladder logic using the LDA instruction.
The process variable input to each loop is the value the loop is ultimately trying to
Process Variable
(PV) Configuration control, to make it equal to the setpoint and follow setpoint changes as quickly as
possible. Most sensors for process variables have a primarily linear response curve.
Most temperature sensors are mostly linear across their sensing range. However,
flow sensing using an orifice plate technique gives a signal representing
(approximately) the square of the flow. Therefore, a square-root extract function is
necessary before using the signal in a linear control system (such as PID).
Some flow transducers are available which will do the square-root extract, but they
add cost to the sensor package. The PID loop PV input has a selectable square-root
extract function, pictured below. You can select between normal (linear) PV data,
and data needing a square-root extract by using PID Mode setting V+00 word, bit 6.
Setpoint
+
Loop
Calculation
Control Output
Linear PV
Process Variable
1 Squareroot PV
Linear/Square-root PV select
829
PID Loop Operation
Control Output
Configuration
SP Scaling
SP = PV input / 64
0 64
0 4095
15-bit
SP = PV input / 181.02
0 181
0 32767
The Control Output is the numerical result of the PID calculation. All of the other
parameter choices ultimately influence the value of a loops Control Output for each
calculation. Some final processing selections dedicated to the Control Output are
available, shown below. At the far right of the figure, the final output may be restricted
by lower and upper limits that you program. The values for V+30 and V+31 may be
set once using DirectSOFT32s PID Setup dialog box.
The Control Output lower and upper limits can help guard against commanding an
excessive correction to an error when a loop fault occurs (such as PV sensor signal
loss). However, do not use these limits to restrict mechanical motion that might
otherwise damage a machine (use hard-wired limit switches instead).
Control Output
Loop
Calculation
Inverted Output
With
Limits
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Loop Table
V+30
XXXX
V+31
XXXX
Maintenance
Process Variable
PID Mode 1 Setting V+00
PV range
12-bit
Normal Output
Setpoint
SP Range
830
PID Loop Operation
The Error term is internal to the CPUs PID loop controller, and is generated again in
each PID calculation. Although its data is not directly accessible, you can easily
calculate it by subtracting: Error = (SPPV). If the PV square-root extract is enabled,
then Error = (SP (sqrt(PV)). In any case, the size of the error and algebraic sign
determine the next change of the control output for each PID calculation.
Now we will superimpose some special effects on to the error term as described.
Refer to the diagram below. Bit 7 of the PID Mode Setting 1 V+00 word lets you select
a linear or squared error term, and bit 8 enables or disables the error deadband.
Error Term
Configuration
NOTE: When first configuring a loop, its best to use the standard error term. After
the loop is tuned, then you will be able to tell if these functions will enhance control.
Error
Setpoint
+
Error
Term
Error
squared
Error
Error with
Deadband
Loop
Calculation
Maintenance
and Troubleshooting
Process Variable
Loop Table
XXXX
Error Deadband
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Error Squared When selected, the squared error function simply squares the
error term (but preserves the original algebraic sign), which is used in the
calculation. This affects the Control Output by diminishing its response to smaller
error values, but maintaining its response to larger errors. Some situations in which
the error squared term might be useful:
S Noisy PV signal using a squared error term can reduce the effect of
low-frequency electrical noise on the PV, which will make the control
system jittery. A squared error maintains the response to larger errors.
S Non-linear process some processes (such as chemical pH control)
require non-linear controllers for best results. Another application is
surge tank control, where the Control Output signal must be smooth.
Error Deadband When selected, the error deadband function takes a range of
small error values near zero, and simply substitutes zero as the value of the error. If
the error is larger than the deadband range, then the error value is used normally.
Loop parameter location V+23 must be programmed with a desired deadband
amount. Units are the same as the SP and PV units (0 to FFF in 12-bit mode, and 0 to
7FFF in 15-bit mode). The PID loop controller automatically applies the deadband
symmetrically about the zero-error point.
831
PID Loop Operation
PID Algorithms
The ProportionalIntegralDerivative (PID) algorithm is widely used in process
control. The PID method of control adapts well to electronic solutions, whether
implemented in analog or digital (CPU) components. The DL05 CPU implements the
PID equations digitally by solving the basic equations in software. I/O modules serve
only to convert electronic signals into digital form (or vise-versa).
The DL05 features two types of PID controls: position and velocity. These terms
usually refer to motion control situations, but here we use them in a different sense:
S PID Position Algorithm The control output is calculated so it responds
to the displacement (position) of the PV from the SP (error term).
S PID Velocity Algorithm The control output is calculated to represent
the rate of change (velocity) for the PV to become equal to the SP.
The majority of applications will use the position form of the PID equation. If you are
not sure of which algorithm to use, try the Position Algorithm first. Use
DirectSOFT32s PID View Setup dialog box to select the desired algorithm. Or, use
bit 5 of PID Mode 1 Setting V+00 word as shown below to select the algorithm.
Loop Calculation
Position Algorithm
Error
Velocity Algorithm
Process Variable
Control Output
1
Setpoint
Position Algorithm The Position Algorithm causes the PID equation to calculate the Control Output Mn:
n
Mn = Kc * en +
Ki *
S ei + Kr * (en en1) + Mo
i=1
In the formula above, the sum of the integral terms and the initial output are
combined into the Bias term, Mx. Using the bias term, we define formulas for the
Bias and Control Output as a function of sampling time:
Mxo =Mo
Mxn =Ki * en + Mxn1
n
Mn = Ki *
S ei + Mo
i=1
Maintenance
832
PID Loop Operation
Mn = Kc * en +
Ki *
S ei + Kr * (en en1) + Mo
i=1
Control
Output
Integral
Term
Derivative
Term
Initial
Output
Bias
Term
The initial output is the output value assumed from Manual mode control when the
loop transitioned to Auto Mode. The sum of the initial output and the integral term is
the bias term, which holds the position of the output. Accordingly, the Velocity
Algorithm discussed next does not have a bias component.
Velocity Algorithm
Maintenance
and Troubleshooting
Proportional
Term
The Velocity Algorithm form of the PID equation can be obtained by transforming
Position Algorithm formula with subtraction of the equation of (n1)th degree from
the equation of nth degree.
The velocity algorithm variables and related variables are:
Ts = Sample rate
Kc = Proportional gain
Ki = Kc * (Ts/Ti) = coefficient of integral term
Kr = Kc * (Td/Ts) = coefficient of derivative term
Ti = Reset time (integral time)
Td = Rate time (derivative time)
SPn = Set Point for sampling time n (SP value)
PVn = Process variable for sampling time n (PV)
en = SPn PVn = Error term for sampling time n
Mn = Control Output for sampling time n
The resulting equations for the Velocity Algorithm form of the PID equation are:
833
PID Loop Operation
Direct-Acting and
Reverse-Acting
Loops
The gain of a process determines, in part, how it must be controlled. The process
shown in the diagram below has a positive gain, which we call direct-acting. This
means that when the control output increases, the process variable also eventually
increases. Of course, a true process is usually a complex transfer function that
includes time delays. Here, we are only interested in the direction of change of the
process variable in response to a control output change.
Most process loops will be direct-acting, such as a temperature loop. An increase in
the heat applied increases the PV (temperature). Accordingly, direct-acting loops
are sometimes called heating loops.
Direct-Acting Loop
Setpoint
+
Process
Loop
Calculation
Control Output
Process Variable
A reverse-acting loop is one in which the process has a negative gain, as shown
below. An increase in the control output results in a decrease in the PV. This is
commonly found in refrigeration controls, where an increase in the cooling input
causes a decrease in the PV (temperature). Accordingly, reverse-acting loops are
sometimes called cooling loops.
Setpoint
+
Process
Loop
Calculation
Control Output
Process Variable
Maintenance
Reverse-Acting Loop
834
PID Loop Operation
You may recall the introduction of the position and velocity forms of the PID loop
equations. The equations basically show the three components of the PID
calculation. The following figure shows a schematic form of the PID calculation, in
which the control output is the sum of the proportional, integral and derivative terms.
On each calculation of the loop, each term receives the same error signal value.
Loop Calculation
P
Setpoint
+
Error Term
Control Output
S
+
Process Variable
Maintenance
and Troubleshooting
+
+
The role of the P, I, and D terms in the control task are as follows:
S Proportional the proportional term simply responds proportionally to
the current size of the error. This loop controller calculates a
proportional term value for each PID calculation. When the error is zero,
the proportional term is also zero.
S Integral the integrator (or reset) term integrates (sums) the error
values. Starting from the first PID calculation after entering Auto Mode,
the integrator keeps a running total of the error values. For the position
form of the PID equation, when the loop reaches equilibrium and there
is no error, the running total represents the constant output required to
hold the current position of the PV.
S Derivative the derivative (or rate) term responds to change in the
current error value from the error used in the previous PID calculation.
Its job is to anticipate the probable growth of the error and generate a
contribution to the output in advance.
The P, I, and D terms work together as a team. To do that effectively, they will need
some additional instructions from us. The figure below shows the P, I, and D terms
contain programmable gain values kp, ki, and kd respectively. The values reside in
the loop table in the locations shown. The goal of the loop tuning process (covered
later) is to derive gain values that result in good overall loop performance.
NOTE: The proportional gain is also simply called gain, in PID loop terminology.
Loop Calculation
Setpoint
+
Error Term
kp
ki
+
+
+
Process Variable
Loop Table
kd
V+10
XX.XX
Proportional gain
V+11
XX.XX
Integral gain
V+12
XX.XX
Derivative gain
Control Output
835
PID Loop Operation
XX.XX P gain
V+11
XX.XX I gain
0=sec, 1=min.
V+12
XX.XX D gain
sec.
kp
ki
+
+
S
+
kd
Units select
Using a Subset of
PID Control
P
I
D
Each of the P, I, and D gains allows a setting to eliminate that term from the PID
equation. Many applications actually work best by using a subset of PID control. The
figure below shows the various combinations of PID control offered on the DL05. We
do not recommend using any other combination of control, because most of them
are inherently unstable.
P
+
+
S
+
+
+
Maintenance
NOTE: It is very important to know how to increase and decrease the gains. The
proportional and derivative gains are as one might expect... smaller numbers
produce less gains and larger numbers produce more gain. However, the integral
term has a reciprocal gain(1/Ts), so smaller numbers produce more gain and larger
numbers produce less gain. This is very important to know during loop tuning.
In DirectSOFT32s trend view, you can program the gain values and units in realtime
while the loop is running. This is typically done only during the loop tuning process.
Proportional Gain This is the most basic gain of the three. Values range from
0000 to 9999, but they are used internally as xx.xx. An entry of 0000 effectively
removes the proportional term from the PID equation. This accommodates
applications which need integral-only loops.
Integral Gain Values range from 0001 to 9998, but they are used internally as
xx.xx. An entry of 0000 or 9999causes the integral gain to be R, effectively
removing the integrator term from the PID equation. This accommodates
applications which need proportional-only loops. The units of integral gain may be
either seconds or minutes, as shown above.
Derivative Gain Values range from 0001 to 9999, but they are used internally as
xx.xx. An entry of 0000 allows removal of the derivative term from the PID equation
(a common practice). This accommodates applications which need proportional
and/or integral-only loops. The derivative term has an optional gain limiting feature,
discussed in the next section.
836
PID Loop Operation
The derivative term is unique in that it has an optional gain-limiting feature. This is
provided because the derivative term reacts badly to PV signal noise or other causes
of sudden PV fluctuations. The function of the gain-limiting is shown in the diagram
below. Use bit 9 of PID Mode 1 Setting V+00 word to enable the gain limit.
Derivative Gain
Limiting
Loop Calculation
Proportional
P
Setpoint
+
Error Term
+
+
Integral
Derivative
Control
Output
Process Variable
Derivative,
gain-limited
Loop Table
V+25
00XX
Maintenance
and Troubleshooting
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
The derivative gain limit in location V+25 must have a value between 0 and 20, in
BCD format. This setting is operational only when the enable bit = 1.
The gain limit can be particularly useful during loop tuning. Most loops can tolerate
only a little derivative gain without going into wild oscillations.
Bias Term
In the widely-used position form of the PID equation, an important component of the
control output value is the bias term shown below. Its location in the loop table is in
V+04. the loop controller writes a new bias term after each loop calculation.
n
Mn = Kc * en +
Ki *
S ei + Kr * (en en1) + Mo
i=1
Control
Output
Proportional
Term
V+04
XXXX
Bias term
Integral
Term
Derivative
Term
Initial
Output
Bias Term
If we cause the error (en) to go to zero for two or more sample periods, the
proportional and derivative terms cancel. The bias term is the sum of the integral
term and the initial output (Mo). It represents the steady, constant part of the control
output value, and is similar to the DC component of a complex signal waveform.
The bias term value establishes a working region for the control output. When the
error fluctuates around its zero point, the output fluctuates around the bias value.
This concept is very important, because it shows us why the integrator term must
respond more slowly to errors than either the proportional or derivative terms.
837
PID Loop Operation
Bias Freeze
PV
0
PV loss
PV loss
Reset windup
Bias
Output
Recovery time
Recovery time
Bias freeze
select
In the feedforward method discussed later in this chapter, ladder logic writes directly
to the bias term value. However, there is no conflict with the freeze bias feature,
because bias term writes due to feedforward are relatively infrequent when in use.
Maintenance
NOTE: The bias freeze feature stops the bias term from changing when the control
output reaches the end of the data range. If you have set limits on the control output
other than the range (i.e, 04095 for a unipolar/12bit loop), the bias term still uses the
end of range for the stopping point and bias freeze will not work.
In the second PV signal loss episode in the figure, the freeze bias feature is enabled.
It causes the bias value to freeze when the control output goes out of bounds. Much
of the reset windup is thus avoided, and the output recovery time is much less.
838
PID Loop Operation
Maintenance
and Troubleshooting
This is perhaps the most important step in closed-loop process control. The goal of a
loop tuning procedure is to adjust the loop gains so the loop has optimal
performance in dynamic conditions. The quality of a loops performance may
generally be judged by how well the PV follows the SP after a SP step change.
Auto Tuning versus Manual Tuning you may change the PID gain values directly
(manual tuning), or you can have the PID processing engine in the CPU
automatically calculate the gains (auto tuning). Most experienced process
engineers will have a favorite method, and the DL05 will accommodate either
preference. The use of the auto tuning can eliminate much of the trial-and-error of
the manual tuning approach, especially if you do not have a lot of loop tuning
experience. However, note that performing the auto tuning procedure will get the
gains close to optimal values, but additional manual tuning changes can take the
gain values to their optimal values.
WARNING: Only authorized personnel fully familiar with all aspects of the process
should make changes that affect the loop tuning constants. Using the loop auto tune
procedures will affect the process, including inducing large changes in the control
output value. Make sure you thoroughly consider the impact of any changes to
minimize the risk of injury to personnel or damage to equipment. The auto tune in the
DL05 is not intended to perform as a replacement for your process knowledge.
Open-Loop Test
Whether you use manual or auto tuning, it is very important to verify basic
characteristics of a newly-installed process before attempting to tune it. With the
loop in Manual Mode, verify the following items for each new loop.
S Setpoint verify the source which is to generate the setpoint can do so.
You can put the PLC in Run Mode, but leave the loop in Manual Mode.
Then monitor the loop table location V+02 to see the SP value(s). The
ramp/soak generator (if you are using it) should be tested now.
S Process Variable verify the PV value is an accurate measurement,
and the PV data arriving in the loop table location V+03 is correct. If the
PV signal is very noisy, consider filtering the input either through
hardware (RC low-pass filter), or using a digital S/W filter.
S Control Output if it is safe to do so, manually change the output a
small amount (perhaps 10%) and observe its affect on the process
variable. Verify the process is direct-acting or reverse acting, and check
the setting for the control output (inverted or non-inverted). Make sure
the control output upper and lower limits are not equal to each other.
S Sample Rate while operating open-loop, this is a good time to find the
ideal sample rate (procedure give earlier in this chapter). However, if
you are going to use auto tuning, note the auto tuning procedure will
automatically calculate the sample rate in addition to the PID gains.
The discussion beginning on the following page covers the manual tuning
procedure. If want to perform only auto tuning, please skip the next section and
proceed directly to the section on auto tuning.
839
PID Loop Operation
Manual Tuning
Procedure
Now comes the exciting moment when we actually close the loop (go to Auto Mode)
for the first time. Use the following checklist before switching to Auto mode:
S Monitor the loop parameters with a loop trending instrument. We
recommend using the PID view feature of DirectSOFT.
NOTE: We recommend using the PID trend view setup menu to select the vertical
scale feature to manual, for both SP/PV area and Bias/Control Output areas. The
auto scaling feature will otherwise change the vertical scale on the process
parameters and add confusion to the loop tuning process.
S
S
Adjust the gains so the Proportional Gain = 10, Integrator Gain = 9999,
and Derivative Gain =0000. This disables the integrator and derivative
terms, and provides a little proportional gain.
Check the bias term value in the loop parameter table (V+04). If it is not
zero, then write it to zero using DirectSOFT32 or HPP, etc.
Now we can transition the loop to Auto Mode. Check the mode monitoring bits to
verify its true mode. If the loop will not stay in Auto Mode, check the troubleshooting
tips at the end of this chapter.
CAUTION: If the PV and Control Output values begin to oscillate, reduce the gain
values immediately. If the loop does not stabilize immediately, then transfer the loop
back to Manual Mode and manually write a safe value to the control output. During
the loop tuning procedure, always be near the Emergency Stop switch which
controls power to the loop actuator in case a shutdown is necessary.
If the control output value changed, the loop should be getting more
energy from the actuator, heater, or other device. Soon the PV should
move in the direction of the SP. If the PV does not change, then
increase the proportional gain until it moves slightly.
Now, add a small amount of integral gain. Remember that large
numbers are small integrator gains and small numbers are large
integrator gains! After this step, the PV should = SP, or be very close.
Until this point we have only used proportional and integrator gains. Now we can
bump the process (change the SP by 10%), and adjust the gains so the PV has an
optimal response. Refer to the figure below. Adjust the gains according to what you
see on the PID trend view. The critically- damped response shown gives the fastest
PV response without oscillating.
Maintenance
840
PID Loop Operation
S
S
S
10% of
SP range
over-damped response
critically-damped response
Maintenance
and Troubleshooting
SP
PV
under-damped response
Now you may want to add a little derivative gain to further improve the
critically-damped response above. Note the proportional and integral gains will be
very close to their final values at this point. Adding some derivative action will allow
you to increase the proportional gain slightly without causing loop oscillations. The
derivative action tends to tame the proportional response slightly, so adjust these
gains together.
Auto Tuning
Procedure
841
PID Loop Operation
The controls for the auto tuning function use three bits in the PID Mode 2 word V+01,
as shown below. DirectSOFT32 will manipulate these bits automatically when you
use the auto tune feature within DirectSOFT. Or, you may have ladder logic access
these bits directly for allowing control from another source such as a dedicated
operator interface. The individual control bits let you to start the auto tune procedure,
select PID or PI tuning, and select closed-loop or open-loop tuning. If you select PI
tuning, the auto tune procedure leaves the derivative gain at 0. The Loop Mode and
Alarm Status word V+06 reports the auto tune status as shown. Bit 12 will be on (1)
when during the auto tuning cycle, automatically returning to off (0) when done.
Auto Tune Function
Auto Tuning
Controls
Auto Tune
Active
0=PID tuning,
1=open PI tuning
Auto Tune
Error
0=closed loop,
1=open loop
Auto Tuning
Status
Loop Mode and Alarm Status V+06
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PLC System
Process Variable
Response
Open-Loop Auto Tuning During an open-loop auto tuning cycle, the loop
controller operates as shown in the diagram below. Before starting this procedure,
place the loop in Manual mode and ensure the PV and control output values are in
the middle of their ranges (away from the end points).
Step Function
Open Loop
Auto Tuning
Error Term
Loop
Calculation
Control
Output
Manufacturing
Process
Process Variable
NOTE: In theory, the SP value does not matter in this case, because the loop is not
closed. However, the firmware requires that the SP value be more than 205 counts
away from the PV value before starting the auto tune cycle (205 counts or more
below the SP for forward-acting loops, or 205 counts or more above the SP for
reverse-acting loops).
When auto tuning, the loop controller induces a step change on the output and
simply observes the response of the PV. From the PV response, the auto tune
function calculates the gains and the sample time. It automatically places the results
in the corresponding registers in the loop table.
Maintenance
Setpoint Value
842
PID Loop Operation
The following timing diagram shows the events which occur in the open-loop auto
tuning cycle. The auto tune function takes control of the control output and induces a
10%-of-span step change. If the PV change which the loop controller observes is
less than 2%, then the step change on the output is increased to 20%-of-span.
Open Loop Auto Tune Cycle Wave: Step Response Method
PV
(%)
SP
Tangent
Rr = Slope
Process Wave
Base Line
LrRr
(%)
Lr
(sec.)
Time (sec)
Step Change Dm=10%
Output Value
(%)
Auto Tune Cycle
Maintenance
and Troubleshooting
PID Cycle
PID Cycle
Auto Tune Start
When the loop tuning observations are complete, the loop controller computes Rr
(maximum slope in %/sec.) and Lr (dead time in sec). The auto tune function
computes the gains according to the Ziegler-Nichols equations, shown below:
PID tuning:
PI tuning:
P = 1.2 * Dm/LrRr
I = 2.0 * Lr
P = 0.9 * Dm/LrRr
I = 3.33 * Lr
D = 0.5 * Lr
Sample Rate = 0.056 * Lr
D=0
Sample Rate = 0.12 * Lr
We highly recommend using DirectSOFT32 for the auto tuning interface. The
duration of each auto tuning cycle will depend on the mass of our process. A
slowly-changing PV will result in a longer auto tune cycle time. When the auto tuning
is complete, the proportional, integral, and derivative gain values are automatically
updated in loop table locations V+10, V+11, and V+12 respectively. The sample time
in V+07 is also updated automatically. You can test the validity of the values the auto
tuning procedure yields by measuring the closed-loop response of the PV to a step
change in the output. The instructions on how to do this are in the section on the
manual tuning procedure (located prior to this section on auto tuning).
843
PID Loop Operation
Closed-Loop Auto Tuning During a closed-loop auto tuning cycle, the loop
controller operates as shown in the diagram below.
PLC System
Process Variable
Response
Setpoint Value
+
Error Term
Loop
Calculation
Control
Output
Manufacturing
Process
Process Variable
When auto tuning, the loop controller imposes a square wave on the output. Each
transition of the output occurs when the PV value crosses over (or under) the SP
value. Therefore, the frequency of the limit cycle is roughly proportional to the mass
of the process. From the PV response, the auto tune function calculates the gains
and the sample time. It automatically places the results in the corresponding
registers in the loop table.
The following timing diagram shows the events which occur in the closed-loop auto
tuning cycle. The auto tune function examines the direction of the offset of the PV
from the SP. The auto tune function then takes control of the control output and
induces a full-span step change in the opposite direction. Each time the sign of the
error (SP PV) changes, the output changes full-span in the opposite direction. This
procedes through three full cycles.
Closed Loop Auto Tune Cycle Wave: Limit Cycle Method
Xo
SP
PV
Maintenance
Process Wave
Output Value
M
To
PID Cycle
PID Cycle
Calculation of
PID parameter
*Mmax = Output Value upper limit setting Mmin = Output Value lower limit setting.
* This example is directacting. When set at reverseacting, output is inverted.
844
PID Loop Operation
When the loop tuning observations are complete, the loop controller computes To
(bump period) and Xo (amplitude of the PV). Then it uses these values to compute
Kpc (sensitive limit) and Tpc (period limit). From these values, the loop controller
auto tune function computes the PID gains and the sample rate according to the
Ziegler-Nichols equations shown below:
Kpc = 4M / ( * Xo)
Tpc = 0
M = amplitude of output
PID tuning:
PI tuning:
P = 0.45 * Kpc
I = 0.60 * Tpc
P = 0.30 *Kpc
I = 1.00 * Tpc
D = 0.10 * Tpc
Sample Rate = 0.014 * Tpc
D=0
Sample Rate = 0.03 * Tpc
Maintenance
and Troubleshooting
Auto tuning error if the auto tune error bit (bit 13 of Loop Mode and Alarm status
word V+06) is on, please verify the PV and SP values are within 5% of full scale
difference, as required by the auto tune function. The bit will also turn on if the
closed-loop method is in use, and the output goes to the limits of the range.
NOTE: If your PV fluctuates rapidly, you probably need to use the built-in analog filter
(see page 845) or create a filter in ladder logic (see example on page 846).
Tuning
Cascaded Loops
In tuning cascaded loops, we will need to de-couple the cascade relationship and
tune the loops individually, using one of the loop tuning procedures previously
covered.
1. If you are not using auto tuning, then find the loop sample rate for the
minor loop, using the method discussed earlier in this chapter. Then set
the sample rate of the major loop slower than the minor loop by a factor
of 10. Use this as a starting point.
2. Tune the minor loop first. Leave the major loop in Manual Mode, and
you will need to generate SP changes for the minor loop manually as
described in the loop tuning procedure.
3. Verify the minor loop gives a critically-damped response to a 10% SP
change while in Auto Mode. Then we are finished tuning the minor loop.
4. In this step, you will need to get the minor loop in Cascade Mode, and
then the Major loop in Auto Mode. We will be tuning the major loop with
the minor loop treated as a series component its overall process.
Therefore, do not go back and tune the minor loop again while tuning
the major loop.
5. Tune the major loop, following the standard loop tuning procedure in
this section. The response of the major loop PV is actually the overall
response of the cascaded loops together.
845
PID Loop Operation
PV Analog Filter
A noisy PV signal can make tuning difficult and can cause the control output to be
more extreme than necessary, as the output tries to respond to the peaks and
valleys of the PV. There are two equivalent methods of filtering the PV input to make
the loop more stable. The first method is accomplished using the DL05s built-in
filter. The second method achieves a similar result using ladder logic.
The DL05 provides a selectable first-order low-pass PV input filter which can be
particularly helpful during auto tuning, using the closed-loop method. Shown in the
figure below, we strongly recommend the use of a filter during auto tuning. You
may disable the filter after auto tuning is complete, or continue to use it if the PV input
signal is noisy.
Setpoint
+
Loop
Calculation
Control Output
Unfiltered
PV
Process Variable
Filtered
PV
Loop Table
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
PV filter
enable/disable
V+24
XXXX
FIlter constant
Bit 2 of PID Mode Setting 2 provides the enable/disable control for the low-pass PV
filter (0=disable, 1=enable). The roll-off frequency of the single-pole low-pass filter is
controlled by using register V+24 in the loop parameter table, the filter constant. The
data format of the filter constant value is BCD, with an implied decimal point 00X.X,
as follows:
We highly recommend using DirectSOFT32 for the auto tuning interface. The
duration of each auto tuning cycle will depend on the mass of your process. A
slowly-changing PV will result in a longer auto tune cycle time.
When the auto tuning is complete, the proportional, integral, and derivative gain
values are automatically updated in loop table locations V+10, V+11, and V+12
respectively. The sample time in V+07 is also updated automatically. You can test
the validity of the values the auto tuning procedure yields by measuring the
closed-loop response of the PV to a step change in the output. The instructions on
how to do this are in the section on the manual tuning procedure.
Maintenance
S
S
846
PID Loop Operation
A similar algorithm can be built in your ladder program. Your analog inputs can be
filtered effectively using either method. The following programming example
describes the ladder logic you will need. Be sure to change the example memory
locations to those that fit your application.
Filtering can induce a 1 part in 1000 error in your output because of rounding. If
your process cannot tolerate a 1 part in 1000 error, do not use filtering. Because of
the rounding error, you should not use zero or full scale as alarm points. Additionally,
the smaller the filter constant the greater the smoothing effect, but the slower the
response time. Be sure a slower response is acceptable in controlling your process.
SP1
V2200
OUT
V1400
LD
V2200
SUB
V2003
LD
K2
V2003
MUL
V1400
Maintenance
and Troubleshooting
DIV
K10
V2200
V2003
ADD
V2003
OUT
V2003
LD
V2003
SUB
V2200
MUL
V1400
DIV
K10
ADD
V2200
OUT
V2003
END
847
PID Loop Operation
Feedforward Control
Feedforward control is an enhancement to standard closed-loop control. It is most
useful for diminishing the effects of a quantifiable and predictable loop disturbance
or sudden change in setpoint. Use of this feature is an option available to you on the
DL05. However, its best to implement and tune a loop without feedforward, and
adding it only if better loop performance is still needed. The term feed-forward
refers to the control technique involved, shown in the diagram below. The incoming
setpoint value is fed forward around the PID equation, and summed with the output.
Feedforward path
kf
+
Setpoint
+
Loop
Calculation
Control Output
Process Variable
Loop Calculation
kp
Setpoint
+
Error Term
ki
+
+
S
+
Process Variable
V+04
XXXX Bias Term
kd
Control Output
Maintenance
Feedforward is very easy to use in the DL05 loop controller, as shown below. The
bias term has been made available to the user in a special read/write location, at PID
Parameter Table location V+04.
In the previous section on the bias term, we said that the bias term value establishes
a working region or operating point for the control output. When the error fluctuates
around its zero point, the output fluctuates around the bias value. Now, when there
is a change in setpoint, an error is generated and the output must change to a new
operating point. This also happens if a disturbance introduces a new offset in the
loop. The loop does not really know its way to the new operating point... the
integrator (bias) must increment/decrement until the error disappears, and then the
bias has found the new operating point.
Suppose that we are able to know a sudden setpoint change is about to occur
(common in some applications). We can avoid much of the resulting error in the first
place, if we can quickly change the output to the new operating point. If we know
(from previous testing) what the operating point (bias value) will be after the setpoint
change, we can artificially change the output directly (which is feedforward). The
benefits from using feedforward are:
S The SPPV error is reduced during predictable setpoint changes or loop
offset disturbances.
S Proper use of feedforward will allow us to reduce the integrator gain.
Reducing integrator gain gives us an even more stable control system.
848
PID Loop Operation
To change the bias (operating point), ladder logic only has to write the desired value
to V+04. The PID loop calculation first reads the bias value from V+04 and modifies
the value based on the current integrator calculation. Then it writes the result back to
location V+04. This arrangement creates a sort of transparent bias term. All you
have to do to implement feed forward control is write the correct value to the bias
term at the right time (the example below shows you how).
NOTE: When writing the bias term, one must be careful to design ladder logic to
write the value only once, at the moment when the new bias operating point is to
occur. If ladder logic writes the bias value on every scan, the loops integrator is
effectively disabled.
Maintenance
and Troubleshooting
Feedforward
Example
How do we know when to write to the bias term, and what value to write? Suppose we
have an oven temperature control loop, and we have already tuned the loop for
optimal performance. Refer to the figure below. We notice that when the operator
opens the oven door, the temperature sags a bit while the loop bias adjusts to the
heat loss. Then when the door closes, the temperature rises above the SP until the
loop adjusts again. Feedforward control can help diminish this effect.
Oven Closed
door
Open
PV
PV sags
Closed
PV excess
Bias
First, we record the amount of bias change the loop controller generates when the
door opens or closes. Then, we write a ladder program to monitor the position of an
oven door limit switch. When the door opens, our ladder program reads the current
bias value from V+04, adds the desired change amount, and writes it back to V+04.
When the door closes, we duplicate the procedure, but subtracting desired change
amount instead. The following figure shows the results.
Oven Closed
door
Open
Closed
PV
Feed-forward
Feed-forward
Bias
The step changes in the bias are the result of our two feed-forward writes to the bias
term. We can see the PV variations are greatly reduced. The same technique may
be applied for changes in setpoint.
849
PID Loop Operation
Time-Proportioning Control
The PID loop controller in the DL05 CPU generates a smooth control output signal
across a numerical range. The control output value is suitable to drive an analog
output module, which connects to the process. In the process control field, this is
called continuous control, because the output is on (at some level) continuously.
While continuous control can be smooth and robust, the cost of the loop components
(such as actuators, heater amplifiers) can be expensive. A simpler form of control is
called time-proportioning control. This method uses actuators which are either on or
off (no in-between). Loop components for on/off-based control systems are lower
cost than their continuous control counterparts.
In this section, we will show you how to convert the control output of a loop to
time-proportioning control for the applications that need it. Lets take a moment to
review how alternately turning a load on and off can control a process. The diagram
below shows a hot-air balloon following a path across some mountains. The desired
path is the setpoint. The balloon pilot turns the burner on and off alternately, which is
his control output. The large mass of air in the balloon effectively averages the effect
of the burner, converting the bursts of heat into a continuous effect: slowly changing
balloon temperature and ultimately the altitude, which is the process variable.
PID Loop Operation
period
Desired
Effect
On/Off
Control
On
Off
If we were to plot the on/off times of the burner in the hot-air balloon, we would
probably see a very similar relationship to its effect on balloon temperature and
altitude.
Maintenance
850
PID Loop Operation
On/Off Control
Program Example
SP
+
The following ladder segment provides a time proportioned on/off control output. It
converts the continuous output in V2005 to on/off control using the output coil, Y0.
Loop
Calculation
Time
Proportioning
V2005
continuous
PV
Y0
Process
P
V
on/off
The example program uses two timers to generate On/Off control. It makes the
following assumptions, which you can alter to fit your application:
S The loop table starts at V2000, so the control output is at V2005.
S The data format of the control output is 12-bit, unipolar (0 FFF).
S The time base (one full cycle) for the On/Off waveform is 10 seconds.
We use a fast timer (0.01 sec/tick), counting to 1000 ticks (10 seconds).
S The On/Off control output is Y0.
The time proportioning program must match the resolution of the output (1 part in
1000) to the resolution of the time base of T0 (also 1 part in 1000).
NOTE: Some processes change too fast for time proportioning control. Consider the
speed of your process when you choose this control method. Use continuous control
for processes that change too fast for time proportioning control.
T0
TMRF
T0
K1000
T0
LD
V2005
T0
T1
TA1
K0
Maintenance
and Troubleshooting
BCD
DirectSOFT32
Use a fast timer (0.01 sec. resolution) for the main time
base. The K1000 provides a preset of 10 seconds. The
N.C. T0 contact makes this self-resetting. T0 is on for
one scan each 10 seconds.
MUL
K1000
DIV
K4095
OUT
V1400
TMRF
T1
V1400
Y0
OUT
END
851
PID Loop Operation
Cascade Control
Cascaded loops are an advanced control technique that is superior to individual loop
control in certain situations. As the name implies, cascade means that one loop is
connected to another loop. In addition to Manual (open loop) and Auto (closed loop)
Modes, the DL05 also provides Cascaded Mode.
Introduction
Process A
Intermediate
Variable
Process B
Process
Variable (PV)
Setpoint
+
Loop B
Calculation
Output B/
Setpoint A
+
Loop A
Calculation
Output A
Process A
(secondary)
External
Disturbances
Process B
(primary)
Major
Loop
Minor
Loop
PV, Process A
PV, Process B
One of the benefits to cascade control can be seen by examining its response to
external disturbances. Remember the minor loop is faster acting than the major
loop. Therefore, if a disturbance affects process A in the minor loop, the Loop A PID
calculation can correct the resulting error before the major loop sees the effect.
Maintenance
External
Disturbances
The principle of cascaded loops is simply that we add another process loop to more
precisely control the intermediate variable! This separates the source of the control
lag into two parts, as well.
The diagram below shows a cascade control system, showing that it is simply one
loop nested inside another. The inside loop is called the minor loop, and the outside
loop is called the major loop. For overall stability, the minor loop must be the fastest
responding loop of the two. We do have to add the additional sensor to measure the
intermediate variable (PV for process A). Notice the setpoint for the minor loop is
automatically generated for us, by using the output of the major loop. Once the
cascaded control is programmed and debugged, we only need to deal with the
original setpoint and process variable at the system level. The cascaded loops
behave as one loop, but with improved performance over the previous single-loop
solution.
852
PID Loop Operation
Cascaded Loops in In the use of the term cascaded loops, we must make an important distinction. Only
the minor loop will actually be in the Cascade Mode. In normal operation, the major
the DL05 CPU
loop must be in Auto Mode. If you have more than two loops cascaded together, the
outer-most (major) loop must be in Auto Mode during normal operation, and all inner
loops in Cascade Mode.
NOTE: Technically, both major and minor loops are cascaded in strict process
control terminology. Unfortunately, we are unable to retain this convention when
controlling loop modes. Remember that all minor loops will be in Cascade Mode, and
only the outer-most (major) loop will be in Auto Mode.
You can cascade together as many loops as necessary on the DL05, and you may
have multiple groups of cascaded loops. For proper operation on cascaded loops
you must use the same data range (12/15 bit) and unipolar/bipolar settings on the
major and minor loop.
To prepare a loop for Cascade Mode operation as a minor loop, you must program its
remote Setpoint Pointer in its loop parameter table location V+32, as shown below.
The pointer must be the address of the V+05 location (control output) of the major
loop. In Cascade Mode, the minor loop will ignore the its local SP register (V+02),
and read the major loops control output as its SP instead.
Maintenance
and Troubleshooting
Loop Table
Loop Table
V+02
XXXX
SP
V+02
XXXX
SP
V+03
XXXX
PV
V+03
XXXX
PV
V+05
XXXX
Control Output
V+05
XXXX
Control Output
V+32
XXXX
Remote SP Pointer
When using DirectSOFT32s PID View to watch the SP value of the minor loop,
DirectSOFT32 automatically reads the major loops control output and displays it for
the minor loops SP. The minor loops normal SP location, V+02, remains
unchanged.
Now, we use the loop parameter arrangement above and draw its equivalent loop
schematic, shown below.
Major loop
Loop
Calculation
Setpoint
+
Local SP
V+02
Loop
Calculation
Control
Output
Auto/Manual
Process Variable
Remember that a major loop goes to Manual Mode automatically if its minor loop is
taken out of Cascade Mode.
853
PID Loop Operation
Process Alarms
The performance of a process control loop may be generally measured by how
closely the process variable matches the setpoint. Most process control loops in
industry operate continuously, and will eventually lose control of the PV due to an
error condition. Process alarms are vital in early discovery of a loop error condition,
and can alert plant personnel to manually control a loop or take other measures until
the error condition has been repaired.
The DL05 CPU has a sophisticated set of alarm features for each loop:
S PV Absolute Value Alarms monitors the PV with respect to two lower
limit values and two upper limit values. It generates alarms whenever
the PV goes outside these programmed limits.
S PV Deviation Alarm monitors the PV value as compared to the SP. It
alarms when the difference between the PV and SP exceed the
programmed alarm value.
S PV Rate-of-change Alarm computes the rate-of-change of the PV,
and alarms if it exceeds the programmed alarm amount
S Alarm Hysteresis works in conjunction with the absolute value and
deviation alarms to eliminate alarm chatter near alarm thresholds.
Setpoint
+
Error Term
Loop
Calculation
Control Output
Maintenance
Process Variable
1
0
Alarm Generation
PV Value
1
PV Deviation
0
1
PV Rate-of-change
Enable Alarms
The alarm thresholds are fully programmable, and each type of alarm may be
independently enabled and monitored. The following diagram shows the PV
monitoring function. Bits 12, 13, and 14 of PID Mode 1 Setting V+00 word in the loop
parameter table to enable/disable the alarms. DirectSOFT32s PID View setup
dialog screens allow easy programming, enabling, and monitoring of the alarms.
Ladder logic may monitor the alarm status by examining bits 3 through 9 of PID
Mode and alarm Status word V+06 in the loop table.
Monitor Alarms
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Alarm Bits
Unlike the PID calculations, the alarms are always functioning any time the CPU is in
Run Mode. The loop may be in Manual, Auto, or Cascade, and the alarms will be
functioning if the enable bit(s) as listed above are set =1.
854
PID Loop Operation
PV Absolute
Value Alarms
The PV absolute value alarms are organized as two upper and two lower alarms.
The alarm status is false as long as the PV value remains in the region between the
upper and lower alarms, as shown below. The alarms nearest the safe zone are
named High Alarm and Low Alarm. If the loop loses control, the PV will cross one of
these thresholds first. Therefore, you can program the appropriate alarm threshold
values in the loop table locations shown below to the right. The data format is the
same as the PV and SP (12-bit or 15-bit). The threshold values for these alarms
should be set to give an operator an early warning if the process loses control.
Highhigh Alarm
Loop Table
High Alarm
PV
Low Alarm
Lowlow Alarm
XXXX
High-high Alarm
V+15
XXXX
High Alarm
V+14
XXXX
Low Alarm
V+13
XXXX
Low-low Alarm
If the process remains out of control for some time, the PV will eventually cross one
of the outer alarm thresholds, named High-high alarm and Low-low alarm. Their
threshold values are programmed using the loop table registers listed above. A
High-high or Low-low alarm indicates a serious condition exists, and needs the
immediate attention of the operator.
V+16
High-high Alarm
High Alarm
Low Alarm
Low-low Alarm
The PV Deviation Alarms monitor the PV deviation with respect to the SP value. The
deviation alarm has two programmable thresholds, and each threshold is applied
equally above and below the current SP value. In the figure below, the smaller
deviation alarm is called the Yellow Deviation, indicating a cautionary condition for
the loop. The larger deviation alarm is called the Red Deviation, indicating a strong
error condition for the loop. The threshold values use the loop parameter table
locations V+17 and V+20 as shown.
Red Deviation Alarm
Red
Yellow
Green
SP
Yellow Deviation Alarm
Red Deviation Alarm
Loop Table
V+17
XXXX
V+20
XXXX
Yellow
Red
The thresholds define zones, which fluctuate with the SP value. The green zone
which surrounds the SP value represents a safe (no alarm) condition. The yellow
zones lie outside the green zone, and the red zones are beyond those.
855
PID Loop Operation
Red Deviation
Yellow Deviation
The PV Deviation Alarm can be independently enabled and disabled from the other
PV alarms, using bit 13 of the PID Mode 1 Setting V+00 word.
Remember the alarm hysteresis feature works in conjunction with both the deviation
and absolute value alarms, and is discussed at the end of this section.
PV slope OK
Loop Table
PV slope excessive
V+21
XXXX
PV Rate-of-Change Alarm
PV
PID Mode and Alarm Status V+06
rate-of-change alarm
PV Rate-of-Change One powerful way to get an early warning of a process fault is to monitor the
rate-of-change of the PV. Most batch processes have large masses and
Alarm
slowly-changing PV values. A relatively fast-changing PV will result from a broken
signal wire for either the PV or control output, a SP value error, or other causes. If the
operator responds to a PV Rate-of-Change Alarm quickly and effectively, the PV
absolute value will not reach the point where the material in process would be ruined.
The DL05 loop controller provides a programmable PV Rate-of-Change Alarm, as
shown below. The rate-of-change is specified in PV units change per loop sample
time. This value is programmed into the loop table location V+21.
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Sample time
Sample time
Alarm Rate-of-Change =
15 degrees
1 minute
10 counts / degree
30 loop samples / min.
150
30
From the calculation result, we would program the value 5 in the loop table for the
rate-of-change. The PV Rate-of-Change Alarm can be independently enabled and
disabled from the other PV alarms, using bit 14 of the PID Mode 1 Setting V+00 word.
The alarm hysteresis feature (discussed next) does not affect the Rate-of-Change
Alarm.
Maintenance
PV Rate of
Change Alarm
856
PID Loop Operation
PV Alarm
Hysteresis
The PV Absolute Value Alarm and PV Deviation Alarm are programmed using
threshold values. When the absolute value or deviation exceeds the threshold, the
alarm status becomes true. Real-world PV signals have some noise on them, which
can cause some fluctuation in the PV value in the CPU. As the PV value crosses an
alarm threshold, its fluctuations cause the alarm to be intermittent and annoy
process operators. The solution is to use the PV Alarm Hysteresis feature.
The PV Alarm Hysteresis amount is programmable from 1 to 200 (hex). When using
the PV Deviation Alarm, the programmed hysteresis amount must be less than the
programmed deviation amount. The figure below shows how the hysteresis is
applied when the PV value goes past a threshold and descends back through it.
Alarm threshold
Hysteresis
Loop Table
PV
V+22
XXXX
PV Alarm Hysteresis
Maintenance
and Troubleshooting
Alarm 1
0
The hysteresis amount is applied after the threshold is crossed, and toward the safe
zone. In this way, the alarm activates immediately above the programmed threshold
value. It delays turning off until the PV value has returned through the threshold by
the hysteresis amount.
Alarm
Programing Error
857
PID Loop Operation
Ramp/Soak Generator
Introduction
Our discussion of basic loop operation noted the setpoint for a loop will be generated
in various ways, depending on the loop operating mode and programming
preferences. In the figure below, the ramp / soak generator is one of the ways the SP
may be generated. It is the responsibility of your ladder program to ensure only one
source attempts to write the SP value at V+02 at any particular time.
Setpoint Sources:
Operator Input
Ramp/soak generator
Ladder Program
Another loops output (cascade)
Setpoint V+02
+
Loop
Calculation
Control Output
Process Variable
If the SP for your process rarely changes or can tolerate step changes, you probably
will not need to use the ramp/soak generator. However, some processes require
precisely-controlled SP value changes. The ramp / soak generator can greatly
reduce the amount of programming required for these applications.
SP
Soak
Ramp
slope
Time
Ramp/soak table
Ramp/soak controls
Ramp/soak
Generator
Setpoint
+
Loop
Calculation
Process Variable
Control Output
Maintenance
858
PID Loop Operation
Now that we have described the general ramp/soak generator operation, we list its
specific features:
S Each loop has its own ramp/soak generator (use is optional).
S You may specify up to eight ramp/soak steps (16 segments).
S The ramp soak generator can run anytime the PLC is in Run mode. Its
operation is independent of the loop mode (Manual or Auto).
S Ramp/soak real-time controls include Start, Hold, Resume, and Jog.
S Ramp/soak monitoring includes Profile Complete, Soak Deviation (SP
minus PV), and current ramp/soak step number.
The following figure shows a SP profile consisting of ramp/soak segment pairs. The
segments are individually numbered as steps from 1 to 16. The slope of each of the
ramp may be either increasing or decreasing. The ramp/soak generator
automatically knows whether to increase or decrease the SP based on the relative
values of a ramps end points. These values come from the ramp/soak table.
16
15
13
Maintenance
and Troubleshooting
5
3
Step
SP
1
Ramp
Ramp
Ramp
Ramp
14
Ramp
Soak
Soak
Soak
Soak
Soak
Ramp/Soak Table
The parameters which define the
ramp/soak profile for a loop are in a
ramp/soak table. Each loop may have its
own ramp/soak table, but it is optional.
Recall the Loop Parameter table consists
a 32-word block of memory for each loop,
and together they occupy one contiguous
memory area. However, the ramp/soak
table for a loop is individually located,
because it is optional for each loop. An
address pointer in location V+34 in the
loop table specifies the starting location of
the ramp/soak table.
In the example to the right, the loop
parameter tables for Loop #1 and #2
occupy contiguous 32-word blocks as
shown. Each has a pointer to its
ramp/soak table, independently located
elsewhere in user V-memory. Of course,
you may locate all the tables in one group,
as long as they do not overlap.
VMemory Space
User Data
V2000
LOOP #1
V2037
V2040
32 words
LOOP #2
V2077
32 words
V3000
Ramp/Soak #1
32 words
V3600
Ramp/Soak #2
32 words
V2034 =
3000 octal
V2074 =
3600 octal
859
PID Loop Operation
The parameters in the ramp/soak table must be user-defined. the most convenient
way is to use DirectSOFT, which features a special editor for this table. Four
parameters are required to define a ramp and soak segment pair, as pictured below.
S Ramp End Value specifies the destination SP value for the end of the
ramp. Use the same data format for this number as you use for the SP.
It may be above or below the beginning SP value, so the slope could be
up or down (we dont have to know the starting SP value for ramp #1).
S Ramp Slope specifies the SP increase in counts (units) per second. It
is a BCD number from 00.00 to 99.99 (uses implied decimal point).
S Soak Duration specifies the time for the soak segment in minutes,
ranging from 000.1 to 999.9 minutes in BCD (implied decimal point).
S Soak PV Deviation (optional) specifies an allowable PV deviation
above and below the SP value during the soak period. A PV deviation
alarm status bit is generated by the ramp/soak generator.
Ramp End
SP Value
Soak
duration
Ramp/Soak Table
V+00
XXXX
V+01
XXXX
Ramp Slope
V+02
XXXX
Soak Duration
V+03
XXXX
Soak PV Deviation
The ramp segment becomes active when the previous soak segment ends. If the
ramp is the first segment, it becomes active when the ramp/soak generator is
started, and automatically assumes the present SP as the starting SP.
Offset
Step
+ 00
+ 01
Description
Step
Description
+ 20
Ramp Slope
+ 21
Ramp Slope
+ 02
Soak Duration
+ 22
10
Soak Duration
+ 03
Soak PV Deviation
+ 23
10
Soak PV Deviation
+ 04
+ 24
11
+ 05
Ramp Slope
+ 25
11
Ramp Slope
+ 06
Soak Duration
+ 26
12
Soak Duration
+ 07
Soak PV Deviation
+ 27
12
Soak PV Deviation
+ 10
+ 30
13
+ 11
Ramp Slope
+ 31
13
Ramp Slope
+ 12
Soak Duration
+ 32
14
Soak Duration
+ 13
Soak PV Deviation
+ 33
14
Soak PV Deviation
+ 14
+ 34
15
+ 15
Ramp Slope
+ 35
15
Ramp Slope
+ 16
Soak Duration
+ 36
16
Soak Duration
+ 17
Soak PV Deviation
+ 37
16
Soak PV Deviation
Maintenance
Offset
SP
Slope
Soak PV
deviation
860
PID Loop Operation
Ramp/Soak
Table Flags
Many applications do not require all 16 R/S steps. Use all zeros in the table for
unused steps. The R/S generator ends the profile when it finds ramp slope=0.
The individual bit definitions of the Ramp / Soak Table Flag (Addr+33) word is listed
in the following table.
Bit
Ramp/Soak
Controls
Read/Write
Bit=0
Bit=1
write
01 Start
write
01 Hold
write
01
Resume
write
01 Jog
read
Complete
read
Off
On
read
Off
On
Reserved
read
Off
On
read
815
Ramp/Soak
Generator Enable
Ramp/Soak
Generator Enable
Jog
Resume
Hold
Start
Ladder logic must set a control bit to a 1 to command the corresponding function.
When the loop controller reads the ramp/soak value, it automatically turns off the bit
for you. Therefore, a reset of the bit is not required, when the CPU is in Run Mode.
The example program rung to the right
shows how an external switch X0 can turn
on, and the PD contact uses the leading
edge to set the proper control bit to start
the ramp soak profile. This uses the Set
Bit-of-word instruction.
B2033.0
SET
861
PID Loop Operation
The normal state for the ramp/soak control bits is all zeros. Ladder logic must set
only one control bit at a time.
S Start a 0-to-1 transition will start the ramp soak profile. The CPU must
be in Run Mode, and the loop can be in Manual or Auto Mode. If the
profile is not interrupted by a Hold or Jog command, it finishes normally.
S Hold a 0-to-1 transition will stop the ramp/soak profile in its current
state, and the SP value will be frozen.
S Resume a 0-to-1 transition cause the ramp/soak generator to resume
operation if it is in the hold state. The SP values will resume from their
previous value.
S Jog a 0-to-1 transition will cause the ramp/soak generator to truncate
the current segment (step), and go to the next segment.
Ramp/Soak
Programming
Errors
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Its a good idea to test your ramp/soak profile before using it to control the process.
Testing Your
Ramp/Soak Profile This is easy to do, because the ramp/soak generator will run even when the loop is in
Manual Mode. Using DirectSOFT32s PID View will be a real time-saver, because it
will draw the profile on-screen for you. Be sure to set the trending timebase slow
enough to display completed ramp-soak segment pairs in the waveform window.
Maintenance
862
PID Loop Operation
Troubleshooting Tips
Q. The loop will not go into Automatic Mode.
A. Check the following for possible causes:
S A PV alarm exists, or a PV alarm programming error exists.
S The loop is the major loop of a cascaded pair, and the minor loop is not
in Cascade Mode.
Maintenance
and Troubleshooting
Q. The Control Output stays at zero constantly when the loop is in Automatic Mode.
A. Check the following for possible causes:
S The Control Output upper limit in loop table location V+31 is zero.
S The loop is driven into saturation, because the error never goes to zero
value and changes (algebraic) sign.
Q. The Control Output value is not zero, but it is incorrect.
A. Check the following for possible causes:
S The gain values are entered improperly. Remember, gains are entered
in the loop table in BCD, while the SP and PV are in binary. If you are
using DirectSOFT, it displays the SP, PV, Bias and Control output in
decimal (BCD), converting it to binary before updating the loop table.
Q. The Ramp/Soak Generator does not operate when I activate the Start bit.
A. Check the following for possible causes:
S The Ramp/Soak enable bit is off. Check the status of bit 11 of loop
parameter table location V+00. It must be set =1.
S The hold bit or other bits in the Ramp/Soak control are on.
S The beginning SP value and the first ramp ending SP value are the
same, so first ramp segment has no slope and consequently has no
duration. The ramp/soak generator moves quickly to the soak segment,
giving the illusion the first ramp is not working.
S The loop is in Cascade Mode, and is trying to get the SP remotely.
S The SP upper limit value in the loop table location V+27 is too low.
S Check your ladder program to verify it is not writing to the SP location
(V+02 in the loop table). A quick way to do this is to temporarily place an
end coil at the beginning of your program, then go to PLC Run Mode,
and manually start the ramp/soak generator.
Q. The PV value in the table is constant, even though the analog module receives the PV signal.
A. Your ladder program must read the analog value from the module successfully
and write it into the loop table V+03 location. Verify the analog module is generating
the value, and the ladder is working.
Q. The Derivative gain doesnt seem to have any affect on the output.
A. The derivative limit is probably enabled (see section on derivative gain limiting).
863
PID Loop Operation
Bibliography
Application Concepts of Process Control
Author: Paul W. Murrill
Publisher: Instrument Society of America
ISBN 1556170807
Maintenance
864
PID Loop Operation
Maintenance
and Troubleshooting
An operational mode of a loop, in which it makes PID calculations and updates the
loops control output.
Bias Freeze
A method of preserving the bias value (operating point) for a control output, by inhibiting
the integrator when the output goes out-of-range. The benefit is a faster loop recovery.
Bias Term
In the position form of the PID equation, it is the sum of the integrator and the initial
control output value.
Bumpless Transfer
A method of changing the operation mode of a loop while avoiding the usual sudden
change in control output level. This consequence is avoided by artificially making the SP
and PV equal, or the bias term and control output equal at the moment of mode change.
Cascaded Loops
A cascaded loop receives its setpoint from the output of another loop. Cascaded loops
have a major/minor relationship, and work together to ultimately control one PV.
Cascade Mode
An operational mode of a loop, in which it receives its SP from another loops output.
Continuous Control
Control of a process done by delivering a smooth (analog) signal as the control output.
Direct-Acting Loop
Error
Error Deadband
An optional feature which makes the loop insensitive to errors when they are small. You
can specify the size of the deadband.
Error Squared
An optional feature which multiplies the error by itself, but retains the original algebraic
sign. It reduces the effect of small errors, while magnifying the effect of large errors.
Feedforward
Control Output
The numerical result of a PID equation which is sent by the loop with the intention of
nulling out the current error.
Derivative Gain
A constant that determines the magnitude of the PID derivative term in response to the
current error.
Integral Gain
A constant that determines the magnitude of the PID integral term in response to the
current error.
Major Loop
In cascade control, it is the loop that generates a setpoint for the cascaded loop.
Manual Mode
An operational mode of a loop, it which the PID calculations are stopped. The operator
must manually control the loop by writing to the control output value directly.
Minor Loop
In cascade control, the minor loop is the subordinate loop that receives its SP from the
major loop.
On / Off Control
A simple method of controlling a process, through on/off application of energy into the
system. The mass of the process averages the on/off effect for a relatively smooth PV. A
simple ladder program can convert the DL05s continuous loop output to on/off control.
PID Loop
A mathematical method of closed-loop control involving the sum of three terms based
on proportional, integral, and derivative error values. The three terms have independent
gain constants, allowing one to optimize (tune) the loop for a particular physical system.
Position Algorithm
Process
Error=SP PV
865
PID Loop Operation
PV Absolute Alarm
PV Deviation Alarm
A programmable alarm that compares the difference between the SP and PV values to
a deviation threshold value.
A set of SP values called a profile, which is generated in real time upon each loop
calculation. The profile consists of a series of ramp and soak segment pairs, greatly
simplifying the task of programming the PLC to generate such SP sequences.
Rate
Also called differentiator, the rate term responds to the changes in the error term.
Remote Setpoint
The location where a loop reads its setpoint when it is configured as the minor loop in a
cascaded loop topology.
Reset
Also called integrator, the reset term adds each sampled error to the previous,
maintaining a running total called the bias.
Reset Windup
A condition created when the loop is unable to find equilibrium, and the persistent error
causes the integrator (reset) sum to grow excessively (windup). Reset windup causes
an extra recovery delay when the original loop fault is remedied.
Reverse-Acting Loop
Sampling time
The time between PID calculations. The CPU method of process control is called a
sampling controller, because it samples the SP and PV only periodically.
Setpoint (SP)
The desired value for the process variable. The setpoint (SP) is the input command to
the loop controller during closed loop operation.
Soak Deviation
The soak deviation is a measure of the difference between the SP and PV during a soak
segment of the Ramp / Soak profile, when the Ramp / Soak generator is active.
Step Response
The behavior of the process variable in response to a step change in the SP (in closed
loop operation), or a step change in the control output (in open loop operation)
Transfer
To change from one loop operational mode to another (between Manual, Auto, or
Cascade). The word transfer probably refers to the transfer of control of the control
output or the SP, depending on the particular mode change.
Velocity Algorithm
The control output is calculated to represent the rate of change (velocity) for the PV to
become equal to the SP.
Maintenance
A constant that determines the magnitude of the PID proportional term in response to
the current error.
Proportional Gain
Maintenance and
Troubleshooting
In This Chapter. . . .
19
92
Maintenance and Troubleshooting
Maintenance
and Troubleshooting
Diagnostics
Diagnostics
Your DL05 Micro PLC performs many pre-defined diagnostic routines with every
CPU scan. The diagnostics can detect various errors or failures in the PLC. The two
primary error classes are fatal and non-fatal.
Fatal Errors
Fatal errors are errors which may cause the system to function improperly, perhaps
introducing a safety problem. The CPU will automatically switch to Program Mode if
it is in Run Mode. (Remember, in Program Mode all outputs are turned off.) If the fatal
error is detected while the CPU is in Program Mode, the CPU will not allow you to
transition to Run Mode until the error has been corrected.
Some examples of fatal errors are:
S Power supply failure
S Parity error or CPU malfunction
S Particular programming errors
Non-fatal Errors
Non-fatal errors are errors that need your attention, but should not cause improper
operation. They do not cause or prevent any mode transitions of the CPU. The
application program can use special relay contacts to detect non-fatal errors, and
even take the system to an orderly shutdown or switch the CPU to Program Mode if
desired. An example of a non-fatal error is:
S Particular programming errors
Finding Diagnostic The programming devices will notify you of an error if one occurs while online.
Information
S DirectSOFT provides the error number and an error message.
S The handheld programmer displays error numbers and short
descriptions of the error.
Appendix B has a complete list of error messages in order by error number.
Many error messages point to supplemental V-memory locations which contain
related information. Special relays (SP contacts) also provide error indications.
93
Maintenance and Troubleshooting
V-memory Error
Code Locations
The following table names the specific memory locations that correspond to certain
types of error messages.
Error Class
Error Category
Diagnostic
V-memory
User-Defined
V7751
System Error
V7755
V7756
V7757
V7763
Grammatical
V7765
V7775
V7776
V7777
Special Relays (SP) The special relay table also includes status indicators which can indicate errors. For
Corresponding to a more detailed description of each of these special relays refer to Appendix D.
Error Codes
SP52
Syntax error
SP11
SP53
SP12
SP54
Communication error
SP13
SP56
SP15
SP16
SP17
Forced stop
SP20
SP22
Interrupt enabled
SP61
SP62
SP63
SP64
SP65
Borrow occurred
SP36
Override setup
SP37
SP40
Critical error
SP66
SP41
Non-critical error
SP67
Carry occurred
SP42
Diagnostics error
SP70
SP44
SP71
SP45
I/O error
SP73
Overflow
SP46
Communications error
SP75
SP50
SP76
Load zero
SP51
Watchdog timeout
Maintenance
and Troubleshooting
94
Maintenance and Troubleshooting
Maintenance
and Troubleshooting
Error
Code
Description
Error
Code
Description
E003
Software time-out
E525
E004
Invalid instruction
(RAM parity error in the CPU)
E526
Unit is offline
E527
Unit is online
E104
Write failed
E528
CPU mode
E151
Invalid command
E540
CPU locked
E311
Communications error 1
E541
Wrong password
E312
Communications error 2
E542
Password reset
E313
Communications error 3
E601
Memory full
E316
Communications error 6
E602
Instruction missing
E320
Time out
E604
Reference missing
E321
Communications error
E620
Out of memory
E360
E621
E501
Bad entry
E622
E502
Bad address
E624
V memory only
E503
Bad command
E625
Program only
E504
E627
E505
Invalid instruction
E628
E506
Invalid operation
E640
Mis-compare
E520
E650
E521
E651
E523
E652
E524
95
Maintenance and Troubleshooting
Program Error
Codes
The following table lists program syntax and runtime error codes. Error detection
occurs during a Program-to-Run mode transition, or when you use AUX 21 Check
Program. The CPU will also turn on SP52 and store the error code in V7755.
Appendix B provides a more complete description of the error codes.
Error Code
Description
Error Code
Description
E4**
No Program in CPU
E438
E401
E440
E402
Missing LBL
E441
ACON/NCON
E403
E451
Bad MLS/MLR
E404
E453
Missing T/C
E405
E454
Bad TMRA
E406
Missing IRT
E455
Bad CNT
E412
E456
Bad SR
E421
E461
Stack Overflow
E422
E462
Stack Underflow
E423
E463
Logic Error
E431
E464
Missing Circuit
E433
E471
E434
Invalid RTC
E472
E435
Invalid RT
E473
E436
E499
Print instruction
E437
Invalid IRTC
Maintenance
and Troubleshooting
96
Maintenance and Troubleshooting
CPU Indicators
The DL05 Micro PLCs have indicators on the front
to help you determine potential problems with the
system. In normal runtime operation only, the RUN
and PWR indicators are on. The table below is a
quick reference to potential problems.
Indicator Status Potential Problems
PWR (LED off)
1. System voltage incorrect
2. PLC power supply faulty
RUN (LED off)
1. CPU programming error
2. (CPU in program mode)
CPU (LED on)
1. Electrical noise interference
2. Internal CPU defective
PWR Indicator
In general there are three reasons for the CPU power status LED (PWR) to be OFF:
1. Power to the unit is incorrect or is not applied.
2. PLC power supply is faulty.
3. Other component(s) have the power supply shut down.
Maintenance
and Troubleshooting
If the voltage to the power supply is not correct, the PLC may not operate properly or
may not operate at all. Use the following guidelines to correct the problem.
WARNING: To minimize the risk of electrical shock, always disconnect the system
power before inspecting the physical wiring.
1. First, disconnect the external power.
2. Verify that all external circuit breakers or fuses are still intact.
3. Check all incoming wiring for loose connections. If youre using a separate
termination block, check those connections for accuracy and integrity.
4. If the connections are acceptable, reconnect the system power and verify
the voltage at the DL05 power input is within specification. If the voltage is
not correct shut down the system and correct the problem.
5. If all wiring is connected correctly and the incoming power is within the
specifications, the PLC internal supply may be faulty.
The best way to check for a faulty PLC is to substitute a known good one to see if this
corrects the problem. The removable connectors on the DL05 make this relatively
easy. If there has been a major power surge, it is possible the PLC internal power
supply has been damaged. If you suspect this is the cause of the power supply
damage, consider installing an AC line conditioner to attenuate damaging voltage
spikes in the future.
97
Maintenance and Troubleshooting
RUN Indicator
If the CPU will not enter the Run mode (the RUN indicator is off), the problem is
usually in the application program, unless the CPU has a fatal error. If a fatal error
has occurred, the CPU LED should be on. (You can use a programming device to
determine the cause of the error.)
Both of the programming devices, Handheld Programmer and DirectSOFT, will
return an error message describing the problem. Depending on the error, there may
also be an AUX function you can use to help diagnose the problem. The most
common programming error is Missing END Statement. All application programs
require an END statement for proper termination. A complete list of error codes can
be found in Appendix B.
CPU Indicator
If the CPU indicator is on, a fatal error has occurred in the CPU. Generally, this is not
a programming problem but an actual hardware failure. You can power cycle the
system to clear the error. If the error clears, you should monitor the system and
determine what caused the problem. You will find this problem is sometimes caused
by high frequency electrical noise introduced into the CPU from an outside source.
Check your system grounding and install electrical noise filters if the grounding is
suspected. If power cycling the system does not reset the error, or if the problem
returns, you should replace the CPU.
Communications Problems
If you cannot establish communications with the CPU, check these items.
S
S
S
S
Maintenance
and Troubleshooting
S
S
S
S
98
Maintenance and Troubleshooting
Maintenance
and Troubleshooting
If you suspect an I/O error, there are several things that could be causing the
problem.
S High-Speed I/O configuration error
S A blown fuse in your machine or panel (the DL05 does not have internal
I/O fuses)
S A loose terminal block
S The auxiliary 24 VDC supply has failed
S The Input or Output Circuit has failed
When troubleshooting the DL05 Micro PLCs there are a few facts you should be
aware of. These facts may assist you in quickly correcting an I/O problem.
S HSIO configuration errors are commonly mistaken for I/O point failure
during program development. If the I/O point in question is in X0X2, or
Y0Y1, check all parameter locations listed in Chapter 3 that apply to
the HSIO mode you have selected.
S The output circuits cannot detect shorted or open output points. If you
suspect one or more faulty points, measure the voltage drop from the
common to the suspect point. Remember when using a Digital Volt
Meter, leakage current from an output device such as a triac or a
transistor must be considered. A point which is off may appear to be on
if no load is connected the point.
S The I/O point status indicators are logic-side indicators. This means the
LED which indicates the on or off status reflects the status of the point
with respect to the CPU. On an output point the status indicators could
be operating normally while the actual output device (transistor, triac
etc.) could be damaged. With an input point, if the indicator LED is on
the input circuitry is probably operating properly. Verify the LED goes off
when the input signal is removed.
S Leakage current can be a problem when connecting field devices to an
I/O point. False input signals can be generated when the leakage
current of an output device is great enough to turn on the connected
input device. To correct this install a resistor in parallel with the input or
output of the circuit. The value of this resistor will depend on the amount
of leakage current and the voltage applied but usually a 10K to 20KW
resistor will work. Verify the wattage rating of the resistor is correct for
your application.
S Because of the removable terminal blocks on the DL05, the easiest
method to determine if an I/O circuit has failed is to replace the unit if
you have a spare. However, if you suspect a field device is defective,
that device may cause the same failure in the replacement PLC as well.
As a point of caution, you may want to check devices or power supplies
connected to the failed I/O circuit before replacing the unit with a spare.
99
Maintenance and Troubleshooting
Testing Output
Points
Output points can be set on or off in the DL05 series CPUs. If you want to do an I/O
check out independent of the application program, follow the procedure below:
Step
Action
Go to address 0.
Use the programming device to set (turn) on or off the points you wish
to test.
When you finish testing I/O points delete the END statement at
address 0.
END
X0
X2
X1
X3
X5
X7
Y2
X4
END
16P STATUS
BIT REF
X
ENT
A
0
ENT
10
ON
INS
Y2 is now on
10
Maintenance
and Troubleshooting
910
Maintenance and Troubleshooting
Maintenance
and Troubleshooting
Noise Troubleshooting
Electrical Noise
Problems
Noise is one of the most difficult problems to diagnose. Electrical noise can enter a
system in many different ways and they fall into one of two categories, conducted or
radiated. It may be difficult to determine how the noise is entering the system but the
corrective actions for either of the types of noise problems are similar.
S Conducted noise is when the electrical interference is introduced into
the system by way of a attached wire, panel connection ,etc. It may
enter through an I/O circuit, a power supply connection, the
communication ground connection, or the chassis ground connection.
S Radiated noise is when the electrical interference is introduced into the
system without a direct electrical connection, much in the same manner
as radio waves.
Reducing
Electrical Noise
While electrical noise cannot be eliminated it can be reduced to a level that will not
affect the system.
S Most noise problems result from improper grounding of the system. A
good earth ground can be the single most effective way to correct noise
problems. If a ground is not available, install a ground rod as close to
the system as possible. Ensure all ground wires are single point
grounds and are not daisy chained from one device to another. Ground
metal enclosures around the system. A loose wire can act as a large
antenna, introducing noise into the system. Therefore, tighten all
connections in your system. Loose ground wires are more susceptible to
noise than the other wires in your system. Review Chapter 2 Installation,
Wiring, and Specifications if you have questions regarding how to
ground your system.
S Electrical noise can enter the system through the power source for the
PLC and I/O circuits. Installing an isolation transformer for all AC
sources can correct this problem. DC sources should be well-grounded
good quality supplies.
S Separate input wiring from output wiring. Never run low-voltage I/O
wiring close to high voltage wiring.
911
Maintenance and Troubleshooting
Even though the Handheld Programmer and DirectSOFT provide error checking
during program entry, you may want to check a program that has been modified.
Both programming devices offer a way to check the program syntax. For example,
you can use AUX 21, CHECK PROGRAM to check the program syntax from a
Handheld Programmer, or you can use the PLC Diagnostics menu option within
DirectSOFT. This check will find a wide variety of programming errors. The following
example shows how to use the syntax check with a Handheld Programmer.
Use AUX 21 to perform syntax check
CLR
B
2
AUX
ENT
BUSY
$00050 E401
MISSING END
(shows location in question)
Syntax OK display
NO SYNTAX ERROR
?
See the Error Codes Section for a complete listing of programming error codes. If
you get an error, just press CLR and the Handheld will display the instruction where
the error occurred. Correct the problem and continue running the Syntax check until
the NO SYNTAX ERROR message appears.
Maintenance
and Troubleshooting
912
Maintenance and Troubleshooting
Special
Instructions
There are several instructions that can be used to help you debug your program
during machine startup operations.
S END
S PAUSE
S STOP
END Instruction: If you need a way to quickly disable part of the program, just insert
an END statement prior to the portion that should be disabled. When the CPU
encounters the END statement, it assumes that is the end of the program. The
following diagram shows an example.
New END disables X10 and Y1
Normal Program
X0
X2
X1
X3
Y0
X4
X0
X2
X1
X3
Y0
X4
Y1
X10
END
Y1
X10
END
END
PAUSE Instruction: This instruction provides a quick way to allow the inputs (or
other logic) to operate while disabling selected outputs. The output image register is
still updated, but the output circuits are not. For example, you could make this
conditional by adding an input contact or CR to control the instruction with a switch or
a programming device. Or, you could just add the instruction without any conditions
so the selected outputs would be disabled at all times.
PAUSE disables Y0 and Y1
Maintenance
and Troubleshooting
Normal Program
X0
X2
X1
X3
Y0
Y0 Y1
PAUSE
X10
X4
Y1
X0
X2
X1
X3
X10
Y0
X4
Y1
END
END
STOP Instruction: Sometimes during machine startup you need a way to quickly
turn off all the outputs and return to Program Mode. You can use the STOP
instruction. When this instruction is executed the CPU automatically exits Run Mode
and enters Program Mode. Remember, all outputs are turned off during Program
Mode. The following diagram shows an example of a condition that returns the CPU
to Program Mode.
913
Maintenance and Troubleshooting
Normal Program
X0
X2
X1
X3
Y0
X7
STOP
X4
Y1
X5
X0
X2
X1
X3
Y0
X4
X5
Y1
END
END
Duplicate
Reference Check
In the example shown above, you could trigger X10 which would execute the STOP
instruction. The CPU would enter Program Mode and all outputs would be turned off.
You can also check for multiple uses of the same output coil. Both programming
devices offer a way to check for this condition.. For example, you can AUX 21,
CHECK PROGRAM to check for duplicate references from a Handheld
Programmer, or you can use the PLC Diagnostics menu option within DirectSOFT.
The following example shows how to perform the duplicate reference check with a
Handheld Programmer.
Use AUX 21 to perform syntax check
CLR
B
2
AUX
ENT
BUSY
Syntax OK display
$00024 E471
DUP COIL REF
NO DUP REFS
?
If you get an error, just press CLR and the Handheld will display the instruction where
the error occurred. Correct the problem and continue running the Duplicate
Reference check until no duplicate references are found.
NOTE: You can use the same coil in more than one location, especially in programs
containing Stage instructions and / or OROUT instructions. The Duplicate
Reference check will find occurrences, even though they are acceptable.
Maintenance
and Troubleshooting
914
Maintenance and Troubleshooting
The DL05 Micro PLC allows you to make changes to the application program during
Run Mode. These edits are not bumpless. Instead, CPU scan is momentarily
interrupted (and the outputs are maintained in their current state) until the program
change is complete. This means if the output is off, it will remain off until the program
change is complete. If the output is on, it will remain on.
WARNING: Only authorized personnel fully familiar with all aspects of the
application should make changes to the program. Changes during Run Mode
become effective immediately. Make sure you thoroughly consider the impact of any
changes to minimize the risk of personal injury or damage to equipment. There are
some important operational changes during Run Time Edits.
1. If there is a syntax error in the new instruction, the CPU will not enter the Run
Mode.
2. If you delete an output coil reference and the output was on at the time, the output
will remain on until it is forced off with a programming device.
3. Input point changes are not acknowledged during Run Time Edits. So, if youre
using a high-speed operation and a critical input comes on, the CPU may not see
the change.
Maintenance
and Troubleshooting
Not all instructions can be edited during a Run Time Edit session. The following list
shows the instructions that can be edited.
Mnemonic
Description
Mnemonic
Description
TMR
Timer
OR, ORN
TMRF
Fast timer
TMRA
Accumulating timer
LD
TMRAF
LDD
ADDD
SUBD
MUL
Multiply (constant)
DIV
Divide (constant)
CMPD
ANDD
ORD
Or accumulator (constant)
XORD
LDF
OUTF
SHFR
SHFL
NCON
Numeric constant
CNT
Counter
UDC
Up / Down counter
SGCNT
Stage counter
STR, STRN
AND, ANDN
OR, ORN
Or, Or not
STRE, STRNE
ANDE, ANDNE
ORE, ORNE
STR, STRN
AND, ANDN
915
Maintenance and Troubleshooting
Well use the program logic shown to describe how this process works. In the example, well change X0 to C10. Note, the
example assumes you have already
placed the CPU in Run Mode.
X0
X1
Y0
OUT
C0
NEXT
NEXT
*MODE CHANGE*
RUN TIME EDIT?
ENT
*MODE CHANGE*
RUNTIME EDITS
X
SET
A
0
SHFT
FD REF
FIND
$00000 STR X0
Press the arrow key to move to the X. Then enter the new contact (C10).
SHFT
B
2
A
1
ENT
RUNTIME EDIT?
STR C10
ENT
OR C0
Maintenance
and Troubleshooting
916
Maintenance and Troubleshooting
There are many times, especially during machine startup and troubleshooting, that
you need the capability to force an I/O point to be either on or off. Before you use a
programming device to force any data type it is important you understand how the
DL05 CPUs process the forcing requests.
WARNING: Only authorized personnel fully familiar with the application should
make program changes. Do thoroughly consider the impact of any changes to
minimize the risk of personal injury or damage to equipment.
Bit Forcing Bit forcing temporarily changes the status of a discrete bit. For
example, you may want to force an input on even though the program has turned it
off. This allows you to change the point status stored in the image register. The
forced value will be valid until the CPU writes to the image register location during the
next scan. This is useful you just need to force a bit on to trigger another event.
The following diagrams show a brief
example of how you could use the
D2HPP Handheld Programmer to force
an I/O point. The example assumes you
have already placed the CPU into Run
Mode.
X0
Y0
OUT
C0
16P STATUS
BIT REF
X
ENT
Use the PREV or NEXT keys to select the Y data type. (Once the Y
appears, press 0 to start at Y0.)
Maintenance
and Troubleshooting
NEXT
A
0
ENT
Y
MLS
H
7
SHFT
ON
INS
Y
MLS
H
7
SHFT
OFF
DEL
Y2 is now on
ON
INS
10
10
BIT FORCE
Y7
No fill indicates point is off.
BIT FORCE
Y7
Auxiliary Functions
In This Appendix. . . .
1A
Introduction
AUX 2* RLL Operations
AUX 3* Vmemory Operations
AUX 4* I/O Configuration
AUX 5* CPU Configuration
AUX 6* Handheld Programmer Configuration
AUX 7* EEPROM Operations
AUX 8* Password Operations
A2
Appendix A
Auxiliary Functions
Auxiliary Functions
Introduction
Purpose of
Many CPU setup tasks involve the use of Auxiliary (AUX) Functions. The AUX
Auxiliary Functions Functions perform many different operations, including clearing ladder memory,
displaying the scan time, and copying programs to EEPROM in the handheld
programmer. They are divided into categories that affect different system resources.
You can access the AUX Functions from DirectSOFT or from the D2HPP
Handheld Programmer. The manuals for those products provide step-by-step
procedures for accessing the AUX Functions. Some of these AUX Functions are
designed specifically for the Handheld Programmer setup, so they will not be
needed (or available) with the DirectSOFT package. Even though this Appendix
provides many examples of how the AUX functions operate, you should supplement
this information with the documentation for your choice of programming device.
Note, the Handheld Programmer may have additional AUX functions that are not
supported with the DL05 PLCs.
AUX Function and Description
DL05
Check Program
22
Change Reference
23
24
Clear V Memory
61
62
Beeper On / Off
HP
65
HP
HP
72
HP
73
Compare CPU to
HPP EEPROM
HP
DL05
51
74
HP
53
75
HP
54
Initialize Scratchpad
76
HP
55
56
57
58
Test Operations
59
Override Setup
5B
5D
supported
HP Handheld Programmer function
Modify Password
82
Unlock CPU
83
Lock CPU
A3
Auxilliary Functions
DirectSOFT provides various menu options during both online and offline
programming. Some of the AUX functions are only available during online
programming, some only during offline programming, and some during both online
and offline programming. The following diagram shows and example of the PLC
operations menu available within DirectSOFT.
Menu Options
Accessing AUX
Functions via the
Handheld
Programmer
You can also access the AUX functions by using a Handheld Programmer. Plus,
remember some of the AUX functions are only available from the Handheld.
Sometimes the AUX name or description cannot fit on one display. If you want to see
the complete description, just press the arrow keys to scroll left and right. Also,
depending on the current display, you may have to press CLR more than once.
CLR
AUX
NEXT
AUX 3* V OPERATIONS
AUX 31 CLR V MEMORY
ENT
You can also enter the exact AUX number to go straight to the sub-menu.
Enter the AUX number directly
CLR
B
3
AUX
AUX 3* V OPERATIONS
AUX 31 CLR V MEMORY
Appendix A
Auxiliary Functions
Accessing AUX
Functions via
DirectSOFT
A4
Appendix A
Auxiliary Functions
Auxiliary Functions
AUX 21
Check Program
RLL Operations auxiliary functions allow you to perform various operations on the
ladder program.
Both the Handheld and DirectSOFT automatically check for errors during program
entry. However, there may be occasions when you want to check a program that has
already been in the CPU. Two types of checks are available:
S Syntax
S Duplicate References
The Syntax check will find a wide variety of programming errors, such as missing
END statements. If you perform this check and get an error, see Appendix B for a
complete listing of programming error codes. Correct the problem and then continue
running the Syntax check until the message NO SYNTAX ERROR appears.
Use the Duplicate Reference check to verify you have not used the same output coil
reference more than once. Note, this AUX function will also find the same outputs
even if they have been used with the OROUT instruction, which is perfectly
acceptable.
This AUX function is available on the PLC Diagnostics sub-menu from within
DirectSOFT.
AUX 22
Change Reference
There will probably be times when you need to change an I/O address reference or
control relay reference. AUX 22 allows you to quickly and easily change all
occurrences, (within an address range), of a specific instruction. For example, you
can replace every instance of X5 with X10.
AUX 23
Clear Ladder
Range
There have been many times when weve taken existing programs and added or
removed certain portions to solve new application problems. By using AUX 23 you
can select and delete a portion of the program. DirectSOFT does not have a menu
option for this AUX function, but you can just select the appropriate portion of the
program and cut it with the editing tools.
AUX 24
Clear Ladders
AUX 24 clears the entire program from CPU memory. Before you enter a new
program, you should always clear ladder memory. This AUX function is available on
the PLC/Clear PLC sub-menu within DirectSOFT.
AUX 31 clears all the information from the V-memory locations available for general
use. This AUX function is available on the PLC/Clear PLC sub-menu within
DirectSOFT.
This AUX function allows you to display the current I/O configuration on the DL05.
Both the Handheld Programmer and DirectSOFT will show the I/O configuration.
A5
Auxilliary Functions
AUX 51
Modify Program
Name
The following auxiliary AUX functions allow you to setup, view, or change the CPU
configuration.
DL05 PLCs can use a program name for the CPU program or a program stored on
EEPROM in the Handheld Programmer. (Note, you cannot have multiple programs
stored on the EEPROM.) The program name can be up to eight characters in length
and can use any of the available characters (AZ, 09). AUX 51 allows you to enter a
program name. You can also perform this operation from within DirectSOFT by
using the PLC/Setup sub-menu. Once youve entered a program name, you can
only clear the name by using AUX 54 to reset the system memory. Make sure you
understand the possible effects of AUX 54 before you use it!
AUX 53 displays the current, minimum, and maximum scan times. The minimum
AUX 53
Display Scan Time and maximum times are the ones that have occurred since the last Program Mode to
Run Mode transition. You can also perform this operation from within DirectSOFT
by using the PLC/Diagnostics sub-menu.
AUX 54
Initialize
Scratchpad
The CPU maintains system parameters in a memory area often referred to as the
scratchpad. In some cases, you may make changes to the system setup that will be
stored in system memory. For example, if you specify a range of Control Relays
(CRs) as retentive, these changes are stored.
NOTE: You may never have to use this feature unless you have made changes that
affect system memory. Usually, youll only need to initialize the system memory if you
are changing programs and the old program required a special system setup. You
can usually change from program to program without ever initializing system
memory.
AUX 54 resets the system memory to the default values. You can also perform this
operation from within DirectSOFT by using the PLC/Setup sub-menu.
AUX 55
Set Watchdog
Timer
DL05 PLCs have a watchdog timer that is used to monitor the scan time. The
default value set from the factory is 200 ms. If the scan time exceeds the watchdog
time limit, the CPU automatically leaves RUN mode and enters PGM mode. The
Handheld displays the following message E003 S/W TIMEOUT when the scan
overrun occurs.
Use AUX 55 to increase or decrease the watchdog timer value. You can also perform
this operation from within DirectSOFT by using the PLC/Setup sub-menu.
AUX 56
CPU Network
Address
Since the DL05 CPU has an additional communication port, you can use the
Handheld to set the network address for port 2 and the port communication
parameters. The default settings are:
S Station address 1
S HEX mode
S Odd parity
You can use this port with either the Handheld Programmer, DirectSOFT, or, as a
communication port for DirectNET and MODBUS. Refer to DirectNET and
MODBUS manuals for additional information about communication settings
required for network operation.
Appendix A
Auxiliary Functions
A6
Appendix A
Auxiliary Functions
Auxiliary Functions
NOTE: You will only need to use this procedure if you have port 2 connected to a
network. Otherwise, the default settings will work fine.
Use AUX 56 to set the network address and communication parameters. You can
also perform this operation from within DirectSOFT by using the PLC/Setup
sub-menu.
AUX 57
Set Retentive
Ranges
DL05 CPUs provide certain ranges of retentive memory by default. Some of the
retentive memory locations are backed up by a super-capacitor, and others are in
non-volatile FLASH memory. The FLASH memory locations are V7400 to V7577.
The default ranges are suitable for many applications, but you can change them if
your application requires additional retentive ranges or no retentive ranges at all.
The default settings are:
DL05
Memory Area
Default Range
Available
Range
Control Relays
C400 C777
C0 C777
V Memory
V1400 V7777
V0 V7777
Timers
Counters
CT0 CT177
Stages
CT0 CT177
Use AUX 57 to change the retentive ranges. You can also perform this operation
from within DirectSOFT by using the PLC/Setup sub-menu.
WARNING: The DL05 CPUs do not have battery-backed RAM. The super-capacitor
will retain the values in the event of a power loss, but only up to 3 weeks. (The
retention time may be as short as 4 1/2 days in 60 degree C operating temperature.)
AUX 58
Test Operations
AUX 58 is used to override the output disable function of the Pause instruction. Use
AUX 58 to program a single output or a range of outputs which will operate normally
even when those points are within the scope of the pause instruction.
AUX 59
Bit Override
Bit override can be enabled on a point-by-point basis by using AUX 59 from the
Handheld Programmer or, by a menu option from within DirectSOFT. Bit override
basically disables any changes to the discrete point by the CPU. For example, if you
enable bit override for X1, and X1 is off at the time, then the CPU will not change the
state of X1. This means that even if X1 comes on, the CPU will not acknowledge the
change. So, if you used X1 in the program, it would always be evaluated as off in
this case. Of course, if X1 was on when the bit override was enabled, then X1 would
always be evaluated as on.
There is an advantage available when you use the bit override feature. The regular
forcing is not disabled because the bit override is enabled. For example, if you
enabled the Bit Override for Y0 and it was off at the time, then the CPU would not
change the state of Y0. However, you can still use a programming device to change
the status. Now, if you use the programming device to force Y0 on, it will remain on
and the CPU will not change the state of Y0. If you then force Y0 off, the CPU will
maintain Y0 as off. The CPU will never update the point with the results from the
application program or from the I/O update until the bit override is removed from the
point.
A7
Auxilliary Functions
Bit Override ON
Input Update
Force from
Programmer
Result of Program
Solution
Input Update
X128
OFF
Y128
OFF
C377
OFF
...
...
...
...
...
...
X2
ON
Y2
ON
C2
ON
X1
ON
Y1
ON
C1
OFF
X0
OFF
Y0
OFF
C0
OFF
Force from
Programmer
Result of Program
Solution
AUX 5B
Counter Interface
Configuration
AUX 5B is used with the High-Speed I/O (HSIO) function to select the configuration.
You can choose the type of counter, set the counter parameters, etc. See Chapter 3
for a complete description of how to select the various counter features.
AUX 5D
Select PLC
Scan Mode
The DL05 CPU has two program scan modes: fixed and variable. In fixed mode, the
scan time is lengthened to the time you specify (in milliseconds). If the actual scan
time is longer than the fixed scan time, then the error code E504 BAD REF/VAL is
displayed. In variable scan mode, the CPU begins each scan as soon as the
previous scans activities complete.
Appendix A
Auxiliary Functions
The following diagram shows a brief overview of the bit override feature. Notice the
CPU does not update the Image Register when bit override is enabled.
A8
Appendix A
Auxiliary Functions
Auxiliary Functions
AUX 61
Show Revision
Numbers
The following auxiliary functions allow you to setup, view, or change the Handheld
Programmer configuration.
As with most industrial control products, there are cases when additional features
and enhancements are made. Sometimes these new features only work with certain
releases of firmware. By using AUX 61 you can quickly view the CPU and Handheld
Programmer firmware revision numbers. This information (for the CPU) is also
available from within DirectSOFT from the PLC/Diagnostics sub-menu.
AUX 62
Beeper On/Off
The Handheld has a beeper that provides confirmation of keystrokes. You can use
Auxiliary (AUX) Function 62 to turn off the beeper.
AUX 65
Run Self
Diagnostics
If you think the Handheld Programmer is not operating correctly, you can use AUX 65
to run a self diagnostics program. You can check the following items.
S Keypad
S Display
S LEDs and Backlight
S Handheld Programmer EEPROM check
AUX 71
CPU to HPP
EEPROM
The following auxiliary functions allow you to move the ladder program from one
area to another and perform other program maintenance tasks.
Many of these AUX functions allow you to copy different areas of memory to and
from the CPU and handheld programmer. The following table shows the areas that
may be mentioned.
Option and Memory Type
1:PGM Program
$00000 $02047
2:V V memory
$00000 $07777
3:SYS System
Non-selectable copies
system parameters
Non-selectable
AUX 71 copies information from the CPU memory to an EEPROM installed in the
Handheld Programmer.You can copy different portions of EEPROM (HP) memory to
the CPU memory as shown in the previous table.
A9
Auxilliary Functions
AUX 73
Compare HPP
EEPROM to CPU
AUX 73 compares the program in the Handheld programmer (EEPROM) with the
CPU program. You can compare different types of information as shown previously.
AUX 74
HPP EEPROM
Blank Check
AUX 74 allows you to check the EEPROM in the handheld programmer to make sure
it is blank. Its a good idea to use this function anytime you start to copy an entire
program to an EEPROM in the handheld programmer.
AUX 75
Erase HPP
EEPROM
AUX 75 allows you to clear all data in the EEPROM in the handheld programmer.
You should use this AUX function before you copy a program from the CPU.
AUX 76
Show EEPROM
Type
You can use AUX 76 to quickly determine what size EEPROM is installed in the
Handheld Programmer.
Appendix A
Auxiliary Functions
AUX 72
HPP EEPROM
to CPU
A10
Auxiliary Functions
Appendix A
Auxiliary Functions
You can also enter or modify a password from within DirectSOFT by using the
PLC/Password sub-menu. This feature works slightly differently in DirectSOFT.
Once youve entered a password, the CPU is automatically locked when you exit the
software package. It will also be locked if the CPU is power cycled.
WARNING: Make sure you remember the password before you lock the CPU. Once
the CPU is locked you cannot view, change, or erase the password. If you do not
remember the password, you have to return the CPU to the factory for password
removal.
NOTE: The DL05 CPUs support multi-level password protection of the ladder
program. This allows password protection while not locking the communication port
to an operator interface. The multi-level password can be invoked by creating a
password with an upper case A followed by seven numeric characters (e.g.
A1234567).
AUX 82
Unlock CPU
AUX 82 can be used to unlock a CPU that has been password protected.
DirectSOFT will automatically ask you to enter the password if you attempt to
communicate with a CPU that contains a password.
AUX 83
Lock CPU
AUX 83 can be used to lock a CPU that contains a password. Once the CPU is
locked, you will have to enter a password to gain access. Remember, this is not
necessary with DirectSOFT since the CPU is automatically locked whenever you
exit the software package.
In This Appendix. . . .
1B
B2
Appendix B
Error Codes
Description
E003
SOFTWARE
TIME-OUT
If the program scan time exceeds the time allotted to the watchdog timer, this
error will occur. SP51 will be on and the error code will be stored in V7755. To
correct this problem use AUX 55 to extend the time allotted to the watchdog
timer.
E004
INVALID
INSTRUCTION
The CPU attempted to execute an instruction code, but the RAM contents
had a parity error. Performing a program download to the CPU in an
electrically noisy environment can corrupt a programs contents. Clear the
CPU program memory, and download the program again.
E043
MC BATTERY LOW
The battery in the CMOS RAM cartridge is low and should be replaced.
E104
WRITE FAILED
A write to the CPU was not successful. Disconnect the power, remove the
CPU, and make sure the EEPROM is not write protected. If the EEPROM is
not write protected, make sure the EEPROM is installed correctly. If both
conditions are OK, replace the CPU.
E151
BAD COMMAND
A parity error has occurred in the application program. SP44 will be on and
the error code will be stored in V7755 .This problem may possibly be due to
electrical noise. Clear the memory and download the program again. Correct
any grounding problems. If the error returns replace the Micro PLC.
E311
HP COMM
ERROR 1
E312
HP COMM
ERROR 2
A data error was encountered during communications with the CPU. Clear
the error and retry the request. If the error continues check the cabling
between the two devices, replace the handheld programmer, then if
necessary replace the CPU. The error code will be stored in V7756.
E313
HP COMM
ERROR 3
E316
HP COMM
ERROR 6
A mode error was encountered during communications with the CPU. Clear
the error and retry the request. If the error continues replace the handheld
programmer, then if necessary replace the CPU. The error code will be stored
in V7756.
E320
HP COMM
TIME-OUT
E321
COMM ERROR
A data error was encountered during communication with the CPU. Check to
insure cabling is correct and not defective. Power cycle the system and if the
error continues replace the CPU first and then the handheld programmer if
necessary.
B3
DL05 Error Codes
E360
HP PERIPHERAL
PORT TIME-OUT
The device connected to the peripheral port did not respond to the handheld
programmer communication request. Check to insure cabling is correct and
not defective. The peripheral device or handheld programmer could be
defective.
E4**
NO PROGRAM
E401
MISSING END
STATEMENT
All application programs must terminate with an END statement. Enter the
END statement in appropriate location in your program. SP52 will be on and
the error code will be stored in V7755.
E402
MISSING LBL
E403
MISSING RET
A subroutine in the program does not end with the RET instruction. SP52 will
be on and the error code will be stored in V7755.
E404
MISSING FOR
A NEXT instruction does not have the corresponding FOR instruction. SP52
will be on and the error code will be stored in V7755.
E405
MISSING NEXT
A FOR instruction does not have the corresponding NEXT instruction. SP52
will be on and the error code will be stored in V7755.
E406
MISSING IRT
An interrupt routine in the program does not end with the IRT instruction.
SP52 will be on and the error code will be stored in V7755.
E412
SBR/LBL>64
There is greater than 64 SBR or DLBL instructions in the program. This error
is also returned if there is greater than 2 INT instructions used in the program.
SP52 will be on and the error code will be stored in V7755.
E421
DUPLICATE STAGE
REFERENCE
Two or more SG or ISG labels exist in the application program with the same
number. A unique number must be allowed for each Stage and Initial Stage.
SP52 will be on and the error code will be stored in V7755.
E422
DUPLICATE LBL
REFERENCE
Two or more LBL instructions exist in the application program with the same
number. A unique number must be allowed for each and label. SP52 will be
on and the error code will be stored in V7755.
E423
NESTED LOOPS
Nested loops (programming one FOR/NEXT loop inside of another) are not
allowed. SP52 will be on and the error code will be stored in V7755.
E431
INVALID ISG/SG
ADDRESS
An ISG or SG instruction must not be placed after the end statement (such as
inside a subroutine). SP52 will be on and the error code will be stored in
V7755.
Appendix B
Error Codes
Description
Appendix A
DL405 Error Codes
B4
Appendix B
Error Codes
Description
E433
INVALID SBR
ADDRESS
A SBR must be programmed after the end statement, not in the main body of
the program or in an interrupt routine. SP52 will be on and the error code will
be stored in V7755.
E434
INVALID RTC
ADDRESS
A RTC must be programmed after the end statement, not in the main body of
the program or in an interrupt routine. SP52 will be on and the error code will
be stored in V7755.
E435
INVALID RT
ADDRESS
A RT must be programmed after the end statement, not in the main body of
the program or in an interrupt routine. SP52 will be on and the error code will
be stored in V7755.
E436
INVALID INT
ADDRESS
An INT must be programmed after the end statement, not in the main body of
the program. SP52 will be on and the error code will be stored in V7755.
E437
INVALID IRTC
ADDRESS
An IRTC must be programmed after the end statement, not in the main body
of the program. SP52 will be on and the error code will be stored in V7755.
E438
INVALID IRT
ADDRESS
An IRT must be programmed after the end statement, not in the main body of
the program. SP52 will be on and the error code will be stored in V7755.
E440
INVALID DATA
ADDRESS
Either the DLBL instruction has been programmed in the main program area
(not after the END statement), or the DLBL instruction is on a rung containing
input contact(s).
E441
ACON/NCON
An ACON or NCON must be programmed after the end statement, not in the
main body of the program. SP52 will be on and the error code will be stored
in V7755.
E451
BAD MLS/MLR
E453
MISSING T/C
E454
BAD TMRA
E455
BAD CNT
E456
BAD SR
B5
DL05 Error Codes
E461
STACK OVERFLOW
More than nine levels of logic have been stored on the stack. Check the use
of OR STR and AND STR instructions.
E462
STACK
UNDERFLOW
An unmatched number of logic levels have been stored on the stack. Insure
the number of AND STR and OR STR instructions match the number of STR
instructions.
E463
LOGIC ERROR
E464
MISSING CKT
E471
DUPLICATE COIL
REFERENCE
E472
DUPLICATE TMR
REFERENCE
E473
DUPLICATE CNT
REFERENCE
E499
PRINT
INSTRUCTION
Invalid PRINT instruct usage. Quotations and/or spaces were not entered or
entered incorrectly.
Appendix B
Error Codes
Description
Appendix A
DL405 Error Codes
B6
Appendix B
Error Codes
Description
E501
BAD ENTRY
E502
BAD ADDRESS
E503
BAD COMMAND
E504
BAD REF/VAL
E505
INVALID
INSTRUCTION
E506
INVALID
OPERATION
E520
BAD OPRUN
E521
BAD OPTRUN
An operation which is invalid in the TEST RUN mode was attempted by the
handheld programmer.
E523
BAD OPTPGM
E524
BAD OPPGM
E525
MODE SWITCH
E526
OFF LINE
E527
ON LINE
E528
CPU MODE
E540
CPU LOCKED
The CPU has been password locked. To unlock the CPU use AUX82 with the
password.
E541
WRONG
PASSWORD
The password used to unlock the CPU with AUX82 was incorrect.
E542
PASSWORD RESET
The CPU powered up with an invalid password and reset the password to
00000000. A password may be re-entered using AUX81.
E601
MEMORY FULL
E602
INSTRUCTION
MISSING
A search function was performed and the instruction was not found.
B7
DL05 Error Codes
E603
DATA MISSING
A search function was performed and the data was not found.
E604
REFERENCE
MISSING
A search function was performed and the reference was not found.
E620
OUT OF MEMORY
E621
EEPROM NOT
BLANK
E622
NO HPP EEPROM
E623
SYSTEM EEPROM
E624
V-MEMORY ONLY
E625
PROGRAM ONLY
E626
PROM MC
E627
BAD WRITE
E628
EEPROM TYPE
ERROR
The wrong size EEPROM is being used in the handheld programmer. This
error occurs when the program size is larger than what the HPP can hold.
E640
COMPARE ERROR
A compare between the EEPROM handheld programmer and the CPU was
found to be in error.
E641
VOLUME LEVEL
The volume level of the cassette player is not set properly. Adjust the volume
and retry the operation.
E642
An error was detected while data was being transferred to the handheld
CHECKSUM ERROR programmers Memory Cartridge. Check cabling and retry the operation.
E650
HPP SYSTEM
ERROR
A system error has occurred in the handheld programmer. Power cycle the
handheld programmer. If the error returns replace the handheld programmer.
E651
HPP ROM ERROR
A ROM error has occurred in the handheld programmer. Power cycle the
handheld programmer. If the error returns replace the handheld programmer.
E652
HPP RAM ERROR
A RAM error has occurred in the handheld programmer. Power cycle the
handheld programmer. If the error returns replace the handheld programmer.
Appendix B
Error Codes
Description
Appendix A
DL405 Error Codes
Instruction
Execution Times
In This Appendix. . . .
Introduction
Instruction Execution Times
1C
C2
Instruction Execution Times
Introduction
This appendix contains several tables that provide the instruction execution times
for DL05 Micro PLCs. Many of the execution times depend on the type of data used
with the instruction. Registers may be classified into the following types:
S Data (word) Registers
S Bit Registers
V-Memory Data
Registers
Some V-memory locations are considered data registers, such as timer or counter
current values. Standard user V memory is classified as a V-memory data register.
Note that you can load a bit pattern into these types of registers, even though their
primary use is for data registers. The following locations are data registers:
Appendix C
Inst. Execution Times
Data Registers
V-Memory Bit
Registers
DL05
V0 - V177
V1000 - V1177
V1200 - V7377
V7400 - V7577
You may recall that some of the discrete points such as X, Y, C, etc. are automatically
mapped into V memory. The following bit registers contain this data:
Bit Registers
DL05
V40400 - V40417
V40500 - V40517
V40600 - V40637
Stages (S)
V41000 - V41017
V41100 - V41107
V41140 - V41147
V41200 - V41237
X1
Y0 Y7
SET
C0
In these cases, execution times that depend on the amount and type of parameters.
The execution time tables list execution times for both situations, as shown below:
SET
RST
32.2 ms
1st #:
X, Y, C, S
2nd #:
X, Y, C, S
1st #:
X, Y, C, S
2nd #:
X, Y, C, S (N pt)
(N pt)
14ms+3.1msxN
34.4 ms
16+3.2xN
Execution depends
on numbers of
locations and types
of data used
C3
Instruction Execution Times
DL05
Boolean Instructions
Instruction
Execute
Not Execute
X, Y, C, T, CT, S, SP
2.0 ms
2.0 ms
STRN
X, Y, C, T, CT, S, SP
2.3 ms
2.3 ms
OR
X, Y, C, T, CT, S, SP
1.6 ms
1.6 ms
ORN
X, Y, C, T, CT, S, SP
1.9 ms
1.9 ms
AND
X, Y, C, T, CT, S, SP
1.4 ms
1.4 ms
ANDN
X, Y, C, T, CT, S, SP
1.6 ms
1.6 ms
ANDSTR
None
1.3 ms
1.3 ms
ORSTR
None
1.3 ms
1.3 ms
OUT
X, Y, C
6.8 ms
6.8 ms
OROUT
X, Y, C
6.7 ms
6.7 ms
NOT
None
1.6 ms
1.6 ms
PD
X, Y, C
52.3 ms
53.0 ms
STRPD
X, Y, C, T, CT, S, SP
20.2 ms
12.9 ms
STRND
X, Y, C, T, CT, S, SP
20.1 ms
13.0 ms
ORPD
X, Y, C, T, CT, S, SP
20.0 ms
12.6 ms
ORND
X, Y, C, T, CT, S, SP
19.8 ms
12.7 ms
ANDPD
X, Y, C, T, CT, S, SP
20.0 ms
12.6 ms
ANDND
X, Y, C, T, CT, S, SP
19.9 ms
12.8 ms
SET
1st #:
X, Y, C, S
2nd #:
X, Y, C, S
1st #:
X, Y, C, S
2nd #:
X, Y, C, S (N pt)
1st #:
T, CT
2nd #:
T, CT (N pt)
RST
PAUSE
1wd: Y
2wd: Y (N points)
(N pt)
32.2 ms
3.7 ms
14ms+3.1msxN
4.7 ms
34.4 ms
3.7 ms
16+3.2xN
4.7 ms
63.6 ms
3.7 ms
39+6.7xN
4.9 ms
23.4 ms
23.0 ms
19.7+1.5xN
19.5+1.4xN
Appendix C
Inst. Execution Times
STR
C4
Instruction Execution Times
Comparative
Boolean
Instructions
Instruction
STRE
Appendix C
Inst. Execution Times
DL05
STRNE
Execute
Not Execute
1st
2nd
V: Data Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
17.0 ms
17.0 ms
11.7 ms
42.8 ms
42.8 ms
16.8 ms
16.8 ms
11.6 ms
42.7 ms
42.7 ms
V: Bit Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
17.0 ms
17.0 ms
11.7 ms
42.8 ms
42.8 ms
16.8 ms
16.8 ms
11.6 ms
42.7 ms
42.7 ms
P:Indir. (Data)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
42.8 ms
42.8 ms
38.1 ms
66.8 ms
66.8 ms
42.7 ms
42.7 ms
38.0 ms
66.7 ms
66.7 ms
P:Indir. (Bit)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
42.8 ms
42.8 ms
38.1 ms
66.8 ms
66.8 ms
42.7 ms
42.7 ms
38.0 ms
66.7 ms
66.7 ms
1st
2nd
V: Data Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
17.1 ms
17.1 ms
11.8 ms
43.0 ms
43.0 ms
17.3 ms
17.3 ms
12.0 ms
43.1 ms
43.1 ms
V: Bit Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
17.1 ms
17.1 ms
11.8 ms
43.0 ms
43.0 ms
17.3 ms
17.3 ms
12.0 ms
43.1 ms
43.1 ms
P:Indir. (Data)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
43.0 ms
43.0 ms
38.2 ms
67.0 ms
67.0 ms
43.1 ms
43.1 ms
38.4 ms
67.1 ms
67.1 ms
P:Indir. (Bit)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
43.0 ms
43.0 ms
38.2 ms
67.0 ms
67.0 ms
43.1 ms
43.1 ms
38.4 ms
67.1 ms
67.1 ms
C5
Instruction Execution Times
DL05
Execute
Not Execute
1st
2nd
V: Data Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
16.6 ms
16.6 ms
11.5 ms
42.6 ms
42.6 ms
16.5 ms
16.5 ms
11.4 ms
42.5 ms
42.5 ms
V: Bit Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
16.6 ms
16.6 ms
11.5 ms
42.6 ms
42.6 ms
16.5 ms
16.5 ms
11.4 ms
42.5 ms
42.5 ms
P:Indir. (Data)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
37.7 ms
37.7 ms
42.6 ms
66.5 ms
66.5 ms
37.6 ms
37.6 ms
42.5 ms
66.4 ms
66.4 ms
P:Indir. (Bit)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
37.7 ms
37.7 ms
42.6 ms
66.5 ms
66.5 ms
37.6 ms
37.6 ms
42.5 ms
66.4 ms
66.4 ms
1st
2nd
V: Data Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
16.7 ms
16.7 ms
11.6 ms
42.7 ms
42.7 ms
16.8 ms
16.8 ms
11.7 ms
42.9 ms
42.9 ms
V: Bit Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
16.7 ms
16.7 ms
11.6 ms
42.7 ms
42.7 ms
16.8 ms
16.8 ms
11.7 ms
42.9 ms
42.9 ms
P:Indir. (Data)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
42.7 ms
42.7 ms
37.8 ms
66.6 ms
66.6 ms
42.8 ms
42.8 ms
38.0 ms
66.7 ms
66.7 ms
P:Indir. (Bit)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
42.7 ms
42.7 ms
37.8 ms
66.6 ms
66.6 ms
42.8 ms
42.8 ms
38.0 ms
66.7 ms
66.7 ms
Appendix C
Inst. Execution Times
ORNE
C6
Instruction Execution Times
DL05
Appendix C
Inst. Execution Times
ANDE
ANDNE
Execute
Not Execute
1st
2nd
V: Data Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
16.6 ms
16.6 ms
11.5 ms
42.6 ms
42.6 ms
16.5 ms
16.5 ms
11.4 ms
42.5 ms
42.5 ms
V: Bit Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
16.6 ms
16.6 ms
11.5 ms
42.6 ms
42.6 ms
16.5 ms
16.5 ms
11.4 ms
42.5 ms
42.5 ms
P:Indir. (Data)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
42.6 ms
42.6 ms
37.7 ms
66.5 ms
66.5 ms
42.5 ms
42.5 ms
37.6 ms
66.3 ms
66.3 ms
P:Indir. (Bit)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
42.6 ms
42.6 ms
37.7 ms
66.5 ms
66.5 ms
42.5 ms
42.5 ms
37.6 ms
66.3 ms
66.3 ms
1st
2nd
V: Data Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
16.7 ms
16.7 ms
11.6 ms
42.7 ms
42.7 ms
16.8 ms
16.8 ms
11.7 ms
42.9 ms
42.9 ms
V: Bit Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
16.7 ms
16.7 ms
11.6 ms
42.7 ms
42.7 ms
16.8 ms
16.8 ms
11.7 ms
42.9 ms
42.9 ms
P:Indir. (Data)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
42.7 ms
42.7 ms
37.9 ms
66.6 ms
66.6 ms
42.9 ms
42.9 ms
38.1 ms
66.8 ms
66.8 ms
P:Indir. (Bit)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
42.7 ms
42.7 ms
37.9 ms
66.6 ms
66.6 ms
42.9 ms
42.9 ms
38.1 ms
66.8 ms
66.8 ms
C7
Instruction Execution Times
DL05
Execute
Not Execute
17.0 ms
17.0 ms
11.7 ms
42.8 ms
42.8 ms
16.9 ms
16.9 ms
11.6 ms
42.7 ms
42.7 ms
1st
2nd
T, CT
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
1st
2nd
V: Data Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
17.0 ms
17.0 ms
11.7 ms
42.8 ms
42.8 ms
16.9 ms
16.9 ms
11.6 ms
42.7 ms
42.7 ms
V: Bit Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
17.0 ms
17.0 ms
11.7 ms
42.8 ms
42.8 ms
16.9 ms
16.9 ms
11.6 ms
42.7 ms
42.7 ms
P:Indir. (Data)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
42.9 ms
42.9 ms
38.1 ms
66.8 ms
66.8 ms
42.8 ms
42.8 ms
38.0 ms
66.7 ms
66.7 ms
P:Indir. (Bit)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
42.9 ms
42.9 ms
38.1 ms
66.8 ms
66.8 ms
42.8 ms
42.8 ms
38.0 ms
66.7 ms
66.7 ms
1st
2nd
T, CT
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
17.1 ms
17.1 ms
11.9 ms
43.0 ms
43.0 ms
17.2 ms
17.2 ms
12.0 ms
43.1 ms
43.1 ms
1st
2nd
V: Data Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
17.1 ms
17.1 ms
11.9 ms
43.0 ms
43.0 ms
17.2 ms
17.2 ms
12.0 ms
43.1 ms
43.1 ms
V: Bit Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
17.1 ms
17.1 ms
11.9 ms
43.0 ms
43.0 ms
17.2 ms
17.2 ms
12.0 ms
43.1 ms
43.1 ms
P:Indir. (Data)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
43.0 ms
43.0 ms
38.3 ms
67.0 ms
67.0 ms
43.1 ms
43.1 ms
38.4 ms
67.1 ms
67.1 ms
P:Indir. (Bit)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
43.0 ms
43.0 ms
38.3 ms
67.0 ms
67.0 ms
43.1 ms
43.1 ms
38.4 ms
67.1 ms
67.1 ms
Appendix C
Inst. Execution Times
STRN
C8
Instruction Execution Times
DL05
Appendix C
Inst. Execution Times
OR
ORN
Execute
Not Execute
16.6 ms
16.6 ms
11.5 ms
42.6 ms
42.6 ms
16.5 ms
16.5 ms
11.4 ms
42.5 ms
42.5 ms
1st
2nd
T, CT
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
1st
2nd
V: Data Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
16.6 ms
16.6 ms
11.5 ms
42.6 ms
42.6 ms
16.5 ms
16.5 ms
11.4 ms
42.5 ms
42.5 ms
V: Bit Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
16.6 ms
16.6 ms
11.5 ms
42.6 ms
42.6 ms
16.5 ms
16.5 ms
11.4 ms
42.5 ms
42.5 ms
P:Indir. (Data)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
42.6 ms
42.6 ms
37.7 ms
66.5 ms
66.5 ms
42.5 ms
42.5 ms
37.6 ms
66.4 ms
66.4 ms
P:Indir. (Bit)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
42.6 ms
42.6 ms
37.7 ms
66.5 ms
66.5 ms
42.5 ms
42.5 ms
37.6 ms
66.4 ms
66.4 ms
1st
2nd
T, CT
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
15.8 ms
15.8 ms
10.8 ms
41.9 ms
41.9 ms
15.8 ms
15.8 ms
10.8 ms
41.9 ms
41.9 ms
1st
2nd
V: Data Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
15.8 ms
15.8 ms
10.8 ms
41.9 ms
41.9 ms
15.8 ms
15.8 ms
10.8 ms
41.9 ms
41.9 ms
V: Bit Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
15.8 ms
15.8 ms
10.8 ms
41.9 ms
41.9 ms
15.8 ms
15.8 ms
10.8 ms
41.9 ms
41.9 ms
P:Indir. (Data)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
41.8 ms
41.8 ms
37.1 ms
65.9 ms
65.9 ms
41.8 ms
41.8 ms
37.1 ms
65.9 ms
65.9 ms
P:Indir. (Bit)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
41.8 ms
41.8 ms
37.1 ms
65.9 ms
65.9 ms
41.8 ms
41.8 ms
37.1 ms
65.9 ms
65.9 ms
C9
Instruction Execution Times
DL05
Execute
Not Execute
15.6 ms
15.6 ms
10.9 ms
41.6 ms
41.6 ms
15.6 ms
15.6 ms
10.9 ms
41.6 ms
41.6 ms
1st
2nd
T, CT
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
1st
2nd
V: Data Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
15.6 ms
15.6 ms
10.9 ms
41.6 ms
41.6 ms
15.6 ms
15.6 ms
10.9 ms
41.6 ms
41.6 ms
V: Bit Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
15.6 ms
15.6 ms
10.9 ms
41.6 ms
41.6 ms
15.6 ms
15.6 ms
10.9 ms
41.6 ms
41.6 ms
P:Indir. (Data)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
41.6 ms
41.6 ms
36.9 ms
65.6 ms
65.6 ms
41.6 ms
41.6 ms
36.9 ms
65.6 ms
65.6 ms
P:Indir. (Bit)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
41.6 ms
41.6 ms
36.9 ms
65.6 ms
65.6 ms
41.6 ms
41.6 ms
36.9 ms
65.6 ms
65.6 ms
1st
2nd
T, CT
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
15.8 ms
15.8 ms
10.8 ms
41.9 ms
41.9 ms
15.7
15.7
10.8
41.9
41.9
1st
2nd
V: Data Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
15.8 ms
15.8 ms
10.8 ms
41.9 ms
41.9 ms
15.7 ms
15.7 ms
10.8 ms
41.9 ms
41.9 ms
V: Bit Reg.
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
15.8 ms
15.8 ms
10.8 ms
41.9 ms
41.9 ms
15.7 ms
15.7 ms
10.8 ms
41.9 ms
41.9 ms
P:Indir. (Data)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
41.8 ms
41.8 ms
37.8 ms
65.9 ms
65.9 ms
41.8 ms
41.8 ms
37.8 ms
65.9 ms
65.9 ms
P:Indir. (Bit)
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
41.8 ms
41.8 ms
37.8 ms
65.9 ms
65.9 ms
41.8 ms
41.8 ms
37.8 ms
65.9 ms
65.9 ms
Appendix C
Inst. Execution Times
ANDN
C10
Instruction Execution Times
Immediate
Instructions
Instruction
Appendix C
Inst. Execution Times
Execute
Not Execute
STRI
38.2 ms
38.2 ms
STRNI
38.5 ms
38.5 ms
ORI
37.7 ms
37.7 ms
ORNI
38.2 ms
38.2 ms
ANDI
37.7 ms
37.7 ms
ANDNI
38.1 ms
38.1 ms
OUTI
77.5 ms
77.5 ms
OROUTI
85.7 ms
85.7 ms
SETI
1st #:
68.0 ms
2nd #:
1st #:
2nd #:
RSTI
Timer, Counter,
and Shift Register
DL05
Immediate Instructions
(N pt)
108.5ms+1.6msxN
3.2 ms
4.3 ms
(N pt)
66.9
10.8ms+1.7msxN
3.3 ms
4.4 ms
DL05
TMRF
TMRA
TMRAF
CNT
2nd
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
1st
2nd
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
1st
2nd
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
1st
2nd
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
1st
2nd
CT
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
Execute
Not Execute
64.0 ms
64.0 ms
58.1 ms
91.0 ms
91.0 ms
59.0 ms
59.0 ms
53.1 ms
86.0 ms
86.0 ms
64.8 ms
64.8 ms
59.5 ms
92.5 ms
92.5 ms
57.3 ms
57.3 ms
52.0 ms
85.0 ms
85.0 ms
72.2 ms
72.2 ms
65.7 ms
99.2 ms
99.2 ms
66.5 ms
66.5 ms
60.0 ms
93.5 ms
93.5 ms
71.4 ms
71.4 ms
65.2 ms
98.9 ms
98.9 ms
65.6 ms
65.6 ms
59.5 ms
93.1 ms
93.1 ms
79.5 ms
79.5 ms
73.7 ms
107.0 ms
107.0 ms
66.9 ms
66.9 ms
61.1 ms
94.4 ms
94.4 ms
C11
Instruction Execution Times
DL05
UDC
SR
Accumulator Data
Instructions
2nd
CT
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
1st
2nd
CT
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
(N points to shift)
Execute
Not Execute
76.5 ms
76.5 ms
70.8 ms
106.8 ms
106.8 ms
75.3 ms
75.3 ms
69.6 ms
105.4 ms
105.4 ms
118.3 ms
118.3 ms
111.8 ms
145.0 ms
145.0 ms
101.1 ms
101.1 ms
94.6 ms
128.0 ms
128.0 ms
43.4ms+25.6msxN
31.4 ms
DL05
Execute
Not Execute
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
43.7 ms
43.7 ms
42.7 ms
68.7 ms
68.7 ms
3.7 ms
3.7 ms
3.7 ms
3.7 ms
3.7 ms
LDD
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
47.1 ms
47.1 ms
42.8 ms
72.2 ms
72.2 ms
3.7 ms
3.7 ms
3.7 ms
3.7 ms
3.7 ms
LDF
1st
2nd
X, Y, C, S
T, CT, SP
K:Constant
(N pt)
65.8ms+13.9msxN
4.9 ms
LDA
42.7 ms
3.7 ms
OUT
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
16.6 ms
16.6 ms
41.8 ms
41.8 ms
3.7 ms
3.7 ms
3.7 ms
3.7 ms
OUTD
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
18.1 ms
18.1 ms
43.3 ms
43.3 ms
3.8 ms
3.8 ms
3.8 ms
3.8 ms
OUTF
1st
2nd
X, Y, C
K:Constant
(N pt)
61.9ms+22msxN
4.7 ms
41.1 ms
2.7 ms
POP
None
Appendix C
Inst. Execution Times
LD
C12
Instruction Execution Times
Appendix C
Inst. Execution Times
Logical
Instructions
Math Instructions
DL05
Execute
Not Execute
AND
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
23.5 ms
23.5 ms
48.3 ms
48.3 ms
3.9 ms
3.9 ms
3.9 ms
3.9 ms
ANDD
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
23.3 ms
23.3 ms
19.0 ms
48.3 ms
48.3 ms
3.7 ms
3.7 ms
3.9 ms
3.9 ms
3.9 ms
OR
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
23.9 ms
23.9 ms
48.8 ms
48.8 ms
3.7 ms
3.7 ms
3.8 ms
3.8 ms
ORD
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
23.8 ms
23.8 ms
19.4 ms
48.6 ms
48.6 ms
3.8 ms
3.8 ms
3.7 ms
3.7 ms
3.7 ms
XOR
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
23.5 ms
23.5 ms
48.3 ms
48.3 ms
3.9 ms
3.9 ms
3.9 ms
3.9 ms
XORD
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
23.3 ms
23.3 ms
19.0 ms
48.3 ms
48.3 ms
3.7 ms
3.7 ms
3.9 ms
3.9 ms
3.9 ms
CMP
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
25.4 ms
25.4 ms
50.0 ms
50.0 ms
3.7 ms
3.7 ms
3.7 ms
3.7 ms
CMPD
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
37.3 ms
37.3 ms
32.7 ms
62.0 ms
62.0 ms
3.9 ms
3.9 ms
3.7 ms
3.8 ms
3.8 ms
DL05
Execute
Not Execute
ADD
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
140.7 ms
140.7 ms
185.1 ms
185.1 ms
3.7 ms
3.7 ms
3.7 ms
3.7 ms
ADDD
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
152.4 ms
152.4 ms
123.2 ms
193.5 ms
193.5 ms
3.9 ms
3.9 ms
3.7 ms
3.7 ms
3.7 ms
SUB
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
148.1 ms
148.1 ms
192.7 ms
192.7 ms
3.7 ms
3.7 ms
3.7 ms
3.7 ms
C13
Instruction Execution Times
DL05
Execute
Not Execute
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
157.0 ms
157.0 ms
131.4 ms
201.9 ms
201.9 ms
3.9 ms
3.9 ms
3.9 ms
3.7 ms
3.7 ms
MUL
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
305.0 ms
305.0 ms
289.1 ms
349.6 ms
349.6 ms
3.7 ms
3.7 ms
3.7 ms
3.7 ms
3.7 ms
MULD
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
1261.3 ms
1261.3 ms
1307.3 ms
1307.3 ms
3.8 ms
3.8 ms
3.7 ms
3.7 ms
DIV
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
557.1 ms
557.1 ms
530.5 ms
580.5 ms
580.5 ms
3.7 ms
3.7 ms
3.7 ms
3.7 ms
3.7 ms
DIVD
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
562.2 ms
562.2 ms
596.4 ms
596.4 ms
3.8 ms
3.8 ms
3.7 ms
3.7 ms
INC
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
35.7 ms
35.7 ms
60.2 ms
60.2 ms
3.4 ms
3.4 ms
3.4 ms
3.4 ms
DEC
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
41.4 ms
41.4 ms
64.2 ms
64.2 ms
3.3 ms
3.3 ms
3.3 ms
3.3 ms
ADDB
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
69.5 ms
69.5 ms
67.3 ms
94.2 ms
94.2 ms
3.3 ms
3.3 ms
3.3 ms
3.6 ms
3.6 ms
SUBB
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
69.3 ms
69.3 ms
67.8 ms
94.3 ms
94.3 ms
3.3 ms
3.3 ms
3.5 ms
3.2 ms
3.2 ms
MULB
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
23.4 ms
23.4 ms
19.8 ms
48.5 ms
48.5 ms
3.2 ms
3.2 ms
3.3 ms
3.2 ms
3.2 ms
DIVB
V:Data Reg.
V:Bit Reg.
K:Constant
P:Indir. (Data)
P:Indir. (Bit)
76.1 ms
76.1 ms
76.9 ms
105.5 ms
105.5 ms
3.3 ms
3.3 ms
3.3 ms
3.2 ms
3.2 ms
Appendix C
Inst. Execution Times
SUBD
C14
Instruction Execution Times
DL05
Bit Instructions
Appendix C
Inst. Execution Times
Not Execute
INCB
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
23.0 ms
23.0 ms
46.8 ms
46.8 ms
3.4 ms
3.4 ms
3.3 ms
3.3 ms
DECB
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
23.2 ms
23.2 ms
47.5 ms
47.5 ms
2.5 ms
2.5 ms
3.4 ms
3.4 ms
DL05
Number
Conversion
Instructions
Execute
Execute
Not Execute
SUM
None
19.2 ms
2.3 ms
SHFR
23.0 ms
23.0 ms
20.3 ms
3.4 ms
3.4 ms
3.3 ms
SHFL
29.7 ms
29.7 ms
20.4 ms
3.4 ms
3.4 ms
3.3 ms
ENCO
None
12.6 ms
2.3 ms
DECO
None
20.3 ms
2.3 ms
DL05
Not Execute
BIN
Instruction
None
75.8 ms
2.3 ms
BCD
None
159.9 ms
2.2 ms
INV
None
6.2 ms
2.3 ms
ATH
97ms+20msxN
3.3 ms
HTA
98ms+27msxN
2.1 ms
GRAY
None
224.7 ms
2.3 ms
SFLDGT
None
95.3 ms
2.2 ms
Table Instructions
DL05
Table Instructions
Instruction
MOV
MOVMC
LDLBL
Execute
Not Execute
63ms+16msxN
3.3 ms
50ms+15msxN
3.3 ms
33.5 ms
4.2 ms
C15
Instruction Execution Times
CPU Control
Instructions
Program Control
Instructions
Network
Instructions
Instruction
Execute
Not Execute
NOP
None
1.1 ms
1.1 ms
END
None
24.0 ms
24.0 ms
STOP
None
10.0 ms
1.1 ms
RSTWDT
None
5.9 ms
2.2 ms
NOT
None
1.6 ms
1.6 ms
DL05
Execute
Not Execute
FOR
V, K
125.9 ms
14.5 ms
NEXT
None
64.4 ms
64.4 ms
GTS
27.5 ms
14.8 ms
SBR
1.5 ms
1.5 ms
RTC
None
25.7 ms
12.1 ms
RT
None
21.2 ms
21.2 ms
MLS
K (17)
35.2 ms
35.2 ms
MLR
K (07)
30.9 ms
30.9 ms
DL05
Interrupt Instructions
Instruction
Execute
Not Execute
ENI
None
24.2 ms
2.7 ms
DISI
None
9.4 ms
2.3 ms
INT
O(0,1)
7.5 ms
IRTC
None
0.9 ms
1.3 ms
IRT
None
6.6 ms
DL05
Network Instructions
Instruction
Execute
Not Execute
RX
X, Y, C, T, CT, SP, S, $
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
852.0 ms
852.0 ms
852.0 ms
868.2 ms
868.2 ms
4.4 ms
4.4 ms
4.4 ms
4.2 ms
4.2 ms
WX
X, Y, C, T, CT, SP, S, $
V:Data Reg.
V:Bit Reg.
P:Indir. (Data)
P:Indir. (Bit)
1614.0 ms
1614.0 ms
1614.0 ms
1630.0 ms
1630.0 ms
4.4 ms
4.4 ms
4.4 ms
4.4 ms
4.4 ms
Appendix C
Inst. Execution Times
Interrupt
Instructions
DL05
C16
Instruction Execution Times
Message
Instructions
Appendix C
Inst. Execution Times
RLL PLUS
Instructions
Drum
Instructions
DL05
Message Instructions
Instruction
Execute
Not Execute
65.0 ms
65.0 ms
204.7 ms
4.4 ms
4.4 ms
4.4 ms
FAULT
V:Data Reg.
V:Bit Reg.
K:Constant
DLBL
NCON
ACON
ASCII
631.0 ms
3.6 ms
DL05
Execute
Not Execute
ISG
44.0 ms
41.1 ms
SG
44.0 ms
41.1 ms
JMP
76.0 ms
9.3 ms
NJMP
77.4 ms
9.3 ms
CV
42.1 ms
27.5 ms
CVJMP
89.5 ms
17.6 ms
DL05
Drum Instructions
Instruction
Execute
Not Execute
DRUM
CT
840.0 ms
339.6 ms
EDRUM
CT
753.2 ms
357.0 ms
Special Relays
In This Appendix. . . .
1D
D2
Special Relays
Appendix A
Appendix D
Special Relays
SP0
First scan
on for the first scan after a power cycle or program to run transition
only. The relay is reset to off on the second scan. It is useful where a
function needs to be performed only on program startup.
SP1
Always ON
SP3
1 minute clock
SP4
1 second clock
SP5
100 ms clock
SP6
50 ms clock
SP7
Alternate scan
SP11
Forced run
mode
on when the mode switch is in the run position and the CPU is
running.
SP12
Terminal
run mode
SP13
Test
run mode
SP15
Test
stop mode
SP16
Terminal
PGM mode
on when the mode switch is the the TERM position and the CPU is in
program mode.
SP17
Forced stop
SP20
Forced
stop mode
SP22
Interrupt enabled on when interrupts have been enabled using the ENI instruction.
D3
Special Relays
System Monitoring
Accumulator
Status
Override setup
relay
SP37
Scan control
error
on when the actual scan time runs over the prescribed scan time.
SP40
Critical error
SP41
Warning
SP42
SP44
Program
memory error
SP45
I/O error
SP46
Communications
error
SP50
Fault instruction
SP51
Watch Dog
timeout
SP52
Grammatical
error
SP53
SP54
Communication
error
on whent RX, WX, RD, WT instructions are executed with the wrong
parameters.
SP56
Table instuction
overrun
SP60
SP61
Value equal to
SP62
Greater than
SP63
Zero
SP64
Half borrow
SP65
Borrow
SP66
Half carry
SP67
Carry
SP70
Sign
SP71
Pointer
reference error
SP73
Overflow
SP75
Data error
SP76
Load zero
Appendix D
Special Relays
SP36
D4
Appendix A
Special Relays
HSIO Pulse
Output Relay
Communication
Monitoring Relays
SP116
SP117
Appendix D
Special Relays
D5
Special Relays
Appendix D
Special Relays
DL05
Product Weights
In This Appendix. . . .
1E
E2
Product Weights
Appendix E
Product Weights
Appendix A
Weight
D005AR
D005DR
D005AD
D005DD
D005AA
D005DA
D005DRD
D005DDD
European Union
Directives (CE)
In This Appendix. . . .
1F
F2
European Union Directives
Appendix A
Member Countries
Applicable
Directives
Appendix F
EU Directives
Compliance
This area of certification and approval is absolutely vital to anyone who wants to do
business in Europe. One of the key tasks that faced the EU member countries and
the European Economic Area (EEA) was the requirement to bring several similar yet
distinct standards together into one common standard for all members. The primary
purpose of a single standard was to make it easier to sell and transport goods
between the various countries and to maintain a safe working and living
environment. The Directives that resulted from this merging of standards are now
legal requirements for doing business in Europe. Products that meet these
Directives are required to have a CE mark to signify compliance.
As of January 1, 1997, the members of the EU are Austria, Belgium, Denmark,
Finland, France, Germany, Greece, Ireland, Italy, Luxembourg, The Netherlands,
Portugal, Spain, Sweden, and the United Kingdom. Iceland, Liechtenstein, and
Norway together with the EU members make up the European Economic Area
(EEA) and all are covered by the Directives.
There are several Directives that apply to our products. Directives may be amended,
or added, as required.
S Electromagnetic Compatibility Directive (EMC) this Directive
attempts to ensure that devices, equipment, and systems have the
ability to function satisfactorily in its electromagnetic environment
without introducing intolerable electromagnetic disturbance to anything
in that environment.
S Machinery Safety Directive this Directive covers the safety aspects
of the equipment, installation, etc. There are several areas involved,
including testing standards covering both electrical noise immunity and
noise generation.
S Low Voltage Directive this Directive is also safety related and
covers electrical equipment that has voltage ranges of 501000VAC
and/or 751500VDC.
S Battery Directive this Directive covers the production, recycling, and
disposal of batteries.
Certain standards within each Directive already require mandatory compliance. The
EMC Directive, which has gained the most attention, became mandatory as of
January 1, 1996. The Low Voltage Directive became mandatory as of January 1,
1997.
Ultimately, we are all responsible for our various pieces of the puzzle. As
manufacturers, we must test our products and document any test results and/or
installation procedures that are necessary to comply with the Directives. As a
machine builder, you are responsible for installing the products in a manner which
will ensure compliance is maintained. You are also responsible for testing any
combinations of products that may (or may not) comply with the Directives when
used together.
F3
European Union Directives
The end user of the products must comply with any Directives that may cover
maintenance, disposal, etc. of equipment or various components. Although we
strive to provide the best assistance available, it is impossible for us to test all
possible configurations of our products with respect to any specific Directive.
Because of this, it is ultimately your responsibility to ensure that your machinery (as
a whole) complies with these Directives and to keep up with applicable Directives
and/or practices that are required for compliance.
As of January 1, 1999, the DL05, DL205, DL305, and DL405 PLC systems
manufactured by Koyo Electronics Industries or FACTS Engineering, when properly
installed and used, conform to the Electromagnetic Compatibility (EMC), Low
Voltage Directive, and Machinery Directive requirements of the following standards.
S EMC Directive Standards Revelant to PLCs
EN500811 Generic emission standard for residential, commercial,
and light industry
EN500812 Generic emission standard for industrial environment.
EN500821 Generic immunity standard for residential, commercial,
and light industry
EN500822 Generic immunity standard for industrial environment.
S Low Voltage Directive Standards Applicable to PLCs
EN610101 Safety requirements for electrical equipment for
measurement, control, and laboratory use.
S Product Specific Standard for PLCs
EN611312 Programmable controllers, equipment requirements and
tests. This standard replaces the above generic standards for immunity
and safety. However, the generic emissions standards must still be used
in conjunction with the following standards:
EN 61000-3-2 Harmonics
EN 61000-3-2 Fluctuations
PLCDirect is currently in the process of changing their testing
procedures from the generic standards to the product specific
standards.
Special Installation The installation requirements to comply with the requirements of the Machinery
Directive, EMC Directive and Low Voltage Directive are slightly more complex than
Manual
the normal installation requirements found in the United States. To help with this, we
have published a special manual which you can order:
S DAEUM EU Installation Manual that covers special installation
requirements to meet the EU Directive requirements. Order this manual
to obtain the most up-to-date information.
Appendix F
EU Directives
F4
European Union Directives
Appendix A
Other Sources of
Information
Although the EMC Directive gets the most attention, other basic Directives, such as
the Machinery Directive and the Low Voltage Directive, also place restrictions on the
control panel builder. Because of these additional requirements it is recommended
that the following publications be purchased and used as guidelines:
S BSI publication TH 42073: February 1996 covers the safety and
electrical aspects of the Machinery Directive
S EN 602041:1992 General electrical requirements for machinery, including
Low Voltage and EMC considerations
S IEC 100052: EMC earthing and cabling requirements
S IEC 100051: EMC general considerations
It may be possible for you to obtain this information locally; however, the official
source of applicable Directives and related standards is:
The Office for Official Publications of the European Communities
L2985 Luxembourg; quickest contact is via the World Wide Web at
http://euroop.eu.int/indexn.htm
Another source is:
British Standards Institution Sales Department
Linford Wood
Milton Keynes
MK14 6LE
United Kingdom; the quickest contact is via the World Wide Web at
http://www.bsi.org.uk
Appendix F
EU Directives
Enclosures
The simplest way to meet the safety requirements of the Machinery and Low Voltage
Directives is to house all control equipment in an industry standard lockable steel
enclosure. This normally has an added benefit because it will also help ensure that
the EMC characteristics are well within the requirements of the EMC Directive.
Although the RF emissions from the PLC equipment, when measured in the open
air, are well below the EMC Directive limits, certain configurations can increase
emission levels. Holes in the enclosure, for the passage of cables or to mount
operator interfaces, will often increase emissions.
F5
European Union Directives
AC Mains Filters
Filter
Schaffner
FN2010
Transient
Suppressor
To AC
Input
Circuitry
Fused
Terminals
Earth
Terminal
L N
NOTE: Very few mains filters can reduce problem emissions to negligible levels. In
some cases, filters may increase conducted emissions if not properly matched to the
problem emissions.
Suppression and
Fusing
In order to comply with the fire risk requirements of the Low Voltage and Machinery
Appendix F
EU Directives
Internal Enclosure
Grounding
F6
European Union Directives
Appendix A
Equipotential
Grounding
Key
Adequate site earth grounding must be provided for equipment containing modern
electronic circuitry. The use of isolated earth electrodes for electronic systems is
forbidden in some countries. Make sure you check any requirements for your
particular destination. IEC 100052 covers equi-potential bonding of earth grids
adequately, but special attention should be given to apparatus and control cubicles
that contain I/O devices, remote I/O racks, or have inter-system communications with
the primary PLC system enclosure. An equi-potential bond wire must be provided
alongside all serial communications cables, and to any separate items of the plant
which contain I/O devices connected to the PLC. The diagram shows an example
of four physical locations connected by a communications cable.
Communications
and Shielded
Cables
Screened
Cable
Conductive
Adapter
Serial
I/O
To Earth
Block
Equi-potential
Bond
Appendix F
EU Directives
Control Cubicle
Good quality 24 AWG minimum twisted-pair shielded cables, with overall foil and
braid shields are recommended for analog cabling and communications cabling
outside of the PLC enclosure. To date it has been a common practice to only provide
an earth ground for one end of the cable shield in order to minimize the risk of noise
caused by earth ground loop currents between apparatus. The procedure of only
grounding one end, which primarily originated as a result of trying to reduce hum in
audio systems, is no longer applicable to the complex industrial environment.
Shielded cables are also efficient emitters of RF noise from the PLC system, and can
interact in a parasitic manner in networks and between multiple sources of
interference.
F7
European Union Directives
Multidrop Cables
Slave n
Master
TXD 0V RXD
+
+
RXD 0V TXD
+
+
100W
100W
Termination
Termination
Appendix F
EU Directives
When you run cables between PLC items within an enclosure which also contains
Shielded Cables
within Enclosures susceptible electronic equipment from other manufacturers, remember that these cables
may be a source of RF emissions. There are ways to minimize this risk. Standard data
cables connecting PLCs and/or operator interfaces should be routed well away from other
equipment and their associated cabling. You can make special serial cables where the
cable shield is connected to the enclosures earth ground at both ends, the same way as
external cables are connected.
For safety reasons, it is a specific requirement of the Machinery Directive that a keyswitch
Network Isolation
must be provided that isolates any network input signal during maintenance, so that
remote commands cannot be received that could result in the operation of the machinery.
The FAISONET does not have a keyswitch! Use a keylock and switch on your enclosure
which when open removes power from the FAISONET. To avoid the introduction of
noise into the system, any keyswitch assembly should be housed in its own earth
grounded steel box and the integrity of the shielded cable must be maintained.
Again, for further information on EU directives we recommend that you get a copy of
our EU Installation Manual (DAEUM). Also, if you are connected to the World
Wide Web, you can check the EU Commisions official site at:
http://europ.eu.int/
F8
European Union Directives
Appendix A
DC Powered
Versions
Due to slightly higher emissions radiated by the DC powered versions of the DL05, and
the differing emissions performance for different DC supply voltages, the following
stipulations must be met.
S The PLC must be housed within a metallic enclosure with a minimum
amount of orifices.
S The communication cable and all I/O cables must pass through suitable
ferrite beads which must be mounted within the enclosure. The I/O
cables can be bundled together and passed through the same ferrite.
Recommended ferrite beads and split cores are detailed below. These were used in
extensive EMC tests and found to successfully attenuate radiated emissions to a
high degree.
For I/O Bundle
Manufacturer
OD
mm
ID
mm
L
mm
1 Turn
L/25 MHz
W
1 Turn
L/100 MHz
W
2 Turn
L/25 MHz
W
2 Turn
L/100 MHz
W
RS Online
2606795
17.5
9.5
28.5
153
210
649
632
FairRite
2643665702
17.5
9.5
28.5
153
210
649
632
742 700 9
17.5
9.5
28.5
153
210
649
632
Wurth Elektronik
Appendix F
EU Directives
2224416
26.6
FairRite
0444167281
26.6
Richco
MTFC 231114T
26.6
16.6
72
132
301
547
10.7
16.6
72
132
301
547
10.7
16.6
72
132
301
547
F9
European Union Directives
Items Specific to
the DL05
S
S
S
S
S
S
S
The rating between all circuits in this product are rated as basic
insulation only, as appropriate for single fault conditions.
There is no isolation offered between the PLC and the analog inputs of
this product.
It is the responsibility of the system designer to earth one side of all
control and power circuits, and to earth the braid of screened cables.
This equipment must be properly installed while adhering to the
guidelines of the in house PLC installation manual DAEUM, and the
installation standards IEC 100051, IEC 100052 and IEC 11314.
It is a requirement that all PLC equipment must be housed in a
protective steel enclosure, which limits access to operators by a lock
and power breaker. If access is required by operators or untrained
personnel, the equipment must be installed inside an internal cover or
secondary enclosure.
It should be noted that the safety requirements of the machinery
directive standard EN602041 state that all equipment power circuits
must be wired through isolation transformers or isolating power
supplies, and that one side of all AC or DC control circuits must be
earthed.
Both power input connections to the PLC must be separately fused
using 3 amp T type antisurge fuses, and a transient suppressor fitted
to limit supply overvoltages.
If the user is made aware by notice in the documentation that if the
equipment is used in a manner not specified by the manufacturer the
protection provided by the equipment may be impaired.
Appendix F
EU Directives
1
Index
A
Accumulating Fast Timer instruction, 533
Accumulating Timer instruction, 533
Accumulator Stack Load Instructions, 543
Cables
operator interfaces, 214
programming, 19
programming devices, 214
Agency approvals, 28
Alarms, PID, 853
Communications problems, 97
B
Bias freeze, 837
Index2
removal, 25
Control Output, 829
Control Relay Bit Map, 430
Converge Jump instruction, 723
Converge Stage instruction, 723
Convergence Stages, 719
Converting Number Formats
ASCII TO HEX, 586
Hex to ASCII, 587
Counter instruction, 536
counter assignments, 66
drum control techniques, 610
EDRUM (Event Drum), 614
handheld programmer mnemonics, 616
overview of drum operation, 68
powerup state, 69
selfresetting, 611
step transition, 64
Drum sequencer programming, 112
Emergency stop, 23
CPU
changing modes, 47
configuration, A5
features, 42
hardware setup, 44
indicators, 96
instruction list, 52
Mode switch, 46
specifications, 43
status indicators, 46
CPU Indicator, 97
European Directives, F2
End Instruction, 54
Environmental specifications, 28
Equal relays, 39, D3, D5
Error codes
code locations, 93
listing, B2B9
pulse output errors, 343
D
Data Label instruction, 5106, 5108
Decrement Binary instruction, 571
Execution Times, C3
Fatal Errors, 92
Diagnostics, 92
Dimensions, 26
DirectNET, 435
Divide Double instruction, 570
Divide instruction, 569
DL05 Micro PLC
front panel, 24
mounting guidelines, 26
unit dimensions, 26
Drum instruction, 62, 612
chart representation, 63
G
Goto Subroutine instruction, 599
Gray Code instruction, 589
Index3
H
Handheld programmer, A6
EEPROM operations, A7
HEX TO ASCII instructions, 587
Highspeed I/O
configuration, 35
discrete inputs with filter, 353
features, 32
highspeed counter, 36
highspeed interrupts, 345
I/O Point Usage, 34
modes, 34
programming, 311, 322, 341
pulse catch input, 350
pulse output, 325
J
Jump instruction, 77, 722
L
Load Address instruction, 551
Load Formatted instruction, 550
I
I/O Response Time, 415
Initial Stages, 75
Maintenance, 92
Instructions
accumulator / stack Load, 543
bit operation, 578
boolean, 59
capable of run time edits, 914
comparative boolean, 520
drum, 62, 612
execution times, C2, C3, C6
immediate, 526
interrupt, 5104
list of, 52
logical, 555
math, 563
message, 5107
network, 5114
number conversion, 583
program control, 597
stage, 721
stage programming, 72
table, 592
timer, counter, and shift register, 530
Manual, organization, 14
Index4
Multiply Binary instruction, 576
Panel layout, 27
Password, 410, A8
PID Loops
Alarms, process, 853
algorithms, 831
basic operation, 819
bibliography, 863
cascade control, 851
data configuration, 826
features, 82
feed forward control, 847
On/Off control, 849
Ramp/Soak generator, 857
sample rate, 813
scheduling, 813
setup parameters, 86
terminology, 84, 864
troubleshooting tips, 862
tuning procedure, 838
Power indicator, 96
Presets, 38
calculating values, 310
starting location, 39
Power wiring, 19
Profiles
home search, 338
motion control, 325
registration, 330, 335
trapezoidal, 330, 332
Index5
velocity, 330, 340
Program Control Instructions, 597
Program Execution Time, 419
Program Mode, 412
Programming, concepts, 112
Programming Methods, 15
examples, 110
Proportional term, 834
Q
Quick Start, 17
R
Ramp/soak generator, 857
Read from Network instruction, 5114
Registration profile, 330, 335
Relay wiring, 219
prolonging contact life, 221
Reset Immediate instruction, 529
Reset instruction, 518
Retentive Memory Ranges, 49
Reverse-acting loop, 833
Run Indicator, 97
Run Mode, 412
Run time edits, 914
Safety guidelines, 22
Setpoint, 827
Store instruction, 59
comparative, 523
Index6
Store Positive Differential instruction, 515
Subroutine Return Conditional instruction, 599
Troubleshooting guide
HSIO Mode 20, 324
HSIO Mode 30, 343
Vmemory, 426
Velocity algorithm, 831
Web site, 12
Wiring
counter input, 37
counter outputs, 37
DC inputs, 222
DC Outputs, 223
drive inputs, 327
emergency stop, 23
encoder, 33
fuse protection, 212
High Speed I/O, 224
power input, 19, 210, 211
pulse output, 327