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Delay Block/Debouncer: Author: Stephen Allen Microchip Technology Inc
Delay Block/Debouncer: Author: Stephen Allen Microchip Technology Inc
Delay Block/Debouncer
Author:
Stephen Allen
Microchip Technology Inc.
INTRODUCTION
In this application note, a PIC10F322 is being used to
implement a delay block/debouncer. The delay can be
set between 2 s and 193 s. This can be used
effectively as a noise discriminator, or for switch
debouncing.
When used as a delay block, the application can be
used to fix low-level timing issues on signals. When
used as a debouncer, it can debounce signals from a
mechanical switch so that a clean signal can feed other
circuitry.
The application makes use of the Configurable Logic
Cell (CLC) peripheral to produce fast switching on the
output (if desired). If the same application were written
using port logic only, there would be multiple instruction
cycles before the output would change in response to
an input. Using the CLC the signal can be routed
directly and only have propagation and gate delay
between the input and output signals. In order to get
the highest performance possible from the application,
it has been written in assembly.
The code has been written in-line (without subroutines)
to maximize switching performance of the application.
The code uses only 43 locations of program memory
(512 available), and one byte of RAM.
This application note was developed using a
PIC10F322 demo board (part # AC103011). Language
tool versions: MPASMWIN.exe v5.45, mplink.exe
v4.43, mplib.exe v4.43.
#define MS_DELAY
;#define MS_DELAY
MODES OF OPERATION
Rising Edge Delay
In this mode, only the rising edge has a delay, and the
falling edge will drop immediately.
DS01450A-page 1
AN1450
Falling Edge Delay (Pulse Extender)
FIGURE 1:
DS01450A-page 2
AN1450
When falling edge delay is not selected, the signal is
routed through the CLC and has approximately 50 ns
of propogation delay. Figure 2 shows the input and
output signals.
FIGURE 2:
PROPAGATION DELAY
BLOCK DIAGRAM
FIGURE 3:
PORTA<2>
Port Pin
Input
0
Port Pin
Output
CLC Block
configured as
pass-through
CLC1CON, LC1OE
DS01450A-page 3
AN1450
CONFIGURING THE CLC BLOCK
WITH THE CLC DESIGNER TOOL
The PIC10F322 has only one CLC block. The CLC
block is configured as a pass-through by using the
AND logic tab of the CLC Designer tool. Unused OR
gates are inverted, so that they will produce a 1 at the
output. The configuration is shown in the screen shot
below (Figure 4).
FIGURE 4:
FIGURE 5:
DS01450A-page 4
AN1450
FALLING EDGE DELAY
Falling edge delay is enabled, while the rising edge is
provided through the CLC block (Figure 6).
FIGURE 6:
FIGURE 8:
DS01450A-page 5
AN1450
INVERTING THE OUTPUT SIGNAL
The CLC output can be inverted with the CLC tool by
clicking on the buffer output to enable the inverter (as
shown circled in red in Figure 9 below).
FIGURE 9:
FIGURE 10:
DS01450A-page 6
AN1450
FIGURE 11:
DS01450A-page 7
AN1450
APPENDIX A:
CLC_PASS_THROUGH.INC
Software License Agreement
The software supplied herewith by Microchip Technology Incorporated (the Company) is intended and supplied to you, the
Companys customer, for use solely and exclusively with products manufactured by the Company.
The software is owned by the Company and/or its supplier, and is protected under applicable copyright laws. All rights are reserved.
Any use in violation of the foregoing restrictions may subject the user to criminal sanctions under applicable laws, as well as to civil
liability for the breach of the terms and conditions of this license.
THIS SOFTWARE IS PROVIDED IN AN AS IS CONDITION. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR
STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE
FOR SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
;
;
;
;
;
File: CLC_pass_through.inc
Generated by CLC Designer, Version: 1.0.0.3
Date: 6/4/2012 11:49 AM
Device:PIC10(L)F320/2
BANKSEL CLC1GLS0
- this instruction not needed for PIC10LF322
movlw H'02'
movwf CLC1GLS0
movlw H'00'
movwf CLC1GLS1
movlw H'00'
movwf CLC1GLS2
movlw H'00'
movwf CLC1GLS3
movlw H'02'
movwf CLC1SEL0
movlw H'65'
movwf CLC1SEL1
movlw
H'0E'
movwf
movlw
CLC1POL
H'C2'
movwf
CLC1CON
DS01450A-page 8
AN1450
APPENDIX B:
DELAY.ASM
Software License Agreement
The software supplied herewith by Microchip Technology Incorporated (the Company) is intended and supplied to you, the
Companys customer, for use solely and exclusively with products manufactured by the Company.
The software is owned by the Company and/or its supplier, and is protected under applicable copyright laws. All rights are reserved.
Any use in violation of the foregoing restrictions may subject the user to criminal sanctions under applicable laws, as well as to civil
liability for the breach of the terms and conditions of this license.
THIS SOFTWARE IS PROVIDED IN AN AS IS CONDITION. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR
STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE
FOR SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
;/********************************************************************
;* FileName:delay.asm
;* Dependencies:
;* Processor:PIC10F322
;* Hardware:
;* Compiler:MPASM 5.45 or later
;* Company:Microchip Technology, Inc.
;*
;* Copyright 2007-2012 Microchip Technology Inc. All rights reserved.
;*
;*
;*
;*
;*
;*
;*
;*
;*
;*
;*
You may use this software, and any derivatives, exclusively with Microchips products.
Microchip and its licensors retain all ownership and intellectual property rights in
the accompanying software and in all derivatives hereto. This software and any
accompanying information is for suggestion only. It does not modify Microchips
standard warranty for its products. You agree that you are solely responsible for
testing the software and determining its suitability. Microchip has no obligation
to modify, test, certify, or support the software.
DS01450A-page 9
AN1450
#include <p10f322.inc>
list p=p10f322
;; Define parameters here
;; 2 lines below enable rising and falling edge delays
#define
RISING_EDGE_DELAY
#define
FALLING_EDGE_DELAY
;; specify length of falling and rising edge below
RISE_EDGE_DELAY equ
0x05
FALL_EDGE_DELAY equ
0x04
#define MS_DELAY
;; Configuration Fuses
__config _FOSC_INTOSC & _BOREN_OFF & _WDTE_OFF & _PWRTE_OFF & _MCLRE_OFF & _CP_OFF
& _WRT_OFF
;;
;;
;;
;;
;;
;;
;;
pin-out
1 - RA0 - pin available for use as scope trigger.
2 - VSS
3 - RA1 - Data Out / CLC1
4 - RA2 - Data In / CLC1IN2
5 - VDD
6 - MCLR
#define input_signal
#define output_signal
PORTA,2
LATA,1
0x00
start
bcf
bcf
clrf
TRISA,0
TRISA,1
ANSELA
movlw 0x70
movwf OSCCON
;;
DS01450A-page 10
AN1450
#include "CLC_pass_through.inc"
;
bsf
#ifdef
RISING_EDGE_DELAY
movlw RISE_EDGE_DELAY
movwf countdown_timer
rising_edge_delay_loop
#ifdef MS_DELAY
call
millisecond_delay
#endif
#ifndef MS_DELAY
decfsz
countdown_timer,1 ; Has countdown timer expired?
goto
rising_edge_delay_loop; no, continue delay loop
#endif
bsf
#endif
output_signal
#ifdef FALLING_EDGE_DELAY
bsf
output_signal
bcf
CLC1CON,LC1OE
#endif
#ifndef FALLING_EDGE_DELAY
bsf
CLC1CON,LC1OE
#endif
wait_for_falling_edge
btfsc input_signal
goto
wait_for_falling_edge
signal_low
#ifdef FALLING_EDGE_DELAY
movlw FALL_EDGE_DELAY
movwf countdown_timer
#endif
falling_edge_delay_loop
#ifdef MS_DELAY
call
millisecond_delay
#endif
DS01450A-page 11
AN1450
#ifndef MS_DELAY
decfsz countdown_timer,1
; Has countdown timer expired?
goto
falling_edge_delay_loop ; no, continue delay loop
#endif
bcf
output_signal
#ifdef
bcf
bcf
#endif
RISING_EDGE_DELAY
output_signal
CLC1CON,LC1OE
#ifndef RISING_EDGE_DELAY
bsf
CLC1CON,LC1OE
#endif
wait_for_rising_edge
btfss input_signal
goto
wait_for_rising_edge
goto
signal_high
;;;;;;
#ifdef MS_DELAY
millisecond_delay
movlw .250
; 250 loops x 16 cycles per loop = 4000 Tcy = 1 ms
movwf ms_timer
millisecond_delay_loop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
decfsz ms_timer
; has countdown timer reached 0?
goto
millisecond_delay_loop; No. continue looping
decfsz countdown_timer
; Do I need to have another millisecond delay?
goto
millisecond_delay
; Yes.
retlw 0x00
; No - done.
#endif
end
DS01450A-page 12
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchips Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as unbreakable.
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchips code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
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All other trademarks mentioned herein are property of their
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2012, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620764596
== ISO/TS 16949 ==
2012 Microchip Technology Inc.
DS01450A-page 13
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DS01450A-page 14
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11/29/11