4216 IEEE Transactions on Power Apparatus and Systems, Vol. PAS-1OO, No.

9 September 1981
NEW STATIC VAR CONTROL
USING FORCE-COMMUTATED INVERTERS

Yoshihiko Sumi, Yoshinobu Harumoto, Taizo Hasegawa Masao Yano, Member,IEEE, Kazuo Ikeda, Toshiaki Matsuura
The Kansai Electric Power Co., Inc. Mitsubishi Electric Corporation
Osaka, Japan Kobe, Japan

Abstract - This paper describes the system out- This paper describes the system outline, new con-
line and the operating results of a new type of 20MVA trol technique, electrical designing features and the
Static VAR Generator (SVG), which is already in opera- operating results of the 20MVA SVG.
tion in electric power field since January of 1980.
This SVG consists of force-commutated inverters of the
voltage source and can be operated in both, inductive
and capacitive modes, by simple control of the output
voltage of the inverter. Special emphasis is placed on PROCESS OF DEVELOPMENT
the system outline, electrical designing features and
the operating results which coincide with the theoreti- Reference [1], [2] describe the basic principle of
cal analysis. the SVG using force commutated inverters, and the tech-
nical and economical comparison of this type and the
INTRODUCTION different alternatives is carried out in reference [3].
Test results from a model of 40kVA nominal reactive
Traditionally, VAR compensation has been accomp- power were reported in reference [4]. However, those
lished by rotating synchronous condensers and mechani- reports above are only related with data of laborato-
cally switched capacitor banks and shunt reactors. But ries.
in recent years, there has been a greatly increased de-
mand for the large scale of VAR compensation due to the Unlike line commutated converters, which are uni-
growing power demand, the load concentration in densely versally used for HVDC transmission application, force
populated area, the growing use of the underground cable commutated inverter has not been used in utility power
and the long-distance transmission of large power. line except one case, where 1MW pilot plant inverter
was tested in 14.4kV utility line for fuel cell appli-
For the realization of the large scale of VAR com- cation [5]. Therefore, the following careful steps
pensation, the VAR compensator is required to be com- have been taken to develop this type of compensations.
pact and to cause no harmful inrush current when it is The process of development is as follows.
switched on to the line. In addition, continuous VAR
control with fast response is desirable, in order to (1) The study of basic theory, system outline and de-
ensure the stable operation of power transmission. veloping method.
(2) Manufacturing a lkVA SVG model and testing it at
In order to meet these requests, a new type of the artificial transmission line.
Static VAR Generator (SVG) using force-commutated in- (3) Manufacturing a 20MVA prototype SVG.
verters of the voltage source has been developed and
20MVA prototype has been manufactured. Comparing to In these processes, basic theory, system outline,
the conventional switching method of shunt capacitors control method, protection method, operation under the
and shunt reactors, this SVG has the following features. abnormal condition of the line and many items were in-
vestigated. After completion of the sufficient test in
(1) Since the SVG plays the role of capacitors and the factory, prototype 20MVA SVG started to operate in
reactors, the equipment is more compact than con- the electric power field (77kV line) in January of 1980.
ventional types.
(2) As the switching of the SVG to the line causes no PRINCIPLE OF OPERATION
transient, a large single unit of the SVG can be
realized. The SVG can be explained by considering voltage
(3) Var can be controlled continuously and finely. source coupled to the line voltage with some reactance,
(4) With its fast response, the SVG can ensure stable as shown in Fig. 1. The inverter output voltage VI is
operation of power transmission, increase the connected through a pure reactance to an AC system, and
transmission capacity of the line and keep tran- is kept in phase with the AC system voltage VS In-
sient overvoltage within permissible limits. creasing the amplitude of the inverter output voltage
VI above the amplitude of the AC system VS causes lead-
ing (capacitive) current to be drawn from the AC sys-
tem, and decreasing VI below VS causes lagging (induc-
tive) current in the AC system. Fig. 1 shows this
basic principle and the phase diagrams.

However, if VI is strictly kept in phase with VS,

unnecessary real power flows from. the AC system into
the inverter, because inductors have some resistances
actually. Therefore, VI must be appropriately made to
lag or lead VS, so that the inverter absorbs adequate
but not excessive real power from the AC system, which
81 WM 228-6 A paper recommended and approved by the coincides with the losses of the SVG. Fig. 2 shows the
IEEE Transmission & Distribution Committee of the phase diagrams with phase control. VI lags VS at capa-
IEEE Power Engineering Society for presentation at citive mode and VI leads VS at inductive mode. At both
the IEEE PES Winter Meeting, Atlanta, Georgia, modes, the difference of phase angle between VS and I
February 1-6, 1981. Manuscript submitted August 29, is less than 900 and the SVG absorbs its losses from
1980; made available for printing December 22, 1980 the AC system.
) 1981 IEEE
 4217

VS: Line Voltage The SVG IPower System Line

Equivalent
VI~~~~~~~
~V Al
Circuit Inverter Leakage Reactance V iInverter B,=VA VO sin alt IA = IO COS Ot
K __ of Output Tr. Output Voltage B
4 VB VO
= sin (WOt- 120 ) IB = IO Cos (COt-120)
.C v, = VO sin (O)t-2 400) Ic = Io COS (alt-2400)
Capacitive Mode No Load Inductive Mode
pI(t) =VI
- I. +V.R
' A&A* t R +Vr
IB IB r
TC IC-- =

Phase |
Diagram VS s V zero__ Power 2V lo( sin 2 (ot+sin 2 (alt -1 200)
P(t) +sin 2 ((Ot -240') }=0
1(t ) Vs(t) I(t)sO VS(t) VS(t) I (t)
Fig. 4 Power Flow between the Line and the SVG
Waveshape A

OUTLINE OF 2OMVA PROTOTYPE SVG

Fig. 1 Basic Equivalent Circuit of the SVG
The prototype SVG installed for the purpose of VAR
compensation was selected 20MVA because it was adequate
SVG
7 7 Vs Line Voltage capacity for operation test in the electric power field.
All equipmnents of the SVG are installed outdoor in the
Equivalent Rl XI jVI Vs
Inverter substation. Table I shows the rating of the 20MVA SVG
Circuit Output Voltage and Table 1 shows the rating of the inverter. In order
Inverter
e: Difference of Angles to reduce the current harmonics to the permissible
_Eui n

R- o
between Inverter and Line
level, 36 pulse inverter was adopted.
Capacitive Mode No Load Inductive Mode
Table I. Rating of the 20MVA SVG
Phase
Diagram s VsR Rated Capacity 2OMVA
Rated Voltage 77kV
RuI I
Rated Current 150A
I(1) Vs(t) I(t): Vs(t) Vs(t) (t) Rated Frequency 60Hz
Phase 3 phases
Waveshape - - -

Table E1. Rating of the Inverter

Fig. 2 Actual Equivalent Circuit of the SVG Rated Capacity 20MVA

Rated DC Voltage (Ed) 917V
Rated AC Voltage (Eu) 715V
Conventional shunt capacitors or shunt reactors Rated AC Current (Ii) 2690A
causes leading (capacitive) current or lagging (induc- Pulse Number 36 pulses
tive) current by repetition of accumulating the energy
into the energy storage elements and releasing it to
the line, as shown in Fig. 3. In case of 3 phase VAR Fig. 5 shows the available VAR versus AC system
compensation, the sum of the 3 phase powers which flows voltage. Comparing to conventional shunt capacitors or
into the VAR compensator from the line is zero at any shunt reactors, the SVG can supply larger VAR at the
instant when the 3 line voltages are balanced, as shown same AC system voltage.
in Fig. 4. Therefore, the SVG, which has no energy
storage element, can cause leading (capacitive) current
or lagging (inductive) current, by circulating the VAR
energy among 3 phases at every moment. Shunt Capacitors +20MVA
Theoretically the SVG does not need the energy
storage elements like capacitors or reactors. Actually
the SVG consists of some capacitors (8% of 20MVA) and AC System Voltage
some reactors (13% of 20MVA). , I
.1
0 50 100 150%
Shunt Capacitors Vrzt
. =V. sin cot
I(t) = I, Cos cot
Shunt Reactors \ -20 MVA

\!" ' Fig. 5 Available VAR versus AC System Voltage

A AIA
fW vE
<=J
(t)
Power
P
I 0~~~~~~~~~~
Fig. 6 shows the main circuit of the SVG and the wave-
This power is stored shapes of each sections. DC voltage Ed is supplied
in the shunt from the 6.6kV line by a starting transformer, a recti-
capacitors P(t) =V(t) I (t) V0 JO sin 2aCt
=
2 fier, and a smoothing reactor. The inverter consists
of 6 unit inverters, whose output voltages are of same
Fig. 3 Power Flow between the Line and waveshapes but have different phase angle by 10 deg-
the Shunt Capacitors rees. These output voltage waveshapes of each 6 unit
4218

inverters are combined to the 36 pulse waveshape by

the output. transformer, which is very similar to the
sinusoidal waveshape, and the output current harmonics
are reduced to the permissible level. Fig. 7 shows
the outline and components of the 20MVA SVG.

Fig. 7-(b) Outline of the 20MVA SVG

OPERATING SEQUENCE AND CONTROL CIRCUIT

At the starting of the SVG, power flows from the

6.6kV line and DC voltage is established at the DC
capacitor by the starting circuit. Starting rectifier
controls the DC voltage in order to coincide the SVG
output voltage with the 77kV line voltage. When the
output voltage waveshape of the SVG coincides with the
77kV line voltage in frequency, phase and amplitude,
thp 77kV main circuit breaker closes and the SVG is con-
nected to the 77kV line. At this moment, no-transient
current flows. As soon as the 77kV main circuit break-
er closes, the 6.6kV circuit breaker is opened and the
SVG starts to compensate VAR. Before the SVG is
switched on to the 77kV line, the losses of the SVG is
supplied from the 6.6kV line and after SVG is switched
Fig. 6 Main Circuit of the SVG and on to the 77kV line, the losses are supplied from the
Waveshapes of Each Sections 77kV line.

At the separating the SVG from the 77kV line, VAR

is reduced to zero by the external signal from the cen-
ter control station and the inverter gates are suppres-
sed and the 77kV main circuit breaker is opened. Oper-
ating sequence is shown in Fig. 8.

start |6.6kV C Low voltage is established Inverter gates

close on DC capacitor by rectifier| ON

Rectifier controls
|DC voltage
|Synchronism of
|SVG and the line
the] __7 close 6.6kv ce
open
Normal operation
m - VAR 1-77kv-
gateA 1Cs
adjustmentil zIEr [] -
off open

Fig. 8 Operating Sequence of the 20MVA SVG

Fig. 9 shows the control loop of the SVG. The

(1) Inverter Stack (2) Commutation Reactor control system consists of a VAR control circuit QC, a
(3) Commutation Capacitor (4) Output Transformer DC voltage control circuit VC, a phase control circuit
(5) DC Capacitor (6) Control Panel
(7) Cooling E4uipment (8) Heat Exchanger PC, a phase comparator circuit PM, and a gate trigger
(9) Starting Transformer (10) Starting Rectifier circuit GC. The phase of the inverter voltage is con-
(11) Starting Smoothing Reactor trolled against the phase of the AC system voltage, so
that DC voltage should become appropriate value to pro-
duce demanded VAR. Any VAR can be supplied by control-
ling the difference of phase angle between the SVG and
Fig. 7-(a) Outline of the 20MVA SVG the line voltage.
 4219

DC Capacitor Output Transformer

Vn= 1 VO,
n
n=36k +1 (k=1,2,3...) (1)

77 kV
Line In = l Io (2)
n2Z
where, Vn Harmonic voltage
VO Fundamental voltage
In Harmonic current
Io Fundamental current
n Harmonic order
Z Coupling reactance between the SVG and
the line (P.U.)

The comparison of the calculated value and the data is

shown in Table mI1. The harmonic analysis data coincide
well with the calculated values.

Table m. The Harmonics of the SVG

Fig. 9 The Control Loop of the SVG Harmonic voltage Harmonic current
Harmonic

numbere(%)
Data(%) C alculated() Data(8)
BASIC OPERATING CHARACTERISTICS
35 2.86 2.98 0.63 0.71
Fig. 10 shows the transient line current and the 37 2.70 2.55 0.56 0.80
phase voltage when the SVG is switched on to the 77kV 71 1.41 1.0 0.15 0.14
line. As shown in Fig. 10, the switching of the SVG to 73, 1.37 1.12 0.14 0.14
the line causes no transient, which is one of the spe-
cial merits of the SVG and the reason why a large
single unit of the SVG can be realized. (a)20MVA Capacitive Mode
77kV 150A

DC Voltage
920V IQU
a~ 180A
_

DC Current z Zb"""""" VSU_N -

II
VAR
(b)20MVA Inductive Mode
77kV 150A
Ii 77kV
77 kV Phase IVQU
Voltage V._ N
77kv VSU_N
Line Current
Is

I -
Fig. 11 Waveshapes of the Phase Voltage and
I .
the Line Current

77kV. C.B close---- L--- 6.6kV C.B Open

( Switching on L . - Rectifier Gate
to The Line ) Suppressing 0

Fig. 10 The Transient when the SVG is ,10 [ Harmonic Voltage

switched on to the Line dB from The Fundamental Voltage
-20-
*35 37
Fig. 11 shows the waveshapes of the phase voltage -30
and the line current of the 77kv line , when the SVG 71 73
operates 20MVA leading VAR and 20MVA lagging VAR. Cur- -40
rent waveshapes are very similar to the sinusoidal
waveshape and current harmonics are reduced to the per-
missible level with use of 36 pulse inverter. -50

Fig. 12 shows the harmonic analysis results of the 1 10 20 30 40 50

SVG output voltage at stand alone operation, and Fig.13
60 70
shows the harmonic analysis results of the line current Harmonic Number
at 20MVA leading VAR operation. Theoretically the har-
monic voltage Vn and the harmonic current In are re- Fig. 12 Harmonic Analysis Result of the SVG Output
presented by following equations. Voltage at Stand Alone Operation
 4220

O r
VAR
Harmonic Current (MVA)
-10
dB from The Fundamental
Current
-20 F

-30 L 800
DC Voltage
-40~ 35 37 0"- z
Ed (V)

-50 Ai IA Test Result

Calculated Value
1 - 10 20 30 40 50 60 70
Harmonic Number

Fig. 13 Harmonic Analysis Result of the Fig. 14 VAR Output versus DC Voltage
Line Current

Static and dynamic characteristic results are

shown in Fig. 14, Fig. 15, Fig. 16. Fig.14 shows the
test result of VAR output versus DC voltage. Theoreti-
cally VAR is supplied to the AC system with the follow-
ing equation.

Q = 2OMVA x Ed Edo 100 (3)

Z
Edo

where, Q : VAR
Ed DC voltage -2.0
Ed0 DC voltage for zero VAR
Z Coupling reactance between the SVG and
the line (%)

The dotted line in Fig. 14 shows the calculated value

with Edo = 917V and Z = 13% (including 10% transformer
leakage reactance and 3% reactance of the commutation
reactor), and it coincides with the continuous line for
the test result well. Fig. 15 VAR Output versus Difference of Phase Angles
between the Line and the Inverter
Fig. 15 also shows the test result of VAR output
versus difference of phase angle between the inverter
voltage and the AC system voltage. It is obvious that
VAR is supplied continuously by controlling the dif- Furthermore, the dynamic characteristic in case of
ference of phase angle. the quick frequency change was calculated by digital
computer simulation. Considering the actual 77kV line,
Fig. 16 shows the response of. the SVG with the maximum frequency change is supposed to be 0.2Hz. Fig.
step change of the VAR reference. VAR can smoothly 17 shows the calculation results. With the quick change
change from the leading VAR to the lagging VAR in less of the line frequency, the VAR changes from 20MVA to
than 0.05seconds. 17.5MVA, but it recovers to 20MVA in about 1.0 second.

DC Voltage 900V

VAR Reference

VAR
< ~~~~+2. 5MVA lt

2.V
iLF-2.5MA
77kV Phase
Voltage VA-N

77kV
Line Current
IA -~~~~~~~
I B
. ' IlllluIuhIiIIl''"OI' '' P =
IC

1- I Sec.
Fig. 16 Dynamic Charateristic (Step Response of the SVG)
 4221
Frequency (Hz) "Capacitive
Mode)
60 +20 MVA
59.8 0
8 13 17 24
0 -4-
,

9' Time
-20 MVA (Hours)
Time (Inductive Mode)
,. 0
O.5 1.0 (Sec)
Fig. 18 Daily Operating Pattern of the SVG
VAR
(MVA) (Capacitive Mode)
+20
+17.5 Since the 20MVA prototype was installed in the electric
+15 power field, single line-to-ground faults and double
line - to - ground faults occurred. Fig. 19 shows the
Time phase voltages of the 77kV line at the single line-to-
I , ,,I
0 0.5 1.0 (Sec) ground fault, when the SVG was operating 20MVA leading
VAR. In this case the SVG could continue to operate
and was not separated from the line, which was expected
Fig. 17 Computer Simulation of the SVG from the test result of the lOkVA model.
Operation at the Frequency Change

77KV Phase
Voltage 44.5kV 75kV

VA-N
TRANSIENT PERFORMANCE WITH 10KVA MODEL
44.5kV 4.5kV
Before manufacturing the prototype 20MVA SVG, the
VB_N
lOkVA SVG model was manufactured and was tested in the
artificial transmission line in order to study the SVG
operation under the abnormal electric power field con- 44.5kV 75kV
ditions caused by some line faults. The abnormal con- VCNN fi WEM/
ditions that were investigated in the artificial trans-
mission line are as fellows.
Fig. 19 The 77kV 3 Phase Voltage at the
(1) Switching of the shunt capacitors to the line.
Line-to-Ground Fault
(2) Switching of the shunt reactors to the line.
(3) Switching of the transformer to the line.
(4) Single Line-to-ground fault.
(5) Line-to-line fault. Fig. 20 shows the phase voltages of the 77kV line at
(6) Double Line-to-ground fault. the double line-to-ground fault, when the SVG was ope-
(7) Three phase unbalanced voltage. rating OMVA. In this case the SVG couldn't continue to
(8) Stoppage of the line. operate and was separated from the line, because the
line voltages became much unbalanced. Fig. 21 shows
The following results were obtained. the waveshapes of the SVG, when it was separated from
the line. Detecting the output overcurrent, the in-
(1) The SVG can continue to operate with no problem verter gates were suppressed in order to reduce the
in case of the switching of the shunt capacitors, fault current to zero and a few cycles later the 77kV
the shunt reactors and the transformer with almost circuit breaker is opened.
same capacity as the SVG.
(2) In case of the single line-to-ground fault with Fig. 22 is the result of the AC system unbalance
resistance grounding, the SVG can continue to ope- voltage test. The unbalanced line voltage was about
rate because line voltages are not much unbalanced. 3% of the rated line voltage. It is shown that 15% volt-
(3) As explained in Principle of Operation, the prin- age ripple of 2nd order harmonic occurs on the DC circuit
ciple of the SVG is based on the theorem that the in case of the unbalanced line voltage.
sum of the three phase powers which flows into the
SVG is zero at any instant when the three line
voltages are balanced. So, when AC system volt-
ages become unbalanced due to line-to-line fault
77KV Phase
or double line-to-ground fault, the sum of the
Voltage 44.5kV 57.8kV
three phase powers is not zero and fluctuates and
VA-N _
voltage ripple of 2nd order harmonic occurs on the
DC circuit. And if the fault occurs at the near
point from the 'SVG, the AC system voltages become 44.5kV 4.5kV
much unbalanced, so the SVG cannot continue to VB_N
operate and it must be separated from the line.
44.5kv 4.5kV
VC_N
FIELD EXPERIENCE IN ELECTRIC UTILITY LINE

After completion of the sufficient test at the

manufacturer's factory, 20MVA prototype SVG started to Fig. 20 The 77kV 3 Phase Voltage at the
operate in electric distribution line in January of Double Line-to-Ground Fault
1980. It has been operating for 8 months with the dai-
ly operating pattern shown in Fig. 18.
4222

77kv Phase
Voltage V
VAR

AA1NaA
-
| +21MVA

|/-/
-W
77kV Line
Current 339Ap
I.
330Ap i - i270Ap
Fault Appliedl
Gate7Suppressin ghas ,-77 kV. CB. Open
Gate Suppressing---'

Fig. 23 The Unit Inverter Circuit

Fig. 21 The Oscillograph at the
Double Line-toGround Fault

For inverter main circuit, fast switching thyristor

FT1500EY is developed. The average on-state current is
1500A, the rated repetitive peak off-state voltage is
1200V, and the turn off times are less than 20us. For
inverter commutation circuit, fast switching thyristor
DC Voltage FT1OOOCX is developed too. The rated repetitive peak
800V on-state current is lOOOOA, the rated repetitive peak
off-state voltage and reverse voltage is 1800V. These
thyristors are shown in Fig. 24.
& VVV VVV
77kv LineAA
Current IA

IB

Fig. 22 The 77kV 3 Phase UnDalance

Voltage Test Result

DESIGN FEATURES OF THE 20MVA SVG Main Thyristor Commutating Thyristor

FT1500EY-24 FTlOOOCX-36
As the SVG is a new type of VAR Generator and the
force-commutated inverter of the voltage source with Fig. 24 Outline of the Semiconductors
the large capacity such as2OMVA has not been developed,
it was necessary to study and design with great care the
every components of the 20MVA SVG.
Starting Circuit

Starting circuit, which is necessary only for

Inverter starting and is separated from the 6.6kV line as soon as
the SVG is switched on to the 77kv line, consists of the
The items that were taken into consideration at starting transformer, the rectifier and the smoothing
designing the large capacity inverter are as follows. reactor. The capacities of the starting circuit com-
ponents are decided by the SVG losses at stand alone
(1) Manufacturing the inverter with low losses. operation. For example, the capacity of the starting
(2) Designing the commutation ability for overload transformer is designed 500kVA, which is the sufficient
current. value for starting because the SVG no-load losses are
(3) Developing the large semiconductor devices. 160kW.

Fig. 23 shows the unit inverter circuit, which is adopt- Although this system adopted the starting method by
ed because of its low losses. (The total losses of the the starting circuit, another starting method was devel-
inverter circuit is about 2% of the VAR output.) The oped and the good test results with lOkVA SVG model was
semiconductor elements and the snubber elements of the obtained. In case of this starting method, DC capacitor
inverter are cooled with the circulating pure water, and is charged from the 77kV line through the free wheeling
commutating reactors are cooled with air. Commutating diodes by closing the 77kV circuit breaker without trig-
reactors and capacitors and the semiconductors are de- gering pulseof the inverters. This starting method does
signed in order to commutate 300% overcurrent, which not need the special starting circuit, therefore, the
occurs under the abnormal condition of the line. SVG will become more compact.
 4223
Output Transformer necessary in the actual system. The capacity of the DC
capacitor was selected so that the 20MVA prototype could
The output transformer combines the 36 pulse out- keep running for 20% unbalance of the AC system voltage.
put voltage waveshape from the output voltages of the 6
unit inverters, and the leakage reactance of the output
transformer plays a role of the connecting reactance PROTECTIONS
between the SVG and the AC system. The output trans-
former consists of windings, those number corresponds When the line fault causes the SVG overcurrent and
with the pulse number of the inverter. the SVG cannot continue to operate, the overcurrent is
reduced by inverter gate suppressing and the 77kV cir-
Two types of winding methods were considered for cuit breaker is opened and the SVG is separated from the
designing the output transformer, that is, the series 77kV line safely. Pig. 26 shows the gate suppressing
winding method and the parallel winding method which test result. The fault current is reduced to zero by
are shown in Fig. 25. Considering the harmonic currents inverter gate suppressing. The maximum value of the
of the line and the inverter, the series winding method overcurrent is about 170% of the rated current, so con-
is adopted for the 20MVA SVG. The harmonic currents of sidering that the maximum commutating current is 300% of
the line are same, but the output current of the unit the rated current, the SVG can be protected safely by
inverter is 8.5% larger in case of the parallel connec- inverter gate suppressing. And if commutation failure
tion than the series connectionby its harmonic current, occurs, the SVG is protected by DC fuses. For surge
which makes the capacity of the output transformer with voltage protection, metal oxide arresters are equipped
parallel connection larger. Table IV shows the harmonic to the inverter.
currents of the two types of the output transformer.

-0 U
Inverter Inverter
p-o 0 -Y
32.3 MVA
|Inverter: 1E|Inverter H1
OMVA I1
VAR

II
77kV Phase 44.5kV
Voltage VA

.Ivetr
I l IlS nere
II H 1 VB-N
n nt
77kV Line 360A
Current IA'
(a) Series Winding Method (b) Parallel Winding Method

Fig. 25 Winding Method of the output Transformer IB 4 W ^~I

Table IV. Harmonic Currents of the Two TYPE Types

Ic- \~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
of the Output Transformer
77 kV C .B Open
Series Winding Method Parallel Winding Method IG
IGate Suppressing
Harmonic Current 4 V, 1 n
of The Line I/6 WL n2 sm 3(n=36kil k-l. 3.)

Where n: Harmonic number w- 2 rf Fig. 26 Reducing the overcurrent by Gate Suppressing

In: Harmonic current
Vs: Line voltage
Harmonic Current 2 1 1 Is nflhr 2 1wL r s1
2V2 CONCLUSIONS
of The Unit fE
E92wL 3 9 wL E nSl 3
A new type of Static Var Generator (SVG) using
(n=36ki1, k=1, 2 3) (n=6k 1. k=1, 2,3.) force-commutated inverters of the voltage source can
where Iin: Harmonic current supply both capacitive and inductive reactive power to
E: Inverter output DC voltage utility lines and provide sufficient protection against
line disturbance and abnormal conditions.

The experience gained from the 20MVA prototype is

Connecting Reactance between the SVG and the Line directly applicable to the development of the SVG of
commercial size, which is the next step in our program.
With large connecting reactance, the maximum output The practical SVG is of a 120MVA or larger unit and is
voltage of the inverter is large but the level and the expected to be used for the equipment to support volt-
rate of rise of the fault current is limited. 13% re- age and to ensure the stable operation of power trans-
actance was adoptedfor the 20MVA SVG, which is the com- mission. Total loss of the 20MVA prototype is slightly
bined value of the 10% leakage reactance of the output over 3% of the VAR output and this is expected to be re-
transformer and the 3% reactance of the commutation re- duced to less than 2% for a 120MVA unit.
actor.
DC Capacitors The 20MVA force-commutated inverter hardware can
also be used as an inverter-rectifier in electric util-
For a symmetrical reactive power, DC capacitors ity battery energy storage systems, or as an inverter
could be made infinitely small, if it were possible to for fuel cell systems, with the slightest design change.
increase the pulse number of the inverter infinitely. Judging from our experience a force-commutated inverter
But considering the limited pulse number ofthe inverter will become a strong intermediate tool between the di-
and the line unbalance voltage, some DC capacitors are rect current power source and the utility line.
 4224
ACKNOWLEDGEMENT Taizo Hasegawa was born in Hyogo,
Japan, on February 11, 1947. He
The authors wish to acknowledge the contribution of received the B.S. and M.S. degrees
all members concerned of the Kansai Electric Power Co., in electrical engineering from
Inc. and Mitsubishi Electric Corporation. Osaka University in 1969 and
1971. He joined the Kansai Elec-
REFERENCES tric Power Co., Inc. and has been
engaged in substation planning and
[1] K. Heuman, "Elektrotechnishe Grundlagen der R&D.
Zwangkommutierung-Neue Moglichkeiten der Strom- Mr. Hasegawa is a member of
richter technik," E und M, 84, Heft 3, pp. 99-112 the institute of the Electrical
Engineers of Japan
[2] L. Gyugyi, "Reactive Power Generation and Control
by Thyristor Circuits," IEEE, PESC 1976

[3] G. Loocke, "Comparison on Installations for Com-

pensation of Reactive Power," IFAC Congress 1978,
pp. 895-905

[4] E. Golde, "Static Converter for Compensation of

Reactive Power," World Electrotechnical Congress Masao Yano (M'73) was born in
1977, Moscow Tottori, Japan, on February 10,
1940. He received the B.S. deg-
[5] G.A. Philips, J.W. Walton and F.J. Kornbrust ree from University of Tokyo,
"Progress in Self-Commutated Inverters for Fuel Japan, in 1962 and M.S. degree
Cells and Batteries," IEEE Trans. PAS, Jul/Aug from Massachusetts Institute of
1979, pp. 1466-1475 Technology, Cambridge, in 1973,
both in electrical engineering.
In 1962 hejoinedMitsubishi Elec-
tric Corporation, Japan and is
now a Manager of Rectifier Design
Section.
He is a member of the IEEE Industry Applications
Society and Sigma xi.

Yoshihiko Sumi was born in Osaka, Kazuo Ikeda was born in Hyogo,
Japan, on November 15, 1930. Japan, on September 9, 1932 and
He received the B.S. degree in joined the Central Research Labo-
electrical engineering from Kyoto ratory of Mitsubishi Electric Cor-
University in 1953. He joined poration, Japan in 1951. Since
the Kansai Electric Power Co., then he has been engaged in the
Inc. and has been engaged in sys- development of static power con-
tem planning and overall substa- verters at the laboratory, Itami
tion engineering. Works, and Power & Industrial
Since 1979, he has been gen- Systems Center of the Company.
eral manager of the Central Trans- He is now a manager in charge of
mission System Construction Divi- rectifier development of the Re-
sion. ctifier Systems Department.
Mr. Sumi is a member of the Institute of the Elec- Mr. Ikeda is a member of the Institute of Elec-
trical Engineers of Japan. trical Engineers of Japan.

Yoshinobu Harumoto was born in Toshiaki Matsuura was born in

Osaka, Japan, on September 9, Tokyo, Japan, on January 24,
1937. He graduated from Noda 1952. He received the B.S. deg-
Technical High School, Osaka in ree in electrical engineering fiom
1956. He joined the Kansai Elec- University of Tokyo, Japan in
tric Power Co., Inc. and has been I > 1974. He joined Mitsubishi Elec-
engaged in overall substation tric Corporation, Japan in 1974
engineering including 500kV sub- N l |; W and has been engaged in develop-
station, gas insulated equip- ment and designing of high volt-
ment and R&D. age static power converters since
Mr. Harumoto is a member of 1974.
the institute of the Electrical Mr. Matsuura is a member of
Engineers of Japan. the Institute of Electrical Engineers of Japan.