Cs0207 Computer Organization and Architecture 2013
Cs0207 Computer Organization and Architecture 2013
SCHOOL OF COMPUTING
DEPARTMENT OF CSE
COURSE PLAN
Day 1 2 3 4 5 6 7
Day 1 E,F,H,J B,I E G,H,I,J A
Day 2 B,D,G,I H E C,F
Day 3 C B F A,D,F,J E,G
Day 4 A,D A,B,C,J D,H
Day 5 C I G
Objectives
1. Gives a knowledge of various architectures
2. CPU, Control unit, I/O Processing
3. Memory and its types
4. Design of the above components
Assessment Details
Attendance : 5 Marks
Cycle Test I : 10 Marks
Surprise Test I : 5 Marks
Cycle Test II : 10 Marks
Model Exam : 20 Marks
Test Schedule
Outcomes
Students who have successfully completed this course will have full understanding of the
following concepts
UNIT-I INTRODUCTION
Evolution of Computer Systems-Computer Types-Functional units-Basic operational concepts-Bus
structures-Memory location and addresses-memory operations- Addressing modes-Design of a computer
system-Instruction and instruction sequencing, RISC versus CISC
Sessi
Time Teaching
on Topics to be covered Ref Testing Method
(min) Method
No.
Evolution of Computer Systems Group discussion
1 50 1,2 PPT
Quiz
Computer Types Objective type test
2 50 1,2 PPT
Quiz
3 Functional units 50 1 PPT Quiz
Basic operational concepts, Bus structures Quiz
4 50 1 PPT
Memory location and addresses-memory Quiz
5 50 1,3 PPT
operations
Addressing modes Quiz
6 50 1,3 PPT
Objective type test
7 Design of a computer system 50 2 PPT Quiz, Assignment
Instruction and instruction sequencing Group discussion
50 1,3 PPT
8
RISC versus CISC Group discussion
9 50 1,3 PPT
UNIT-II CENTRAL PROCESSING UNIT
Introduction-Arithmetic Logic Unit - Fixed point arithmetic, floating point arithmetic-Execution of a
complete instruction-Basic concepts of pipelining
10 Introduction-Arithmetic Logic Unit 50 1,2 PPT Quiz
Fixed point arithmetic Quiz
11 50 1,2 PPT
Brain storming
Fixed point arithmetic Quiz
12 50 1,2 PPT
Surprise Test
Floating point arithmetic Group discussion
13 50 1,2 PPT
Quiz
14 Floating point arithmetic 50 1,2 PPT Group discussion, Quiz
15 Floating point arithmetic 50 1,2 PPT Quiz, Assignment
Execution of a complete Quiz
16 50 1,2 PPT
instruction
17 Basic concepts of pipelining 50 1,2 PPT Quiz
18 Basic concepts of pipelining 50 1,2 PPT Quiz
UNIT-III CONTROL UNIT DESIGN
Introduction-Control Transfer-Fetch cycle - Instruction Interpretation & Execution - Hardwired control -
Microprogrammed control
Introduction-Control Transfer Quiz
19 50 2 BB,PPT Group discussion
Objective type test
Fetch cycle Quiz
20 50 2 BB,PPT
Group discussion
21 Fetch cycle 50 2 BB,PPT Quiz
Instruction Interpretation & Execution Quiz
22 50 1,2 BB,PPT
Surprise Test
Instruction Interpretation & Execution Quiz
23 50 1,2 BB,PPT
Group discussion
Hardwired control Quiz
24 50 1,2 BB,PPT
Hardwired control Quiz
25 50 1,2 BB,PPT
Group discussion
26 Micro programmed control 50 1,2 BB,PPT Quiz
Micro programmed control Quiz
27 50 1,2,3 BB,PPT
Brain storming
UNIT-IV MEMORIES AND SUBSYSTEMS
Semiconductor memory - Static and Dynamic -Associative memory- Cache memory- Virtual memory-
Secondary memories-Optical magnetic tape & magnetic disks & controllers
Semiconductor memory- Static and Group discussion
28 50 1,2,3 BB
Dynamic memory Assignment
Static and Dynamic memory Group discussion
29 50 1,2,3 BB
Quiz
Associative memory Group discussion
30 50 1,2,3 BB
Assignment
Associative memory Group discussion
31 50 1,2,3 BB
Assignment
Cache memory Objective type test
32 50 1,2,3 BB Quiz
Group discussion
Virtual memory Quiz
33 50 1,2,3 BB Group discussion
BB-Black Board
PPT-Power Point
Prepared By
Staff Name : Mrs C. MALATHY Professor/CSE
Signature :
HOD/CSE