CH03 Solution PDF
CH03 Solution PDF
Solutions
Chapter 3 Solutions S-3
3.1 5730
3.2 5730
3.3 0101111011010100
The attraction is that each hex digit contains one of 16 different characters
(0–9, A–E). Since with 4 binary bits you can represent 16 different patterns,
in hex each digit requires exactly 4 binary bits. And bytes are by definition 8
bits long, so two hex digits are all that are required to represent the contents
of 1 byte.
3.4 753
3.5 7777 (3777)
3.6 Neither (63)
3.7 Neither (65)
3.8 Overflow (result 179, which does not fit into an SM 8-bit format)
3.9 105 42 128 (147)
3.10 105 42 63
3.11 151 214 255 (365)
3.12 6212
Step Action Multiplier Multiplicand Product
0 Initial Vals 001 010 000 000 110 010 000 000 000 000
lsb=0, no op 001 010 000 000 110 010 000 000 000 000
1 Lshift Mcand 001 010 000 001 100 100 000 000 000 000
Rshift Mplier 000 101 000 001 100 100 000 000 000 000
Prod=Prod+Mcand 000 101 000 001 100 100 000 001 100 100
2 Lshift Mcand 000 101 000 011 001 000 000 001 100 100
Rshift Mplier 000 010 000 011 001 000 000 001 100 100
lsb=0, no op 000 010 000 011 001 000 000 001 100 100
3 Lshift Mcand 000 010 000 110 010 000 000 001 100 100
Rshift Mplier 000 001 000 110 010 000 000 001 100 100
Prod=Prod+Mcand 000 001 000 110 010 000 000 111 110 100
4 Lshift Mcand 000 001 001 100 100 000 000 111 110 100
Rshift Mplier 000 000 001 100 100 000 000 111 110 100
lsb=0, no op 000 000 001 100 100 000 000 111 110 100
5 Lshift Mcand 000 000 011 001 000 000 000 111 110 100
Rshift Mplier 000 000 011 001 000 000 000 111 110 100
lsb=0, no op 000 000 110 010 000 000 000 111 110 100
6 Lshift Mcand 000 000 110 010 000 000 000 111 110 100
Rshift Mplier 000 000 110 010 000 000 000 111 110 100
S-4 Chapter 3 Solutions
3.13 6212
3.14 For hardware, it takes 1 cycle to do the add, 1 cycle to do the shift, and 1 cycle
to decide if we are done. So the loop takes (3 A) cycles, with each cycle
being B time units long.
3.15 It takes B time units to get through an adder, and there will be A 1 adders.
Word is 8 bits wide, requiring 7 adders. 74tu 28 time units.
3.16 It takes B time units to get through an adder, and the adders are arranged
in a tree structure. It will require log2(A) levels. 8 bit wide word requires 7
adders in 3 levels. 34tu 12 time units.
3.17 0x33 0x55 0x10EF. 0x33 51, and 51 321621. We can shift 0x55
left 5 places (0xAA0), then add 0x55 shifted left 4 places (0x550), then add
0x55 shifted left once (0xAA), then add 0x55. 0xAA00x5500xAA0x55
0x10EF. 3 shifts, 3 adds.
(Could also use 0x55, which is 641641, and shift 0x33 left 6 times, add
to it 0x33 shifted left 4 times, add to that 0x33 shifted left 2 times, and add to
that 0x33. Same number of shifts and adds.)
Chapter 3 Solutions S-5
3.19. In these solutions a 1 or a 0 was added to the Quotient if the remainder was
greater than or equal to 0. However, an equally valid solution is to shift in a 1 or 0,
but if you do this you must do a compensating right shift of the remainder (only
the remainder, not the entire remainder/quotient combination) after the last step.
74/21 3 remainder 11
Step Action Divisor Remainder/Quotient
0 Initial Vals 010 001 000 000 111 100
R<< 010 001 000 001 111 000
1 Rem=Rem–Div 010 001 111 000 111 000
Rem<0,R+D 010 001 000 001 111 000
R<< 010 001 000 011 110 000
2 Rem=Rem–Div 010 001 110 010 110 000
Rem<0,R+D 010 001 000 011 110 000
R<< 010 001 000 111 100 000
3 Rem=Rem–Div 010 001 110 110 110 000
Rem<0,R+D 010 001 000 111 100 000
R<< 010 001 001 111 000 000
4 Rem=Rem–Div 010 001 111 110 000 000
Rem<0,R+D 010 001 001 111 000 000
S-6 Chapter 3 Solutions
3.22
0×0C000000 = 0000 1100 0000 0000 0000 0000 0000 0000
= 0 0001 1000 0000 0000 0000 0000 0000 000
sign is positive
exp = 0×18 = 24 127 = 103
there is a hidden 1
mantissa = 0
answer = 1.0 × 2103
GR
1.1010001000 00
1.0000011010 10 0111 (Guard 5 1, Round 5 0,
Sticky 5 1)
-------------------
1.1010100010 10
In this case the extra bit (G,R,S) is more than half of the least significant bit (0).
Thus, the value is rounded up.
1.1010100011 24 11010.100011 20 26.546875 2.6546875 101
3.30 8.0546875 1.79931640625 101
8.0546875 1.0000000111 23
1.79931640625 101 1.0111000010 23
Exp: 3 3 0, 016 16 (10000)
Signs: both negative, result positive
Fraction:
1.0000000111
1.0111000010
------------
00000000000
10000000111
00000000000
00000000000
00000000000
00000000000
10000000111
10000000111
10000000111
00000000000
10000000111
1.01110011000001001110
(A) 1.1001100000
(B) 1.0110000000
-------------
10.1111100000 Normalize,
(AB) 1.0111110000 21
(C) 1.1011101011
(AB) .0000000000 10 111110000 Guard 1,
Round 0, Sticky 1
---------------
(AB)C 1.1011101011 10 1 Round up
3.34 No, they are not equal: (AB)C 1772, A(BC) 1771 (steps shown
above).
Exact: .398437 .34375 1771 1771.742187
3.37 b) No:
AB 1.1101110000 217 UNDERFLOW: Cannot represent
A(BC) 1.1000100100 210
A and B are both small, so their product does not fit into the
16-bit floating point format being used.
3.40 b) No:
A(BC) 1.1010101010 24 26.65625, and (AB)(AC)
1.0000000000 25 32
Exact: 1.666015625 (19,760 19,744) 26.65625
3.41
Answer sign exp Exact?
1 01111101 00000000000000000000000 – 2 Yes
3.42 bbbb 1
b4 1
They are the same
for i = 0 to 15 do
load register B[bits 127:0] = sig_in[(i*8+7..i*8]
(128-bit load)
for j = 0 to7 do
(1) eight-lane multiply C[bits 127:0] = A*F
(eight 16-bit multiplies)
(2) set D[bits 15:0] = sum of the four 16-bit values
in C[bits 63:0] (reduction of four 16-bit values)
(3) set D[bits 31:16] = sum of the four 16-bit
values in C[bits 127:64] (reduction of four 16-
bit values)
(4) store D[bits 31:0] to sig_out (32-bit store)
(5) set A = A shifted 16 bits to the left
(6) set E = B shifted 112 shifts to the right
(7) set A = A OR E
(8) set B = B shifted 16 bits to the left
end for
end for