Catapult High Level Synthesis
Catapult High Level Synthesis
Catapult High Level Synthesis
RTL Low-Power
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code up to 80%, making HLS code significantly easier to write and debug.
Incorporating last minute specification changes and even retargeting to a different
technology is possible because of the separation of the design functionality and
the implementation details. The RTL can simply be regenerated based on the
modified HLS model and new constraints.
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Catapult is Proven in 1,000’s of Projects to Catapult is Proven for Large Designs
Reduce Complete Project Time by 50%
Catapult was released in 2004 as a C++ based ASIC
synthesis tool for datapath-dominated wireless
communication hardware. Since 2004, Catapult has
evolved into a C++/SystemC synthesis tool with support
for virtually any FPGA or ASIC digital hardware design type,
and it has been proven in thousands of projects to cut
overall design time in half.