Compal Confidential: QML70 Schematics Document
Compal Confidential: QML70 Schematics Document
Compal Confidential: QML70 Schematics Document
ÿÿÿÿÿÿÿ
1 1
Compal Confidential
2 2
3 3
2011-10-17
LA-8371P REV: 0.2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 1 of 53
A B C D E
A B C D E
Compal Confidential
Model Name : QML70
ZZZ1
VRAM 2G/1G
128M x16 x 8 /
1 1
LVDS UMI
page 28 RTD2136S-VE-CG GEN1
page 27 USB 2.0 + 3.0 USB 2.0 + 3.0 USB2.0 USB2.0 CMOS Mini Card
Camera (with BT)
page 35 page 35 page 30 page 30 page 28 page 33
CRT Conn. FCH CRT (VGA DAC) USB3.0 Port 0 USB3.0 Port 1 USB2.0 Port 0 USB2.0 Port 1 USB2.0 Port 2 USB2.0 Port 3
page 28 USB2.0 Port 10 USB2.0 Port 11
USB
FCH 3.3V 48MHz
LPC BUS
SPI ROM
4MB
page 15
RTC CKT.
4
page 13 Touch Pad Int.KBD 4
page 38 page 38
D A_SODIMM D
TXOUT[0:2]+/-
TXCLK+/-
TZOUT[0:2]+/-
TZCLK+/-
I2CC_SCL/DA
AMD R
ATI VGA
MEM_MB_CLK7_P/N
MEM_MB_CLK1_P/N
MEM_MA_CLK7_P/N
MEM_MA_CLK1_P/N
1066~1600MHz
1066~1600MHz
Thames XT M2
APU_TXOUT[0:2]+/-
APU_TXOUT_CLK+/-
CLK_PEG_VGA / CLK_PEG_VGA# APU_TZOUT[0:2]+/-
APU_TZOUT_CLK+/-
100MHz APU_LVDS_CLK/DATA
APU_DISP_CLKP/N
C
AMD 100MHz AMD LVDS_OUT C
RTD2136S-VE-CG
CPU FS1r2 SOCKET
FCH DP_IN
APU_CLKP/N Hudson-M3
100MHz Internal CLK GEN
DP2_AUX GPP_CLK
100MHz
DP0_TXP/N[0:1]
DP0_AUXP/N
B B
GPP1 GPP2 DP0
WLAN GbE LAN APU VGA
Mini PCI Socket PCIE_GFX[0:7] C PCIE_GFX[0:15]
DP1 PCIE_GFX[12:15] C
25MHz
FCH
LS
R
A A
Voltage Rails
Power Plane Description S1 S3 S4/S5 Deep S3
VIN Adapter power supply (19V) N/A N/A N/A N/A SIGNAL
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
B+ AC or battery power rail for power circuit. N/A N/A N/A N/A
+APU_CORE Core voltage for CPU ON OFF OFF OFF Full ON HIGH HIGH HIGH ON ON ON ON
1
+APU_CORE_NB Voltage for On-die VGA of APU ON OFF OFF OFF 1
S1(Power On Suspend) HIGH HIGH HIGH ON ON ON LOW
+VGA_CORE 0.95-1.2V switched power rail ON OFF OFF OFF
+0.75VS 0.75V switched power rail for DDR terminator ON ON OFF ON S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
+1.0VSG 1.0V switched power rail for VGA ON OFF OFF OFF
S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
+1.1VALW 1.1V switched power rail for FCH ON ON ON* OFF
+3V_PCH 3.3V switched power rail for FCH ON ON ON* OFF S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
+1.1VS 1.1V switched power rail for FCH ON OFF OFF OFF
+1.2VS 1.2V switched power rail for APU ON OFF OFF OFF
+3VSG 1.8V switched power rail ON OFF OFF OFF
+1.5V 1.5V power rail for CPU VDDIO and DDR ON ON OFF ON
+1.5VS 1.5V switched power rail ON OFF OFF OFF
+1.8VSG 1.8V switched power rail ON OFF OFF OFF
+2.5VS 2.5V for CPU_VDDA ON OFF OFF OFF
+3VALW 3.3V always on power rail ON ON ON* ON
+LAN_IO 3.3V power rail for LAN ON ON ON ON
+3VS 3.3V switched power rail ON OFF OFF OFF
2
+5VALW 5V always on power rail ON ON ON* ON 2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF. BTO Option Table
BOM Structure BTO Item
PX@ Use VGA (Mux)
X76@ VRAM ID Table
AI Use AI Charger
nonAI@ Do not use AI Charger
x = 1 is read cmd, x= 0 is writee cmd. CARD@ Use Card Reader IC
nonCARD@ do not use Card Reader IC
External PCI Devices
X76L01@ Use Hynix GDDR3 1GB VRAM
Device IDSEL# REQ#/GNT# Interrupts X76L02@ Use Hynix GDDR3 2GB VRAM
X76L03@ Use Samsung GDDR3 1GB VRAM
3 3
X76L04@ Use Samsung GDDR3 2GB VRAM
930@ Use EC KB930
9012@ Use EC KB9012
FCH FCH
4 SM Bus 0 address SM Bus 1 address 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 4 of 53
A B C D E
5 4 3 2 1
DPLL_VDDC: 125 mA
PU902 +1.0VSG +1.0VSG SPV10: 120 mA
APL5912 +1.0VSG PCIE_VDDC: 2000 mA
DP[A:E]_VDD10: 680 mA
VRAM 1GB/2GB
U19 +1.5VSG +1.5VSG
+1.5VSG VDDR1: 3400 mA 64M / 128Mx16 * 4 / 8
AO4430L
PU701 +1.1VALW
SY8036DBC PLL_PVDD: 75 mA +1.5VSG 2.4 A
TSVDD: 20 mA
AVDD: 70 mA
C VDD1DI: 100 mA C
VDD2DI: 50 mA
A2VDDQ: 1.5 mA
PU301 +3VALW
PU401 +1.8VSG +1.8VSG VDD_CT: 110 mA
RT8205LZQW U71 +1.8VSG VDDR4: 170 mA
+5VALW SY8033BDBC
SI4178 PCIE_PVDD: 40 mA
MPV18: 150 mA
SPV18: 75 mA
PCIE_VDDR: 400 mA
DP[A:F]_VDD18: 920 mA
DP[A:F]_PVDD: 120 mA
+INVPWR_B+
+3VS
Q7 +3VSG +3VSG A2VDD: 130 mA
AO3404AL +3VSG VDDR3: 60 mA
U69
SI4178
LCD panel
FCH AMD Hudson M2/M3
17.3"
VDDPL_11_DAC: 7 mA
U39 VDDAN_11_ML: 226 mA
B+ 300mA AO4430L VDDCR_11: 1007 mA
+1.1VS +1.1VS +1.1VS
+3.3 350mA VDDAN_11_CLK: 340 mA
VDDAN_11_PCIE: 1088 mA
VDDAN_11_SATA: 1337 mA
VDDAN_11_USB_S: 140 mA
FAN Control VDDCR_11_USB_S: 197 mA
+1.1VALW
B
APL5607 VDDAN_11_SSUSB_S: 282 mA B
+1.1VALW
VDDCR_11_SSUSB_S: 424 mA
+5VS
VDDCR_11_S: 187 mA
+5VS 500mA VDDPL_11_SYS: 70 mA
VDDIO_AZ_S: 26 mA
+5V
Dual+1
2.5A +3VALW VDDPL_33_SSUSB_S: 20 mA
+3VALW VDDPL_33_USB_S: 17 mA
+3VALW VDDAN_33_USB_S: 658 mA
VDDIO_33_S: 59 mA
VDDXL_33_S: 5 mA
SATA Audio Codec EC LAN VDDAN_33_HWM_S: 12 mA
HDD*2 ALC269-GR ENE KB9012 RTL8111F Mini Card
ODD*1
VDDIO_33_GBE_S
+5V 3A +5V 45mA +3.3VALW 30mA +3.3VALW 201mA +1.5VS 500mA VDDCR_11_GBE_S
+3.3VS 3mA +3.3VS 1A GND VDDIO_GBE_S
+3.3V +3.3VS 25mA +3.3VALW 330mA
RTC
A RTC BAT VDDBT_RTC_G A
Bettary
18 PCIE_CRX_GTX_P[0..15] PCIE_CTX_GRX_P[0..15] 18
18 PCIE_CRX_GTX_N[0..15] PCIE_CTX_GRX_N[0..15] 18
JCPU1A
PCI EXPRESS
PCIE_CRX_GTX_P0 AB8 AB2 PCIE_CTX_C_GRX_P0 C1 PX@ 1 2 0.1U_0402_16V7K PCIE_CTX_GRX_P0
PCIE_CRX_GTX_N0 P_GFX_RXP0 P_GFX_TXP0 PCIE_CTX_C_GRX_N0 C2 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N0
AB7 P_GFX_RXN0 P_GFX_TXN0 AB1 1 2
PCIE_CRX_GTX_P1 AA9 AA3 PCIE_CTX_C_GRX_P1 C3 PX@ 1 2 0.1U_0402_16V7K PCIE_CTX_GRX_P1
PCIE_CRX_GTX_N1 P_GFX_RXP1 P_GFX_TXP1 PCIE_CTX_C_GRX_N1 C4 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N1
AA8 AA2 1 2
PCIE_CRX_GTX_P2 P_GFX_RXN1 P_GFX_TXN1 PCIE_CTX_C_GRX_P2 C5 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_P2
AA5 Y5 1 2
PCIE_CRX_GTX_N2 P_GFX_RXP2 P_GFX_TXP2 PCIE_CTX_C_GRX_N2 C6 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N2
AA6 Y4 1 2
1 PCIE_CRX_GTX_P3 P_GFX_RXN2 P_GFX_TXN2 PCIE_CTX_C_GRX_P3 C7 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_P3 1
Y8 Y2 1 2
PCIE_CRX_GTX_N3 P_GFX_RXP3 P_GFX_TXP3 PCIE_CTX_C_GRX_N3 C8 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N3
Y7 Y1 1 2
PCIE_CRX_GTX_P4 P_GFX_RXN3 P_GFX_TXN3 PCIE_CTX_C_GRX_P4 C9 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_P4
W9 W3 1 2
PCIE_CRX_GTX_N4 P_GFX_RXP4 P_GFX_TXP4 PCIE_CTX_C_GRX_N4 C10 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N4
W8 W2 1 2
PCIE_CRX_GTX_P5 P_GFX_RXN4 P_GFX_TXN4 PCIE_CTX_C_GRX_P5 C11 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_P5
W5 V5 1 2
PCIE_CRX_GTX_N5 P_GFX_RXP5 P_GFX_TXP5 PCIE_CTX_C_GRX_N5 C12 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N5
W6 V4 1 2
PCIE_CRX_GTX_P6 P_GFX_RXN5 P_GFX_TXN5 PCIE_CTX_C_GRX_P6 C13 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_P6
V8 V2 1 2
PCIE_CRX_GTX_N6 P_GFX_RXP6 P_GFX_TXP6 PCIE_CTX_C_GRX_N6 C14 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N6
GRAPHICS
V7 V1 1 2
PCIE_CRX_GTX_P7 P_GFX_RXN6 P_GFX_TXN6 PCIE_CTX_C_GRX_P7 C15 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_P7
U9 U3 1 2
PCIE_CRX_GTX_N7 P_GFX_RXP7 P_GFX_TXP7 PCIE_CTX_C_GRX_N7 C16 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N7
U8 U2 1 2
PCIE_CRX_GTX_P8 P_GFX_RXN7 P_GFX_TXN7 PCIE_CTX_C_GRX_P8 C17 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_P8
U5 T5 1 2
PCIE_CRX_GTX_N8 P_GFX_RXP8 P_GFX_TXP8 PCIE_CTX_C_GRX_N8 C18 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N8
U6 P_GFX_RXN8 P_GFX_TXN8 T4 1 2
PCIE_CRX_GTX_P9 T8 T2 PCIE_CTX_C_GRX_P9 C19 PX@ 1 2 0.1U_0402_16V7K PCIE_CTX_GRX_P9
PCIE_CRX_GTX_N9 P_GFX_RXP9 P_GFX_TXP9 PCIE_CTX_C_GRX_N9 C20 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N9
T7 P_GFX_RXN9 P_GFX_TXN9 T1 1 2
PCIE_CRX_GTX_P10 R9 R3 PCIE_CTX_C_GRX_P10 C21 PX@ 1 2 0.1U_0402_16V7K PCIE_CTX_GRX_P10
PCIE_CRX_GTX_N10 P_GFX_RXP10 P_GFX_TXP10 PCIE_CTX_C_GRX_N10 C22 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N10
R8 P_GFX_RXN10 P_GFX_TXN10 R2 1 2
PCIE_CRX_GTX_P11 R5 P5 PCIE_CTX_C_GRX_P11 C23 PX@ 1 2 0.1U_0402_16V7K PCIE_CTX_GRX_P11
PCIE_CRX_GTX_N11 P_GFX_RXP11 P_GFX_TXP11 PCIE_CTX_C_GRX_N11 C24 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N11
R6 P_GFX_RXN11 P_GFX_TXN11 P4 1 2
PCIE_CRX_GTX_P12 P8 P2 PCIE_CTX_C_GRX_P12 C25 PX@ 1 2 0.1U_0402_16V7K PCIE_CTX_GRX_P12
PCIE_CRX_GTX_N12 P_GFX_RXP12 P_GFX_TXP12 PCIE_CTX_C_GRX_N12 C26 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N12
P7 P_GFX_RXN12 P_GFX_TXN12 P1 1 2
PCIE_CRX_GTX_P13 N9 N3 PCIE_CTX_C_GRX_P13 C27 PX@ 1 2 0.1U_0402_16V7K PCIE_CTX_GRX_P13
PCIE_CRX_GTX_N13 P_GFX_RXP13 P_GFX_TXP13 PCIE_CTX_C_GRX_N13 C28 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N13
N8 P_GFX_RXN13 P_GFX_TXN13 N2 1 2
PCIE_CRX_GTX_P14 N5 M5 PCIE_CTX_C_GRX_P14 C29 PX@ 1 2 0.1U_0402_16V7K PCIE_CTX_GRX_P14
PCIE_CRX_GTX_N14 P_GFX_RXP14 P_GFX_TXP14 PCIE_CTX_C_GRX_N14 C30 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N14
N6 P_GFX_RXN14 P_GFX_TXN14 M4 1 2
PCIE_CRX_GTX_P15 M8 M2 PCIE_CTX_C_GRX_P15 C31 PX@ 1 2 0.1U_0402_16V7K PCIE_CTX_GRX_P15
PCIE_CRX_GTX_N15 P_GFX_RXP15 P_GFX_TXP15 PCIE_CTX_C_GRX_N15 C32 PX@ 0.1U_0402_16V7K PCIE_CTX_GRX_N15
M7 P_GFX_RXN15 P_GFX_TXN15 M1 1 2
CONN@ LOTES_ACA-ZIF-109-P12-A_FS1R2
3 3
+2.5VS Group A
+1.5VS
+CPU_CORE
Group B
4 +CPU_CORE_NB 4
+1.2VS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FS1r2 PCIE/UMI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 6 of 53
A B C D E
A B C D E
1 1
JCPU1B JCPU1C
MEMORY CHANNEL A MEMORY CHANNEL B
11 DDRA_SMA[15..0] DDRA_SDQ[63..0] 11 12 DDRB_SMA[15..0] DDRB_SDQ[63..0] 12
DDRA_SMA0 U20 E13 DDRA_SDQ0 DDRB_SMA0 T27 A14 DDRB_SDQ0
DDRA_SMA1 MA_ADD0 MA_DATA0 DDRA_SDQ1 DDRB_SMA1 MB_ADD0 MB_DATA0 DDRB_SDQ1
R20 J13 P24 B14
DDRA_SMA2 MA_ADD1 MA_DATA1 DDRA_SDQ2 DDRB_SMA2 MB_ADD1 MB_DATA1 DDRB_SDQ2
R21 H15 P25 D16
DDRA_SMA3 MA_ADD2 MA_DATA2 DDRA_SDQ3 DDRB_SMA3 MB_ADD2 MB_DATA2 DDRB_SDQ3
P22 J15 N27 E16
DDRA_SMA4 MA_ADD3 MA_DATA3 DDRA_SDQ4 DDRB_SMA4 MB_ADD3 MB_DATA3 DDRB_SDQ4
P21 H13 N26 B13
DDRA_SMA5 MA_ADD4 MA_DATA4 DDRA_SDQ5 DDRB_SMA5 MB_ADD4 MB_DATA4 DDRB_SDQ5
N24 F13 M28 C13
DDRA_SMA6 MA_ADD5 MA_DATA5 DDRA_SDQ6 DDRB_SMA6 MB_ADD5 MB_DATA5 DDRB_SDQ6
N23 MA_ADD6 MA_DATA6 F15 M27 MB_ADD6 MB_DATA6 B16
DDRA_SMA7 N20 E15 DDRA_SDQ7 DDRB_SMA7 M24 A16 DDRB_SDQ7
DDRA_SMA8 MA_ADD7 MA_DATA7 DDRB_SMA8 MB_ADD7 MB_DATA7
N21 MA_ADD8 M25 MB_ADD8
DDRA_SMA9 M21 H17 DDRA_SDQ8 DDRB_SMA9 L26 C17 DDRB_SDQ8
DDRA_SMA10 MA_ADD9 MA_DATA8 DDRA_SDQ9 DDRB_SMA10 MB_ADD9 MB_DATA8 DDRB_SDQ9
U23 MA_ADD10 MA_DATA9 F17 U26 MB_ADD10 MB_DATA9 B18
DDRA_SMA11 M22 E19 DDRA_SDQ10 DDRB_SMA11 L27 B20 DDRB_SDQ10
DDRA_SMA12 MA_ADD11 MA_DATA10 DDRA_SDQ11 DDRB_SMA12 MB_ADD11 MB_DATA10 DDRB_SDQ11
L24 MA_ADD12 MA_DATA11 J19 K27 MB_ADD12 MB_DATA11 A20
DDRA_SMA13 AA25 G16 DDRA_SDQ12 DDRB_SMA13 W26 E17 DDRB_SDQ12
DDRA_SMA14 MA_ADD13 MA_DATA12 DDRA_SDQ13 DDRB_SMA14 MB_ADD13 MB_DATA12 DDRB_SDQ13
L21 MA_ADD14 MA_DATA13 H16 K25 MB_ADD14 MB_DATA13 B17
DDRA_SMA15 L20 H19 DDRA_SDQ14 DDRB_SMA15 K24 B19 DDRB_SDQ14
MA_ADD15 MA_DATA14 DDRA_SDQ15 MB_ADD15 MB_DATA14 DDRB_SDQ15
MA_DATA15 F19 MB_DATA15 C19
DDRA_SBS0# U24 DDRB_SBS0# U27
11 DDRA_SBS0# DDRA_SBS1# MA_BANK0 DDRA_SDQ16 12 DDRB_SBS0# DDRB_SBS1# MB_BANK0 DDRB_SDQ16
11 DDRA_SBS1# U21 MA_BANK1 MA_DATA16 H20 12 DDRB_SBS1# T28 MB_BANK1 MB_DATA16 C21
DDRA_SBS2# L23 F21 DDRA_SDQ17 DDRB_SBS2# K28 B22 DDRB_SDQ17
11 DDRA_SBS2# MA_BANK2 MA_DATA17 12 DDRB_SBS2# MB_BANK2 MB_DATA17
J23 DDRA_SDQ18 C23 DDRB_SDQ18
11 DDRA_SDM[7..0] DDRA_SDM0 MA_DATA18 DDRA_SDQ19 12 DDRB_SDM[7..0] DDRB_SDM0 MB_DATA18 DDRB_SDQ19
E14 MA_DM0 MA_DATA19 H23 D14 MB_DM0 MB_DATA19 A24
DDRA_SDM1 J17 G20 DDRA_SDQ20 DDRB_SDM1 A18 D20 DDRB_SDQ20
DDRA_SDM2 MA_DM1 MA_DATA20 DDRA_SDQ21 DDRB_SDM2 MB_DM1 MB_DATA20 DDRB_SDQ21
E21 MA_DM2 MA_DATA21 E20 A22 MB_DM2 MB_DATA21 B21
DDRA_SDM3 F25 G22 DDRA_SDQ22 DDRB_SDM3 C25 E23 DDRB_SDQ22
DDRA_SDM4 MA_DM3 MA_DATA22 DDRA_SDQ23 DDRB_SDM4 MB_DM3 MB_DATA22 DDRB_SDQ23
AD27 MA_DM4 MA_DATA23 H22 AF25 MB_DM4 MB_DATA23 B23
DDRA_SDM5 AC23 DDRB_SDM5 AG22
2 DDRA_SDM6 MA_DM5 DDRA_SDQ24 DDRB_SDM6 MB_DM5 DDRB_SDQ24 2
AD19 MA_DM6 MA_DATA24 G24 AH18 MB_DM6 MB_DATA24 E24
DDRA_SDM7 AC15 E25 DDRA_SDQ25 DDRB_SDM7 AD14 B25 DDRB_SDQ25
MA_DM7 MA_DATA25 DDRA_SDQ26 MB_DM7 MB_DATA25 DDRB_SDQ26
MA_DATA26 G27 MB_DATA26 B27
DDRA_SDQS0 G14 G26 DDRA_SDQ27 DDRB_SDQS0 C15 D28 DDRB_SDQ27
11 DDRA_SDQS0 DDRA_SDQS0# H14 MA_DQS_H0 MA_DATA27 DDRA_SDQ28 12 DDRB_SDQS0 DDRB_SDQS0# MB_DQS_H0 MB_DATA27 DDRB_SDQ28
11 DDRA_SDQS0# MA_DQS_L0 MA_DATA28 F23 12 DDRB_SDQS0# B15 MB_DQS_L0 MB_DATA28 B24
DDRA_SDQS1 G18 H24 DDRA_SDQ29 DDRB_SDQS1 E18 D24 DDRB_SDQ29
11 DDRA_SDQS1 DDRA_SDQS1# H18 MA_DQS_H1 MA_DATA29 DDRA_SDQ30 12 DDRB_SDQS1 DDRB_SDQS1# MB_DQS_H1 MB_DATA29 DDRB_SDQ30
11 DDRA_SDQS1# MA_DQS_L1 MA_DATA30 E28 12 DDRB_SDQS1# D18 MB_DQS_L1 MB_DATA30 D26
DDRA_SDQS2 J21 F27 DDRA_SDQ31 DDRB_SDQS2 E22 C27 DDRB_SDQ31
11 DDRA_SDQS2 DDRA_SDQS2# H21 MA_DQS_H2 MA_DATA31 12 DDRB_SDQS2 DDRB_SDQS2# MB_DQS_H2 MB_DATA31
11 DDRA_SDQS2# 12 DDRB_SDQS2# D22
DDRA_SDQS3 E27 MA_DQS_L2 MB_DQS_L2
11 DDRA_SDQS3 AB28 DDRA_SDQ32 12 DDRB_SDQS3
DDRB_SDQS3 B26 AG26 DDRB_SDQ32
DDRA_SDQS3# E26 MA_DQS_H3 MA_DATA32 MB_DQS_H3 MB_DATA32
11 DDRA_SDQS3# AC27 DDRA_SDQ33 12 DDRB_SDQS3#
DDRB_SDQS3# A26 AH26 DDRB_SDQ33
DDRA_SDQS4 AE26 MA_DQS_L3 MA_DATA33 MB_DQS_L3 MB_DATA33
11 DDRA_SDQS4 AD25 DDRA_SDQ34 12 DDRB_SDQS4
DDRB_SDQS4 AG24 AF23 DDRB_SDQ34
DDRA_SDQS4# AD26 MA_DQS_H4 MA_DATA34 MB_DQS_H4 MB_DATA34
11 DDRA_SDQS4# AA24 DDRA_SDQ35 12 DDRB_SDQS4#
DDRB_SDQS4# AG25 AG23 DDRB_SDQ35
DDRA_SDQS5 AB22 MA_DQS_L4 MA_DATA35 MB_DQS_L4 MB_DATA35
11 DDRA_SDQS5 AE28 DDRA_SDQ36 12 DDRB_SDQS5
DDRB_SDQS5 AG21 AG27 DDRB_SDQ36
DDRA_SDQS5# AA22 MA_DQS_H5 MA_DATA36 MB_DQS_H5 MB_DATA36
11 DDRA_SDQS5# AD28 DDRA_SDQ37 12 DDRB_SDQS5#
DDRB_SDQS5# AF21 AF27 DDRB_SDQ37
DDRA_SDQS6 AB18 MA_DQS_L5 MA_DATA37 MB_DQS_L5 MB_DATA37
11 DDRA_SDQS6 AB26 DDRA_SDQ38 12 DDRB_SDQS6
DDRB_SDQS6 AG17 AH24 DDRB_SDQ38
DDRA_SDQS6# AA18 MA_DQS_H6 MA_DATA38 MB_DQS_H6 MB_DATA38
11 DDRA_SDQS6# AC25 DDRA_SDQ39 12 DDRB_SDQS6#
DDRB_SDQS6# AG18 AE24 DDRB_SDQ39
DDRA_SDQS7 AA14 MA_DQS_L6 MA_DATA39 DDRB_SDQS7 MB_DQS_L6 MB_DATA39
11 DDRA_SDQS7 12 DDRB_SDQS7 AH14
DDRA_SDQS7# AA15 MA_DQS_H7 MB_DQS_H7
11 DDRA_SDQS7# Y23 DDRA_SDQ40 12 DDRB_SDQS7#
DDRB_SDQS7# AG14 AE22 DDRB_SDQ40
MA_DQS_L7 MA_DATA40 MB_DQS_L7 MB_DATA40
AA23 DDRA_SDQ41 AH22 DDRB_SDQ41
DDRA_CLK0 MA_DATA41 MB_DATA41
11 DDRA_CLK0 T21 Y21 DDRA_SDQ42 12 DDRB_CLK0
DDRB_CLK0 R26 AE20 DDRB_SDQ42
DDRA_CLK0# MA_CLK_H0 MA_DATA42 MB_CLK_H0 MB_DATA42
11 DDRA_CLK0# T22 AA20 DDRA_SDQ43 12 DDRB_CLK0#
DDRB_CLK0# R27 AH20 DDRB_SDQ43
DDRA_CLK1 MA_CLK_L0 MA_DATA43 MB_CLK_L0 MB_DATA43
11 DDRA_CLK1 R23 AB24 DDRA_SDQ44 12 DDRB_CLK1
DDRB_CLK1 P27 AD23 DDRB_SDQ44
DDRA_CLK1# MA_CLK_H1 MA_DATA44 MB_CLK_H1 MB_DATA44
11 DDRA_CLK1# R24 AD24 DDRA_SDQ45 12 DDRB_CLK1#
DDRB_CLK1# P28 AD22 DDRB_SDQ45
MA_CLK_L1 MA_DATA45 MB_CLK_L1 MB_DATA45
AA21 DDRA_SDQ46 AD21 DDRB_SDQ46
DDRA_CKE0 MA_DATA46 MB_DATA46
11 DDRA_CKE0 H28 AC21 DDRA_SDQ47 12 DDRB_CKE0
DDRB_CKE0 J26 AD20 DDRB_SDQ47
DDRA_CKE1 MA_CKE0 MA_DATA47 DDRB_CKE1 MB_CKE0 MB_DATA47
11 DDRA_CKE1 H27 12 DDRB_CKE1 J27
MA_CKE1 MB_CKE1
AA19 DDRA_SDQ48 AF19 DDRB_SDQ48
DDRA_ODT0 MA_DATA48 MB_DATA48
11 DDRA_ODT0 Y25 AC19 DDRA_SDQ49 12 DDRB_ODT0
DDRB_ODT0 W27 AE18 DDRB_SDQ49
DDRA_ODT1 MA_ODT0 MA_DATA49 MB_ODT0 MB_DATA49
11 DDRA_ODT1 AA27 AC17 DDRA_SDQ50 12 DDRB_ODT1
DDRB_ODT1 Y28 AE16 DDRB_SDQ50
MA_ODT1 MA_DATA50 MB_ODT1 MB_DATA50
AA17 DDRA_SDQ51 AH16 DDRB_SDQ51
DDRA_SCS0# MA_DATA51 MB_DATA51
11 DDRA_SCS0# V22 AB20 DDRA_SDQ52 12 DDRB_SCS0#
DDRB_SCS0# V25 AG20 DDRB_SDQ52
3 DDRA_SCS1# MA_CS_L0 MA_DATA52 MB_CS_L0 MB_DATA52 3
11 DDRA_SCS1# AA26 Y19 DDRA_SDQ53 12 DDRB_SCS1#
DDRB_SCS1# Y27 AG19 DDRB_SDQ53
MA_CS_L1 MA_DATA53 MB_CS_L1 MB_DATA53
AD18 DDRA_SDQ54 AF17 DDRB_SDQ54
DDRA_SRAS# MA_DATA54 MB_DATA54
11 DDRA_SRAS# V21 AD17 DDRA_SDQ55 12 DDRB_SRAS#
DDRB_SRAS# V24 AD16 DDRB_SDQ55
DDRA_SCAS# MA_RAS_L MA_DATA55 DDRB_SCAS# MB_RAS_L MB_DATA55
11 DDRA_SCAS# W24 12 DDRB_SCAS# V27
DDRA_SWE# MA_CAS_L MB_CAS_L
11 DDRA_SWE# W23 AA16 DDRA_SDQ56 12 DDRB_SWE#
DDRB_SWE# V28 AG15 DDRB_SDQ56
MA_WE_L MA_DATA56 MB_WE_L MB_DATA56
Y15 DDRA_SDQ57 AD15 DDRB_SDQ57
MEM_MA_RST# H25 MA_DATA57 MB_DATA57
11 MEM_MA_RST# AA13 DDRA_SDQ58 12 MEM_MB_RST#
MEM_MB_RST# J25 AG13 DDRB_SDQ58
MEM_MA_EVENT# T24 MA_RESET_L MA_DATA58 MB_RESET_L MB_DATA58
11 MEM_MA_EVENT# AC13 DDRA_SDQ59 12 MEM_MB_EVENT#
MEM_MB_EVENT# T25 AD13 DDRB_SDQ59
MA_EVENT_L MA_DATA59 MB_EVENT_L MB_DATA59
Y17 DDRA_SDQ60 AG16 DDRB_SDQ60
MA_DATA60 MB_DATA60
+MEM_VREF W20 AB16 DDRA_SDQ61 AF15 DDRB_SDQ61
M_VREF MA_DATA61 MB_DATA61
AB14 DDRA_SDQ62 AE14 DDRB_SDQ62
MA_DATA62 MB_DATA62
+1.5V 1 2 M_ZVDDIO W21 Y13 DDRA_SDQ63 AF13 DDRB_SDQ63
R3 39.2_0402_1% M_ZVDDIO MA_DATA63 MB_DATA63
+1.5V
2
4 R4 4
1K_0402_1%
R5 1 2 1K_0402_5% MEM_MA_EVENT# 15mil
1
1 2
R7
1K_0402_1% C45 C46 Security Classification Compal Secret Data Compal Electronics, Inc.
1000P_0402_50V7K 0.1U_0402_16V7K Issued Date 2011/07/29 2012/07/29 Title
2 1 Deciphered Date
FS1r2 DDRIII Memory I/F
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 7 of 53
A B C D E
A B C D E
JCPU1D
ANALOG/DISPLAY/MISC
HDMI_TX2P L3 D1 ML_VGA_AUXP R8 2 1 1.8K_0402_5%
29 HDMI_TX2P HDMI_TX2N DP0_TXP0 DP0_AUXP HDMI_CLK 29
29 HDMI_TX2N L2 DP0_TXN0 DP0_AUXN D2 HDMI_DATA 29 To HDMI
ML_VGA_AUXN R9 2 1 1.8K_0402_5%
HDMI_TX1P K5 E1 ML_VGA_AUXP C53 1 2 0.1U_0402_16V7K
29 HDMI_TX1P HDMI_TX1N K4 DP0_TXP1 DP1_AUXP ML_VGA_AUXP_C 15
29 HDMI_TX1N DP0_TXN1 HDMI DP1_AUXN E2 ML_VGA_AUXN C54 1 2 0.1U_0402_16V7K ML_VGA_AUXN_C 15 To FCH for RGB
HDMI_TX0P K2 D5 DP2_AUXP C49 1 2 0.1U_0402_16V7K To LVDS
29 HDMI_TX0P HDMI_TX0N K1 DP0_TXP2 DP2_AUXP DP2_AUXP_C 27
29 HDMI_TX0N DP0_TXN2 DP2_AUXN D6 DP2_AUXN C50 1 2 0.1U_0402_16V7K DP2_AUXN_C 27 Translater DP2_AUXP R40 2 1 1.8K_0402_5%
DISPLAY PORT 0
HDMI_CLKP J3 E5
29 HDMI_CLKP HDMI_CLKN J2 DP0_TXP3 DP3_AUXP DP2_AUXN
E6 R30 2 1 1.8K_0402_5%
29 HDMI_CLKN DP0_TXN3 DP3_AUXN
15 ML_VGA_TXP0
C55 1 2 0.1U_0402_16V7K DP1_TXP0 H5 DP1_TXP0 DP4_AUXP
F5
1 1
15 ML_VGA_TXN0
C56 1 2 0.1U_0402_16V7K DP1_TXN0 H4 DP1_TXN0 DP4_AUXN
F6
DISPLAY PORT 1
DP2_HPD LVDS_HPD_R 10
15 ML_VGA_TXP3
C61 1 2 0.1U_0402_16V7K DP1_TXP3 F2 DP1_TXP3 DP3_HPD
E7
1
15 ML_VGA_TXN3
C62 1 2 0.1U_0402_16V7K DP1_TXN3 F1 F7
DP1_TXN3 DP4_HPD R615 R10 R11 R12
G7
DP5_HPD
27 DP2_TXP0_C
C47 1 2 0.1U_0402_16V7K DP2_TXP0 L9 DP2_TXP0
1K_0402_5% 1K_0402_5% 10K_0402_5% 10K_0402_5%
27 DP2_TXN0_C
C48 1 2 0.1U_0402_16V7K DP2_TXN0 L8 DP2_TXN0 DP_BLON C6 DP_ENBKL DP_ENBKL 10
@
B6
2 2
2
DP_DIGON
27 DP2_TXP1_C
C51 1 2 0.1U_0402_16V7K DP2_TXP1 L5 DP2_TXP1 DP_VARY_BL A6 DP_INT_PWM DP_INT_PWM 10
C52 2 0.1U_0402_16V7K DP2_TXN1 L6 LVDS
B
27 DP2_TXN1_C 1 DP2_TXN1
DP_AUX_ZVSS C1 DP_AUX_ZVSS R13 1 2 150_0402_1% Q101
APU_PROCHOT#
E
Place near APU K8 DP2_TXP2 1 3 H_PROCHOT#_EC 37,47
C
K7 DP2_TXN2 TEST6 AD12
M18 MMBT3904_NL_SOT23-3
DISPLAY PORT 2
TEST9 T1
J6 DP2_TXP3 TEST10 N18 T2
J5 DP2_TXN3 TEST14 F11 T3
TEST15 G11 T4
AE11 H11 +1.5VS +1.5V Indicates to the FCH that a thermal trip
13 APU_CLKP CLKIN_H TEST16 T5
AD11 J11 T6 THERMTRIP shutdown has occurred. Its assertion will cause the FCH to
13 APU_CLKN CLKIN_L TEST17
F12 APU_TEST18 R14 1 2 1K_0402_5% temperature: 125 degree transition the system to S5 immediately
CLK
TEST18
13 APU_DISP_CLKP AB11 DISP_CLKIN_H TEST19 G12 APU_TEST19 R15 1 2 1K_0402_5%
1
13 APU_DISP_CLKN AA11 DISP_CLKIN_L TEST20 J12 APU_TEST20 R16 1 2 1K_0402_5%
TEST
APU_RST# H12 APU_TEST24 R17 1 2 1K_0402_5% R614 R18 R19
TEST24
47 APU_SVC B3 SVC TEST25_H AE10 TEST25_H R20 1 2 510_0402_1% 1K_0402_5% 1K_0402_5% 10K_0402_5%
APU_PWRGD A3 AD10 TEST25_L R21 1 2 510_0402_1% +1.2VS @ @
47 APU_SVD SVD TEST25_L
L10
2 2
TEST28_H
100P_0402_50V8J
100P_0402_50V8J
2 2
C3 M10
SER.
47 APU_SVT SVT TEST28_L
B
TEST30_H P19 T7
1 1 APU_SIC AG12 R19 T8 Q2
14 APU_SIC SIC TEST30_L
E
C597
C598
C
TEST32_H T19
AF10 N19 MMBT3904_NL_SOT23-3 @
2 2 13 APU_RST# RESET_L TEST32_L
@ @
13 APU_PWRGD AB12 PWROK TEST35 AA12 APU_TEST35 R23 1 2 300_0402_5% +1.5V
R24 1 @ 2 300_0402_5%
CTRL
13 APU_PROCHOT# AC10 W10 FS1R2 R25 1 2 10K_0402_5% +3VALW
for issue, HDMI no display @ DOS Mode
APU_THERMTRIP# AE12 PROCHOT_L FS1R2 R560 1
AC12 ALLOW_STOP 13 2 0_0402_5% EC_THERMTRIP# 37
ALERT_L THERMTRIP_L DMAACTIVE_L
AF12
ALERT_L
EMI request for ESD protection P18 T9
APU_TDI R541 0_0402_5% TEST4
1 2 H10
TDI TEST5
R18 T10
APU_TDO R542 1 2 0_0402_5% J10
APU_TCK R543 0_0402_5% TDO
1 2 F10
TCK
As close as U2 APU_TMS R544 0_0402_5%
JTAG
1 2 G10
APU_TRST# R545 0_0402_5% TMS
1 2 F9 Y10
APU_DBRDY R546 0_0402_5% TRST_L RSVD1
1 2 G9 AA10
DBRDY RSVD2
RSVD
APU_DBREQ# R547 1 2 0_0402_5% H9 Y12
DBREQ_L RSVD3
K21
R28 RSVD4
47 APU_VDD_RUN_FB_L 1 2 0_0402_5% B4
VSS_SENSE
C5
VDDP_SENSE
47 APU_VDDNB_SEN A4
VDDNB_SENSE
SENSE
Route as differential A5
VDDIO_SENSE
with VSS_SENSE 47 APU_VDD_SEN C4
VDD_SENSE
B5
VDDR_SENSE
CONN@ LOTES_ACA-ZIF-109-P12-A_FS1R2
3 3
2
R32 1 @ 2 1K_0402_5% APU_SVT 1 R33 2 1 R34 2
+3VS
@ @ R36 3 4 APU_TMS R38 1 2 1K_0402_5%
R35 @ APU_SVC 3 4
1 2 1K_0402_5% 31.6K_0402_1% 30K_0402_1% 1K_0402_5%
5 6 APU_TDI R39 1 2 1K_0402_5%
R37 @ APU_SVD 5 6
1 2 1K_0402_5%
1
7 8 APU_TDO
7 8
2
G
1 11 12
R607 1 @ APU_SIC 11 12
2 1K_0402_5%
BSH111 1N_SOT23-3 R47 1 2 10K_0402_5% 13 14 APU_DBRDY
R608 1 @ APU_SID 13 14
2 1K_0402_5%
1 @ 2 R50 1 2 10K_0402_5% 15 16 APU_DBREQ# R51 1 2 300_0402_5%
R89 @ APU_RST# 15 16
1 2 300_0402_5% R49 0_0402_5%
2
G
4 4
BSH111 1N_SOT23-3
R53 1 2 300_0402_5% APU_RST# 1 @ 2 SAMTE_ASP-136446-07-B
R58 0_0402_5% CONN@
R56 1 2 300_0402_5% APU_PWRGD
R46 1 2 1K_0402_5% APU_SID Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/29 Deciphered Date 2012/07/29 Title
R613 1 2 1K_0402_5% ALERT_L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FS1r2 Display/MISC/HDT
R582 1 @ 2 1K_0402_5% ALLOW_STOP Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 8 of 53
A B C D E
A B C D E
C79
22U_0603_6.3V6M
C80
22U_0603_6.3V6M
C81
22U_0603_6.3V6M
C82
22U_0603_6.3V6M
C83
22U_0603_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
C88
0.22U_0402_6.3V6K
C89
0.22U_0402_6.3V6K
C90
0.22U_0402_6.3V6K
C91
0.22U_0402_6.3V6K
C92
0.22U_0402_6.3V6K
C93
0.22U_0402_6.3V6K
C94
180P_0402_50V8J
R1 VDD_27 VDD_58 D4 F28 VSS_36 VSS_108 T9
C84
C85
C86
C87
P3 VDD_28 VDD_59 F4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 G13 VSS_37 VSS_109 U10
K10 VDD_29 VDD_60 AF6 G15 VSS_38 VSS_110 U18
H3 AF3 @ G17 U4
VDD_30 VDD_61 VSS_39 VSS_111
M19 VDD_31 VDD_62 L11 G19 VSS_40 VSS_112 U7
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 G21 V11
VSS_41 VSS_113
G23 VSS_42 VSS_114 AE19
2 2
+APU_CORE_NB C8 VDDNB_1 VDDNB_13 C11 +APU_CORE_NB G25 VSS_43 VSS_115 AE23
D10 VDDNB_2 VDDNB_14 C12 G4 VSS_44 VSS_116 AE25
B8 VDDNB_3 VDDNB_15 D9 J22 VSS_45 VSS_117 AE27
B12 VDDNB_4 VDDNB_16 D8 J24 VSS_46 VSS_118 AE4
C9 VDDNB_5 VDDNB_17 D12 J4 VSS_47 VSS_119 AE7
A9 VDDNB_6 VDDNB_18 D11 J7 VSS_48 VSS_120 AF14
A10 VDDNB_7 VDDNB_19 B11 K11 VSS_49 VSS_121 AF16
A8
VDDNB_8 VDDNB_20
A12 across VDDIO and VSS K14
VSS_50 VSS_122
AF18
A11 B10 +1.5V +APU_CORE_NB_CAP K9 AF20
VDDNB_9 VDDNB_21 split VSS_51 VSS_123
E10 E12 AC11 AF22
VDDNB_10 VDDNB_22 VSS_52 VSS_124
E11 B9 L19 AF26
VDDNB_11 VDDNB_23 VSS_53 VSS_125
C10 L7 AF28
VDDNB_12 VSS_54 VSS_126
C96
0.22U_0402_6.3V6K
C97
0.22U_0402_6.3V6K
C98
180P_0402_50V8J
C99
180P_0402_50V8J
C107
22U_0603_6.3V6M
C108
22U_0603_6.3V6M
K13 +APU_CORE_NB_CAP M11 AF9
VDDNB_CAP_1 VSS_55 VSS_127
K12 1 1 1 1 1 1 AF11 AG4
VDDNB_CAP_2 VSS_56 VSS_128
V19 AG7
VSS_57 VSS_129
V9 AH13
VSS_58 VSS_130
W16 AH15
2 2 2 2 2 2 VSS_59 VSS_131
+1.5V H26 T23 +1.5V W4 AH17
VDDIO_1 VDDIO_19 VSS_60 VSS_132
K20 T26 W7 AH19
VDDIO_2 VDDIO_20 VSS_61 VSS_133
J28 U22 Y11 AH21
VDDIO_3 VDDIO_21 VSS_62 VSS_134
K23 U25 Y20 P9
VDDIO_4 VDDIO_22 VSS_63 VSS_135
K26 U28 Y22 C18
VDDIO_5 VDDIO_23 VSS_64 VSS_136
L22 Y26 Y9 D21
VDDIO_6 VDDIO_24 VSS_65 VSS_137
L25 T20 A17 W14
VDDIO_7 VDDIO_25 VSS_66 VSS_138
L28 R28 A13 P11
VDDIO_8 VDDIO_26 VSS_67 VSS_139
M20 R25 K16 C7
VDDIO_9 VDDIO_27 VSS_68 VSS_140
M23 R22 F24 E8
VDDIO_10 VDDIO_28 VSS_69 VSS_141
M26 V20 G8 K18
VDDIO_11 VDDIO_29 VSS_70 VSS_142
N22 V23 H7 W12
VDDIO_12 VDDIO_30 VSS_71 VSS_143
N25 V26 J8
VDDIO_13 VDDIO_31 VSS_72
N28 W22
VDDIO_14 VDDIO_32
P20 W25
3 VDDIO_15 VDDIO_33 LOTES_ACA-ZIF-109-P12-A_FS1R2 3
P23 W28
VDDIO_16 VDDIO_34
P26 Y24
VDDIO_17 VDDIO_35
AA28 G28 CONN@
+1.2VS VDDIO_18 VDDIO_36
VDDP decoupling
AH6 AG10
VDDP_1 VDDR_1 +1.2VS
AH5
VDDP_2 VDDR_2
AH8 VDDR decoupling
180P_0402_50V8J
180P_0402_50V8J
AH4 AH9
VDDP_3 VDDR_3
C100
C101
C102
0.22U_0402_6.3V6K
C103
0.22U_0402_6.3V6K
C359
1000P_0402_50V7K
AH3 AH10
VDDP_4 VDDR_4
1 1 1 1 1 AH7
VDDP_5
C104
180P_0402_50V8J
C105
180P_0402_50V8J
C109
1000P_0402_50V7K
C111
0.22U_0402_6.3V6K
C358
0.22U_0402_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
AB10 1 1 1 1 1
VDDA
1
2 2 2 2 2
C65
C68
C69
2
2 2 2 2 2
LOTES_ACA-ZIF-109-P12-A_FS1R2
CONN@ Demo Board Capacitor
APU_CORE CORE_NB CORE_NB_CAP
22uF x 7 22uF x 2 22uF x 2
10U_0603_6.3V6K
10U_0603_6.3V6K
10U_0603_6.3V6K
22U_0603_6.3V6K
0.22uF x 2 10uF x 1
1
0.01uF x 3 0.22uF x 2
C70
C66
C67
C64
180pF x 2 180pF x 3
2
3300P_0402_50V7K
C113
0.22U_0402_6.3V6K
C114
4.7U_0402_6.3V6M
1 1
1
2 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FS1r2 PWR/GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 9 of 53
A B C D E
5 4 3 2 1
HPD
1
D R61 R62 D
2
From FCH APU_INVT_PWM 27,28
1
D
2
G Q6
MMBT3904_NL_SOT23-3
S 2N7002K_SOT23-3
3
1
FCH_CRT_HPD R626 1 2 0_0402_5% Q8 C
15 FCH_CRT_HPD ML_VGA_HPD 8
8 DP_INT_PWM 1 2 2
R65 2.2K_0402_5% B
E
3
1
R66
4.7K_0402_5%
2
Translator HPD
From Translator
C C
27 LVDS_HPD
LVDS_HPD R627 1 2 0_0402_5% LVDS_HPD_R 8 Panel ENBKL
@
HDMI HPD R630
4.7K_0402_5%
From HDMI Conn
2
2 @ 1
R659 100K_0402_5%
B B
A A
15mil JDIMM1
1 VREF_DQ VSS1 2
3 4 DDRA_SDQ4 DDRA_SDQ[0..63]
DDRA_SDQ0 VSS2 DQ4 DDRA_SDQ5 DDRA_SDQ[0..63] 7
5 DQ0 DQ5 6
DDRA_SDQ1 7 8 DDRA_SDM[0..7]
DQ1 VSS3 DDRA_SDM[0..7] 7
9 10 DDRA_SDQS0#
DDRA_SDM0 VSS4 DQS#0 DDRA_SDQS0 DDRA_SDQS0# 7 DDRA_SMA[0..15]
11 DM0 DQS0 12 DDRA_SDQS0 7 DDRA_SMA[0..15] 7
13 VSS5 VSS6 14
DDRA_SDQ2 15 16 DDRA_SDQ6
DDRA_SDQ3 DQ2 DQ6 DDRA_SDQ7
17 18
DQ3 DQ7
19 20
1 DDRA_SDQ8 VSS7 VSS8 DDRA_SDQ12 1
21 22
DDRA_SDQ9 DQ8 DQ12 DDRA_SDQ13
23 24
DQ9 DQ13
25 26
DDRA_SDQS1# VSS9 VSS10 DDRA_SDM1
7 DDRA_SDQS1# 27 28
DDRA_SDQS1 DQS#1 DM1 MEM_MA_RST#
7 DDRA_SDQS1 29
DQS1 RESET#
30 MEM_MA_RST# 7 Place near DIMM1
31 32
DDRA_SDQ10 VSS11 VSS12 DDRA_SDQ14
33 34
DDRA_SDQ11 DQ10 DQ14 DDRA_SDQ15 +1.5V
35 36
DQ11 DQ15
37 38
DDRA_SDQ16 VSS13 VSS14 DDRA_SDQ20 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
39 40
DDRA_SDQ17 DQ16 DQ20 DDRA_SDQ21
41 42 2 2 2 2 2 2 2 2 2 2
DQ17 DQ21
43 VSS15 VSS16 44
DDRA_SDQS2# 45 46 DDRA_SDM2 C115 C116 C117 C118 C119 C120 C121 C122 C123 C124
7 DDRA_SDQS2# DDRA_SDQS2 DQS#2 DM2
7 DDRA_SDQS2 47 DQS2 VSS17 48
49 50 DDRA_SDQ22 1 1 1 1 1 1 1 1 1 1
DDRA_SDQ18 VSS18 DQ22 DDRA_SDQ23 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
51 DQ18 DQ23 52
DDRA_SDQ19 53 54
DQ19 VSS19 DDRA_SDQ28
55 VSS20 DQ28 56
DDRA_SDQ24 57 58 DDRA_SDQ29
DDRA_SDQ25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DDRA_SDQS3#
DDRA_SDM3 VSS22 DQS#3 DDRA_SDQS3 DDRA_SDQS3# 7
63 64 +0.75VS +1.5V
DM3 DQS3 DDRA_SDQS3 7
65 66 @
DDRA_SDQ26 VSS23 VSS24 DDRA_SDQ30 0.1U_0402_16V4Z
67 DQ26 DQ30 68 1 2
DDRA_SDQ27 69 70 DDRA_SDQ31 2 2 1 C125 0.1U_0402_16V4Z
DQ27 DQ31
71 VSS25 VSS26 72
C126 C127 C128 Add C1106
20101101
1 1 2
DDRA_CKE0 73 74 DDRA_CKE1 0.1U_0402_16V4Z 4.7U_0603_6.3V6K
7 DDRA_CKE0 CKE0 CKE1 DDRA_CKE1 7
75 VDD1 VDD2 76
77 78 DDRA_SMA15
2 DDRA_SBS2# NC1 A15 DDRA_SMA14 2
7 DDRA_SBS2# 79 BA2 A14 80
81 VDD3 VDD4 82
DDRA_SMA12 83 84 DDRA_SMA11
DDRA_SMA9 A12/BC# A11 DDRA_SMA7
85 A9 A7 86
87 VDD5 VDD6 88
DDRA_SMA8 89 90 DDRA_SMA6
DDRA_SMA5 A8 A6 DDRA_SMA4
91 A5 A4 92
93 94
DDRA_SMA3 VDD7 VDD8 DDRA_SMA2 +VREF_CA +1.5V
95 96
DDRA_SMA1 A3 A2 DDRA_SMA0 +VREF_DQ +1.5V
97 98
A1 A0
99 100
VDD9 VDD10
2
DDRA_CLK0 101 102 DDRA_CLK1
7 DDRA_CLK0 CK0 CK1 DDRA_CLK1 7
2
DDRA_CLK0# 103 104 DDRA_CLK1# R70
7 DDRA_CLK0# CK0# CK1# DDRA_CLK1# 7
105 106 R69 1K_0402_1%
DDRA_SMA10 VDD11 VDD12 DDRA_SBS1# 1K_0402_1%
107 108 DDRA_SBS1# 7
DDRA_SBS0# A10/AP BA1 DDRA_SRAS#
7 DDRA_SBS0# 109 110 DDRA_SRAS# 7 15mil
1
BA0 RAS# +VREF_CA
111 112 15mil
1
DDRA_SWE# VDD13 VDD14 DDRA_SCS0# +VREF_DQ
113 114 DDRA_SCS0# 7
7 DDRA_SWE# WE# S0#
1000P_0402_50V7K
0.1U_0402_16V4Z
DDRA_SCAS# 115 116 DDRA_ODT0
7 DDRA_SCAS# CAS# ODT0 DDRA_ODT0 7
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
117 118
VDD15 VDD16
1000P_0402_50V7K
4.7U_0603_6.3V6K
DDRA_SMA13 119 120 DDRA_ODT1 1 1 1
A13 ODT1 DDRA_ODT1 7
2
DDRA_SCS1# 121 122 1 1 1 @ C133 C134
7 DDRA_SCS1# S1# NC2
C132
123 124 15mil @ C130 C131 R72
VDD17 VDD18
C129
125 126 +VREF_CA R71 1K_0402_1%
NCTEST VREF_CA 1K_0402_1% 2 2 2
127 128
DDRA_SDQ32 VSS27 VSS28 DDRA_SDQ36 2 2 2
129 130
1
DDRA_SDQ33 DQ32 DQ36 DDRA_SDQ37
131 132 1
1
DQ33 DQ37 C135
133 134
DDRA_SDQS4# VSS29 VSS30 DDRA_SDM4
7 DDRA_SDQS4# 135 136
DDRA_SDQS4 DQS#4 DM4 1000P_0402_50V7K
7 DDRA_SDQS4 137 138
DQS4 VSS31 DDRA_SDQ38 2
139 140
DDRA_SDQ34 VSS32 DQ38 DDRA_SDQ39
141 142
3 DDRA_SDQ35 DQ34 DQ39 3
143 144
DQ35 VSS33 DDRA_SDQ44
145 146
DDRA_SDQ40 VSS34 DQ44 DDRA_SDQ45
147 148
DDRA_SDQ41 DQ40 DQ45
149 150
DQ41 VSS35 DDRA_SDQS5#
151 152 DDRA_SDQS5# 7
DDRA_SDM5 VSS36 DQS#5 DDRA_SDQS5
153 154 DDRA_SDQS5 7
DM5 DQS5
155 156
DDRA_SDQ42 VSS37 VSS38 DDRA_SDQ46
157 158
DDRA_SDQ43 DQ42 DQ46 DDRA_SDQ47
159 160
DQ43 DQ47
161 162
DDRA_SDQ48 VSS39 VSS40 DDRA_SDQ52
163 164
DDRA_SDQ49 DQ48 DQ52 DDRA_SDQ53
165 166
DQ49 DQ53
167 168
DDRA_SDQS6# VSS41 VSS42 DDRA_SDM6
7 DDRA_SDQS6# 169 170
DDRA_SDQS6 DQS#6 DM6
7 DDRA_SDQS6 171 172
DQS6 VSS43 DDRA_SDQ54
173 174
DDRA_SDQ50 VSS44 DQ54 DDRA_SDQ55
175 176
DDRA_SDQ51 DQ50 DQ55
177 178
DQ51 VSS45 DDRA_SDQ60
179 180
DDRA_SDQ56 VSS46 DQ60 DDRA_SDQ61
181 182
DDRA_SDQ57 DQ56 DQ61
183 184
DQ57 VSS47 DDRA_SDQS7#
185 186 DDRA_SDQS7# 7
DDRA_SDM7 VSS48 DQS#7 DDRA_SDQS7
187 188 DDRA_SDQS7 7
DM7 DQS7
189 190
DDRA_SDQ58 VSS49 VSS50 DDRA_SDQ62
191 192
DDRA_SDQ59 DQ58 DQ62 DDRA_SDQ63
193 194
R73 10K_0402_5% DQ59 DQ63
195 196
VSS51 VSS52 MEM_MA_EVENT#
1 2 197 198 MEM_MA_EVENT# 7
+3VS SA0 EVENT#
+3VS 199 200 FCH_SDATA0 12,14,33
VDDSPD SDA
201 202 FCH_SCLK0 12,14,33
SA1 SCL
203 204 +0.75VS
VTT1 VTT2
1
4 R74 4
1 1 205 G1 G2 206
C136 C137
10K_0402_5% TYCO_2-2013310-1
2.2U_0603_6.3V4Z 0.1U_0402_16V4Z
2
2 2
15mil JDIMM2
1 VREF_DQ VSS1 2
3 4 DDRB_SDQ4 DDRB_SDQ[0..63]
DDRB_SDQ0 VSS2 DQ4 DDRB_SDQ5 DDRB_SDQ[0..63] 7
5 DQ0 DQ5 6
DDRB_SDQ1 7 8 DDRB_SDM[0..7]
DQ1 VSS3 DDRB_SDM[0..7] 7
9 10 DDRB_SDQS0#
DDRB_SDM0 VSS4 DQS#0 DDRB_SDQS0 DDRB_SDQS0# 7 DDRB_SMA[0..15]
11 DM0 DQS0 12 DDRB_SDQS0 7 DDRB_SMA[0..15] 7
13 VSS5 VSS6 14
DDRB_SDQ2 15 16 DDRB_SDQ6
DDRB_SDQ3 DQ2 DQ6 DDRB_SDQ7
17 18
DQ3 DQ7
19 20
1 DDRB_SDQ8 VSS7 VSS8 DDRB_SDQ12 1
21 22
DDRB_SDQ9 DQ8 DQ12 DDRB_SDQ13
23 24
DQ9 DQ13
25 26
DDRB_SDQS1# VSS9 VSS10 DDRB_SDM1
7 DDRB_SDQS1# 27 28
DDRB_SDQS1 DQS#1 DM1 MEM_MB_RST#
7 DDRB_SDQS1 29 30 MEM_MB_RST# 7
DQS1 RESET#
31 32
DDRB_SDQ10 VSS11 VSS12 DDRB_SDQ14
33 34
DDRB_SDQ11 DQ10 DQ14 DDRB_SDQ15
35 36
DQ11 DQ15
37 38
DDRB_SDQ16 VSS13 VSS14 DDRB_SDQ20
39 40
DDRB_SDQ17 DQ16 DQ20 DDRB_SDQ21
41 42
DQ17 DQ21
DDRB_SDQS2#
43 VSS15 VSS16 44
DDRB_SDM2
Place near DIMM2
7 DDRB_SDQS2# 45 DQS#2 DM2 46
DDRB_SDQS2 47 48
7 DDRB_SDQS2 DQS2 VSS17 DDRB_SDQ22
49 50 +1.5V
DDRB_SDQ18 VSS18 DQ22 DDRB_SDQ23
51 DQ18 DQ23 52
DDRB_SDQ19 53 54 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DQ19 VSS19 DDRB_SDQ28
55 VSS20 DQ28 56 2 2 2 2 2 2 2 2 2 2
DDRB_SDQ24 57 58 DDRB_SDQ29
DDRB_SDQ25 DQ24 DQ29 C138 C139 C140 C141 C142 C143 C144 C145 C146 C147
59 DQ25 VSS21 60
61 62 DDRB_SDQS3#
DDRB_SDM3 VSS22 DQS#3 DDRB_SDQS3 DDRB_SDQS3# 7 1 1 1 1 1 1 1 1 1 1
63 DM3 DQS3 64 DDRB_SDQS3 7
65 66 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
DDRB_SDQ26 VSS23 VSS24 DDRB_SDQ30
67 DQ26 DQ30 68
DDRB_SDQ27 69 70 DDRB_SDQ31
DQ27 DQ31
71 VSS25 VSS26 72
1000P_0402_50V7K
1000P_0402_50V7K
DDRB_SDQ33 131 132 DDRB_SDQ37 1
DQ33 DQ37
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
0.1U_0402_16V4Z
133 134 C154
DDRB_SDQS4# VSS29 VSS30 DDRB_SDM4 1000P_0402_50V7K
7 DDRB_SDQS4# 135 136 1 1 1 1 1 1
DDRB_SDQS4 DQS#4 DM4 @ C155 C156 @ C158 C159
7 DDRB_SDQS4 137 138
DQS4 VSS31 2
C153
C157
139 140 DDRB_SDQ38
DDRB_SDQ34 VSS32 DQ38 DDRB_SDQ39
141 142
3 DDRB_SDQ35 DQ34 DQ39 2 2 2 2 2 2 3
143 144
DQ35 VSS33 DDRB_SDQ44
145 146
DDRB_SDQ40 VSS34 DQ44 DDRB_SDQ45
147 148
DDRB_SDQ41 DQ40 DQ45
149 150
DQ41 VSS35 DDRB_SDQS5#
151 152 DDRB_SDQS5# 7
DDRB_SDM5 VSS36 DQS#5 DDRB_SDQS5
153 154 DDRB_SDQS5 7
DM5 DQS5
155 156
DDRB_SDQ42 VSS37 VSS38 DDRB_SDQ46
157 158
DDRB_SDQ43 DQ42 DQ46 DDRB_SDQ47
159 160
DQ43 DQ47
161 162
DDRB_SDQ48 VSS39 VSS40 DDRB_SDQ52
163 164
DDRB_SDQ49 DQ48 DQ52 DDRB_SDQ53
165 166
DQ49 DQ53
167 168
DDRB_SDQS6# VSS41 VSS42 DDRB_SDM6
7 DDRB_SDQS6# 169 170
DDRB_SDQS6 DQS#6 DM6
7 DDRB_SDQS6 171 172
DQS6 VSS43 DDRB_SDQ54
173 174
DDRB_SDQ50 VSS44 DQ54 DDRB_SDQ55
175 176
DDRB_SDQ51 DQ50 DQ55
177 178
DQ51 VSS45 DDRB_SDQ60
179 180
DDRB_SDQ56 VSS46 DQ60 DDRB_SDQ61
181 182
DDRB_SDQ57 DQ56 DQ61
183 184
DQ57 VSS47 DDRB_SDQS7#
185 186 DDRB_SDQS7# 7
DDRB_SDM7 VSS48 DQS#7 DDRB_SDQS7
187 188 DDRB_SDQS7 7
DM7 DQS7
189 190
DDRB_SDQ58 VSS49 VSS50 DDRB_SDQ62
191 192
DDRB_SDQ59 DQ58 DQ62 DDRB_SDQ63
193 194
R75 10K_0402_5% DQ59 DQ63
195 196
VSS51 VSS52 MEM_MB_EVENT#
1 2 197 198 MEM_MB_EVENT# 7
SA0 EVENT#
+3VS 199 200 FCH_SDATA0 11,14,33
VDDSPD SDA
201 202 FCH_SCLK0 11,14,33
SA1 SCL
203 204 +0.75VS
VTT1 VTT2
1
4 R76 4
205 G1 G2 206
10K_0402_5% TYCO_2-2013289-1
2
HUDSON-2
APU_PCIE_RST#_CAE2 AF3
R77 A_RST#_R PCIE_RST# PCICLK0
1 2 33_0402_5% AD5 AF1
PCI CLKS
37 A_RST# A_RST# PCICLK1/GPO36 PCI_CLK1 16
PCI Host Bus Reset (To EC) PCICLK2/GPO37 AF5
C161 1 2 0.1U_0402_16V7K UMI_MTX_CRX_P0 AE30 AG2
6 UMI_MTX_C_CRX_P0 UMI_MTX_CRX_N0 UMI_TX0P PCICLK3/GPO38 PCI_CLK3 16
C162 1 2 0.1U_0402_16V7K AE32 AF6
6 UMI_MTX_C_CRX_N0 UMI_MTX_CRX_P1 UMI_TX0N PCICLK4/14M_OSC/GPO39 PCI_CLK4 16 +3V_FCH
C163 1 2 0.1U_0402_16V7K AD33
6 UMI_MTX_C_CRX_P1 UMI_MTX_CRX_N1 UMI_TX1P
C164 1 2 0.1U_0402_16V7K AD31 AB5 For PCIE device reset on FS1 @ C166
6 UMI_MTX_C_CRX_N1 UMI_MTX_CRX_P2 UMI_TX1N PCIRST#
C165 1 2 0.1U_0402_16V7K AD28 (GLAN, WLAN, Card Reader) 1 2
6 UMI_MTX_C_CRX_P2 UMI_MTX_CRX_N2 UMI_TX2P
C167 1 2 0.1U_0402_16V7K AD29
6 UMI_MTX_C_CRX_N2 UMI_MTX_CRX_P3 UMI_TX2N
C168 1 2 0.1U_0402_16V7K AC30 AJ3 0.1U_0402_16V4Z
6 UMI_MTX_C_CRX_P3 UMI_TX3P AD0/GPIO0
5
C169 1 2 0.1U_0402_16V7K UMI_MTX_CRX_N3 AC32 AL5
6 UMI_MTX_C_CRX_N3 UMI_TX3N AD1/GPIO1
AG4 2 @
P
1 UMI_CTX_C_MRX_P0 AD2/GPIO2 APU_PCIE_RST#_C R78 B 1
6 UMI_CTX_C_MRX_P0 AB33
UMI_RX0P AD3/GPIO3
AL6 1 2 33_0402_5% Y
4 PLT_RST# 18,30,33
UMI_CTX_C_MRX_N0 AB31 AH3 1
6 UMI_CTX_C_MRX_N0
G
2
UMI_CTX_C_MRX_P1 AB28 AJ5 2 U3
6 UMI_CTX_C_MRX_P1 UMI_RX1P AD5/GPIO5
UMI_CTX_C_MRX_N1 AB29 AL1 R79 NC7SZ08P5X_NL_SC70-5
6 UMI_CTX_C_MRX_N1
3
UMI_CTX_C_MRX_P2 UMI_RX1N AD6/GPIO6 C170 @ 8.2K_0402_5%
6 UMI_CTX_C_MRX_P2 Y33 AN5
UMI_CTX_C_MRX_N2 UMI_RX2P AD7/GPIO7 150P_0402_50V8J
6 UMI_CTX_C_MRX_N2 Y31 AN6
UMI_CTX_C_MRX_P3 UMI_RX2N AD8/GPIO8 1
6 UMI_CTX_C_MRX_P3 Y28 AJ1
1
UMI_CTX_C_MRX_N3 UMI_RX3P AD9/GPIO9
6 UMI_CTX_C_MRX_N3 Y29 AL8 1 2
UMI_RX3N AD10/GPIO10 R80 0_0402_5%
AL3
AD11/GPIO11 +3V_FCH
R81 1 2 590_0402_1% PCIE_CALRP AF29 AM7
PCIE_CALRP AD12/GPIO12
+PCIE_VDDR_FCH R82 1 2 2K_0402_1% PCIE_CALRN AF31
PCIE_CALRN AD13/GPIO13
AJ6 @ C171
AD14/GPIO14 AK7 1 2
V33 GPP_TX0P AD15/GPIO15 AN8
V31 AG9 0.1U_0402_16V4Z
GPP_TX0N AD16/GPIO16
5
W30 AM11 @U4
@ U4
GPP_TX1P AD17/GPIO17
W32 AJ10 2
P
GPP_TX1N AD18/GPIO18 VGA_PWRGD B VGA_PWRGD_R
AB26 GPP_TX2P AD19/GPIO19 AL12 20,49 VGA_PWRGD Y 4 1 2
AB27 AK11 1 R83 @ 0_0402_5%
GPP_TX2N AD20/GPIO20 A
G
AA24 GPP_TX3P AD21/GPIO21 AN12
AA23 AG12 NC7SZ08P5X_NL_SC70-5
3
GPP_TX3N AD22/GPIO22
AD23/GPIO23 AE12 PCI_AD23 16 1 2
AA27 AC12 R84 @ 100K_0402_5%
GPP_RX0P AD24/GPIO24 PCI_AD24 16
AA26 GPP_RX0N AD25/GPIO25 AE13 PCI_AD25 16
W27 AF13 1 2
PCI INTERFACE
GPP_RX1P AD26/GPIO26 PCI_AD26 16
V27 AH13 R85 0_0402_5%
GPP_RX1N AD27/GPIO27 PCI_AD27 16
V26 AH14 1 2 VGA_PWRGD_R
GPP_RX2P AD28/GPIO28 VGA_PWRGD_R 14
W26 AD15 R102 0_0402_5%
GPP_RX2N AD29/GPIO29
W24 GPP_RX3P AD30/GPIO30 AC15
W23 GPP_RX3N AD31/GPIO31 AE16
CBE0# AN3
CBE1# AJ8
AN10 +1.5VS +3VS
2 CBE2# 2
+1.1VS_CKVDD R86 1 2 2K_0402_1% CLK_CALRN F27 CLK_CALRN CBE3# AD12
FRAME# AG10
1
DEVSEL# AK9
IRDY# AL10
G30 AF10 R87
PCIE_RCLKP TRDY#
2
For "EXT" CLK mode, input to PCIE, 10K_0402_5%
SS G28 PCIE_RCLKN PAR AE10
AH1 @ R88
2 2
APU_DISP_CLKP STOP#
8 APU_DISP_CLKP R26 AM9 4.7K_0402_5%
DISP_CLKP PERR#
B
APU_DISP_CLKN T26 AH8 @
8 APU_DISP_CLKN DISP_CLKN SERR#
AG15
APU DISP
1
REQ0#
E
APU_PWRGD
NSS H33
DISP2_CLKP REQ1#/GPIO40
AG13 3 1 APU_PWRGD_L 47
C
H31 AF15 Q10
DISP2_CLKN REQ2#/CLK_REQ8#/GPIO41 @ MMBT3904_NL_SOT23-3
AM17 T11
APU_CLKP REQ3#/CLK_REQ5#/GPIO42
8 APU_CLKP T24 AD16
APU_CLKN APU_CLKP GNT0#
T23 AD13 1 2 1 2
APU 8 APU_CLKN APU_CLKN GNT1#/GPO44
AD21 R575 1 2 0_0402_5%
PE_GPIO0 14,18
R579 0_0402_5%
CLK_PEG_VGA R220 1 CLK_PEG_VGA_R GNT2#/SD_LED/GPO45 PE_GPIO1 14,20,37
0_0402_5%
2 J30 AK17 T12 R576 0_0402_5%
18 CLK_PEG_VGA CLK_PEG_VGA# R221 1 CLK_PEG_VGA#_R SLT_GFX_CLKP GNT3#/CLK_REQ7#/GPIO46 PM_CLKRUN# 1 R437
VGA 0_0402_5%
2 K29 AD19 2 PM_CLKRUNEC# 37
18 CLK_PEG_VGA# SLT_GFX_CLKN CLKRUN#
AH9 @ 0_0402_5%
LOCK#
H27
GPP_CLK0P
H28 AF18
GPP_CLK0N INTE#/GPIO32 PE_GPIO1 1
AE18 2
CLK_PCIE_LAN R90 0_0402_5% CLK_PCIE_LAN_R INTF#/GPIO33 R92 10K_0402_5%
30 CLK_PCIE_LAN 1 2 J27 AC16
CLK_PCIE_LAN# R91 0_0402_5% CLK_PCIE_LAN#_R GPP_CLK1P INTG#/GPIO34 APU_PWRGD
GLAN 30 CLK_PCIE_LAN# 1 2 K26
GPP_CLK1N INTH#/GPIO35
AD18 @
CLK_PCIE_MINI1 R93 1 0_0402_5%
2 CLK_PCIE_MINI1_R F33 APU_RST#
CLOCK GENERATOR
100P_0402_50V8J
100P_0402_50V8J
LPC_CLK0_EC_R R95 1 22_0402_5% LPC_CLK0_EC
SS E33
LPCCLK0
B25 2
R96 1 22_0402_5%
2
LPC_CLK0_EC 16,37
GPP_CLK3P LPC_CLK1_R CLK_PCI_DB 33
E31 D25 R97 1 22_0402_5%
2 1 1
GPP_CLK3N LPCCLK1 LPC_CLK1 16
C599
C600
D27 LPC_AD0
LAD0 LPC_AD0 33,37
M23 C28 LPC_AD1
3 GPP_CLK4P LAD1 LPC_AD1 33,37 3
M24 A26 LPC_AD2 LPC_AD2 33,37
GPP_CLK4N LAD2 LPC_AD3 @ 2 @ 2
LPC
R27 G26
GPP_CLK8N LDT_STP# APU_RST#
APU_RST#
F26 APU_RST# 8 DMA active. The FCH drives the DMA_ACTIVE# to
R99 1
EMI2 22_0402_5% CLK_SD_48M_R J26
APU to notify DMA activity. This will cause the APU
32 CLK_SD_48M 14M_25M_48M_OSC to reestablish the UMI link quicker.
H7 S5_CORE_EN
S5_CORE_EN S5_CORE_EN 37
F1 R100 1 2 22_0402_5%
RTCCLK RTC_CLK 16,37
F3
C172 1 25M_X1 INTRUDER_ALERT#
2 33P_0402_50V8K C31 E6
X1 25M_X1 VDDBT_RTC_G
S5 PLUS
4 3 G2 32K_X1
GND OSC R103 32K_X1
2 1 1M_0402_5% 25M_X2 C33
GND OSC 25M_X2 D1
+RTCVCC
25MHZ_20PF_X3G025000DK1H-X G4 32K_X2 2 R67 1 2
32K_X2 +RTCBATT
C173 1 2 33P_0402_50V8K
1 2 RTCVCC_R 1 2 1
R101 0_0402_5% R104 1K_0402_5% 3 1K_0402_5%
+CHGRTC
0.1U_0402_16V4Z
C174 1 1 C175 W=20mils
1
0.1U_0402_16V4Z
1U_0402_6.3V4Z
HUDSON-M3_FCBGA656 1
CLRP1 C176 DAN202UT106_SC70-3
SHORT PADS
C177
2
4 2 2 4
for Clear CMOS 2
1 2 32K_X1
@
Y1
10P_0402_50V8J
1
4 OSC NC 3
R105 1 2
20M_0402_5% OSC NC
C178
32.768KHZ 7PF Q13MC1461000100 Security Classification Compal Secret Data Compal Electronics, Inc.
2
HUDSON-2
AB6 G8
USB MISC
EC_LID_OUT# PCIE_RST2#/PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC
37 EC_LID_OUT# R2 RI#/GEVENT22#
W7 B9 USB_RCOMP R108 1 2 11.8K_0402_1%
SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP
37 PM_SLP_S3# T3 SLP_S3#
37 PM_SLP_S5# W2 SLP_S5# USB_FSD1P/GPIO186 H1
37 PBTN_OUT# J4 PWR_BTN# USB_FSD1N H3
FCH_PWRGD N7 PWR_GOOD
USB 1.1
H6
USB_FSD0P/GPIO185
USB 2.0
CLK_REQ0#/SATA_IS3#/GPIO60 USB_HSD7N
AH17 SATA_IS4#/FANOUT3/GPIO55
Modify 2010212-AMD request AG18 H9
SATA_IS5#/FANIN3/GPIO59 USB_HSD6P
1 2 AF24 G9
FCH_SCLK0 R110 10K_0402_5% SPKR/GPIO66 USB_HSD6N
GPIO
11,12,33 FCH_SCLK0 AD26 SCL0/GPIO43
SM bus 0-->S0 PWR domain FCH_SDATA0 AD25 A8
11,12,33 FCH_SDATA0 SDA0/GPIO47 USB_HSD5P
FCH_SCLK1 T7 C8
SM bus 1-->S5 PWR domain FCH_SDATA1 SCL1/GPIO227 USB_HSD5N
R7 SDA1/GPIO228
VGA_PD: Support MLDAC power MINI1_CLKREQ# AG25 F8 USB20_P4
33 MINI1_CLKREQ# CLK_REQ2#/FANIN4/GPIO62 USB_HSD4P USB20_P4 32
save if connect 30 LAN_CLKREQ#
R109 1 2 0_0402_5% LAN_CLKREQ#_1 AG22 CLK_REQ1#/FANOUT4/GPIO61 USB_HSD4N E8 USB20_N4
USB20_N4 32 Card Reader Hudson-M2/M3
0: MLDAC power on
J2 IR_LED#/LLB#/GPIO184 EHCI CTL
R577 2 @ 1 0_0402_5% AG26 C6 USB20_P3 DEV 18, Fn 2
1: MLDAC power off +3VS 13 VGA_PWRGD_R VGA_PD SMARTVOLT2/SHUTDOWN#/GPIO51 USB_HSD3P USB20_N3 USB20_P3 33
2 16 VGA_PD V8 DDR3_RST#/GEVENT7#/VGA_PD USB_HSD3N A6 USB20_N3 33 Mini Card (WLAN w/ BT) 2
W8 GBE_LED0/GPIO183
Y6 C5 USB20_P2
SPI_HOLD#/GBE_LED1/GEVENT9# USB_HSD2P USB20_P2 28
V10 A5 USB20_N2 Camera
GBE_LED2/GEVENT10# USB_HSD2N USB20_N2 28
2
AA8 GBE_STAT0/GEVENT11#
R360
19 PEG_CLKREQ#
R111 2 @ 1 0_0402_5% PEG_CLKREQ#_R AF25 C1 USB20_P1
USB20_P1 31
CLK_REQG#/GPIO65/OSCIN/IDLEEXIT# USB_HSD1P USB20_N1
10K_0402_5% USB_HSD1N C3 USB20_N1 31 USB2.0 Conn. JUSB4
@
M7 E1 USB20_P0
USB20_P0 31
1
USB OC
R571 ODD_DETECT# USB_OC5#/IR_TX0/GEVENT17# USBSS_CALRP R112 1
34 ODD_DETECT# P6 C16 2 1K_0402_1%
10K_0402_5% AC_PRESENT_OK USB_OC4#/IR_RX0/GEVENT16# USBSS_CALRP USBSS_CALRN R113 1
37 AC_PRESENT_OK F5 A16 2 1K_0402_1% +FCH_VDD_11_SSUSB_S
USB_OC2# USB_OC3#/AC_PRES/TDO/GEVENT15# USBSS_CALRN
35 USB_OC2# P5
USB_OC0#: for USB3.0 w/ AI Charger (JUSB1) USB_OC1# USB_OC2#/TCK/GEVENT14#
35 USB_OC1# J7 A14
USB_OC0# USB_OC1#/TDI/GEVENT13# USB_SS_TX3P
USB_OC1#: for USB2.0 port (JUSB3, 4) 35 USB_OC0# T8
USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT12# USB_SS_TX3N
C14 Hudson-M3
USB_OC2#: for USB3.0 port (JUSB2) xHCI CTL
USB_SS_RX3P
C12 DEV 16, Fn 1
USB_SS_RX3N
A12 xHCI CTL
DEV 16, Fn 0
R114 1 2 33_0402_5% HDA_BITCLK AB3 D15
31 HDA_BITCLK_AUDIO HDA_SDOUT AZ_BITCLK USB_SS_TX2P
R115 1 2 33_0402_5% AB1 B15
31 HDA_SDOUT_AUDIO AZ_SDOUT USB_SS_TX2N
HDA_SDIN0 AA2
HD AUDIO
31 HDA_SDIN0 AZ_SDIN0/GPIO167
HDA_SDIN1 Y5 E14
USB 3.0
T13 AZ_SDIN1/GPIO168 USB_SS_RX2P
Y3 F14
T14 AZ_SDIN2/GPIO169 USB_SS_RX2N
Y1
R116 1 33_0402_5% HDA_SYNC AZ_SDIN3/GPIO170 USB3_TX1_P
31 HDA_SYNC_AUDIO 2 AD6 F15 USB3_TX1_P 35
+3V_FCH R117 1 HDA_RST# AZ_SYNC USB_SS_TX1P USB3_TX1_N
31 HDA_RST_AUDIO# 2 33_0402_5% AE4 G15 USB3_TX1_N 35
AZ_RST# USB_SS_TX1N
H13 USB3_RX1_P
USB_OC2# USB_SS_RX1P USB3_RX1_N USB3_RX1_P 35
1 2 USB_SS_RX1N
G13 USB3_RX1_N 35
R118 100K_0402_5%
1 2 USB_OC0# T34 K19 J16 USB3_TX0_P
3 PS2_DAT/SDA4/GPIO187 USB_SS_TX0P USB3_TX0_P 35 3
R119 100K_0402_5% T15 J19 H16 USB3_TX0_N On board
USB_OC1# PS2_CLK/CEC/SCL4/GPIO188 USB_SS_TX0N USB3_TX0_N 35
1 2 J21 USB Conn
R120 100K_0402_5% SPI_CS2#/GBE_STAT2/GPIO166 USB3_RX0_P
J15 USB3_RX0_P 35
H_THERMTRIP# USB_SS_RX0P USB3_RX0_N
1 2 K15 USB3_RX0_N 35
R121 10K_0402_5% USB_SS_RX0N
1 2 FCH_SCLK1 FCH_GPIO189 D21
R122 10K_0402_5% FCH_GPIO190 PS2KB_DAT/GPIO189 R123 1
C20 H19 2 10K_0402_5%
FCH_SDATA1 R573 2 @ PS2KB_CLK/GPIO190 SCL2/GPIO193 R125 1
1 2 13,18 PE_GPIO0 1 D23
PS2M_DAT/GPIO191 SDA2/GPIO194
G19 2 10K_0402_5%
R124 10K_0402_5% R574 2 @ 1 C22 EMBEDDED CTRL G22 APU_SIC
13,20,37 PE_GPIO1 PS2M_CLK/GPIO192 SCL3_LV/GPIO195 APU_SIC 8
1 2 EC_LID_OUT# 0_0402_5% G21 APU_SID
SDA3_LV/GPIO196 APU_SID 8
R126 10K_0402_5% 0_0402_5% E22
@ FCH_PCIE_WAKE# +3VALW EC_PWM0/EC_TIMER0/GPIO197
1 2 H22
R128 10K_0402_5% EC_PWM1/EC_TIMER1/GPIO198 EC_PWM2
F21 J22 EC_PWM2 16
@ FCH_ODD_DA# KSO_0/GPIO209 EC_PWM2/EC_TIMER2/WOL_EN/GPIO199
1 2 E20 H21
R135 10K_0402_5% KSO_1/GPIO210 EC_PWM3/EC_TIMER3/GPIO200
F20
KSO_2/GPIO211
8.2K_0402_5%
@
8.2K_0402_5%
@
R127
5
8.2K_0402_5%
@
8.2K_0402_5%
@
P
KSO_14/GPIO223 FCH_PWRGD B FCH_POK 37
R131 2.2K_0402_5% B17 4
FCH_SDATA0 KSO_15/GPIO224 Y
1 2 A24 1 VGATE 37,47
KSO_16/GPIO225 A
G
R133
R134
3
R137 8.2K_0402_5% C839 U75 @
4 LAN_CLKREQ#_1 Add Project ID Table HUDSON-M3_FCBGA656 0.1U_0402_16V7K 4
1 2
R138 8.2K_0402_5% 201011301600 1
U2B
HUDSON-2
AK19 AL14 FCH_SDCLK_R R752 1 nonCARD@
2 60.4_0402_1% FCH_SDCLK
34 SATA_FTX_DRX_P0 SATA_TX0P SD_CLK/SCLK_2/GPIO73 FCH_SDCLK 32
AM19 AN14 FCH_SDCMD_R R753 1 nonCARD@
2 60.4_0402_1% FCH_SDCMD
34 SATA_FTX_DRX_N0 SATA_TX0N SD_CMD/SLOAD_2/GPIO74 FCH_SDCD#_R R754 FCH_SDCD# FCH_SDCMD 32
HDD1 AJ12 1 nonCARD@
2 0_0402_5%
SD_CD/GPIO75 FCH_SDWP_R FCH_SDWP FCH_SDCD# 32
AL20 AH12 R755 1 nonCARD@
2 0_0402_5%
34 SATA_FRX_DTX_N0 SATA_RX0N SD_WP/GPIO76 FCH_SDWP 32
SD CARD
AN20 AK13 FCH_SDDATA0_R R756 1 nonCARD@
2 60.4_0402_1% FCH_SDDATA0
34 SATA_FRX_DTX_P0 SATA_RX0P SD_DATA0/SDATI_2/GPIO77 FCH_SDDATA1_R R757 FCH_SDDATA1 FCH_SDDATA0 32
AM13 1 nonCARD@
2 60.4_0402_1%
SD_DATA1/SDATO_2/GPIO78 FCH_SDDATA2_R R758 FCH_SDDATA2 FCH_SDDATA1 32
AN22 AH15 1 nonCARD@
2 60.4_0402_1%
34 SATA_FTX_DRX_P1 SATA_TX1P SD_DATA2/GPIO79 FCH_SDDATA3_R R759 FCH_SDDATA3 FCH_SDDATA2 32
AL22 AJ14 1 nonCARD@
2 60.4_0402_1%
34 SATA_FTX_DRX_N1 SATA_TX1N SD_DATA3/GPIO80 FCH_SDDATA3 32
5P_0402_50V_C
5P_0402_50V_C
HDD2 GBE_COL
34 SATA_FRX_DTX_N1 AH20 AC4 1 1
SATA_RX1N GBE_COL GBE_CRS
34 SATA_FRX_DTX_P1 AJ20 AD3
1 SATA_RX1P GBE_CRS C624 C625 1
AD9
GBE_MDCK GBE_MDIO
34 SATA_FTX_DRX_P2 AJ22 W10
SATA_TX2P GBE_MDIO @ 2 @ 2
34 SATA_FTX_DRX_N2 AH22 AB8
SATA_TX2N GBE_RXCLK
ODD GBE_RXD3
AH7
34 SATA_FRX_DTX_N2 AM23 AF7
SATA_RX2N GBE_RXD2
34 SATA_FRX_DTX_P2 AK23 AE7
SATA_RX2P GBE_RXD1 +3V_FCH
AD7
GBE_RXD0
AH24 AG8
SATA_TX3P GBE_RXCTL/RXDV GBE_RXERR GBE_MDIO
AJ24 AD1 1 2
SATA_TX3N GBE_RXERR R146 10K_0402_5%
AB7
GBE LAN
GBE_TXCLK
AN24 AF9
SATA_RX3N GBE_TXD3 Change to PD 20101112
AL24 SATA_RX3P GBE_TXD2 AG6
GBE_TXD1 AE8
AL26 AD8 GBE_PHY_INTR 1 2
SATA_TX4P GBE_TXD0 R147 10K_0402_5%
AN26 SATA_TX4N GBE_TXCTL/TXEN AB9
AC2 GBE_COL 1 2
SERIAL ATA
GBE_PHY_PD R148 10K_0402_5%
AJ26 SATA_RX4N GBE_PHY_RST# AA7
AH26 W9 GBE_PHY_INTR GBE_CRS 1 2
SATA_RX4P GBE_PHY_INTR R149 10K_0402_5%
AN29 GBE_RXERR 1 2
SATA_TX5P R551 1 FCH_SPI_MISO_R R150 10K_0402_5%
AL28 SATA_TX5N SPI_DI/GPIO164 V6 2
V5 0_0402_5% FCH_SPI_MOSI_R
SPI_DO/GPIO163
SPI ROM
AK27 V3 FCH_SPI_CLK_R1
SATA_RX5N SPI_CLK/GPIO162 FCH_SPI_CS1#_R
AM27 SATA_RX5P SPI_CS1#/GPIO165 T6
V1 FCH_SPI_WP#
ROM_RST#/SPI_WP#/GPIO161 FCH_SPI_WP# 37
AL29 NC6
AN31 NC7
L30 @ R153 @ C179
VGA_RED FCH_CRT_R 28 FCH_SPI_CLK
AL31 R152 1 2 150_0402_1% 1 2 1 2
NC8 10_0402_5%
AL33 NC9
L32 10P_0402_50V8J
VGA_GREEN FCH_CRT_G 28
AH33 R154 1 2 150_0402_1%
2 NC10 R646 C620 2
AH31 NC11
M29 FCH_SPI_MOSI_R1 2 2 1
VGA_BLUE FCH_CRT_B 28
AJ33 R155 1 2 150_0402_1% 33_0402_5% @ @
VGA DAC
NC12 22P_0402_50V8J
AJ31 NC13
VGA_HSYNC/GPO68 M28 FCH_CRT_HSYNC 28
VGA_VSYNC/GPO69 N30 FCH_CRT_VSYNC 28
M33 FCH_CRT_DDC_SDA 28
1K_0402_1% 2 SATA_CALRP VGA_DDC_SDA/GPO70
1 R156 AF28 N32 FCH_CRT_DDC_SCL 28
SATA_CALRP VGA_DDC_SCL/GPO71
931_0402_1%2 1 R157 SATA_CALRN AF27
+AVDD_SATA SATA_CALRN
K31 R158 1 2 715_0402_1%
VGA_DAC_RSET
SATA_LED# AD22
38 SATA_LED# SATA_ACT#/GPIO67
V28 ML_VGA_AUXP_C 8
R159 1 AUX_VGA_CH_P
+3VS 2 10K_0402_5% V29 ML_VGA_AUXN_C 8
AUX_VGA_CH_N
AF21
VGA MAINLINK
SATA_X1
U28 AUXCAL 1 2 +VDDAN_11_ML
AUXCAL R160 100_0402_1%
T31 ML_VGA_TXP0 8
ML_VGA_L0P
T33 ML_VGA_TXN0 8
ML_VGA_L0N
AG21 T29 ML_VGA_TXP1 8
SATA_X2 ML_VGA_L1P
T28 ML_VGA_TXN1 8
ML_VGA_L1N
R32 ML_VGA_TXP2 8
ML_VGA_L2P
R30 ML_VGA_TXN2 8
ML_VGA_L2N
P29 ML_VGA_TXP3 8
ML_VGA_L3P
P28 ML_VGA_TXN3 8
ML_VGA_L3N +FCH_VDDAN_33_DAC_R
2
9
VDD +3V_SPI R617
19 2 +3V_SPI
VDD YA FCH_SPI_CS1#_RR R548 1
5 2 33_0402_5%FCH_SPI_CS1# U6 10K_0402_5%
YB FCH_SPI_CLK_RR R549 1
+3V_FCH 24
A0 YC
6 2 47_0402_5%FCH_SPI_CLK 1 @ 2 FCH_SPI_CS1# 1
CS# VCC
8 @
FCH_SPI_CS1#_R 22 R174 1 2 1K_0402_5% FCH_SPI_WP# 3 6 FCH_SPI_CLK
1
FCH_SPI_CLK_R1 B0 WP# SCLK
R151 1 2 FCH_SPI_CLK_R 18 C0 YD 8 FCH_SPI_MOSI_RR R550 1 2 75_0402_5%FCH_SPI_MOSI R175 1 2 10K_0402_5% FCH_SPI_HOLD# 7 HOLD# SI 5 FCH_SPI_MOSI
4 0_0402_5% FCH_SPI_MOSI_R FCH_SPI_MISO R176 10K_0402_5% FCH_SPI_MISO 4
17 D0 YE 11 4 GND SO 2
FCH_SPI_MISO_R 14 E0 W25Q32BVSSIG_SO8
+3VALW 23 3 SA00003K800
KSI4 A1 GND
37,38 KSI4 21 B1 GND 7
KSI5 16 10
37,38 KSI5 C1 GND
KSI6 15 20
37,38 KSI6 D1 GND
KSI7
37,38 KSI7 13 E1 Security Classification Compal Secret Data Compal Electronics, Inc.
PI3V512QE_QSOP24 Issued Date 2011/07/29 2012/07/29 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Hudson-M2/M3-SATA/GBE/HWM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.11
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 15 of 53
A B C D E
A B C D E
STRAP PINS
PCI_CLK1 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 EC_PWM2 RTC_CLK
1 1
PULL ALLOW USE NON_FUSION EC CLKGEN LPC ROM S5 PLUS If support ML DAC power down when no VGA plug
HIGH PCIE GEN2 DEBUG CLOCK MODE ENABLED ENABLED MODE
STRAPS DEFAULT DISABLED
DEFAULT DEFAULT DEFAULT
L2 30mil
1 2
PULL FORCE IGNORE FUSION EC CLKGEN SPI ROM S5 PLUS FBMA-L11-201209-221LMA30T_0805
LOW PCIE GEN1 DEBUG CLOCK DISABLED DISABLE MODE 220 ohm
STRAP MODE ENABLED +3VS +FCH_VDDAN_33_DAC +FCH_VDDAN_33_DAC_R
DEFAULT DEFAULT DEFAULT
@ L3
@ Q12 3
@Q12 1 1 2
2.2U_0603_6.3V4Z
AP2301GN-HF_SOT23-3 FBMA-L11-201209-221LMA30T_0805
0.1U_0402_16V4Z
C181
C182
220 ohm
1 1
2
+3VS +3VS +3VS +3V_FCH +3V_FCH +3V_FCH +3V_FCH
2 2
R177
R178 10K_0402_5%
R179 10K_0402_5%
R180 10K_0402_5%
R181 10K_0402_5%
R182 10K_0402_5%
R183 10K_0402_5%
VGA_PD# AO3413 Vgs(max)=1V
1
1
R184 1 2 0_0402_5%
10K_0402_5%
@ @ @ @
+1.1VS +FCH_VDDAN_11_MLDAC
2
2
30mil
@ Q13 3 1 1 @ 2
13 PCI_CLK1
AP2301GN-HF_SOT23-3 R185 0_0402_5%
2 13 PCI_CLK3 2
13 PCI_CLK4
2
13,37 LPC_CLK0_EC VGA_PD#
+3VS
13 LPC_CLK1
14 EC_PWM2
13,37 RTC_CLK
1
100K_0402_5%
R186
100K_0402_5%
R187
1
R188 10K_0402_5%
R189 10K_0402_5%
R190 10K_0402_5%
R191 10K_0402_5%
R192 10K_0402_5%
R193 2.2K_0402_5%
R194 2.2K_0402_5%
1
2
@ @ @
2
VGA_PD#
2
6
1K_0402_5%
R195
0_0402_5%
DMN66D0LDW-7_SOT363-6
Q14A
VGA_PD: Support MLDAC power @
@
R196
save if not connect
@ @
0: MLDAC power on 2
1: MLDAC power off
3
DMN66D0LDW-7_SOT363-6
Q14B
1U_0402_6.3V4Z
1
1
C183
@
Check VGA_PD states
DEBUG STRAPS 14 VGA_PD
1
5
2
4
FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23] R197 C184
2.2K_0402_5%
2
3 @ 3
1U_0402_6.3V4Z
1
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
@ @
USE PCI DISABLE USE FC USE DEFAULT DISABLE PCI @
PULL PLL ILA PLL PCIE STRAPS MEM BOOT
HIGH AUTORUN
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
13 PCI_AD27
13 PCI_AD26
13 PCI_AD25
13 PCI_AD24
13 PCI_AD23
R198 2.2K_0402_5%
R199 2.2K_0402_5%
R200 2.2K_0402_5%
R201 2.2K_0402_5%
R202 2.2K_0402_5%
4 4
1
@ @ @ @ @
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Hudson-M2/M3-STRAP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 16 of 53
A B C D E
A B C D E
+VCC_FCH_R +1.1VS
U2C 1007mA R207
131mA 10mils 2 1
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
R203 HUDSON-2 50mils
C185
C191
C192
C186
C193
C360
C187
+3VS 2 1 +VDDIO_33_PCIGP AB17 T14 0_0805_5%
+3VS VDDIO_33_PCIGP_1 VDDCR_11_1
22U_0805_6.3V6M
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
0_0603_5% AB18 T17 1 1 1 1 1 1 1
VDDIO_33_PCIGP_2 VDDCR_11_2
C194
C188
C201
C202
C361
L4 AE9 T20 U2E
PCI/GPIO I/O
+VDDPL_3.3V VDDIO_33_PCIGP_3 VDDCR_11_3
1 2 1 1 1 1 1 AD10
VDDIO_33_PCIGP_4 VDDCR_11_4
U16
2.2U_0603_6.3V4Z
MBK1608221YZF_2P AG7 U18 HUDSON-2
.1U_0402_16V7K
VDDIO_33_PCIGP_5 VDDCR_11_5 2 2 2 2 2 2 2
C195
C189
CORE S0
220ohm / 550mA AC13
VDDIO_33_PCIGP_6 VDDCR_11_6
V14 A3
VSS VSS
T25
1 1
1 1 AB12 V17 A33 T27
2 2 2 2 2 VDDIO_33_PCIGP_7 VDDCR_11_7 VSS VSS
AB13 V20 B7 U6
VDDIO_33_PCIGP_8 VDDCR_11_8 VSS VSS
AB14 Y17 B13 U14
VDDIO_33_PCIGP_9 VDDCR_11_9 +1.1VS_CKVDD +1.1VS VSS VSS
AB16 D9 U17
2 2 VDDIO_33_PCIGP_10 R208 VSS VSS
47mA 10mils 20mils 340mA D13
VSS VSS
U20
+VDDPL_3.3V H24 H26 +1.1VS_CKVDD 2 1 E5 U21
VDDPL_33_SYS VDDAN_11_CLK_1 VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
22U_0805_6.3V6M
20mA 10mils VDDAN_11_CLK_2
J25 E12
VSS VSS
U30
+FCH_VDDAN_33_DAC_R
C203
C196
C197
C198
C199
2 +VDDPL_33_DAC 1 V22 K24 0_0603_5% E16 U32
CLKGEN I/O
+FCH_VDDPL_33_MLDAC VDDPL_33_DAC VDDAN_11_CLK_3 VSS VSS
20mA R204 0_0402_5% 10mils VDDAN_11_CLK_4
L22 1 1 1 1 1 E29
VSS VSS
V11
R205 2 1+FCH_VDDPL_33_MLDAC 1 2 +VDDPL_33_ML U22 M22 F7 V16
VDDPL_33_ML VDDAN_11_CLK_5 VSS VSS
200mA R206 0_0402_5% 10mils VDDAN_11_CLK_6
N21 F9
VSS VSS
V18
+3VS
2.2U_0603_6.3V4Z
C200
PCI EXPRESS
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
22U_0805_6.3V6M
93mA 10mils VDDAN_11_PCIE_3 AE25 F29 VSS VSS AA6
C205
C206
C207
C208
C209
LDO_CAP: Internally generated 1.8V +VDDPL_33_SATA AG28 VDDPL_33_SATA VDDAN_11_PCIE_4 AD24 0_0805_5% G6 VSS VSS AA12
supply for the RGB outputs VDDAN_11_PCIE_5 AB23 1 1 1 1 1 G16 VSS VSS AA13
@ AA22 G32 AA14
+3V_FCH VDDAN_11_PCIE_6 VSS VSS
1 2 M31 AF26 H12 AA16
L6 +FCH_VDDAN_11_MLDAC C204 2.2U_0603_6.3V4Z LDO_CAP VDDAN_11_PCIE_7 VSS VSS
VDDAN_11_PCIE_8 AG27 H15 VSS VSS AA17
2 +FCH_VDDPL_33_SSUSB_S L7 2 2 2 2 2
1 7mA 10mils H29 AA25
GROUND
VSS VSS
2.2U_0603_6.3V4Z
.1U_0402_16V7K
C211
.1U_0402_16V7K
.1U_0402_16V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
22U_0805_6.3V6M
Y22 VDDAN_11_ML_1 VDDAN_11_SATA_2 AB21 J28 VSS VSS AC6
MAIN LINK
C212
4.7U_0603_6.3V6K
C213
C214
C215
C216
C217
C218
C219
R211 V23 AB22 0_0805_5% J32 AC18
SERIAL ATA
2 2 0_0603_5% VDDAN_11_ML_2 VDDAN_11_SATA_3 VSS VSS
1 1 1 V24 VDDAN_11_ML_3 VDDAN_11_SATA_5 AC22 1 1 1 1 1 K7 VSS VSS AC28
2 2
V25 VDDAN_11_ML_4 VDDAN_11_SATA_6 AC21 K16 VSS VSS AD27
VDDAN_11_SATA_7 AA20 K27 VSS VSS AE6
VDDAN_11_SATA_8 AA18 K28 VSS VSS AE15
+VDDAN_33_USB 2 2 2 2 2 2 2 2
VDDAN_11_SATA_9 AB20 L6 VSS VSS AE21
L8 AC19 L12 AE28
+FCH_VDDPL_33_USB_S VDDAN_11_SATA_10 +3V_FCH VSS VSS
1 2 AB10 VDDIO_33_GBE_S L13 VSS VSS AF8
2.2U_0603_6.3V4Z
.1U_0402_16V7K
C221
GBE LAN
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
2.2U_0603_6.3V4Z
Change to 0ohm-AMD request 1 1 AA11 L19 L21 AF33
VDDCR_11_GBE_S_2 VDDIO_33_S_2 VSS VSS
C222
C223
C224
C225
20110212 M18 0_0402_5% M13 AG30
VDDIO_33_S_3 VSS VSS
3.3V_S5 I/O
1 2 AA9 V12 1 1 1 1 M16 AG32
R214 0_0402_5% VDDIO_GBE_S_1 VDDIO_33_S_4 VSS VSS
AA10 V13 M21 AH5
2 2 +3V_FCH VDDIO_GBE_S_2 VDDIO_33_S_5 VSS VSS
Y12 M25 AH11
L9 VDDIO_33_S_6 VSS VSS
658mA 30mils VDDIO_33_S_7
Y13
2 2 2 2
N6
VSS VSS
AH18
1 2 +VDDAN_33_USB G7 W11 N11 AH19
VDDAN_33_USB_S_1 VDDIO_33_S_8 VSS VSS
2.2U_0603_6.3V4Z
22U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
.1U_0402_16V7K
FBMA-L11-201209-221LMA30T_0805 H8 N13 AH21
+3VS VDDAN_33_USB_S_2 +3V_FCH VSS VSS
C363
C362
C226
C227
C228
C229
C230
220ohm / 3A J8
VDDAN_33_USB_S_3
N23
VSS VSS
AH23
L10 1 1 1 1 1 1 1 K8 10mils 5mA L11 N24 AH25
+VDDPL_33_PCIE VDDAN_33_USB_S_4 +VDDXL_3.3V VSS VSS
1 2 K9
VDDAN_33_USB_S_5 VDDXL_33_S
G24 1 2 P12
VSS VSS
AH27
2.2U_0603_6.3V4Z
.1U_0402_16V7K
.1U_0402_16V7K
2.2U_0603_6.3V4Z
MBK1608221YZF_2P M9 MBK1608221YZF_2P P18 AJ18
VDDAN_33_USB_S_6 VSS VSS
C231
C232
C233
C234
220ohm / 550mA 2 2 2 2 2 2 2
M10
VDDAN_33_USB_S_7 220ohm / 550mA P20
VSS VSS
AJ28
1 1 N9 1 1 P21 AJ29
VDDAN_33_USB_S_8 VSS VSS
N10 P31 AK21
VDDAN_33_USB_S_9 VSS VSS
M12 P33 AK25
VDDAN_33_USB_S_10 VSS VSS
N12 R4 AL18
2 2 VDDAN_33_USB_S_11 2 2 VSS VSS
M11 R11 AM21
+1.1VALW VDDAN_33_USB_S_12 VSS VSS
R25 AM25
L12 +1.1VALW VSS VSS
140mA 10mils R28
VSS VSS
AN1
USB
1 2 +VDDAN_11_USB_S U12 10mils 187mA R215 T11 AN18
VDDAN_11_USB_S_1 VSS VSS
2.2U_0603_6.3V4Z
.1U_0402_16V7K
.1U_0402_16V7K
C236
C364
1U_0402_6.3V6K
1U_0402_6.3V6K
220ohm / 550mA VDDCR_11_S_2
M20 T18
VSS VSS
AN33
C237
C238
L13 1 1 1 0_0603_5%
3 +VDDPL_33_SATA 3
1 2 1 1 N8
VSSAN_HWM VSSPL_DAC
T21
2.2U_0603_6.3V4Z
.1U_0402_16V7K
MBK1608221YZF_2P L28
VSSAN_DAC
C239
C240
220ohm / 550mA 2 2 2
K25
VSSXL VSSANQ_DAC
K33
1 1 N28
2 2 VSSIO_DAC
H25
VSSPL_SYS
R6
+1.1VALW EFUSE
2 2 L38 +1.1VALW
197mA 10mils
1 2 +VDDCR_1.1V_USB T12 10mils 70mA L39
VDDCR_11_USB_S_1
10U_0603_6.3V6M
.1U_0402_16V7K
.1U_0402_16V7K
C242
C243
2.2U_0603_6.3V4Z
220ohm / 550mA MBK1608221YZF_2P
.1U_0402_16V7K
C244
C245
1 1 1 220ohm / 550mA Connected to VSS through a dedicated via.
1 1
2 2 2
2 2
+3V_FCH
+FCH_VDD_11_SSUSB_S 12mA R217
20mils 10mils +VDDAN_33_HWM
282mA P16
VDDAN_11_SSUSB_S_1 VDDAN_33_HWM_S
M8 1 2
2.2U_0603_6.3V4Z
+VDDAN_SSUSB AMD reply:
.1U_0402_16V7K
1 2 M14
VDDAN_11_SSUSB_S_2
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
C249
C250
R216 0_0603_5% N14 0_0402_5% VDDAN_33_HWM_S: Please connect
VDDAN_11_SSUSB_S_3
C246
C247
C248
VDDAN_11_SSUSB_S_4
1 1 1 P14
VDDAN_11_SSUSB_S_5
USB SS
2 2
2 2 2 30mils
N16
VDDCR_11_SSUSB_S_1 +3VS
N17
VDDCR_11_SSUSB_S_2 R218
P17
VDDCR_11_SSUSB_S_3 10mils 26mA
M17 AA4 +VDDIO_AZ 1 2
4 VDDCR_11_SSUSB_S_4 VDDIO_AZ_S VDDIO_AZ_S should be tied to 4
POWER 1 2 0_0402_5% +3.3/1.5V_S5 rail if Wake on Ring
424mA C251 2.2U_0603_6.3V4Z is supported
+1.1VALW 2 L40 1 1 2 +VDDCR_11_SSUSB HUDSON-M3_FCBGA656 1 2
10U_0603_6.3V6M
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
C254
C255
C256
FBMA-L11-201209-221LMA30T_0805
220ohm / 3A 1 1 1 1
Security Classification Compal Secret Data Compal Electronics, Inc.
2 2 2 2 Issued Date 2011/07/29 Deciphered Date 2012/07/29 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Hudson-M2/M3-POWER/GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 17 of 53
A B C D E
5 4 3 2 1
PCIE_CTX_GRX_P3 V35 PCIE_RX3P PCIE_TX3P U30 PCIE_CRX_C_GTX_P3 0.1U_0402_16V7K 2 1 C262 PX@ PCIE_CRX_GTX_P3
TXCLK_UP_DPF3P AK35
PCIE_CTX_GRX_N3 U36 U29 PCIE_CRX_C_GTX_N3 0.1U_0402_16V7K 2 1 C263 PX@ PCIE_CRX_GTX_N3 AL36
PCIE_RX3N PCIE_TX3N TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P AJ38
PCIE_CTX_GRX_P4 U38 PCIE_RX4P PCIE_TX4P T33 PCIE_CRX_C_GTX_P4 0.1U_0402_16V7K 2 1 C265 PX@ PCIE_CRX_GTX_P4
TXOUT_U0N_DPF2N AK37
PCIE_CTX_GRX_N4 T37 T32 PCIE_CRX_C_GTX_N4 0.1U_0402_16V7K 2 1 C266 PX@ PCIE_CRX_GTX_N4
PCIE_RX4N PCIE_TX4N
PCIE_CTX_GRX_P6 R38 PCIE_RX6P PCIE_TX6P P33 PCIE_CRX_C_GTX_P6 0.1U_0402_16V7K 2 1 C269 PX@ PCIE_CRX_GTX_P6
TXOUT_U3P AF35
PCIE_CTX_GRX_N6 P37 P32 PCIE_CRX_C_GTX_N6 0.1U_0402_16V7K 2 1 C270 PX@ PCIE_CRX_GTX_N6 AG36
PCIE_RX6N PCIE_TX6N TXOUT_U3N
C C
PCIE_CTX_GRX_P7 P35 PCIE_RX7P PCIE_TX7P P30 PCIE_CRX_C_GTX_P7 0.1U_0402_16V7K 2 1 C271 PX@ PCIE_CRX_GTX_P7 LVTMDP
PCIE_CTX_GRX_N7 N36 P29 PCIE_CRX_C_GTX_N7 0.1U_0402_16V7K 2 1 C272 PX@ PCIE_CRX_GTX_N7
PCIE_RX7N PCIE_TX7N
TXCLK_LP_DPE3P AP34
TXCLK_LN_DPE3N AR34
PCIE_CTX_GRX_P8 N38 PCIE_RX8P PCIE_TX8P N33 PCIE_CRX_C_GTX_P8 0.1U_0402_16V7K 2 1 C273 PX@ PCIE_CRX_GTX_P8
PCIE_CTX_GRX_N8 M37 N32 PCIE_CRX_C_GTX_N8 0.1U_0402_16V7K 2 1 C274 PX@ PCIE_CRX_GTX_N8 AW37
PCIE_RX8N PCIE_TX8N TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N AU35
PCIE_CTX_GRX_P9 M35 PCIE_RX9P PCIE_TX9P N30 PCIE_CRX_C_GTX_P9 0.1U_0402_16V7K 2 1 C275 PX@ PCIE_CRX_GTX_P9
TXOUT_L1P_DPE1P AR37
PCIE_CTX_GRX_N9 L36 N29 PCIE_CRX_C_GTX_N9 0.1U_0402_16V7K 2 1 C276 PX@ PCIE_CRX_GTX_N9 AU39
PCIE_RX9N PCIE_TX9N TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P AP35
PCIE_CTX_GRX_P10 L38 PCIE_RX10P PCIE_TX10P L33 PCIE_CRX_C_GTX_P100.1U_0402_16V7K 2 1 C277 PX@ PCIE_CRX_GTX_P10
TXOUT_L2N_DPE0N AR35
PCIE_CTX_GRX_N10 K37 L32 PCIE_CRX_C_GTX_N100.1U_0402_16V7K 2 1 C278 PX@ PCIE_CRX_GTX_N10
PCIE_RX10N PCIE_TX10N
TXOUT_L3P AN36
TXOUT_L3N AP37
PCIE_CTX_GRX_P11 K35 PCIE_RX11P PCIE_TX11P L30 PCIE_CRX_C_GTX_P110.1U_0402_16V7K 2 1 C279 PX@ PCIE_CRX_GTX_P11
PCIE_CTX_GRX_N11 J36 L29 PCIE_CRX_C_GTX_N110.1U_0402_16V7K 2 1 C280 PX@ PCIE_CRX_GTX_N11
PCIE_RX11N PCIE_TX11N
2
R562 R536
PCIE_CTX_GRX_P15 F35 PCIE_RX15P PCIE_TX15P H33 PCIE_CRX_C_GTX_P150.1U_0402_16V7K 2 1 C287 PX@ PCIE_CRX_GTX_P15 0_0402_5% 0_0402_5%
PCIE_CTX_GRX_N15 E37 H32 PCIE_CRX_C_GTX_N150.1U_0402_16V7K 2 1 C288 PX@ PCIE_CRX_GTX_N15 @
PCIE_RX15N PCIE_TX15N
1
5
CLOCK U8
CLK_PEG_VGA AB35 13,14 PE_GPIO0 R556 2 PX@ 1 0_0402_5% 2
P
13 CLK_PEG_VGA PCIE_REFCLKP B
CLK_PEG_VGA# AA36 4 GPU_RST#
13 CLK_PEG_VGA# PCIE_REFCLKN Y
13,30,33 PLT_RST# 1 A
G
CALIBRATION PX@
3
PCIE_CALRP Y30 1.27K_0402_1% 1 PX@ 2 R222 MC74VHC1G08DFT2G SC70 5P
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 18 of 53
5 4 3 2 1
5 4 3 2 1
C289
C290
C291
AM13
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
49 GPU_VID0 GPIO_15_PWRCNTL_0
AK14 AC33 +VDD1DI (1.8V@100mA VDD1DI) 1 2 +1.8VSG 1 1 1
THM_ALERT# GPIO_16 VDD1DI L42 PX@
AG30 AC34
GPIO_17_THERMAL_INT VSS1DI BLM15BD121SN1D_0402
C292
C293
C294
AN14
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
GPU_CTF GPIO_18_HPD3
AM17 1 1 1
GPIO_19_CTF 2 2 2
PX@
PX@
PX@
GPU_VID1 AL13 AC30
49 GPU_VID1 GPIO_20_PWRCNTL_1 R2/NC
GPIO21_BBEN AJ14 AC31
+3VSG T19 GPIO_21_BB_EN R2B/NC
AK13
GPIO_22_ROMCSB 2 2 2 +3VSG
Internal VGA Thermal Sensor
PX@
PX@
PX@
PEG_CLKREQ# AN13 AD30
14 PEG_CLKREQ# GPIO_23_CLKREQB G2/NC
10K_0402_5% 1 @ 2 R237 GPIO24_TRSTB GPIO24_TRSTB AM23 AD31
10K_0402_5% @ JTAG_TRSTB G2B/NC
1 2 R238 GPIO25_TDI GPIO25_TDI AN23
10K_0402_5% @ GPIO27_TMS GPIO26_TCK JTAG_TDI
1 2 R239 AK23 AF30
GPIO27_TMS JTAG_TCK B2/NC +3VS
AL24 AF31
JTAG_TMS B2B/NC
1
10K_0402_5% 1 @ 2 R242 GPIO26_TCK T20 GPIO28_TDO AM24 PX@ PX@
GPU_CTF JTAG_TDO R240 R241
37 GPU_CTF AJ19
GENERICA 10K_0402_5% 10K_0402_5%
AK19 AC32
GENERICB C/NC
AJ20 AD32
GENERICC Y/NC
2
2
AK20 AF32
2
R236 GENERICD COMP/NC
AJ24
GENERICE_HPD4 DAC2 VGA_SMB_CK2 R564 2 PX@ 1 0_0402_5% SM_CK2
10K_0402_5% AH26 1 6 EC_SMB_CK2 8,27,37
GENERICF_HPD5 GENLK_CLK T21
AH24 AD29
GENERICG_HPD6 H2SYNC/GENLK_CLK
5
B B
AC29 GENLK_VSYNC T22 Q15A PX@
1
C297
C298
0.1U_0402_16V7K
PX@
PX@
PX@ AF33
A2VSSQ/TSVSSQ
2 R246 1 249_0402_1%
@ 1 R245 2 0_0402_5%
2 1 AA29
C295 0.1U_0402_16V7K +DPLL_PVDD AM32 R2SET/NC
+1.0VSG PX@ DPLL_PVDD
AN32
L44 PX@ DPLL_PVSS
125mA +DPLL_VDDC DDC/AUX
2 1 AM26
BLM15BD121SN1D_0402 +DPLL_VDDC AN31 PLL/CLOCK DDC1CLK GPU_GPIO4 R553 1 PX@
AN26 2 0_0402_5% SM_CK2
DPLL_VDDC DDC1DATA
C299
C300
C301
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
1 1 1 AM27
XTALIN AUX1P GPU_GPIO3 R558 1 PX@
AV33 AL27 2 0_0402_5% SM_DA2
XTALOUT XTALIN AUX1N
AU34
XTALOUT
AM19
2 2 2 DDC2CLK
PX@
PX@
PX@
AL19
DDC2DATA
AW34
XO_IN
XTALIN AN20
Voltage Swing: 1.8 V AW35
XO_IN2
AUX2P
AUX2N
AM20
+3VSG
External VGA Thermal Sensor
AL30 U34
DDCCLK_AUX3P VGA_SMB_CK2
AM30 1 8
DDCDATA_AUX3N VDD SCLK
1
0.1U_0402_16V4Z
C357
AL29 GPU_THERM_D+ 2 7 VGA_SMB_DA2
R561 R247 DDCCLK_AUX4P D+ SDATA
GPU_THERM_D+ AF29 AM29 PX@ 2200P_0402_50V7K
XTALOUT PX@ PX@ XTALIN GPU_THERM_D- DPLUS THERMAL DDCDATA_AUX4N THM_ALERT#
AG29 1 2 3 6
DMINUS 2 C356 PX@ D- ALERT#
AN21
200_0402_5% 1M_0402_5% DDCCLK_AUX5P GPU_THERM_D-
A AM21 4 5 1 2 +3VSG A
DDCDATA_AUX5N THERM# GND R554 PX@ 4.7K_0402_5%
AK32
TS_FDO
AJ30
Y2 PX@ 27MHZ_16PF_X3G027000FG1H-HX DDC6CLK ADM1032ARMZ-2REEL_MSOP8
AL31 AJ31
PX@ TS_A/NC DDC6DATA PX@
(1.8V@20mA TSVDD)
1 3 L45 AK30
1 3 +TSVDD DDCCLK_AUX7P
+1.8VSG 1 2 AJ32 AK29
GND GND BLM15BD121SN1D_0402 TSVDD DDCDATA_AUX7N
AJ33
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V4Z
TSVSS
C302
C303
C304
1 1 1
PX@ C305 2 4 C306 PX@
22P_0402_50V8J 22P_0402_50V8J
THAMES XT M2 FCBGA 962P
Security Classification Compal Secret Data Compal Electronics, Inc.
2 2 2 2011/07/29 2012/07/29 Title
Issued Date Deciphered Date
PX@
PX@
PX@
PX@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ATI_Thames XT_M2_Main_MSIC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 19 of 53
5 4 3 2 1
5 4 3 2 1
@
R248 1 2 0_0402_5%
+3VS C307 PX@
PE_GPIO1 0.1U_0402_16V4Z
1 2
VGA_PWR_ON >2ms PX@
C C
5
U9
VGA_PWR_ON 2
P
B 1.5_VDD_PWREN
4 1.5_VDD_PWREN 26,49
R249 1 Y
+3VS 2 10K_0402_5% 1
A
G
PX@ NC7SZ08P5X_NL_SC70-5
3
1
D Q16
21,37 PX_EN 1 PX@ 2 2 PX@
R250 0_0402_5% G
1
S 2N7002K_SOT23-3
PX@
3
R251 +5VS +5VS
5.11K_0402_1%
For VGA Power on control
2
Delay SUSP# 10ms
2
1 PX@ 2 VGA_PWR_ON
37 VGA_ON VGA_PWR_ON 26,43,49
R252 0_0402_5% PX@ PX@
R253 R254
1 @ 2 1K_0402_5% 1K_0402_5%
13,14,37 PE_GPIO1
R255 10K_0402_1%
1
VDDC_EN
PX@ C308 +3VS
0.1U_0402_16V4Z 1.0_EN
2 1
6
DMN66D0LDW-7_SOT363-6
Q17B
DMN66D0LDW-7_SOT363-6
Q17A
PX@
5
U10
1.5_VDD_PWREN 1 PX@ 2 2
P
R256 0_0402_5% B
4 5 2
Y
PX@
PX@
13,49 VGA_PWRGD 1
A
1
From +VGA_CORE regulator NC7SZ08P5X_NL_SC70-5
3
B B
+BIF_VDDC +VGA_CORE
+1.0VSG PX@ Q18 PX@ Q19
20mil 30mil @
S
3 1 1 3 1 2
R257 0_0805_5%
AO3416_SOT23-3 AO3416_SOT23-3 1
G
2
2
PX@
1.0_EN C309
2 22U_0805_6.3V6M
VDDC_EN
2
G
G
30mil AO3416 NMOS
3 1 1 3 Vgs(th)(Max)= 1V
PX@ PX@
S
Q89 Q90 Rds(on)(Max)= 22m ohm @Vgs=4.5V
+VGA_CORE AO3416_SOT23-3 AO3416_SOT23-3
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ATI_Thames XT_M2_BACO POWER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 20 of 53
5 4 3 2 1
5 4 3 2 1
U7F
AB39 A3
PCIE_VSS#1 GND#1
E39 A37
PCIE_VSS#2 GND#2
F34 AA16
PCIE_VSS#3 GND#3
F39 AA18
PCIE_VSS#4 GND#4
G33 AA2
PCIE_VSS#5 GND#5
G34 AA21
PCIE_VSS#6 GND#6
H31 AA23
PCIE_VSS#7 GND#7
H34 AA26
D PCIE_VSS#8 GND#8 D
H39 AA28
PCIE_VSS#9 GND#9
J31 AA6
PCIE_VSS#10 GND#10
J34 AB12
PCIE_VSS#11 GND#11
K31 AB15
PCIE_VSS#12 GND#12
K34 AB17
PCIE_VSS#13 GND#13
K39 AB20
+DPAB_VDD18 +1.8VSG PCIE_VSS#14 GND#14
1.8V@300mA DPAB_VDD18) L31
PCIE_VSS#15 GND#15
AB22
L34 AB24
PCIE_VSS#16 GND#16
M34 AB27
+DPAB_VDD18 PCIE_VSS#17 GND#17
1 R258 2 M39 AC11
PCIE_VSS#18 GND#18
1 1 1 N31 AC13
0_0402_5% PCIE_VSS#19 GND#19
PX@ C310
PX@ C311
PX@ C312
N34 AC16
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
U7H PCIE_VSS#20 GND#20
PX@ P31 AC18
+1.8VSG +DPCD_VDD18 PCIE_VSS#21 GND#21
P34 AC2
DP C/D POWER DP A/B POWER 2 2 2 PCIE_VSS#22 GND#22
P39 AC21
PCIE_VSS#23 GND#23
130mA R34
PCIE_VSS#24 GND#24
AC23
1 R259 2 +DPCD_VDD18 AP20 AN24 T31 AC26
DPCD/DPC_VDD18#1 DPAB/DPA_VDD18#1 +DPAB_VDD10 PCIE_VSS#25 GND#25
AP21 AP24 T34 AC28
0_0402_5% DPCD/DPC_VDD18#2 DPAB/DPA_VDD18#2 +1.0VSG PCIE_VSS#26 GND#26
PX@ C313
PX@ C314
PX@ C315
1U_0402_6.3V6K T39 AC6
10U_0603_6.3V6M
0.1U_0402_16V7K
+DPCD_VDD10 PCIE_VSS#27 GND#27
PX@ 1 1 1 (1.0V@220mA DPAB_VDD10) U31
PCIE_VSS#28 GND#28
AD15
110mA U34
PCIE_VSS#29 GND#29
AD17
AP13 AP31 +DPAB_VDD10 1 R260 2 V34 AD20
DPCD/DPC_VDD10#1 DPAB/DPA_VDD10#1 PCIE_VSS#30 GND#30
AT13 AP32 V39 AD22
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
2 2 2 DPCD/DPC_VDD10#2 DPAB/DPA_VDD10#2 0_0402_5% PCIE_VSS#31 GND#31
PX@ C316
PX@ C317
PX@ C318
W31 AD24
PCIE_VSS#32 GND#32
1 1 1 PX@ W34 AD27
PCIE_VSS#33 GND#33
AN17 AN27 Y34 AD9
DP/DPC_VSSR#1 DP/DPA_VSSR#1 PCIE_VSS#34 GND#34
AP16 AP27 Y39 AE2
DP/DPC_VSSR#2 DP/DPA_VSSR#2 PCIE_VSS#35 GND#35
AP17 AP28 AE6
DP/DPC_VSSR#3 DP/DPA_VSSR#3 2 2 2 GND#36
AW14 AW24 AF10
DP/DPC_VSSR#4 DP/DPA_VSSR#4 GND#37
AW16 AW26 AF16
DP/DPC_VSSR#5 DP/DPA_VSSR#5 GND#38
AF18
+DPCD_VDD18 +DPAB_VDD18 GND#39
AF21
+1.0VSG +DPCD_VDD10
AP22
DPCD/DPD_VDD18#1 DPAB/DPB_VDD18#1
AP25 130mA F15
GND#100
GND GND#40
GND#41
GND#42
AG17
AG2
AP23 AP26 F17 AG20
+DPCD_VDD10 DPCD/DPD_VDD18#2 DPAB/DPB_VDD18#2 GND#101 GND#43
1 R261 2 F19 AG22
+DPCD_VDD10 +DPAB_VDD10 GND#102 GND#44
F21 AG6
0_0402_5% GND#103 GND#45
PX@ C319
PX@ C320
PX@ C321
C F23 AG9 C
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
GND#104 GND#46
PX@ 1 1 1 AP14 AN33 110mA F25 AH21
DPCD/DPD_VDD10#1 DPAB/DPB_VDD10#1 GND#105 GND#47
AP15 AP33 F27 AJ10
DPCD/DPD_VDD10#2 DPAB/DPB_VDD10#2 GND#106 GND#48
F29 AJ11
GND#107 GND#49
F31 AJ2
2 2 2 GND#108 GND#50
F33 AJ28
GND#109 GND#51
AN19 AN29 F7 AJ6
DP/DPD_VSSR#1 DP/DPB_VSSR#1 GND#110 GND#52
AP18 AP29 F9 AK11
DP/DPD_VSSR#2 DP/DPB_VSSR#2 GND#111 GND#53
AP19 AP30 G2 AK31
DP/DPD_VSSR#3 DP/DPB_VSSR#3 GND#112 GND#54
AW20 AW30 G6 AK7
DP/DPD_VSSR#4 DP/DPB_VSSR#4 GND#113 GND#55
AW22 AW32 H9 AL11
DP/DPD_VSSR#5 DP/DPB_VSSR#5 GND#114 GND#56
J2 AL14
GND#115 GND#57
J27 AL17
GND#116 GND#58
J6 AL2
150_0402_1% 2 PX@ GND#117 GND#59
1 R262 AW18 AW28 R263 1 PX@ 2 150_0402_1% J8 AL20
+1.8VSG DPCD_CALR DPAB_CALR GND#118 GND#60
K14 AL21 PX_EN 20,37
+DPEF_VDD18 +DPAB_VDD18 GND#119 GND/PX_EN#61
K7 AL23
GND#120 GND#62
150mA DP E/F POWER DP PLL POWER 20mA L11 AL26
+DPEF_VDD18 GND#121 GND#63
1 R264 2 AH34 AU28 L17 AL32
DPEF/DPE_VDD18#1 DPAB_VDD18/DPA_PVDD GND#122 GND#64
1
AJ34 AV27 L2 AL6
0_0402_5% DPEF/DPE_VDD18#2 DP_VSSR/DPA_PVSS GND#123 GND#65 R265
PX@ C322
PX@ C323
PX@ C324
L22 AL8
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
2
DPEF/DPE_VDD10#1 DPAB_VDD18/DPB_PVDD GND#127 GND#69
AM33 AR28 M22 AN11
2 2 2 DPEF/DPE_VDD10#2 DP_VSSR/DPB_PVSS GND#128 GND#70
M24 AN2
+DPCD_VDD18 GND#129 GND#71
N16 AN30
GND#130 GND#72
N18 AN6
GND#131 GND#73
AN34 AU18 N2 AN8
DP/DPE_VSSR#1 DPCD_VDD18/DPC_PVDD GND#132 GND#74
AP39 AV17 N21 AP11
DP/DPE_VSSR#2 DP_VSSR/DPC_PVSS GND#133 GND#75
AR39 N23 AP7
DP/DPE_VSSR#3 +DPCD_VDD18 GND#134 GND#76
AU37 N26 AP9
DP/DPE_VSSR#4 GND#135 GND#77
N6 AR5
GND#136 GND#78
AV19 R15 B11
+DPEF_VDD18 DPCD_VDD18/DPD_PVDD GND#137 GND#79
AR18 R17 B13
DP_VSSR/DPD_PVSS GND#138 GND#80
20mA R2 B15
+DPEF_VDD18 GND#139 GND#81
AF34 R20 B17
+1.0VSG +DPEF_VDD10 DPEF/DPF_VDD18#1 GND#140 GND#82
AG34 R22 B19
B DPEF/DPF_VDD18#2 GND#141 GND#83 B
AM37 R24 B21
+DPEF_VDD10 DPEF_VDD18/DPE_PVDD GND#142 GND#84
AN38 R27 B23
DP_VSSR/DPE_PVSS GND#143 GND#85
20mA R6 B25
+DPEF_VDD10 GND#144 GND#86
1 R266 2 AK33 +DPEF_VDD18 T11 B27
DPEF/DPF_VDD10#1 GND#145 GND#87
AK34 T13 B29
0_0402_5% DPEF/DPF_VDD10#2 GND#146 GND#88
PX@ C325
PX@ C326
PX@ C327
1U_0402_6.3V6K
0.1U_0402_16V7K
A PX@ A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ATI_Thames XT_M2_PWR_GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 21 of 53
5 4 3 2 1
5 4 3 2 1
C340
C341
C328
C329
C330
C331
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
AC7
AD11
VDDR1#1 PCIE_VDDR#1
AA31
AA32
1 1 1 1 1 1 PCIE_VDDR CRB Design
VDDR1#2 PCIE_VDDR#2
0.1u 2 2
C339
C332
C333
C334
C342
C343
C365
C335
C344
C336
C345
C337
C368
C370
C367
C366
C369
C338
C346
C347
C348
C349
C376
1 AF7 AA33
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
220U_B2_2.5VM_R35
D VDDR1#3 PCIE_VDDR#3 D
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 AG10 AA34
VDDR1#4 PCIE_VDDR#4 2 2 2 2 2 2 1u 3 3
PX@
PX@
PX@
PX@
PX@
PX@
+ AJ7 V28
@ VDDR1#5 PCIE_VDDR#5
AK8 W29
AL9
VDDR1#6 PCIE_VDDR#6
W30
10u 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 VDDR1#7 PCIE_VDDR#7
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
G11 Y31
VDDR1#8 PCIE_VDDR#8 +1.0VSG
G14 AB37
VDDR1#9 PCIE_VDDR/PCIE_PVDD
G17
VDDR1#10 (1.0V@1920mA PCIE_VDDC)
G20 G30
VDDR1#11 PCIE_VDDC#1
G23 G31
VDDR1#12 PCIE_VDDC#2
C350
C351
C352
C353
C354
C355
G26 H29
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
VDDR1#13 PCIE_VDDC#3
G29 H30 1 1 1 1 1 1
VDDR1#14 PCIE_VDDC#4
H10
J7
VDDR1#15 PCIE_VDDC#5
J29
J30
PCIE_VDDC CRB Design
VDDR1#16 PCIE_VDDC#6
J9
VDDR1#17 PCIE_VDDC#7
L28
2 2 2 2 2 2
1u 7 5 (1@)
PX@
PX@
PX@
PX@
PX@
K11 M28
K13
VDDR1#18
VDDR1#19
PCIE_VDDC#8
PCIE_VDDC#9
N28 10u 1 1
VDDR1 CRB Design K8
L12
VDDR1#20 PCIE_VDDC#10
R28
T28
VDDR1#21 PCIE_VDDC#11
0.1u 6 6 L16
VDDR1#22 PCIE_VDDC#12
U28
L21
1u 10 10 L23
VDDR1#23
VDDR1#24
+VGA_CORE
10u 6 6 L26
L7
VDDR1#25 CORE VDDC#1
AA15
AA17
VDDC CRB Design
VDDR1#26 VDDC#2
M11
VDDR1#27 VDDC#3
AA20 1u 30 30
N11 AA22
VDD_CT CRB Design P7
VDDR1#28
VDDR1#29
VDDC#4
VDDC#5
AA24 10u 10 3
R11 AA27
0.1u 1 1 U11
VDDR1#30 VDDC#6
AB16
22u 0 1
+1.8VSG +VDDC_CT VDDR1#31 VDDC#7
U7 AB18
1u 3 3 Y11
VDDR1#32
VDDR1#33
VDDC#8
VDDC#9
AB21
PX@ L47 (1.8V@110mA VDD_CT) Y7 AB23
10u 1 1 1 2
VDDR1#34 VDDC#10
AB26
BLM15BD121SN1D_0402 VDDC#11
AB28
VDDC#12
C371
C372
C373
C374
C375
AC17
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
VDDC#13 +VGA_CORE
1 1 1 1 1 AC20
LEVEL VDDC#14
VDDR3 CRB Design +3VSG TRANSLATION VDDC#15
AC22
AC24
VDDC#16
1u 3 3
POWER
C AF26 AC27 C
PX@ 2 2 2 2 2 VDD_CT#1 VDDC#17
PX@
PX@
PX@
PX@
AF27 AD18
10u 1 1 AG26
VDD_CT#2
VDD_CT#3
VDDC#18
VDDC#19
AD21
C391
C392
C393
C394
AG27 AD23
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VDD_CT#4 VDDC#20
1 1 1 1 AD26
VDDC#21
AF17
I/O VDDC#22
VDDR4 CRB Design AF23
VDDC#23
AF20
AF22
2 2 2 2 VDDR3#1 VDDC#24
0.1u 1 1
PX@
PX@
PX@
PX@
AF24 AG16
VDDR3#2 VDDC#25 +VGA_CORE
AG23 AG18
1u 1 1 +1.8VSG AG24
VDDR3#3
VDDR3#4
VDDC#26
VDDC#27
AG21
AH22
PX@ L48 VDDC#28
AH27
+VDDR4 VDDC#29
MPV18 CRB Design 1 2
BLM15BD121SN1D_0402
AF13
AF15
VDDR4#4 VDDC#30
AH28
M26
VDDR4#5 VDDC#31
0.1u 2 2
C395
0.1U_0402_16V7K
VDDR4#7 VDDC#32
1 1 AG15 N27
1u 2 2 VDDR4#8 VDDC/BIF_VDDC#33
VDDC#34
R18
R21
10u 1 1 AD12
VDDC#35
R23
2 2 VDDR4#1 VDDC#36
PX@
PX@
AF11 R26
VDDR4#2 VDDC#37
AF12 T17
VDDR4#3 VDDC#38 +BIF_VDDC
SPV18 CRB Design AG11
VDDR4#6 VDDC#39
T20
T22
VDDC#40
0.1u 1 1 +1.8VSG +1.8VSG
VDDC#41
T24
T27
1u 1 1 (M97, Broadway and Madison: 1.8V@150mA MPV18)
VDDC/BIF_VDDC#42
VDDC#43
U16 For non-BACO designs, connect BIF_VDDC to VDDC.
L49 PX@
C401
C402
M20 U18
10u 1 1
1U_0402_6.3V6K
1U_0402_6.3V6K
1 2 +MPV18 M21
NC_VDDRHA VDDC#44
U21 1 1 For BACO designs - see BACO reference schematics
MCK1608471YZF 0603 NC_VSSRHA VDDC#45
U23
L50 PX@ VDDC#46
VDDC#47
U26 VDDCI CRB Design
C403
C652
C657
C658
C653
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
NC_VDDRHB VDDC#48 2 2
1u 10 10
PX@
PX@
BLM15BD121SN1D_0402 1 1 1 1 1 U12 V20
NC_VSSRHB VDDC#49
0.1u 1 1 VDDC#50
V22
10u 3 4(3@)
C654
C655
C656
V24
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
1u 1 1 1 1 1 2 2 2 2 2
VDDC#51
VDDC#52
V27
22u 0 1
PX@
PX@
PX@
PX@
PX@
Y16
10u 1 1 PLL VDDC#53
Y18
B VDDC#54 B
Y21
2 2 2 VDDC#55
PX@
PX@
PX@
Y23
VDDC#56
H7 Y26
MPV18#1 VDDC#57
H8 Y28
MPV18#2 VDDC#58
(GDDR3/DDR3 1.12V@4A VDDCI)
+1.0VSG +VDDCI
(1.8V@75mA SPV18) +SPV18 AM10 (GDDR5 1.12V@16A VDDCI)
PX@ L51 SPV18
AA13
+SPV10 VDDCI#1
1 2 (120mA SPV10) AN9
SPV10 VDDCI#2
AB13
MCK1608471YZF 0603 AC12
VDDCI#3
AN10 AC15
SPVSS VDDCI#4
C672
C673
C674
AD13
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
VDDCI#5
1 1 1 AD16
VDDCI#6
M15
VDDCI#7
M16
VOLTAGE VDDCI#8
M18
2 2 2 VDDCI#9
PX@
PX@
PX@
SENESE M23
VDDCI#10
N13
GCORE_SEN VDDCI#11
49 GCORE_SEN AF28 N15
FB_VDDC VDDCI#12
N17
VDDCI#13
N20
+VGA_CORE T17 AG28
VDDCI#14
N22
VDDCI and VDDC should have seperate regulators with a merge option on PCB
FB_VDDCI ISOLATED VDDCI#15
CORE I/O VDDCI#16
R12
R13
For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator
VDDCI#17
AH29 R16
FB_GND VDDCI#18
1
T12
R774 VDDCI#19
T15
VDDCI#20
100_0402_5% V15
@ VDDCI#21
Y13
VDDCI#22
2
PX@
R775
100_0402_5%
@
A A
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ATI_Thames XT_M2_Power
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 22 of 53
5 4 3 2 1
5 4 3 2 1
MEMORY INTERFACE A
MDA4 G32 H26 MAA4 MDB4 F1 N8 MAB4
DQA0_4/DQA_4 MAA0_4/MAA_4 DQB0_4/DQB_4 MAB0_4/MAB_4
MEMORY INTERFACE B
MDA5 D33 J26 MAA5 MDB5 F3 N9 MAB5
MDA6 DQA0_5/DQA_5 MAA0_5/MAA_5 MAA6 MDB6 DQB0_5/DQB_5 MAB0_5/MAB_5 MAB6
F32 H21 F5 U9
MDA7 DQA0_6/DQA_6 MAA0_6/MAA_6 MAA7 MDB7 DQB0_6/DQB_6 MAB0_6/MAB_6 MAB7
E32 G21 G4 U8
MDA8 DQA0_7/DQA_7 MAA0_7/MAA_7 MAA8 MDB8 DQB0_7/DQB_7 MAB0_7/MAB_7 MAB8
D31 H19 H5 Y9
MDA9 DQA0_8/DQA_8 MAA1_0/MAA_8 MAA9 MDB9 DQB0_8/DQB_8 MAB1_0/MAB_8 MAB9
F30 H20 H6 W9
MDA10 DQA0_9/DQA_9 MAA1_1/MAA_9 MAA10 MDB10 DQB0_9/DQB_9 MAB1_1/MAB_9 MAB10
C30 L13 J4 AC8
MDA11 DQA0_10/DQA_10 MAA1_2/MAA_10 MAA11 +1.8VSG MDB11 DQB0_10/DQB_10 MAB1_2/MAB_10 MAB11
A30 G16 K6 AC9
MDA12 DQA0_11/DQA_11 MAA1_3/MAA_11 MAA12 MDB12 DQB0_11/DQB_11 MAB1_3/MAB_11 MAB12
F28 J16 K5 AA7
D
MDA13 DQA0_12/DQA_12 MAA1_4/MAA_12 A_BA2 R268 X76@ 1K_0402_5% VRAM_ID0 MDB13 DQB0_12/DQB_12 MAB1_4/MAB_12 B_BA2 D
C28 H16 1 2 VRAM_ID0 19 L4 AA8
MDA14 DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 A_BA0 R270 X76@ 1K_0402_5% MDB14 DQB0_13/DQB_13 MAB1_5/BA2 B_BA0
A28 J17 1 2 M6 Y8
MDA15 DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 A_BA1 R269 X76@ 1K_0402_5% VRAM_ID1 MDB15 DQB0_14/DQB_14 MAB1_6/BA0 B_BA1
E28 H17 1 2 VRAM_ID1 19 M1 AA9
MDA16 DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 R271 X76@ 1K_0402_5% MDB16 DQB0_15/DQB_15 MAB1_7/BA1
D27 DQMA#[7..0] 24 1 2 M3 DQMB#[7..0] 25
MDA17 DQA0_16/DQA_16 DQMA#0 R272 X76@ 1K_0402_5% VRAM_ID2 MDB17 DQB0_16/DQB_16 DQMB#0
F26 A32 1 2 VRAM_ID2 19 M5 H3
MDA18 DQA0_17/DQA_17 WCKA0_0/DQMA_0 DQMA#1 R273 X76@ 1K_0402_5% MDB18 DQB0_17/DQB_17 WCKB0_0/DQMB_0 DQMB#1
C26 C32 1 2 N4 H1
MDA19 DQA0_18/DQA_18 WCKA0B_0/DQMA_1 DQMA#2 R434 X76@ 1K_0402_5% VRAM_ID3 MDB19 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 DQMB#2
A26 D23 1 2 VRAM_ID3 19 P6 T3
MDA20 DQA0_19/DQA_19 WCKA0_1/DQMA_2 DQMA#3 R433 X76@ 1K_0402_5% MDB20 DQB0_19/DQB_19 WCKB0_1/DQMB_2 DQMB#3
F24 E22 1 2 P5 T5
MDA21 DQA0_20/DQA_20 WCKA0B_1/DQMA_3 DQMA#4 MDB21 DQB0_20/DQB_20 WCKB0B_1/DQMB_3 DQMB#4
C24 C14 R4 AE4
MDA22 DQA0_21/DQA_21 WCKA1_0/DQMA_4 DQMA#5 MDB22 DQB0_21/DQB_21 WCKB1_0/DQMB_4 DQMB#5
A24 A14 T6 AF5
MDA23 DQA0_22/DQA_22 WCKA1B_0/DQMA_5 DQMA#6 MDB23 DQB0_22/DQB_22 WCKB1B_0/DQMB_5 DQMB#6
E24 E10 T1 AK6
MDA24 DQA0_23/DQA_23 WCKA1_1/DQMA_6 DQMA#7 MDB24 DQB0_23/DQB_23 WCKB1_1/DQMB_6 DQMB#7
C22 D9 U4 AK5
MDA25 DQA0_24/DQA_24 WCKA1B_1/DQMA_7 MDB25 DQB0_24/DQB_24 WCKB1B_1/DQMB_7
A22 QSA[7..0] 24 V6 QSB[7..0] 25
MDA26 DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 QSA0 MDB26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3 QSB0
F22 C34 V1 F6
MDA27 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 QSA1 MDB27 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 QSB1
D21 D29 V3 K3
MDA28
MDA29
A20
F20
DQA0_27/DQA_27
DQA0_28/DQA_28
EDCA0_1/QSA_1/RDQSA_1
EDCA0_2/QSA_2/RDQSA_2
D25
E20
QSA2
QSA3
Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2 VRAM_ID3 MDB28
MDB29
Y6
Y1
DQB0_27/DQB_27
DQB0_28/DQB_28
EDCB0_1/QSB_1/RDQSB_1
EDCB0_2/QSB_2/RDQSB_2
P3
V5
QSB2
QSB3
MDA30 DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3 QSA4 MDB30 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3 QSB4
D19 E16 Y3 AB5
MDA31 DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 QSA5 H5TQ1G63DFR-11C MDB31 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 QSB5
E18 E12 Y5 AH1
MDA32
MDA33
C18
DQA0_31/DQA_31
DQA1_0/DQA_32
EDCA1_1/QSA_5/RDQSA_5
EDCA1_2/QSA_6/RDQSA_6
J10 QSA6
QSA7
64MX16 (1G) Hynix 1GB R268 R271 R273 R433 MDB32
MDB33
AA4
DQB0_31/DQB_31
DQB1_0/DQB_32
EDCB1_1/QSB_5/RDQSB_5
EDCB1_2/QSB_6/RDQSB_6
AJ9 QSB6
QSB7
PN:SA000041S60
A18 D7 QSA#[7..0] 24 AB6 AM5 QSB#[7..0] 25
MDA34 DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 1 0 0 0 MDB34 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7
F18 AB1
MDA35 DQA1_2/DQA_34 QSA#0 K4W1G1646G-BC11 MDB35 DQB1_2/DQB_34 QSB#0
D17 A34 AB3 G7
MDA36
MDA37
A16
DQA1_3/DQA_35
DQA1_4/DQA_36
DDBIA0_0/QSA_0B/WDQSA_0
DDBIA0_1/QSA_1B/WDQSA_1
E30 QSA#1
QSA#2
64MX16 (1G) Samsung 1GB R270 R269 R273 R433 MDB36
MDB37
AD6
DQB1_3/DQB_35
DQB1_4/DQB_36
DDBIB0_0/QSB_0B/WDQSB_0
DDBIB0_1/QSB_1B/WDQSB_1
K1 QSB#1
QSB#2
PN:SA00004GS30
F16 E26 AD1 P1
MDA38 DQA1_5/DQA_37 DDBIA0_2/QSA_2B/WDQSA_2 QSA#3 0 1 0 0 MDB38 DQB1_5/DQB_37 DDBIB0_2/QSB_2B/WDQSB_2 QSB#3
D15 C20 AD3 W4
MDA39 DQA1_6/DQA_38 DDBIA0_3/QSA_3B/WDQSA_3 QSA#4 H5TQ2G63BFR-11C MDB39 DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3 QSB#4
E14 C16 AD5 AC4
MDA40
MDA41
F14
DQA1_7/DQA_39
DQA1_8/DQA_40
DDBIA1_0/QSA_4B/WDQSA_4
DDBIA1_1/QSA_5B/WDQSA_5
C12 QSA#5
QSA#6
128M16 (2G) Hynix 2GB R268 R271 R272 R433 MDB40
MDB41
AF1
DQB1_7/DQB_39
DQB1_8/DQB_40
DDBIB1_0/QSB_4B/WDQSB_4
DDBIB1_1/QSB_5B/WDQSB_5
AH3 QSB#5
QSB#6
PN:SA00003YO30
D13 J11 AF3 AJ8
MDA42 DQA1_9/DQA_41 DDBIA1_2/QSA_6B/WDQSA_6 QSA#7 1 0 1 0 MDB42 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 QSB#7
F12 F8 AF6 AM3
MDA43 DQA1_10/DQA_42 DDBIA1_3/QSA_7B/WDQSA_7 K4W2G1646C-HC11 MDB43 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7
A12 AG4
MDA44
MDA45
D11
DQA1_11/DQA_43
DQA1_12/DQA_44 ADBIA0/ODTA0
J21 ODTA0
ODTA1
ODTA0 24 128M16 (2G) Samsung 2GB R270 R269 R272 R433 MDB44
MDB45
AH5
DQB1_11/DQB_43
DQB1_12/DQB_44 ADBIB0/ODTB0
T7 ODTB0
ODTB1
ODTB0 25
PN:SA000047QA0
F10 G19 ODTA1 24 AH6 W7 ODTB1 25
MDA46 DQA1_13/DQA_45 ADBIA1/ODTA1 0 1 1 0 MDB46 DQB1_13/DQB_45 ADBIB1/ODTB1
A10 AJ4
MDA47 DQA1_14/DQA_46 CLKA0 MDB47 DQB1_14/DQB_46 CLKB0
C10 H27 CLKA0 24 AK3 L9 CLKB0 25
MDA48 DQA1_15/DQA_47 CLKA0 CLKA0# MDB48 DQB1_15/DQB_47 CLKB0 CLKB0#
G13 G27 CLKA0# 24 AF8 L8 CLKB0# 25
MDA49 DQA1_16/DQA_48 CLKA0B MDB49 DQB1_16/DQB_48 CLKB0B
H13 AF9
MDA50 DQA1_17/DQA_49 CLKA1 MDB50 DQB1_17/DQB_49 CLKB1
C J13 J14 CLKA1 24 AG8 AD8 CLKB1 25
C
MDA51 DQA1_18/DQA_50 CLKA1 CLKA1# MDB51 DQB1_18/DQB_50 CLKB1 CLKB1#
H11 H14 CLKA1# 24 AG7 AD7 CLKB1# 25
MDA52 DQA1_19/DQA_51 CLKA1B MDB52 DQB1_19/DQB_51 CLKB1B
G10 AK9
MDA53 DQA1_20/DQA_52 RASA0# MDB53 DQB1_20/DQB_52 RASB0#
G8 K23 RASA0# 24 AL7 T10 RASB0# 25
MDA54 DQA1_21/DQA_53 RASA0B RASA1# MDB54 DQB1_21/DQB_53 RASB0B RASB1#
K9 K19 RASA1# 24 AM8 Y10 RASB1# 25
MDA55 DQA1_22/DQA_54 RASA1B MDB55 DQB1_22/DQB_54 RASB1B
K10 AM7
MDA56 DQA1_23/DQA_55 CASA0# MDB56 DQB1_23/DQB_55 CASB0#
G9 K20 CASA0# 24 AK1 W10 CASB0# 25
MDA57 DQA1_24/DQA_56 CASA0B CASA1# MDB57 DQB1_24/DQB_56 CASB0B CASB1#
A8 K17 CASA1# 24 AL4 AA10 CASB1# 25
MDA58 DQA1_25/DQA_57 CASA1B MDB58 DQB1_25/DQB_57 CASB1B
C8 AM6
MDA59 DQA1_26/DQA_58 CSA0#_0 MDB59 DQB1_26/DQB_58 CSB0#_0
E8 K24 CSA0#_0 24 AM1 P10 CSB0#_0 25
MDA60 DQA1_27/DQA_59 CSA0B_0 MDB60 DQB1_27/DQB_59 CSB0B_0
A6 K27 AN4 L10
MDA61 DQA1_28/DQA_60 CSA0B_1 MDB61 DQB1_28/DQB_60 CSB0B_1
C6 AP3
MDA62 DQA1_29/DQA_61 CSA1#_0 MDB62 DQB1_29/DQB_61 CSB1#_0
E6 M13 CSA1#_0 24 AP1 AD10 CSB1#_0 25
MDA63 DQA1_30/DQA_62 CSA1B_0 MDB63 DQB1_30/DQB_62 CSB1B_0
A5 K16 AP5 AC10
DQA1_31/DQA_63 CSA1B_1 DQB1_31/DQB_63 CSB1B_1
+VDD_MEM15_REFDA L18 K21 CKEA0 U10 CKEB0
+1.5VSG MVREFDA CKEA0 CKEA0 24 CKEB0 CKEB0 25
+VDD_MEM15_REFSA L20 J20 CKEA1 +VDD_MEM15_REFDB Y12 AA11 CKEB1
MVREFSA CKEA1 CKEA1 24 MVREFDB CKEB1 CKEB1 25
+VDD_MEM15_REFSB AA12
R274 1 PX@ WEA0# +1.5VSG +1.5VSG MVREFSB WEB0#
2 240_0402_1% L27 K26 WEA0# 24 N10 WEB0# 25
R275 1 PX@ MEM_CALRN0 WEA0B WEA1# WEB0B WEB1#
2 240_0402_1% N12 L15 WEA1# 24 AB11 WEB1# 25
R276 1 PX@ MEM_CALRN1 WEA1B WEB1B
2 240_0402_1% AG12
MEM_CALRN2
1
@ @ PX@
R277 1 PX@ 2 240_0402_1% M12 H23 MAA13 R26 R27 R278 1 2 TESTEN AD28 T8 MAB13
MEM_CALRP1 MAA0_8 MAA13 24 TESTEN MAB0_8 MAB13 25
R279 1 PX@ 2 240_0402_1% M27 J19 1 2 MAA14 MAA14 24
10K_0402_5% 10K_0402_5% 5.11K_0402_1% W8 1 2 MAB14
MAB14 25
R280 1 PX@ MEM_CALRP0 MAA1_8 MAB1_8
2 240_0402_1% AH12 R611 @ 0_0402_5% AK10 R612 @ 0_0402_5%
GDDR5
MEM_CALRP2 CLKTESTA
GDDR5
2
MAA14
2
MAB14 CLKTESTB DRAM_RST
2
R63 R64
0_0402_5% 0_0402_5%
THAMES XT M2 FCBGA 962P @ @ THAMES XT M2 FCBGA 962P
1
1
PX@ PX@
1
@ @
Close to U7.J19 Close to U7.W8 C675 C676
0.1U_0402_16V7K 0.1U_0402_16V7K
2
B B
route 50ohms single-ended/100ohms diff
This basic topology should be used for DRAM_RST for DDR3/GDDR5.These and keep short
Capacitors and Resistor values are an example only. The Series R and Debug only, for clock observation, if not needed, DNI
1
|| Cap values will depend on the DRAM load and will have to be @ @ 5mil 5mil
calculated for different Memory ,DRAM Load and board to pass Reset R281 R282
Signal Spec. 51.1_0402_1% 51.1_0402_1%
Place all these components very close to GPU (Within
2
25mm) and keep all component close to each Other (within
5mm) except Rser2
+1.5VSG
1
1
R284 R285
40.2_0402_1% 40.2_0402_1% R286 R287
PX@ PX@ 40.2_0402_1% 40.2_0402_1%
1 R288 2 1 R289 2 DRAM_RST#_R PX@ PX@
2
2
+VDD_MEM15_REFDA +VDD_MEM15_REFSA PX@ PX@
+VDD_MEM15_REFDB +VDD_MEM15_REFSB
2
1
1
R290 0.1U_0402_16V7K R291 0.1U_0402_16V7K C679 R292 C680 C681
100_0402_1% PX@ 100_0402_1% PX@ 120P_0402_50V9 4.99K_0402_1% R293 0.1U_0402_16V7K R294 0.1U_0402_16V7K
2
2
PX@
2
PX@
2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ATI_Thames XT_M2_MEM IF
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 23 of 53
5 4 3 2 1
5 4 3 2 1
K1 A1 ODTA0 K1 A1 K1 A1 ODTA1 K1 A1
23 ODTA0 ODT/ODT0 VDDQ ODT/ODT0 VDDQ 23 ODTA1 ODT/ODT0 VDDQ ODT/ODT0 VDDQ
L2 A8 CSA0#_0 L2 A8 L2 A8 CSA1#_0 L2 A8
23 CSA0#_0 CS/CS0 VDDQ CS/CS0 VDDQ 23 CSA1#_0 CS/CS0 VDDQ CS/CS0 VDDQ
J3 C1 RASA0# J3 C1 J3 C1 RASA1# J3 C1
23 RASA0# RAS VDDQ RAS VDDQ 23 RASA1# RAS VDDQ RAS VDDQ
K3 C9 CASA0# K3 C9 K3 C9 CASA1# K3 C9
QSA#[7..0] 23 CASA0# CAS VDDQ CAS VDDQ 23 CASA1# CAS VDDQ CAS VDDQ
L3 D2 WEA0# L3 D2 L3 D2 WEA1# L3 D2
23 QSA#[7..0] 23 WEA0# WE VDDQ WE VDDQ 23 WEA1# WE VDDQ WE VDDQ
E9 E9 E9 E9
VDDQ VDDQ VDDQ VDDQ
F1 F1 F1 F1
QSA1 VDDQ QSA2 VDDQ QSA4 VDDQ QSA6 VDDQ
F3 H2 F3 H2 F3 H2 F3 H2
QSA3 DQSL VDDQ QSA0 DQSL VDDQ QSA7 DQSL VDDQ QSA5 DQSL VDDQ
C7 H9 C7 H9 C7 H9 C7 H9
DQSU VDDQ DQSU VDDQ DQSU VDDQ DQSU VDDQ
1
J1 B1 J1 B1 J1 B1 J1 B1
R295 NC/ODT1 VSSQ R296 NC/ODT1 VSSQ R297 NC/ODT1 VSSQ R298 NC/ODT1 VSSQ
L1 B9 L1 B9 L1 B9 L1 B9
NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ
240_0402_1% J9 D1 240_0402_1% J9 D1 240_0402_1% J9 D1 240_0402_1% J9 D1
PX@ NC/CE1 VSSQ PX@ NC/CE1 VSSQ PX@ NC/CE1 VSSQ PX@ NC/CE1 VSSQ
L9 D8 L9 D8 L9 D8 L9 D8
NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ
E2 E2 E2 E2
2
2
VSSQ VSSQ VSSQ VSSQ
E8 E8 E8 E8
VSSQ VSSQ VSSQ VSSQ
F9 F9 F9 F9
VSSQ VSSQ VSSQ VSSQ
G1 G1 G1 G1
VSSQ VSSQ VSSQ VSSQ
G9 G9 G9 G9
VSSQ VSSQ VSSQ VSSQ
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
PX@ H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96
CLKA0 1 2 CLKA_0 X76@ X76@ X76@ X76@
R299 40.2_0402_1%
PX@
CLKA0# 1 2
R300 40.2_0402_1%
1
C682
0.01U_0402_16V7K +1.5VSG +1.5VSG
PX@ +1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG
2
1
R301 R302 R303 R304 R305 R306 R307 R308
4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
B B
PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@
PX@
2
2
CLKA1 1 2 CLKA_1
R309 40.2_0402_1% VREFD_Q1 VREFC_A1 VREFC_A2 VREFD_Q2 VREFC_A3 VREFD_Q3 VREFC_A4 VREFD_Q4
1
1
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
PX@
C691
C683
C684
C685
C686
C687
C688
1
1
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
CLKA1# 1 R311 R314 R315 R316 R317 R312 R318 R313
C689
2
R310 40.2_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
1
C690 PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@
2
2
0.01U_0402_16V7K PX@ PX@ PX@
2
2
PX@
2
+1.5VSG
+1.5VSG
+1.5VSG +1.5VSG
C692
C693
C694
C695
C696
C697
C698
C699
C700
C701
C702
C703
C704
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
C705
C706
C707
C708
C709
C710
C711
C712
C713
C714
C715
C716
C717
C718
C719
C720
C721
C722
C723
C724
C725
C726
C727
C728
1 1 1 1 1 1 1 1 1 1 1 1 1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ATI_Thames XT_M2_VRAM_A
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 24 of 53
5 4 3 2 1
5 4 3 2 1
C729
1
1
0.01U_0402_16V7K J1 B1 J1 B1 J1 B1 J1 B1
PX@ R321 NC/ODT1 VSSQ R322 NC/ODT1 VSSQ R323 NC/ODT1 VSSQ R324 NC/ODT1 VSSQ
L1 B9 L1 B9 L1 B9 L1 B9
2
2
VSSQ VSSQ VSSQ VSSQ
E8 E8 E8 E8
VSSQ VSSQ VSSQ VSSQ
F9 F9 F9 F9
VSSQ VSSQ VSSQ VSSQ
G1 G1 G1 G1
PX@ VSSQ VSSQ VSSQ VSSQ
G9 G9 G9 G9
CLKB1 1 CLKB_1 VSSQ VSSQ VSSQ VSSQ
2
R325 40.2_0402_1% 96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
PX@ H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96 H5TQ2G63BFR-11C_FBGA96
CLKB1# 1 2 X76@ X76@ X76@ X76@
R326 40.2_0402_1%
1
C730
0.01U_0402_16V7K
PX@
2
1
R327 R328 R329 R330 R331 R332 R333 R334
4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
PX@ PX@ PX@ PX@ PX@ PX@ PX@ PX@
2
2
VREFD_Q1_B VREFC_A1_B VREFC_A2_B VREFD_Q2_B VREFC_A3_B VREFD_Q3_B VREFC_A4_B VREFD_Q4_B
C731
C732
C734
C735
C736
C737
C738
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
C733
1 1 1 1 1 1 1
0.1U_0402_16V7K
1
PX@
PX@
PX@
PX@
PX@
PX@
PX@
2
2
2
PX@
2
+1.5VSG
+1.5VSG
+1.5VSG +1.5VSG
C739
C740
C741
C742
C743
C744
C745
C746
C747
C748
C749
C750
C751
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
C752
C753
C754
C755
C756
C757
C758
C759
C760
C761
C762
C763
C764
C765
C766
C767
C768
C769
C770
C771
C772
C773
C774
C775
1 1 1 1 1 1 1 1 1 1 1 1 1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
PX@
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ATI_Thames XT_M2_VRAM_B
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 25 of 53
5 4 3 2 1
5 4 3 2 1
VGA Power
+1.5V to +1.5VSG (5.2A) +3VS to +3VSG (60mA)
+3VS Q7 +3VSG
+1.5V +1.5VSG AO3404AL_SOT23
U19 PX@
AO4430L_SO8 1
S
3
8 1
2
10U_0603_6.3V6M
0.1U_0402_16V7K
10U_0603_6.3V6M
7 2 PX@ 1 1
2
10U_0603_6.3V6M
PX@ C776
0.1U_0402_16V7K
10U_0603_6.3V6M
PX@
6 3 1 1 1 1 R344
G
2
C533
D 1 1 5 PX@ PX@ PX@ C535 33_0603_5% D
C777
C532
C534
C531 R343 PX@ 1U_0402_6.3V4Z
2 2 PX@
C530
1U_0402_6.3V4Z 10_0603_5% PX@
1
2 2 2 2 PX@
1 1
2 2 PX@
1
D Q91 D Q92
2 1.5VSG_PWREN# 2 VGA_PWRON#
G G
S PX@ +VSBP 1 PX@ 2 3VSG_GATE S
3
+VSBP 1 PX@ 2 1.5VSG_GATE SSM3K7002FU_SC70-3 R345 100K_0402_5% SSM3K7002FU_SC70-3
R346 100K_0402_5% PX@
1
1
@ Q93 D C536
1
1
Q94 D C537 VGA_PWR_ON# 2 R347 1 VGA_PWRON# 2 PX@
1.5_VDDC_PWREN# 2 1 1.5VSG_PWREN# 2 PX@ 0_0402_5% G 0.1U_0603_25V7K
PX@ R348 47K_0402_5% G 0.1U_0603_25V7K PX@ S PX@ 2
3
S PX@ 2 SUSP
3 29,33,39 SUSP 2 R420 1 1 SSM3K7002FU_SC70-3
1 SSM3K7002FU_SC70-3 0_0402_5%
C539
C538 0.1U_0402_16V7K @
0.1U_0402_16V7K @ 2
2
PX4.0: control by SUSP
PX5.0: control by VGA_PWR_ON#
C +5VALW +5VALW C
2
R349 R350
2
100K_0402_5% 100K_0402_5%
PX@ PX@ R351 R352 R353
470_0603_5% 470_0603_5% 33_0603_5%
1
1
VGA_PWR_ON# 1.5_VDDC_PWREN# PX@ PX@
PX@
1
1
1
Q95 D Q96 D
1
D Q97 D Q98 D Q99
20,43,49 VGA_PWR_ON 2 20,49 1.5_VDD_PWREN 2
G G 2 VGA_PWR_ON# 2 1.5_VDDC_PWREN# 2 VGA_PWR_ON#
1
3
R354 PX@ PX@ PX@ S PX@ S PX@ S PX@
3
100K_0402_5% R355 SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3
10K_0402_5%
2
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (2/8) PCIE, SMBUS, CLK
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom QML70 LA-8371P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, October 19, 2011 Sheet 26 of 53
5 4 3 2 1
5 4 3 2 1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
U44
D D
1 1 1 8 1
Pin 43 (VCCK) < 50mA +DVCC33
TXOC+
35 APU_TXOUT_CLK-
APU_TXOUT_CLK- 28 7
VCC
WP
A0
A1
2
+3VS_RT
C540
C541
C542
22 36 APU_TXOUT_CLK+ MIIC_SCL 6 3
PVCC TXOC- APU_TXOUT_CLK+ 28 SCL A2
MIIC_SDA 5 4
2 2 2 L28 2 +DVCC33 40 mils APU_TXOUT0- SDA GND
1 18 41 APU_TXOUT0- 28
FBMA-L11-201209-221LMA30T_0805 SWR_VDD TXO0+ APU_TXOUT0+ CAT24C64WI-GT3_SO8
42 APU_TXOUT0+ 28
TXO0-
PWR
L29 2 1 +AVCC33 5 Addr: A8 (1010 100X)
FBMA-L11-201209-221LMA30T_0805 DP_V33 APU_TXOUT1-
39 APU_TXOUT1- 28
+SWR_V12 L30 1 +SW_LX 60 mils TXO1+ APU_TXOUT1+
Close to L29 Close to 5 pin 2 17
SWR_LX TXO1-
40 APU_TXOUT1+ 28
4.7UH_PG031B-4R7MS_1.1A_20%
60 mils 15 37 APU_TXOUT2- APU_TXOUT2- 28
SWR_VCCK TXO2+ APU_TXOUT2+
TXO2- 38 APU_TXOUT2+ 28
43 +DVCC33
VCCK
TXO3+ 33
+DVCC33 11 34
DP_V12 TXO3-
2
LVDS
10U_0603_6.3V6M
0.1U_0402_16V4Z
22U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R776
1 1 1 1 1 25 APU_TZOUT_CLK- 4.7K_0402_5% EEPROM
TXEC+ APU_TZOUT_CLK- 28
DP2_TXP0_C 7 26 APU_TZOUT_CLK+ APU_TZOUT_CLK+ 28
8 DP2_TXP0_C LANE0P TXEC-
C543
C544
C545
C546
C547
DP2_TXN0_C 8
8 DP2_TXN0_C
1
LANE0N APU_TZOUT0- MIIC_SCL
TXE0+ 31 APU_TZOUT0- 28
2 2 2 2 2 DP2_TXP1_C 9 32 APU_TZOUT0+
8 DP2_TXP1_C LANE1P TXE0- APU_TZOUT0+ 28
DP2_TXN1_C 10
8 DP2_TXN1_C LANE1N
2
DP
29 APU_TZOUT1- APU_TZOUT1- 28
DP2_AUXP_C TXE1+ APU_TZOUT1+ R777
8 DP2_AUXP_C 4 AUX-CH_P TXE1- 30 APU_TZOUT1+ 28
Close to L28 Close to 18 pin Close to 22 pin DP2_AUXN_C 3 4.7K_0402_5% ROMLESS
8 DP2_AUXN_C AUX-CH_N APU_TZOUT2-
TXE2+ 27 APU_TZOUT2- 28 @
R358 1 2 1K_0402_5% 1 28 APU_TZOUT2+
10 LVDS_HPD APU_TZOUT2+ 28
1
DP_HPD TXE2-
2 1 23
R616 100K_0402_5% TXE3+
TXE3- 24
C
21 +DVCC33 C
10,28 APU_INVT_PWM PWMIN APU_LVDS_CLK
TP2 2 TESTMODE MIICSCL1 46 APU_LVDS_CLK 28
1 2 12 45 APU_LVDS_DAT APU_LVDS_DAT 28 APU_LVDS_DAT R364 1 2 4.7K_0402_5%
DP_REXT MIICSDA1
OTHERS
R361 12K_0402_1%
20 TL_ENVDD APU_LVDS_CLK R366 1 2 4.7K_0402_5%
PANEL_VCC TL_ENVDD 28
19 TL_INVT_PWM
PWMOUT TL_INVT_PWM 28
MIIC_SCL 48 44 TL_BKOFF# TL_BKOFF# 28,37
+1.2VS MIIC_SDA 47 MIICSCL0 BL_EN
MIICSDA0 MIIC_SDA R778 1 2 4.7K_0402_5%
60 mils CSCL CIICSCL CSCL
1 R362 2 0_0402_5% 13 6 R779 1 2 4.7K_0402_5%
@ +SWR_V12 CSDA CIICSDA CIICSCL1 DP_GND
1 2 1 R363 2 0_0402_5% 14
CIICSDA1
GND
R357 0_0805_5% 16 1 2 CSDA R780 1 2 4.7K_0402_5%
GND
22U_0805_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R359 0_0402_5%
1 1 1 1 49
PAD TL_INVT_PWM R568 1 2 100K_0402_5%
C548
C549
C550
C551
RTD2136S-VE-CG_QFN48_6X6
LVDS_HPD R569 1 2 100K_0402_5%
2 2 2 2
TL_BKOFF# R570 1 2 100K_0402_5%
+3VS_RT
B B
1
R365
100K_0402_5%
@
2
DP2_AUXN_C
DP2_AUXP_C
1
R367
100K_0402_5%
@
2
+3VS_RT
AUX termination
2
CSDA 1 6 EC_SMB_DA2
EC_SMB_DA2 8,19,37
Q3A
5
DMN66D0LDW-7_SOT363-6~D
CSCL 4 3 EC_SMB_CK2
A EC_SMB_CK2 8,19,37 A
Q3B
DMN66D0LDW-7_SOT363-6~D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS Translator - RTD2132S
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.11
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 27 of 53
5 4 3 2 1
5 4 3 2 1
D6
BLUE 6 3 RED
I/O4 I/O2
+5VALW 5 2
VDD GND
CRT GREEN 4
I/O3 I/O1
1
+5VS W=40mils +5VS_CRTVCC
AZC099-04S.R7G_SOT23-6
2 1
D9
L15 HSYNC_L 6 3 VSYNC_L D8
FCH_CRT_R RED I/O4 I/O2 RB491D_SOT23-3
D 15 FCH_CRT_R 1 2 D
CHILISIN NBQ160808T-800Y-N 0603
L16 +5VALW 5 2
FCH_CRT_G GREEN VDD GND
15 FCH_CRT_G 1 2
CHILISIN NBQ160808T-800Y-N 0603
150_0402_1%
150_0402_1%
150_0402_1%
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
1
1
1 1 1 1 1 1 2
R438 R439 R440 C406 C407 C408 C409 C410 C411 2
1
1
+5VS_CRTVCC 3
3
2 2 2 2 2 2
2
AZC199-02SPR7G_SOT23-3
RED 1
7
+5VS VGA_DDC_DATA_C 12
R441 10K_0402_5% +3VS +3VS GREEN 2
1 2 2 1 +5VS_CRTVCC 8 G 16
C412 HSYNC_L 13 17
G
5
1
0.1U_0402_16V4Z BLUE 3
9
OE#
P
2
R442 10_0402_5% 4
G
+5VS
2.2K_0402_5%
2.2K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
5
1
SUYIN_070546FR015S251ZR
1 2 CONN@
100P_0402_50V8J
2
G
C C413 1 C
5
1
0.1U_0402_16V4Z C414
15 FCH_CRT_DDC_SDA FCH_CRT_DDC_SDA 3 1 VGA_DDC_DATA_C
OE#
P
D
15 FCH_CRT_VSYNC 2 4 2
A Y
2
2
G
R446 10_0402_5% BSS138_SOT23
G
U24
SN74AHCT1G125GW_SOT353-5 FCH_CRT_DDC_SCL Q21 VGA_DDC_CLK_C
15 FCH_CRT_DDC_SCL 3 1
10P_0402_50V8J
10P_0402_50V8J
3
D
1 1
1 1 BSS138_SOT23 1 1
@ C415 @ C416
@ C419 @ C420 Q22 @ C417 @ C418
2 2 33P_0402_50V8K 33P_0402_50V8K 470P_0402_50V8J 470P_0402_50V8J @
2 2 2 2 FCH_CRT_DDC_SDA 2 1 VGA_DDC_DATA_C
0_0402_5% R534
@
FCH_CRT_DDC_SCL 2 1 VGA_DDC_CLK_C
0_0402_5% R535
680P_0402_50V7K
1
+LCDVDD +LCDVDD +3VS
C421
+5VALW Q23
SI2301BDS-T1-E3_SOT23-3
2
@ Imax: 920mA
1
2 C423 FBMA-L11-201209-221LMA30T_0805 39 40
1 1 37 38
C424 C425 37 38
35 36
2 35 36
+3VS 33 34
0.1U_0402_16V4Z 0.1U_0402_16V4Z R449 33 34
+3VS 31 32
2 2 0.047U_0402_16V7K 31 32 APU_TZOUT1-
2 2 1 29 30 APU_TZOUT1- 27
0.1U_0402_16V4Z
B
220K_0402_1% @ APU_TXOUT0+ 29 30 APU_TZOUT1+ B
1 27 APU_TXOUT0+ 27 28 APU_TZOUT1+ 27
2N7002DW-7-F_SOT363-6 C427 C426 APU_TXOUT0- 27 28
27 APU_TXOUT0- 25 26
1
25 26
3
13 14 APU_TZOUT_CLK-
11 12 APU_TZOUT_CLK- 27
APU_TXOUT_CLK- 11 12 APU_TZOUT_CLK+
27 APU_TXOUT_CLK- 9 10 APU_TZOUT_CLK+ 27
9 10
1
APU_TXOUT_CLK+ 7 8
27 APU_TXOUT_CLK+ 7 8
R451 5 6 APU_LVDS_CLK APU_LVDS_CLK 27
INVTPWM 5 6 APU_LVDS_DAT
3 4 APU_LVDS_DAT 27
100K_0402_5% DISPOFF# 3 4
1 2
1 2
2
ACES_87242-4001-09 Camera
+3VS CONN@
JCM1
Panel PWM Control +3VS 1
1
USB20_N2
60mil 14 USB20_N2 2
2
1
14 USB20_P2 USB20_P2 3
Q54 R454 DMIC_CLK 3
B+ SI3457CDV-T1-E3_TSOP6~D 60mil 4.7K_0402_5%
31
31
DMIC_CLK
DMIC_DATA
DMIC_DATA
4
5
4
5 G1
7
+B+_Q R765 1 @ 2 0_0805_5% B+_L @ 6 8
D
6 G2
2
6
S
100K_0402_5%~D
R763
1 1 2 INVTPWM @ @
37 EC_INVT_PWM
1
1 1 @
1
10,27 APU_INVT_PWM 2 1
3
2
A R29 A
100K_0402_5% D24 D25
3
2
0_0402_5% R539 @ @
2
1
TL_BKOFF# 1 2
27,37 TL_BKOFF#
R764 @
1
1
1
S
3
R456
10K_0402_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/29 Deciphered Date 2012/07/29 Title
P10-LVDS/CRT CONN
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 28 of 53
5 4 3 2 1
5 4 3 2 1
+3VS
D3 D4
2
HDMI_R_D1- 1 1 10 9 HDMI_R_D1- HDMI_R_D0+ 1 1 10 9 HDMI_R_D0+
R368
HDMI_R_D1+ 2 2 9 8 HDMI_R_D1+ HDMI_R_D0- 2 2 9 8 HDMI_R_D0- 2.2K_0402_5%
HDMI_R_D2- 4 4 7 7 HDMI_R_D2- HDMI_R_CK+ 4 4 7 7 HDMI_R_CK+
1
HDMI_R_D2+ 5 5 6 6 HDMI_R_D2+ HDMI_R_CK- 5 5 6 6 HDMI_R_CK-
D D
3 3 3 3
1
D
8 8 2 HDMI_DETECT
G
AZ1045-04F DFN2510P10E AZ1045-04F DFN2510P10E S
1
10 APU_HDMI_HPD APU_HDMI_HPD Q37
SSM3K7002FU_SC70-3 R369
For ESD request. 100K_0402_5%
2
D5
HDMI_DETECT 6 3 HDMI_SDATA
I/O4 I/O2
U22
+5VS 5 2
VDD GND
2
GND
1
HDMI_SCLK IN
+HDMI_5V_OUT 4 1
I/O3 I/O1
1 3
0.1U_0402_16V7K
AZC099-04S.R7G_SOT23-6 C787 OUT
0.1U_0402_16V7K
AP2330W-7_SC59-3 C788
2
2
+5VS Q100 55mA
D
HDMI_CLKP 2 1 HDMI_CK+ 6 +HDMI_5V_OUT
S
8 HDMI_CLKP
HDMI_CLKN 0.1U_0402_16V7K 2 1 C564 HDMI_CK- 4 5 F1 @
8 HDMI_CLKN
0.1U_0402_16V7K C789 1 2 +HDMI_5V 1 2
HDMI_TX0P 2 1 HDMI_D0+ C792 1 W=40mils0.5A 15VDC_FUSE
1U_0603_10V6K
1U_0603_10V4Z
8 HDMI_TX0P
HDMI_TX0N 0.1U_0402_16V7K 2 1 C790 HDMI_D0- @
G
C 1 C
8 HDMI_TX0N
0.1U_0402_16V7K C791 @ C794
3
HDMI_TX1P 2 1 HDMI_D1+ 2 SI3456BDV-T1-E3 1N TSOP6 @
8 HDMI_TX1P
HDMI_TX1N 0.1U_0402_16V7K 2 1 C793 HDMI_D1- +VSBP
8 HDMI_TX1N 2
0.1U_0402_16V7K C795
HDMI_TX2P 2 1 HDMI_D2+
470K_0402_5%
8 HDMI_TX2P
1
HDMI_TX2N 0.1U_0402_16V7K 2 1 C796 HDMI_D2-
8 HDMI_TX2N
0.1U_0402_16V7K C797 R370
@
R371 604_0402_1%
TMDS_GND 1 2 HDMI_R_D2-
2
R372 604_0402_1% EN_HDMI
1 2 HDMI_R_D2+
1
R373 604_0402_1% D R374 1
1.5M_0402_5%
0.1U_0402_16V7K
1 2 HDMI_R_D1- 2 Q33 C798
26,33,39 SUSP
R375 604_0402_1% G SSM3K7002FU_SC70-3
1 2 HDMI_R_D1+ S @ @
3
R376 604_0402_1% @ 2
2
1 2 HDMI_R_D0-
R377 604_0402_1%
1 2 HDMI_R_D0+
R378 604_0402_1%
1 2 HDMI_R_CK-
R380 604_0402_1% HDMI_CK- 1 2 HDMI_R_CK-
1 2 HDMI_R_CK+ R379 @ 0_0402_5%
L32
1 2
1 2
+HDMI_5V_OUT
1
D R381 4 3
4 3 (pin 19) plug in 5V
2 1 2 +5VS
G Q34 10K_0402_5% WCM-2012HS-900T_4P
S JHDMI1
3
SSM3K7002FU_SC70-3 HDMI_DETECT 19
HDMI_CK+ HDMI_R_CK+ HP_DET
1 2 18
R382 @ 0_0402_5% +5V
17
HDMI_SDATA DDC/CEC_GND
16
HDMI_SCLK SDA
15
B
HDMI_D0+ HDMI_R_D0+ SCL B
1 2 14
R383 @ 0_0402_5% Reserved
13
HDMI_R_CK- CEC
12 20
L33 CK- GND
11 21
HDMI_R_CK+ CK_shield GND
4 3 10 22
4 3 HDMI_R_D0- CK+ GND
9 23
D0- GND
8
HDMI_R_D0+ D0_shield
1 2 7
1 2 HDMI_R_D1- D0+
6
WCM-2012HS-900T_4P D1-
HDMI HDMI_R_D1+
5
4
D1_shield
HDMI_D0- HDMI_R_D0- HDMI_R_D2- D1+
1 2 3
R384 @ 0_0402_5% D2-
2
HDMI_R_D2+ D2_shield
1
D2+
HDMI_D1+ 1 2 HDMI_R_D1+ SUYIN_100042GR019M26DZL
+3VS +3VS +HDMI_5V_OUT R385 @ 0_0402_5% CONN@
L35 WCM-2012HS-900T_4P
4 3
4 3
2
1
1
10K_0402_5%
10K_0402_5%
R386 1 2
1 2
1
1
2K_0402_5%
2K_0402_5%
0_0402_5%
1
R387
R388
HDMI_D1- 1 2 HDMI_R_D1-
2
R389
R390
R391 @ 0_0402_5%
2
2
2
G
HDMI_D2+ 1 2 HDMI_R_D2+
8 HDMI_CLK 3 1 HDMI_SCLK R392 @ 0_0402_5%
S
L34 WCM-2012HS-900T_4P
2
G
4 3
Q35 4 3
A 1 2 A
1 2
Q36
2N7002K-C_SOT23-3 HDMI_D2- 1 2 HDMI_R_D2-
R393 @ 0_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 29 of 53
5 4 3 2 1
5 4 3 2 1
+LAN_IO +LAN_VDD
W=60mils W=60mils
Rising time: 1mS ~ 100mS (10%~90%)
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
+3VALW
+LAN_IO R465 1 1 1 1 1 1 1
Q26 470_0603_5%
D
3 1 W=20mils C449 C450 C451 C452 C453 C454 C455
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
C456 +LAN_IO_DISC 2 2 2 2 2 2 2
1 1 1 1 1 1
1U_0402_6.3V6K AO3419L 1P SOT23-3
G
2
1
C457 C458 C459 C460 C461 C462 D
+5VALW 2 2 EN_WOL#
D 2 2 2 2 2 2 G D
S SSM3K7002FU_SC70-3 These caps close to Pin 3,6,9,13,29,41,45
3
2
Q27
R466
100K_0402_5%
1 2 EN_WOL#
220K_0402_5%~N +LAN_IO W=40mils W=20mils
1
D R468 +LAN_VDD
1
2 Q28 C463 +LAN_IO 1 2 +LAN_VDDREG R469
37 EN_WOL
0.1U_0402_16V7K
+LAN_EVDD10
4.7U_0603_6.3V6K
G SSM3K7002FU_SC70-3 0.1U_0603_25V7K 0_0603_5% 1 2
0.1U_0402_16V7K
1U_0402_6.3V6K
S 1 1 0_0603_5%
3
2
2
R470 C464 C465 1 1
10K_0402_5% R471
10K_0402_5% 2 2 C466 C467
1
2
2 2
1
14,33,37 FCH_PCIE_WAKE# 1 3 LAN_WAKE#
S
close to U25 U25 SSM3K7002FU_SC70-3
Q29
C468 1 20.1U_0402_16V7K PCIE_DTX_CRX_P1 22 31 R472
6 PCIE_DTX_C_CRX_P1 HSOP LED3/EEDO XTLI
LED1/EESK 37 1 2 2 1
C470 1 20.1U_0402_16V7K PCIE_DTX_CRX_N1 23 40 C469 3
6 PCIE_DTX_C_CRX_N1 HSON LED0 18P_0402_50V8J 560_0402_5%
6 PCIE_CTX_C_DRX_P1 17 HSIP EECS/SCL 30 R473 1 2 10K_0402_5% 3
6 PCIE_CTX_C_DRX_N1 18 HSIN EEDI/SDA 32 R474 1 2 10K_0402_5% L19
+LAN_VDD
GND 4
C +LAN_SROUT1.05 C
W=60mils 1 2 W=60mils
0.1U_0402_16V7K
LAN_MDIP0
4.7U_0603_6.3V6K
16 1 Y4
14 LAN_CLKREQ# CLKREQB MDIP0
2 LAN_MDIN0 2.2UH +-5% NLC252018T-2R2J-N 1 1
MDIN0 LAN_MDIP1
13,18,33 PLT_RST# 25 PERSTB MDIP1 4 GND 2
5 LAN_MDIN1 C471 C472
MDIN1 LAN_MDIP2 25MHZ_12PF_X3G025000DC1H
13 CLK_PCIE_LAN 19 REFCLK_P NC/MDIP2 7
LAN_MDIN2 2 2 1
13 CLK_PCIE_LAN# 20 REFCLK_N NC/MDIN2 8
10 LAN_MDIP3
NC/MDIP3 LAN_MDIN3 1
11
XTLO NC/MDIN3 XTLO
43 1 2
CKXTAL1 C473
XTLI 44 13 +LAN_VDD These components close to Pin 36 22P_0402_50V8J
CKXTAL2 DVDD10
DVDD10
29 ( Should be place within 200 mils )
41
LAN_WAKE# DVDD10
R475 28
LANWAKEB
ISOLATEB
3.3V: 70mA
+3VS 1 2 26 27
ISOLATEB DVDD33
39 1.0V: 300mA
1K_0402_5% DVDD33
14 12 +LAN_IO
NC/SMBCLK AVDD33
2
R476 1 2 10K_0402_5% 15 42
R477 R478 1 NC/SMBDATA AVDD33
+LAN_IO 2 1K_0402_5% 38
GPO/SMBALERT AVDD33
47
15K_0402_5% 48
AVDD33 JLAN1
+LAN_IO 1 2 33
1
2
LAN_MDIN0 3 22 RJ45_TX0- R483 1 2 75_0603_1%
TD1- MX1- R484 75_0603_1% D15
1 2
2
+V_DAC 4 21 SANTA_130452-07
LAN_MDIP1 TCT2 MCT2 RJ45_RX1+
5 20 CONN@ @
TD2+ MX2+
1
C474 1 2 LAN_MDIN1 6 19 RJ45_RX1- 2
TD2- MX2- C475
1
0.01U_0402_16V7K +V_DAC 7 18 100P_1206_2KV7K
LAN_MDIP2 TCT3 MCT3 RJ45_TX2+ AZC199-02SPR7G_SOT23-3
8 17
LAN_MDIN2 TD3+ MX3+ RJ45_TX2- 1
9 16
TD3- MX3- 04/19
+V_DAC
LAN_MDIP3
LAN_MDIN3
10
11
12
TCT4
TD4+
TD4-
MCT4
MX4+
MX4-
15
14
13
RJ45_TX3+
RJ45_TX3- LAN_MDIP1 6
D16
I/O4 I/O2
3 LAN_MDIP0
ESD LAN_MDIP3 6
D17
I/O4 I/O2
3 LAN_MDIP2
D19 @ LSE-200NX3216TRLF_1206-2
1 2 LAN_MDIN1 4 1 LAN_MDIN0 LAN_MDIN3 4 1 LAN_MDIN2
I/O3 I/O1 I/O3 I/O1
A LANGND D20 @ LSE-200NX3216TRLF_1206-2 AZC099-04S.R7G_SOT23-6 AZC099-04S.R7G_SOT23-6 A
2 1
R485 0_0603_5% 1 2
@
D21 @ LSE-200NX3216TRLF_1206-2
1 2
2 1 LANGND
R486 0_0603_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
@
ESD Issued Date 2011/07/29 Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
2012/07/29 Title
P24-LAN RTL8111E
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom QML70 LA-8371P 0.11
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, October 19, 2011 Sheet 30 of 53
5 4 3 2 1
A B C D E F G H
+5VS_PVDD
EMI close to JSPK1
10U_0805_10V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
0_0805_5% @ C477 1U_0603_10V6K
1 1 1 2
SPKOUT_L2 R489 1 2 0_0603_5% SPK_L2 1 2
C479 C480 C481 C478 0.22U_0603_16V7K
@
2 2 2 JSPK1
SPK_R1 1
1 R491 SPKOUT_R1 R490 1 SPK_R1 SPK_R2 1 1
20mil 2 0_0603_5% 1 2 2
2
2 1 +3VS_DVDD_R 1 C482 0.22U_0603_16V7K SPK_L1 3 5
+3VS_DVDD 3 G1
10U_0603_6.3V6M
0_0603_5% @ SPK_L2 4 6
4 G2
0.1U_0402_16V7K
1 1 @ C483 1U_0603_10V6K
ACES_88266-04001
C484 C485 SPKOUT_R2 R492 1 2 0_0603_5% SPK_R2 2 1 2 CONN@
C486 0.22U_0603_16V7K
DMIC_DATA 2 2
@
+5VS_PVDD +VDDA
1 60mil 40mil L20
2 1 +5VS
2
+3VS_DVDD
10U_0805_10V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
C487 R493 1 1 1 MBK1608800YZF 0603
22P_0402_50V8J +3VS 2 1 D22 D23
2 10U_0603_6.3V6M
0.1U_0402_16V7K
@ 0_0603_5% 20mil C488 C489 C490
1 1 2 2 2
EMI C491 C492
1
YSDA0502C 3P C/A SOT-23 YSDA0502C 3P C/A SOT-23
2 2
10P_0402_50V8J
DMIC_CLK
39
46
25
38
1
9
U26 HDA_SDOUT_AUDIO HDA_BITCLK_AUDIO
1 2
ESD @ @
DVDD_IO
PVDD1
PVDD2
AVDD1
AVDD2
DVDD
0_0402_5%
Close to pin1
C493 C494
1
2
22P_0402_50V8J 22.8mA 1
@ 600mA 40mA @ R494
23 40 SPKOUT_L1 @
LINE1_L SPK_OUT_L+ SPKOUT_L2
24 LINE1_R SPK_OUT_L- 41 EMI
SPK Out: 40mil
22P_0402_50V8J
14 45 SPKOUT_R1
LINE2_L SPK_OUT_R+
10P_0402_50V8J
15 44 SPKOUT_R2 1
1K_0402_5% LINE2_R SPK_OUT_R- HDA_SYNC_AUDIO
MIC1 1 R495 2 MIC1_R 1 2 C495 4.7U_0603_6.3V6K MIC1_C 21 32 HP_OUTL 2 C496
2 MIC2_C 22 MIC1_L HP_OUT_L HP_OUTR 2
MIC1_R HP_OUT_R 33
MIC2 1 R496 2 MIC2_R 1 2 C497 4.7U_0603_6.3V6K C498 @ 2
1K_0402_5% AMIC1_L1 AMIC1_L_C 16
2 C601 4.7U_0603_6.3V6K
AMIC1_R_C17 MIC2_L @ 1
AMIC1_R1 MIC2_R HDA_SYNC_AUDIO
2 C602 4.7U_0603_6.3V6K 10 HDA_SYNC_AUDIO 14
R497 1 2.2K_0402_1%
2 +MIC1_VREFO_R
SYNC R498 1 2.2K_0402_1%
2 +MIC1_VREFO_L
DMIC_DATA R499 1 2 0_0402_5% DMIC_DATA_CODEC 2 6 HDA_BITCLK_AUDIO JAU1
28 DMIC_DATA GPIO0/DMIC_DATA BCLK HDA_BITCLK_AUDIO 14
26
DMIC_CLK DMIC_CLK_CODEC GND2
28 DMIC_CLK 1 2 3 25
L21 FBMA-L10-160808-301LMT_2P GPIO1/DMIC_CLK HDA_SDOUT_AUDIO GND1
5 HDA_SDOUT_AUDIO 14
SDATA_OUT MIC_JD 24
EC_MUTE# R500 1 PD# HDA_SDIN_AUDIO1 R501 MIC2 24
37 EC_MUTE# 2 0_0402_5% 4 8 2 HDA_SDIN0 14 23
PD# SDATA_IN 33_0402_5% 23
22
MIC1 HP_JD 22
21
HDA_RST_AUDIO# HP_OUTR 21
14 HDA_RST_AUDIO# 11
RESET# EAPD
47 1 R502 2 EAPD 37 20
20
HP_OUTL 19
0_0402_5% 19
48 18
SPDIFO 18
12 17
MIC_JD PCBEEP 17
1 R503 2 MONO_OUT
20 16
16
20K_0402_1% 15
HP_JD SENSE_A 15
2 R504 1 13
SENSE A
14
14
39.2K_0402_1% 29 +MIC2_VREFO 13
MIC2_VREFO 13
Close to Codec pin13 18 14 USB20_N1 12
SENSE B 12
MIC1_VREFO_R
30 +MIC1_VREFO_R JUSB4 14 USB20_P1 11
11
36 28 10
CBP LDO_CAP 10
+USB_VCCC 9
9
10U_0805_10V6K
1 2 35 27 AC97_VREF 8
CBN VREF 8
10U_0805_10V6K
0.1U_0402_16V7K
C499 2.2U_0603_16V6K 1 +USB_VCCD 7
AC_JDREF 7
+MIC1_VREFO_L
31
MIC1_VREFO_L JDREF
19 1 R505 2 1 1 6
6
20K_0402_1% C500 5
C502 C503 5
43
PVSS2 CPVEE
34 1 2 1 2 @ 4
4
C501 2
42 3
3 PVSS1 2.2U_0603_16V6K @ 2 2 C504 0.1U_0402_16V7K USB20_P0 3 3
49 26 14 USB20_P0 2
+1.5VS DVSS2 AVSS1 USB20_N0 2
7
DVSS1 AVSS2
37 JUSB3 14 USB20_N0 1
1
1 2 @
ALC269Q-VB5-GR_QFN48_7X7 ACES_88514-02401-071
C505 0.1U_0402_16V7K CONN@
1
+MIC2_VREFO
2
R563
4.7K_0402_5%
4 AMIC1_L 4
1
R42 R566
AMIC1_R 1 2 AMIC1 1 2 0_0402_5%
1K_0402_5% 15mil
2
C603
1
100P_0402_50V8J Security Classification Compal Secret Data Compal Electronics, Inc.
R566 close to JCM1 Issued Date 2011/07/29 Deciphered Date 2012/07/29 Title
For Mono Analog Microphone
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P25-HD CODEC ALC259
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom QML70 LA-8371P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, October 19, 2011 Sheet 31 of 53
A B C D E F G H
5 4 3 2 1
EPAD
SDD0 11 14 0_0402_5% CARD@ R634 EMI
SP4 SP7 SDCD#
12 SP5 SP6 13
CARD@ RTS5137-GR_QFN24_4X4
25
Card Reader Connector
+3VS +CARDPWR
+3VS
JCR1
5 VDD
2
SDCMD 3 CMD
1
C @ R768 @ R772 SDCLK C
6 CLK
100K_0402_5% R781 100K_0402_5% 4
R773 100K_0402_5% VSS
7 VSS
100K_0402_5%
6 1
3 1
+CARDPWR 250mA SDCD# SDWP SDD0 8
2
SDD1 DAT0
9 DAT1
30mil SDD2 1
SDD3 DAT2
2
SDCD SDWP# CD/DAT3
2 5
12
GND SW
2
4
CARD@ CARD@ Q63A Q63B SDCD WP SW GND SW
11
R635 C617 C618 C622 CD SW
100K_0402_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 CARD@ 2 2 T-SOL_156-2000302604
1
Close to connector
CONN@
SDCLK
C612 R632
R637 1 nonCARD@
2 0_0402_5% SDCLK 2 1 1 2 SDCLK
15 FCH_SDCLK
15 FCH_SDCMD
15 FCH_SDCD#
R639
R640
R641
1
1
nonCARD@
2 0_0402_5%
nonCARD@
2 0_0402_5%
nonCARD@
2 0_0402_5%
SDCMD
SDCD#
SDWP
EMI @
22P_0402_50V8J
33_0402_5% @
15 FCH_SDWP
R642
1
nonCARD@
2 0_0402_5% SDD0
close JCR1
1 close U40
B 15 FCH_SDDATA0
15 FCH_SDDATA1
15 FCH_SDDATA2
R643
R644
1
1
nonCARD@
2 0_0402_5%
nonCARD@
2 0_0402_5%
SDD1
SDD2 EMI B
5P_0402_50V_C
R645 1 nonCARD@
2 0_0402_5% SDD3
15 FCH_SDDATA3
1
close U40 C621
@ 2
+3VS +CARDPWR
R638 nonCARD@
2 1
0_0603_5%
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P26-RTS5137 Media Card Controller
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom QML70 LA-8371P 0.11
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, October 19, 2011 Sheet 32 of 53
5 4 3 2 1
A B C D E
+3VS
+1.5VS
WLAN/BT combo R583 2 @ 1 0_1206_5%
1
R584 +3VS +3VS_WLAN
0_1206_5% U37
+3VS_WLAN +3VS_WLAN AO4478L 1N SO8 80mil
10U_0603_6.3V6M
8 1
2
+1.5VS_WLAN 7 2
22U_0805_6.3V6
1 1 1 1 1 1 1 6 3 1
1
C584 C585 C586 C587 C588 C589 C590 5 @
C591
1 0.1U_0402_16V4Z 1
4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z R585
4
2 2 2 2 2 2 2 2 100_0603_5%
2 3VS_WLAN_CHG
PCIE_WAKE# 3.3V: 900mA +VSBP 1 2 3VSWLAN_GATE
14,30,37 FCH_PCIE_WAKE#
R724 47K_0402_5%
JMINI1 1.5V: 500mA 1
R586 1 @ 2 0_0402_5% 1 2 +3VS_WLAN
WAKE# 3.3V
1
Q60 D C592
3 4
BT_ON_FCH R587 1 @ RESERVED GND SUSP 0.1U_0603_25V7K
2 5 6 +1.5VS_WLAN 26,29,39 SUSP 2
RESERVED 1.5V
1
MINI1_CLKREQ# 0_0402_5%~D LPC_FRAME#_R G 2 D <BOM Structure>
14 MINI1_CLKREQ# 7 8
CLKREQ# RESERVED LPC_AD3_R SUSP
9 10 S 2
3
GND RESERVED LPC_AD2_R SSM3K7002FU_SC70-3
13 CLK_PCIE_MINI1# 11 12 G
REFCLK- RESERVED LPC_AD1_R Q32
13 CLK_PCIE_MINI1 13 14 S
3
REFCLK+ RESERVED LPC_AD0_R SSM3K7002FU_SC70-3
15 GND RESERVED 16
PCI_RST#_R 17 18 0_0402_5%1 2 R588
RESERVED GND WL_OFF#_FCH 15
CLK_PCI_DB_R 19 20 0_0402_5%1 2@ R589 WL_OFF#_EC
RESERVED RESERVED WL_OFF#_EC 37
21 22 PLT_RST#
GND PERST# PLT_RST# 13,18,30
6 PCIE_DTX_C_CRX_N2 23 24 R590 1 2 0_0603_5% +3VS_WLAN
PERn0 +3.3Vaux R591 1 @
6 PCIE_DTX_C_CRX_P2 25 26 2 0_0603_5% +3VALW
PERp0 GND 0_0402_5%
27 GND +1.5V 28
29 30 FCH_SMCLK0_R R592 1 @ 2 FCH_SCLK0 11,12,14
GND SMB_CLK FCH_SMDAT0_R @
6 PCIE_CTX_C_DRX_N2 31 PETn0 SMB_DATA 32 1 2 FCH_SDATA0 11,12,14
33 34 R593 0_0402_5%
6 PCIE_CTX_C_DRX_P2 PETp0 GND
35 GND USB_D- 36 USB20_N3 14
37 RESERVED USB_D+ 38 USB20_P3 14
+3VS_WLAN 39 RESERVED GND 40
2 41 42 2
RESERVED LED_WWAN#
43 RESERVED LED_WLAN# 44
45 RESERVED LED_WPAN# 46
47 RESERVED +1.5V 48
EC_TX R594 1 2 0_0402_5%~D EC_TX_R 49 50
37 EC_TX RESERVED GND
EC_RX R595 1 2 0_0402_5%~D EC_RX_R 51 52
37 EC_RX RESERVED +3.3V
@
2 R596 1
100K_0402_5%
5.2 mm High
C593
R606
2 1 1 2CLK_PCI_DB_R
@ 33_0402_5% @
22P_0402_50V8J
Reserve for EMI please close to JMINI1
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WLAN/ WWAN/ m-SATA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 33 of 53
A B C D E
A B C D E F G H
+3VS +3VS
81mA
HDD-SATA Redriver R459 1 @ 2 4.7K_0402_5% 7
U41
6
Place caps. Place caps.
EN VDD
VDD 16
SATA_FTX_DRX_P00.01U_0402_16V7K 1 2 C430 SATA_FTX_DRX_P0_R 1 +3VS
15 SATA_FTX_DRX_P0
15 SATA_FTX_DRX_N0
SATA_FTX_DRX_N00.01U_0402_16V7K 1 2 C433 SATA_FTX_DRX_N0_R 2
A_INp
A_INn NC 10 @ R668 near U41 near U42
REXT 20 1 2
SATA_FRX_DTX_P00.01U_0402_16V7K 1 2 C432 SATA_FRX_DTX_P0_R 5 4.99K_0402_1%
15 SATA_FRX_DTX_P0 SATA_FRX_DTX_N00.01U_0402_16V7K SATA_FRX_DTX_N0_R B_OUTp SATA0_A_PRE0
15 SATA_FRX_DTX_N0 1 2 C431 4 9
B_OUTn A_PRE0
0.1U_0402_16V7K
C639
0.01U_0402_16V7K
C638
1U_0603_10V6K
C643
0.1U_0402_16V7K
C642
0.01U_0402_16V7K
C641
8 SATA0_B_PRE0 1 1 1 1 1
+3VS SATA0_B_PRE1 B_PRE0
17 B_PRE1
SATA0_A_PRE1 19 15 SATA_FTX_C_DRX_P0_R
A_PRE1 A_OUTp SATA_FTX_C_DRX_N0_R
PIN7 & PIN18 have internal PD 14
R736 1 @ A_OUTn 2 2 2 2 2
2 18
TEST
1 4.7K_0402_5% SATA_FRX_C_DTX_P0_R 1
3 11
GND B_INp
2
13 12 SATA_FRX_C_DTX_N0_R
R667 GND B_INn
21
@ EPAD
0_0402_5%
PS8520BTQFN20GTR2_TQFN20_4X4
<BOM Structure>
1
+3VS +3VS
13 12 SATA_FRX_C_DTX_N1_R 17 18
GND B_INn SATA_FRX_DTX_N10_0402_5% SATA_FRX_C_DTX_N1_R 17 18
21 EPAD 1 @ 2 R705 19 19 20 20
@ R670 SATA_FRX_DTX_P1 0_0402_5% 1 @ 2 R706 SATA_FRX_C_DTX_P1_R 21 22
0_0402_5% PS8520BTQFN20GTR2_TQFN20_4X4 21 22
23 23 24 24
25 26
1
25 26
27 27 28 28
29 30
GND
GND
GND
GND
GND
GND
29 30
Co-lay with redriver
Add EQ pin for PS8520BTQFN20GTR2 FOR SATA0 Add EQ pin for PS8520BTQFN20GTR2 FOR SATA1 ACES_88018-304G
31
32
33
34
35
36
2 CONN@ 2
+3VS +3VS
SATA0_B_PRE11@ R676 2 SATA0_B_PRE1 1@ R680 2 4.7K_0402_5% SATA1_B_PRE11@ R684 2 SATA1_B_PRE1 1@ R688 2 4.7K_0402_5%
0_0402_5% 0_0402_5%
SATA0_A_PRE11@ R679 2 SATA0_A_PRE1 1@ R677 2 4.7K_0402_5% SATA1_A_PRE11@ R687 2 SATA1_A_PRE1 1@ R685 2 4.7K_0402_5%
0_0402_5% 0_0402_5%
SATA0_A_PRE01@ R682 2 SATA0_A_PRE0 1@ R675 2 4.7K_0402_5% SATA1_A_PRE01@ R690 2 SATA1_A_PRE0 1@ R683 2 4.7K_0402_5%
0_0402_5% 0_0402_5%
SATA0_B_PRE01@ R678 SATA0_B_PRE0 1@ R681 SATA1_B_PRE01@ R686 SATA1_B_PRE0 1@ R689 Q24
2 2 4.7K_0402_5% 2 2 4.7K_0402_5% +5VS
0_0402_5% 0_0402_5% SI3456DDV-T1-GE3_TSOP6
R460
D
6
S
1 5 4 +5VS_ODD_R 1 2 +5VS_ODD
C439 2
1U_0402_6.3V6K 1 1600mA 0_1206_5%
G
+VSBP 2
Placea caps. near ODD CONN.
3
+5VS_ODD 0.1U_0402_16V4Z 10U_0805_10V4Z
1
0.1U_0402_25V6
1
R461 1 1 1 1
C552 330K_0402_5% C445 C446 C447 C448
ODD-SATA Redriver 2
2
+3VS +3VS ODD_EN 2 2 2 2
81mA
2
D
1.5M_0402_5%
0.1U_0402_25V6
U43 1 1000P_0402_50V7K 1U_0402_6.3V4Z
R672 1 @ 2 4.7K_0402_5% 7 6 2 Q25
3 EN VDD 15 ODD_EN# 3
16 G SSM3K7002FU_SC70-3 R462 C444
SATA_FTX_DRX_P20.01U_0402_16V7K SATA_FTX_DRX_P2_R VDD
15 SATA_FTX_DRX_P2 1 2 C438 1 S
3
SATA_FTX_DRX_N20.01U_0402_16V7K SATA_FTX_DRX_N2_R A_INp 2
15 SATA_FTX_DRX_N2 1 2 C637 2 10 @R674
@ R674
1
A_INn NC
20 1 2
SATA_FRX_DTX_P20.01U_0402_16V7K SATA_FRX_DTX_P2_R REXT
15 SATA_FRX_DTX_P2 1 2 C636 5 4.99K_0402_1%
SATA_FRX_DTX_N20.01U_0402_16V7K SATA_FRX_DTX_N2_R B_OUTp SATA2_A_PRE0
15 SATA_FRX_DTX_N2 1 2 C635 4
B_OUTn A_PRE0
9
8 SATA2_B_PRE0
+3VS SATA2_B_PRE1 B_PRE0
17
SATA2_A_PRE1 B_PRE1 SATA_FTX_C_DRX_P2_R
19 15
PIN7 & PIN18 have internal PD A_PRE1 A_OUTp SATA_FTX_C_DRX_N2_R
14
R740 1 @ A_OUTn
2 18
4.7K_0402_5% TEST SATA_FRX_C_DTX_P2_R
3 11
GND B_INp
2
13 12 SATA_FRX_C_DTX_N2_R
GND B_INn
21
@ R673 EPAD
PS8520BTQFN20GTR2_TQFN20_4X4
SATA ODD Conn. JODD1
0_0402_5%
1
13
SATA_FTX_C_DRX_P2_R C440 1 SATA_FTX_DRX_P2_C GND
2 0.01U_0402_16V7K 12
SATA_FTX_C_DRX_N2_R C441 1 SATA_FTX_DRX_N2_C A+
2 0.01U_0402_16V7K 11
A-
10
SATA_FTX_DRX_P2 0_0402_5% SATA_FTX_C_DRX_P2_R SATA_FRX_C_DTX_N2_R SATA_FRX_DTX_N2_C GND
1 @ 2 R707 C442 1 2 0.01U_0402_16V7K 9
B-
SATA_FTX_DRX_N2 0_0402_5% 1 @ 2 R708 SATA_FTX_C_DRX_N2_R SATA_FRX_C_DTX_P2_R C443 1 2 0.01U_0402_16V7K SATA_FRX_DTX_P2_C 8
+3VS B+
7
SATA_FRX_DTX_P2 0_0402_5% SATA_FRX_C_DTX_P2_R GND
1 @ 2 R709
SATA_FRX_DTX_N2 0_0402_5% 1 @ 2 R710 SATA_FRX_C_DTX_N2_R
1 2 ODD_DETECT#_R 6
14 ODD_DETECT# DP
1
4 +3VS GND 4
Add EQ pin for PS8520BTQFN20GTR2 FOR SATA2
S
0.1U_0402_16V7K
C645
0.01U_0402_16V7K
C644
SATA2_B_PRE01@ R694
0_0402_5%
SATA2_B_PRE0 1@ R697
2 2 2 Security Classification Compal Secret Data Compal Electronics, Inc.
2 2 4.7K_0402_5% Issued Date 2011/07/29 Deciphered Date 2012/07/29 Title
0_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P28-HDD & ODD CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.11
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 34 of 53
A B C D E F G H
1 2 3 4 5
@ 1 2
R511 0_0402_5%
+5VALW L22
USB3_RX0_P 2 1 USB3_RX0_P_R
2A +USB_VCCA
14 USB3_RX0_P
AI CHARGER
U27 USB3_RX0_N 3 4 USB3_RX0_N_R
14 USB3_RX0_N
C509 @ 1 2 2.2U_0603_6.3V4Z U28 @
1 8 DLP11TB800UL2L_4P 37 USBAI_EN R512 1 AI@ 2 0_0402_5% 8 1 CEN# R537 1 2 0_0402_5% AI_CEN# 37
GND OUT USB20_N10 CB CEN USB20_N10_CON
2 IN OUT 7 7 TDM DM 2
1
C510 2 10.1U_0402_16V4Z 3 6 @ 1 2 USB20_P10 6 3 USB20_P10_CON
USBAI_PEN# IN OUT R514 0_0402_5% TDP DP SELCDP
37 USBAI_PEN# 4 EN# OC# 5 1 2 USB_OC0# 14 +5VALW 5 VDD SELCDP 4
0_0402_5% R515 @ 1 2 R516 2 140uA 9
R517 0_0402_5% 100K_0402_5% Thermal Pad
A AP2301MPG-13 MSOP 8P AI@ C511 SLG55584AVTR_TDFN8_2X2 A
2
L23 0.1U_0402_16V7K AI@ +5VALW
1 1
Low Active C512 14 USB3_TX0_P USB3_TX0_P 2 1 USB3_TX0_P_C 2 1 USB3_TX0_P_R AI@
@ 1000P_0402_50V7K C648 0.1U_0402_10V7K
2
1
14 USB3_TX0_N USB3_TX0_N 2 1 USB3_TX0_N_C 3 4 USB3_TX0_N_R
C649 0.1U_0402_10V7K R581
DLP11TB800UL2L_4P 4.7K_0402_5%
AI@
@ 1 2
2
R518 0_0402_5% SELCDP
1
CB SELCDP Function
14 USB20_N10 USB20_N10 R540 2 nonAI@ 1 0_0402_5% USB20_N10_CON R580
@ 4.7K_0402_5% 0 X DCP autodetect charger mode
14 USB20_P10 USB20_P10 R552 2 nonAI@ 1 0_0402_5% USB20_P10_CON
@ 1 2 1 0 S0 charging with SDP only
2
R519 0_0402_5%
1 1 S0 charging with SDP or CDP
L24
USB3_RX1_P 2 1 USB3_RX1_P_R
+5VALW 14 USB3_RX1_P
USB3_RX1_N 3 4 USB3_RX1_N_R
U29
2A +USB_VCCB
14 USB3_RX1_N
DLP11TB800UL2L_4P
charger port: left side & near user
C515 @ 1 2 2.2U_0603_6.3V4Z
1 8 @ 1 2
GND OUT R520 0_0402_5% +USB_VCCA
2 7 2 R521 1 0_0402_5%
C516 IN OUT
2 10.1U_0402_16V4Z 3 IN OUT 6 @ W=80mils JUSB1
37 USBSW_EN# USBSW_EN# 4 5 1 2 1
EN# OC# USB_OC2# 14 VBUS
0_0402_5% R523 USB20_N10_C 2
@ 1 L27 USB20_P10_C D-
2 1 1 3
AP2301MPG-13 MSOP 8P R522 0_0402_5% USB20_N10_CON USB20_N10_C D+
B
1 1 2 2 4 GND B
1 C513 C514 USB3_RX0_N_R 5
C517 L25 470P_0402_50V7K 47U_0805_6.3V USB3_RX0_P_R STDA_SSRX-
Low Active @ 1000P_0402_50V7K USB3_TX1_P USB3_TX1_P_C USB3_TX1_P_R USB20_P10_CON USB20_P10_C 2 2
6 STDA_SSRX+
14 USB3_TX1_P 2 1 2 1 4 4 3 3 7 GND
C650 0.1U_0402_10V7K USB3_TX0_N_R 8
2 WCM-2012HS-900T_4P USB3_TX0_P_R STDA_SSTX-
9 STDA_SSTX+
14 USB3_TX1_N USB3_TX1_N 2 1 USB3_TX1_N_C 3 4 USB3_TX1_N_R
C651 0.1U_0402_10V7K 2 R525 1 0_0402_5% 10
DLP11TB800UL2L_4P @ GND
11 GND
12 GND
@ 1 2 13
R524 0_0402_5% GND
SANTA_373280-1
CONN@
2 R526 1 0_0402_5%
@
+5VALW D27
USB3_RX0_N_R 1 1 10 9 USB3_RX0_N_R WCM-2012HS-900T_4P
14 USB20_N11 USB20_N11 4 3 USB20_N11_C
USB3_RX0_P_R USB3_RX0_P_R 4 3 +USB_VCCB
U30
2A +USB_VCCC
2 2 9 8
JUSB2
C518 @ 2.2U_0603_6.3V4Z USB3_TX0_N_R USB3_TX0_N_R USB20_P11 USB20_P11_C
W=80mils
1 2 4 4 7 7 14 USB20_P11 1 1 2 2 1 VBUS
1 8 USB20_N11_C 2
GND OUT USB3_TX0_P_R USB3_TX0_P_R L26 USB20_P11_C D-
2 IN OUT 7 5 5 6 6 1 1 3 D+
C519 2 10.1U_0402_16V4Z 3 6 0_0402_5% 4
USBSW_EN# IN OUT GND
4 EN# OC# 5 1 2 USB_OC1# 14 3 3 2 R528 1 0_0402_5% C520 C521 USB3_RX1_N_R 5 STDA_SSRX-
R527 @ 470P_0402_50V7K 47U_0805_6.3V USB3_RX1_P_R 6
8 2 2 STDA_SSRX+
7 GND
AP2301MPG-13 MSOP 8P USB3_TX1_N_R 8
AZ1045-04F DFN2510P10E USB3_TX1_P_R STDA_SSTX-
1 9 STDA_SSTX+
Low Active C522
@ 1000P_0402_50V7K 10 GND
11 GND
2 12 GND
C 13 GND
C
SANTA_373280-1
CONN@
D29
USB3_RX1_N_R 1 1 10 9 USB3_RX1_N_R
USB3_RX1_P_R 2 2 9 8 USB3_RX1_P_R
2
2A 3 3 D26 D32
U31 +USB_VCCD USB20_N10_C USB20_N11_C
C523 @ 1 2 2.2U_0603_6.3V4Z 8
1 8 USB20_P10_C USB20_P11_C
GND OUT AZ1045-04F DFN2510P10E
2 7
1
IN OUT
2
C524 2 10.1U_0402_16V4Z 3 6 0_0402_5% @ PJSOT24CH 3P C/A SOT-23 @ PJSOT24CH 3P C/A SOT-23
USBSW_EN# IN OUT USB_OC1# D28 D39
4 5 1 2
2
EN# OC# R529 AZC199-02SPR7G_SOT23-3 AZC199-02SPR7G_SOT23-3
1
AP2301MPG-13 MSOP 8P
1
1
Low Active C525
@ 1000P_0402_50V7K
2
D D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB2/USB3/AUDIO
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.11
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 35 of 53
1 2 3 4 5
A B C D E
Screw Hole
2
R530 R531
ON/OFF switch R513 1 2 0_0402_5% 930@ 9012@
9012@ 100K_0402_5% 100K_0402_5%
1 NTC010-BB1G-C100C 1
1
SW 1 D30 H1 H2 H3 H5 H6 H25 H8 H16 H17
2 ON/OFF 37 3P0
2 1 ON/OFFBTN# 1
3 51_ON# H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P0 H_3P1 H_3P1
51_ON# 40
1
4 3
DAN202UT106_SC70-3
930@ @ @ @ @ @ @ @ @ @
5
1
LED7 R722
PW R_ON_LED# @ @ @ @ @ @ @ @
37,38 PW R_ON_LED# 1 2 2 1 +5VALW
1
PW R_ON_LED# 4P3
EC_ON 2 Q30 H_4P3 H_4P3 H_4P3 H_4P3
37,42 EC_ON
1
G 2N7002_SOT23-3
2
S 930@ ON/OFFBTN# @
3
R532 @ @ @
10K_0402_5%
930@
1
H23
3
2 2
3P3
H_3P3
1
PJSOT24CH_SOT23-3
D31 @
1
@ H22
2P9
H_2P9
1
@
1
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80
+5VS
C526
+3VS
1
2.2U_0603_6.3V4Z 1
2
C527
R533 U32 2
1000P_0402_50V7K~D
10K_0402_5% 2
8 GND EN 1
JFAN1
7 GND VIN 2
6 3 +5VS_FAN 1
1
place as close as EC
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWRBTN/ FAN / Screws
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.11
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: W ednesday, October 19, 2011 Sheet 36 of 53
A B C D E
5 4 3 2 1
+3VALW L36
FBMA-L11-160808-800LMT_0603 KSI[0..7]
1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z +3VALW_EC 1 2 +EC_VCCA
KSI[0..7] 15,38 Board ID
R394 KSO[0..17] +3VALW
1 1 1 1 2 2 KSO[0..17] 38
2
0_0805_5% C799 C800 C801 C802 C803 C580 1
R395 0.1U_0402_16V4Z
2
1000P_0402_50V7K 0_0402_5% C581
2 2 2 2 1 1 930@ ECAGND R396
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1000P_0402_50V7K 2 100K_0402_5%
Ra
1
R397 2 1 +3VLP
1
D 0_0402_5% 9012@ AD_BID0 D
20mA
111
125
2
22
33
96
67
U72 1
9
R398 C804
Rb 8.2K_0402_5%
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
+3VALW 0.1U_0402_16V4Z
2
1
GATE20 1 21 USBSW_EN# USBSW_EN# 35 USBSW_EN# 1 2
14 GATE20 KB_RST# GA20/GPIO00 INVT_PWM/PWM1/GPIO0F FCH_SPI_WP# 10K_0402_5% R770
14 KB_RST# 2 KBRST#/GPIO01 BEEP#/PWM2/GPIO10 23 FCH_SPI_WP# 15
SERIRQ 3 26 USBAI_PEN# 1 2
13 SERIRQ LPC_FRAME# SERIRQ# FANPWM1/GPIO12 10K_0402_5% R771
13,33 LPC_FRAME# 4 LFRAME# ACOFF/FANPWM2/GPIO13 27
C806 LPC_AD3 5 2 1 ECAGND
13,33 LPC_AD3 LAD3
@ 22P_0402_50V8J LPC_AD2 7 PWM Output C805 100P_0402_50V8J
13,33 LPC_AD2 LAD2
2 1 R399 2 1 @ 33_0402_5% 13,33 LPC_AD1 8 63 BATT_TEMPA
LPC_AD1 LAD1 BATT_TEMP/AD0/GPIO38 BATT_TEMPA 40
LPC_AD0
13,33 LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64
ADP_I EC_THERMTRIP# 8
ADP_I/AD2/GPIO3A 65 ADP_I 40,41
12 AD Input 66 AD_BID0
13,16 LPC_CLK0_EC PCICLK AD3/GPIO3B
13 75 ENBKL
13 A_RST# PCIRST#/GPIO05 AD4/GPIO42 ENBKL 10
+3VALW R400 2 1 47K_0402_5% EC_RST# 37 76 AI_CEN#
ECRST# SELIO2#/AD5/GPIO43 AI_CEN# 35
EC_SCI# 20
14 EC_SCI# SCI#/GPIO0E
C807 2 1 0.1U_0402_16V4Z 13 PM_CLKRUNEC# 38 +5VS
CLKRUN#/GPIO1D USBAI_PEN#
DAC_BRIG/DA0/GPIO3C 68 USBAI_PEN# 35
70 FAN_SET
EN_DFAN1/DA1/GPIO3D FAN_SET 36
DA Output 71 ODD_DA# TP_CLK 2 1
KSI0 IREF/DA2/GPIO3E AC_PRESENT_OK ODD_DA# 34 4.7K_0402_5% R401
55 KSI0/GPIO30 DA3/GPIO3F 72 AC_PRESENT_OK 14
+3VALW KSI1 56 TP_DATA 2 1
KSI2 KSI1/GPIO31 4.7K_0402_5% R402 FCH_1.1PWR_EN @
57 KSI2/GPIO32 1 2
1 2 EC_SMB_CK1_R KSI3 58 KSI3/GPIO33 PSCLK1/GPIO4A 83 EC_MUTE_R R404 2 1 0_0402_5% EC_MUTE#
EC_MUTE# 31
R749 100K_0402_5%
C R403 2.2K_0402_5% KSI4 59 84 USBAI_EN EC_MUTE# 1 2 C
KSI4/GPIO34 PSDAT1/GPIO4B USBAI_EN 35
1 2 EC_SMB_DA1_R KSI5 60 KSI5/GPIO35 PSCLK2/GPIO4C 85 BT_ON
BT_ON 33
R405 10K_0402_5%
R406 2.2K_0402_5% KSI6 61 PS2 Interface 86 EAPD 1 @ 2 +3VLP
KSI6/GPIO36 PSDAT2/GPIO4D EAPD 31 +3VALW_EC
1 2 FLASH_EN KSI7 62 KSI7/GPIO37 TP_CLK/PSCLK3/GPIO4E 87 TP_CLK
TP_CLK 38
R407 100K_0402_5%
R408 @ 10K_0402_5% KSO0 39 88 TP_DATA
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F TP_DATA 38
1 2 S5_CORE_EN KSO1 40 KSO1/GPIO21
C810 100P_0402_50V8J
R559 @ 10K_0402_5% KSO2 41 R409 1 930@ 2 ACIN 2 1
KSO2/GPIO22
1 2 EC_SMB_CK2 KSO3 42 KSO3/GPIO23 SDICS#/GPXOA00 97 GPU_CTF
GPU_CTF 19
200K_0402_5%
R609 @ 2.2K_0402_5% KSO4 43 98 EN_WOL R428
KSO4/GPIO24 SDICLK/GPXOA01 EN_WOL 30
1 2 EC_SMB_DA2 KSO5 44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99 VLDT_EN
VLDT_EN 39,46
ACIN_D 2 1 ACIN 19,41
R610 @ 2.2K_0402_5% KSO6 45 109 R567 2 1 0_0402_5% 9012@
KSO7 KSO6/GPIO26 Matrix SDIDI/GPXID0 0_0402_5% 9012@
NTC_V 40
46 KSO7/GPIO27 SPI Device Interface
KSO8 47
KSO9 KSO8/GPIO28 FRD# FCH_PWROK
48 KSO9/GPIO29 SPIDI/RD# 119 1 2
+3VS KSO10 49 120 R414 1 930@ 2 33_0402_5% FWR# R412 10K_0402_5%
KSO11 KSO10/GPIO2A SPIDO/WR# R416
50 KSO11/GPIO2B SPI Flash ROM SPICLK/GPIO58 126 1 930@ 2 33_0402_5% SPI_CLK
KSO12 51 128 R418 1 930@ 2 33_0402_5% FSEL#
KSO13 KSO12/GPIO2C SPICS#
52 KSO13/GPIO2D
1 2 EC_SCI# KSO14 53
R411 10K_0402_5% KSO15 KSO14/GPIO2E R419 2 TL_BKOFF#
54 KSO15/GPIO2F CIR_RX/GPIO40 73 1 0_0402_5% TL_BKOFF# 27,28
1 2 EC_SMB_CK2 81 KSO16/GPIO48 CIR_RLC_TX/GPIO41 74 PX_EN
PX_EN 20,21
R413 2.2K_0402_5% 82 89 SPOK
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 SPOK 40,42
1 2 EC_SMB_DA2 BATT_CHGI_LED#/GPIO52 90 BATT_CHG_LED#
BATT_CHG_LED# 38
@
R417 2.2K_0402_5% 91 CAPS_LED# D42
CAPS_LED#/GPIO53 CAPS_LED# 38
EC_SMB_CK1 1 R421 2 0_0402_5% EC_SMB_CK1_R 77 GPIO 92 PE_GPIO1 RB751V_SOD323 9012@
40,41 EC_SMB_CK1 SCL1/GPIO44 BATT_LOW_LED#/GPIO54 PE_GPIO1 13,14,20
EC_SMB_DA1 1 R422 2 0_0402_5% EC_SMB_DA1_R 78 93 BATT_CHG_LOW_LED# 2 1 FCH_POK_EC 2 1 FCH_PWROK
40,41 EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 BATT_CHG_LOW_LED# 38 14 FCH_POK
8,19,27 EC_SMB_CK2 1 R423 2 0_0402_5% EC_SMB_CK2_R 79 SCL2/GPIO46 SM Bus SYSON/GPIO56 95 SYSON
SYSON 39,44
8,19,27 EC_SMB_DA2 1 R424 2 0_0402_5% EC_SMB_DA2_R 80 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 121 VR_ON
VR_ON 47 +3VS 2 1 2 1 R760
127 VGATE R761 R762 0_0402_5%
B AC_IN/GPIO59 VGATE 14,47 B
10K_0402_5% 0_0402_5%
+3VALW @
14 PM_SLP_S3# 1 R425 2 0_0402_5% PM_SLP_S3#_R 6 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXO03 100 EC_RSMRST#
EC_RSMRST# 14
14 PM_SLP_S5# 1 R426 2 0_0402_5% PM_SLP_S5#_R 14 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXO04 101 EC_LID_OUT#
EC_LID_OUT# 14
1
1 2 4.7U_0805_10V4Z U74
C815 20P_0402_50V8 KB9012QF A3 LQFP 128P 2 FSEL# 1 8
11
24
35
94
113
69
2
KSI0 @ 1 2
C561 100P_0402_50V8J KSO[0..17] 6 D33 D34
KSI5 KSO[0..17] 37 6
@ 1 2 5 PJDLC05C_SOT23-3 PJDLC05C_SOT23-3
5 TP_CLK 37
C562 100P_0402_50V8J 4
KSI6 4 LEFT_BTN# TP_DATA 37
@ 1 2 3 1 1
C563 100P_0402_50V8J 3 RIGHT_BTN# @ @
2 2
100P_0402_50V8J
C570
100P_0402_50V8J
C571
KSI1 @ 1 2 1
C565 100P_0402_50V8J 1
KSO2 @ 1 2 JKB1 ACES_88514-00601-071 2 2
1
C566 100P_0402_50V8J 26 CONN@
KSO1 @ GND2
1 2 25 GND1
C567 100P_0402_50V8J
KSO0 @ 1 2 KSO15 24
C568 100P_0402_50V8J KSO14 24
23 23 DTSM-61N-S-V-T-R(756)_4P DTSM-61N-S-V-T-R(756)_4P
KSO4 @ 1 2 KSO12 22
C569 100P_0402_50V8J KSO10 22 LEFT_BTN# RIGHT_BTN#
21 21 1 3 1 3
KSO3 @ 1 2 KSO11 20
C572 100P_0402_50V8J KSO6 20
19 19 2 4 2 4
KSO5 @ 1 2 KSO8 18
C573 100P_0402_50V8J KSO4 18
17 17 SW3 SW4
KSO14 @ 1 2 KSO2 16
C574 100P_0402_50V8J KSO5 16
15 15
KSO6 @ 1 2 KSO13 14
C575 100P_0402_50V8J KSI0 14
13 13
KSO7 @ 1 2 KSI3 12
C576 100P_0402_50V8J KSO1 12
11 11
KSO13 @ 1 2 KSI2 10
C577 100P_0402_50V8J KSI4 10
9 9
KSO8 @ 1 2 KSO3 8
KSO9 @
C578
1
100P_0402_50V8J
2
KSI5
KSI6
7
6
8
7 Lid Switch
C579 100P_0402_50V8J KSO9 6
KSI7
5
4
5
4
(Hall Effect Switch)
KSI1 3
KSO0 3 +3VALW
2
KSO7 2
1
1
ACES_88514-02401-071
CONN@
1
2
C582 R578
2
+5VALW 1 2 0.1U_0402_16V4Z U36 47K_0402_5%
R713 10K_0402_5%
VDD
1
2
LED1
3
LED Green
2
YG G 3
1 2 1
OUTPUT
1
LID_SW_IN# 37
GND
36,37 PWR_ON_LED# +3VALW
200_0402_5% R714 C583
10P_0402_50V8J
@
D35
1
HT-121UYG_YELLOW-GREEN @ APX9131AAI-TRG SOT-23 2
Green LED2 SATA_LED#
BATT_CHG_LED# 2 1 2
2
1
37 BATT_CHG_LED#
100_0402_5% R716 PWR_ON_LED# 3
1 +3VALW
YSDA0502C 3P C/A SOT-23
37 BATT_CHG_LOW_LED# 2 1 3
300_0402_5% R715 HT-210UD/UYG_AMB/GRN
BATT_LOW_LED# D36
@
Amber BATT_CHG_LOW_LED# 2
1
BATT_CHG_LED# 3
LED3
Green YG G 3
YSDA0502C 3P C/A SOT-23
37 WL_BT_LED# 2 1 2 1 +3VS D37
200_0402_5% R717 @
WL_BT_LED# 2
1
HT-121UYG_YELLOW-GREEN CAPS_LED# 3
LED4
YSDA0502C 3P C/A SOT-23
Green YG G 3
15 SATA_LED# 2 1 2 1 +3VS D38
200_0402_5% R719 @
NUM_LED# 2
1
HT-121UYG_YELLOW-GREEN
3
LED5
YSDA0502C 3P C/A SOT-23
Green YG G 3
37 NUM_LED# 2 1 2 1 +3VS
200_0402_5% R720
HT-121UYG_YELLOW-GREEN
LED6
ESD
Green YG G 3
37 CAPS_LED# 2 1 2 1 +3VS
200_0402_5% R721
HT-121UYG_YELLOW-GREEN
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/29 Deciphered Date 2012/07/29 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/EC ROM/TP/FUN/LED
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 38 of 53
A B C D E
U69 +5VS
2
SI4178DY-T1-GE3_SO8 +1.1VALW +1.1VS
U70 R766 R725
8 1 AO4430L_SO8 100K_0402_5% 100K_0402_5%
7 2 8 1
2
10U_0805_10V4Z
0.1U_0402_16V7K
10U_0805_10V4Z
1U_0402_6.3V4Z
SSM3K7002FU_SC70-3
6 3 1 1 7 2
1
2
C817
C818
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
1 1 5 6 3 1 1 VLDT_EN#
1
C819
C820
C822
C823
SSM3K7002FU_SC70-3
R726 1 5 SYSON#
470_0603_5% R727 R728
1
2 2 D
C821
1K_0402_5% 470_0603_5% Q69
4
2 2 2 2 2
37,46 VLDT_EN
1 1
1
2 G Q72 D
2
1
1
D Q70 D Q71 S 37,44 SYSON 2
3
1 SUSP VLDT_EN# G 1
2 2
1
G G R729 S
3
1 2 5VS_GATE S S 10K_0402_5% R732
+VSBP
3
R730 47K_0402_5% SSM3K7002FU_SC70-3 +VSBP 1 2 1.1VS_GATE SSM3K7002FU_SC70-3 100K_0402_5%
2
1 R731 47K_0402_5%
2
1
1
Q73 D C824 Q74 D +5VALW
1
SUSP 2 0.1U_0603_25V7K VLDT_EN# 2 +5VALW
G 2 G C825
2
S S 0.1U_0603_25V7K
3
3
SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3 2 R733
1
100K_0402_5%
R718
SSM3K7002FU_SC70-3
100K_0402_5%
1
SUSP
2
FCH_3.3PWR_EN#
+3VALW U71 +3VS
1
SI4178DY-T1-GE3_SO8 D Q75 D
1
7 2 S S
3
2
10U_0603_6.3V6M
0.1U_0402_16V7K
10U_0603_6.3V6M
1U_0402_6.3V4Z
6 3 1 1 Q61
C829
1 1 5 R748 SSM3K7002FU_SC70-3 R734
C828
C827
470_0603_5%
4
2
2 2
1 1
2 2
D Q76
2 SUSP
G
2 1 3VS_GATE S
+VSBP
2 R767 47K_0402_5% 3 SSM3K7002FU_SC70-3 2
Instant On
+3VALW TO +3V_FCH (1A)
1
Q77 D
1
SUSP 2
G C830 +3VALW +3V_FCH
R737
S 0.1U_0603_25V7K
3
SSM3K7002FU_SC70-3 2 2 @ 1
0_0805_5%
Q79
AO3404AL_SOT23
S
1
2
+1.5V +1.5VS
10U_0805_10V4Z
C832
AP2301GN-HF_SOT23-3 PX@
1
1U_0603_10V4Z
C834
Q78
G
2
1
3 1 C833 R741
2 470_0603_5%
2
2
2
10U_0603_6.3V6M
1 10U_0805_10V4Z
1
C831
R739 R769
2
100K_0402_5% 470_0603_5%
1
2 D Q82
20mil 10mil
1
2 FCH_3.3PWR_EN#
+VSBP R743 2 1 200K_0402_5% 3V_GATE G
1
D Q81 S
3
2 SUSP SSM3K7002FU_SC70-3
1
1
R744 Q83 D G
1
SUSP# Q84 D C837
2 1 2 S
3
2
S G
3
3
3 0.22U_0603_16V4Z 3
2
+1.2VS
2
R745
470_0603_5%
1
1
D Q85
2 VLDT_EN#
G
S
3
SSM3K7002FU_SC70-3
+0.75VS
1
+1.5V +2.5VS
R623
22_0603_5%~D
2
4 4
2
R746 R747
+DDR_CHG
470_0603_5% 470_0603_5%
SSM3K7002FU_SC70-3~D
1
D
1
D D
Q51
S S
DC Interface
3
SSM3K7002FU_SC70-3 SSM3K7002FU_SC70-3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B 0.11
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
QML70 LA-8371P
Date: Wednesday, October 19, 2011 Sheet 39 of 53
A B C D E
A B C D
2
ACES_88299-0610
1000P_0402_50V7K
1000P_0402_50V7K
100P_0402_50V8J
2
1 1
PR1
100P_0402_50V8J
GND 8
1
13.7K_0402_1% @ PR2
GND 7
PC1
PC2
PC3
PC5
5.62K_0402_1%
6 6
5 5
1
4 4
1
3 3 37 NTC_V
2 2 37 Turbo_V
1 1
2
PJPDC1 @ PR3 @ PC13
13.7K_0402_1% .1U_0402_16V7K
1
PH1
1
100K_0402_1%_TSM0B104F4251RZ
0.01U_0402_25V7K
4 EC_SMCA
10U_0805_25V6K
5 5
6 EC_SMDA B+
3 1
+VSBP
6
1
PC128
TS_A
0.1U_0603_25V7K
7
0.22U_0603_25V7K
7
2
PC7
100K_0402_1%
10 GND 8 8
PC9
2
11 9 PR27 PC6 2
2
GND 9
1
PR13
1K_0402_1% 1000P_0402_50V7K
PJSOT24CW_SOT323-3
2
1
PC8
SUYIN_200275MR009G186ZL
2
VL
1
2
PD1
PQ3
2
PR14 TP0610K-T1-E3_SOT23-3
@ 22K_0402_1%
1 2 VSB_N_001
2
1VSB_N_003
PR16
100K_0402_1%
@ PD2 PR18
1
PJSOT24CW _SOT323-3 0_0402_5% D
2 37,42 SPOK 1 2VSB_N_002 2 PQ4
1 G SSM3K7002FU_SC70-3
.1U_0402_16V7K
3 S
3
1
PC10
1 2 EC_SMB_CK1 37,41
2
PR28 100_0402_1%
1 2 EC_SMB_DA1 37,41
PR31 100_0402_1%
1 2 +3VALW
PR29 100K_0402_5%
1 2 BATT_TEMPA 37
3
PR30 1K_0402_1% 3
PJ3
2 1
+CHGRTC 2 1 +3VLP
JUMP_43X39
VIN
2
@ PD3
RLS4148_LL34-2
RTC Battery
VS_N_001
1
@ PD4
LL4148_LL34-2 PBJ1
BATT+ 2 1
+
1
PR19 PR20
PQ5 68_1206_5% 68_1206_5% 2 1
TP0610K-T1-E3_SOT23-3 - + +RTCBATT
2
N1 3 1
VS
Must close PBJ1
1
LOTES_AAA-BAT-054-K01
1
PC12 CONN@
PR23 PC11 0.1U_0603_25V7K
100K_0402_1% 0.22U_0603_25V7K
2
4
Change RTC For Cost Down 4
2
1
PQ106 D
2
G SI1304BDL-T1-E3_SC70-3
S
3
PR103 PR104
1 1 2 1 2 1
1M_0402_5% 3M_0402_5%
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
7 2 2 7 7 2
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6
2200P_0402_50V7K
6 3 3 6 2 3 6 3
0.1U_0402_25V6
1
5 5 5
PC111
PC101
1
1
0_0402_5%
0.01U_0402_50V7K
PC129
PC130
PC105
PC104
PC103
PC102
@ PR105
0_0402_5%
VIN
PC110
PR106
4
PC114
2
2
@
PC112
2
1
2
3
2
@
0.1U_0402_25V6
2
PD101
2
BQ24725_ACDRV_1 BAS40CW_SOT323-3
1
BQ24725_BATDRV 1 2BQ24725_BATDRV_1
PC115
0.047U_0402_25V7K PR107
1 1
10_1206_1%
1 2 4.12K_0603_1%
PC116
PR110
PC113 1 2
0.1U_0402_25V6
5
0_0603_5%
PR111
PD102 PQ104
0.1U_0603_25V7K
2
BQ24725_VCC
RB751V-40_SOD323-2 SIS412DN-T1-GE3_POW ERPAK8-5
1
2 2
PC117
BQ24725_ACP
BQ24725_BST 2
BQ24725_REGN2
1 2DH_CHG1
4
4.12K_0603_1%
4.12K_0603_1%
PC118 PR125
BQ24725_LX
2
1
1 2 DH_CHG BATT+
PR108
PR109
0_0402_5%
DH_CHG
PL101
1U_0603_25V6K PC119 2.2UH_ETQP3W2R2WFN_8.5A_20% PR102
3
2
1
0.02_1206_1%
BQ24725_ACN
1 2
BQ24725_LX 1 2 CHG 1 4
2
1U_0603_25V6K
5
6
7
8
20
19
18
17
16
2 3
PU101
2200P_0402_50V7K
0.01U_0402_50V7K
CSON1
CSOP1
1
680P_0402_50V7K 4.7_1206_5%
PQ105
VCC
PHASE
HIDRV
BTST
REGN
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
PR114
21 AO4468L_SO8
0.1U_0402_25V6
0.1U_0402_25V6
PAD
PC108
PC109
PC120
PC106
PC107
1
1
1 15 DL_CHG 4
ACN LODRV @
PC121
PC122
2
2
2 14 @
ACP GND PR115
3
2
1
2
1
BQ24725RGRR_VQFN20_3P5X3P5 10_0603_1%
PC123
BQ24725_CMSRC 3 13 SRP1 2 CSOP1
CMSRC SRP
1
PR116
2
6.8_0603_5%
BQ24725_ACDRV 4 12 SRN1 2 CSON1 @
2
ACDRV SRN
SDA
SCL
ILIM
to SE025104K80 (2011-02-22)
1 2 +3VALW
+3VL
6
10
3 3
PR126 10K_0402_1%
PR119
BQ24725_ILIM 1 2
0.01U_0402_25V7K
1 2
19,37 ACIN
100K_0402_1%
PR118 10K_0402_1% 210K_0402_1%
PC125
PR121
1
BQ24725_ACDET
VIN 1 2
154K_0402_1%
2
PR120
2
1
255K_0402_1%
PR122
2
Vin Dectector
0.1U_0402_25V6
66.5K_0402_1%
EC_SMB_CK1 37,40
1
100_0402_5%
PR123
PC126
H-->L 17.23V
PR124
EC_SMB_DA1 37,40
2
L--> H 17.63V
2
PC127
1
2 1 ADP_I 37,40
ILIM and external DPM 100P_0402_50V8J
3.97A
Please locate the RC
4 4
Near EC chip
2011-02-22
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-CHARGER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS QML70 LA-8371P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: W ednesday, October 19, 2011 Sheet 41 of 53
A B C D
A B C D E
2VREF_51125
1
PC308
1 1U_0603_16V6K 1
2
PR301 PR305
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
PR302 PR306
B+ B++
20K_0402_1% 20K_0402_1%
FB_3V FB_5V 1 B++
PL301 1 2 2
HCB2012KF-121T50_0805
1 2 +3VLP
ENTRIP2
ENTRIP1
PR303 PR307
2200P_0402_50V7K
2200P_0402_50V7K
10U_0805_25V6K
0.1U_0402_25V6
0.1U_0402_25V6
4.7U_0805_25V6-K
133K_0402_1% 174K_0402_1%
680P_0603_50V7K
1 2 1 2
1
1
PC309
PC310
PC304
PC311
PC312
PC306
1
PC322
1
PU301
2
5
ENTRIP2
FB2
TONSEL
FB1
ENTRIP1
REF
2
1
@ PC313
4 10U_0805_6.3V6M 25 PQ305
PQ303 P PAD SIS412DN-T1-GE3_POWERPAK8-5
2
SIS412DN-T1-GE3_POWERPAK8-5
2
0_0402_5%
7 VO2 VO1 24 4
1
2
3
0_0402_5%
PR318
PC314 8 23 PR309 PC315
VREG3 PGOOD
PR323
2 0.1U_0402_10V7K PR308 2.2_0402_5% 0.1U_0402_10V7K 2
1 2 BST1_3V 1 2 BST_3V 9 22 BST_5V 1 2 BST1_5V 1 2
3
2
1
2.2_0402_5% BOOT2 BOOT1
PL303 UG_3V 10 21 UG_5V PL305
1
4.7UH_ETQP3W4R7WFN_5.5A_20% UGATE2 UGATE1 2.2UH_ETQP3W2R2WFN_8.5A_20%
2 1 LX_3V 11 20 LX_5V 1
<BOM Structure> 2 +5VALWP
+3VALWP PHASE2 PHASE1
8
7
6
5
5
LG_3V 12 19 LG_5V
LGATE2 LGATE1
PQ306
SKIPSEL
1
1
FDMC7692S_MLP8-5
4.7_1206_5%
4.7_1206_5%
150U_V_6.3VM_R18
150U_V_6.3VM_R18
VREG5
PR312
PR313
1 PR314 1
GND
VIN
499K_0402_1%
NC
EN
PC303
PC305
+ 4 1 2 4 +
B++ SPOK 37,40
@ @
1 SNUB_3V 2
13
14
15
16
17
18
SNUB_5V 2
RT8205LZQW(2)_WQFN24_4X4
2 EN0 2
PQ304
1
2
3
3
2
1
680P_0402_50V7K
AO4468L_SO8 VL
1
680P_0402_50V7K
1
PC316
PC317
PR315
95.3K_0402_1% PC320
1U_0603_10V6K
2
2
1
@ @
PC318
4.7U_0805_10V6K
2
1
B++
PC319
2
0.1U_0603_25V7K
ENTRIP1
ENTRIP2
3
2VREF_51125 3
6
D D
PQ307A 2 N_3_5V_001 5 PQ307B
SSM6N7002FU_US6 G G SSM6N7002FU_US6
S S +3VLP +3VL
1
PJP302
2 1
PAD-OPEN 2x2m
PR322
100K_0402_1% PR317
1 2 100K_0402_5%
36,37 EC_ON PR321 1 2 VL
0_0402_5%
1
1 2 PJP305
37 MAINPWON PQ308
+5VALWP 1 2 +5VALW (5A,200mils ,Via NO.= 10)
DRC5115E0L_SOD323-3
4.7U_0805_25V6-K
@ PR319
+3VALWP
1 2 +3VALW (4A,120mils ,Via NO.= 8)
1
100K_0402_1%
1
PR320
PC321
PAD-OPEN 4x4m
3
2
@
2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-3.3VALWP/5VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom QML70 LA-8371P 0.01
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, October 19, 2011 Sheet 42 of 51
A B C D E
5 4 3 2 1
D D
PL402
PU401 PL401
4
HCB1608KF-121T30_0603 1UH_FMJ-0630T-1R0 HF_11A_20%
1 2 10 2 LX_1.8V 1 2
+5VALW
PG
PVIN LX +1.8VSP
22P_0402_50V8J
9 PVIN LX 3
1
680P_0603_50V7K 4.7_1206_5%
1
1
PC404
PC403 8 SVIN
PR403
22U_0805_6.3V6M PR401
6 20K_0402_1%
2
2
FB
22U_0805_6.3V6M
22U_0805_6.3V6M
C C
5
1 2
2
EN
1
NC
NC
TP
PC401
PC402
FB=0.6Volt
PC406
PR404 200K_0402_1%
11
2
1 2 EN_1.8V
2
20,26,49 VGA_PWR_ON
0.1U_0402_10V7K
@ PD401
2
1M_0402_5%
PC405
SY8033BDBC_DFN10_3X3
1
PR405
ISS355_SOD323-2
1 2
FB_1.8V
2
1
1
PR402
10K_0402_1%
2
B PJP401 B
+1.8VSP 2 1 +1.8VSG
2 1
@ JUMP_43X118
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.8VP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS QML70 LA-8371P 0.01
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, October 19, 2011 Sheet 43 of 51
5 4 3 2 1
5 4 3 2 1
0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
PL502
HCB1608KF-121T30_0603 OCP Current 0.9A
D B+ 1 2 1.5V_B+ D
PR504
BST_1.5V 1 2 BOOT_1.5V +1.5V
2.2_0402_5%
680P_0603_50V7K
2200P_0402_50V7K
10U_0805_25V6K
0.1U_0402_25V6
4.7U_0805_25V6-K
PR511
DH_1.5V_1 1 2 DH_1.5V +0.75VSP
1
1
PC516
0_0402_5%
0.22U_0402_10V6K
PC504
PC505
PC502
PC503
2
SW _1.5V
PC506
10U_0805_6.3V6K
10U_0805_6.3V6K
10U_0805_6.3V6K
2
2
@
1
@
PC507
PC508
PC517
1
5
DL_1.5V
16
17
18
19
20
PU501
2
@
VLDOIN
PHASE
UGATE
BOOT
VTT
PAD 21
4 15 LGATE VTTGND 1
PQ501 PR505 14 2
PL501 SIS412DN-T1-GE3_POW ERPAK8-5 20K_0402_1% PGND VTTSNS
1
2
3
1UH_VMPI0703AR-1R0M-Z01_11A_20% 1 2CS_1.5V
2 1 13 3
+1.5VP PC509 CS RT8207MZQW _W QFN20_3X3 GND
5
1U_0603_10V6K
1 2 12 4 VTTREF_1.5V
PR507 VDDP VTTREF
330U_D2_2.5VY_R15M
1 5.1_0603_5%
C
+
1 2 VDD_1.5V 11 VDD VDDQ 5 +1.5VP C
PGOOD
@ PR506
PC501
1
4.7_1206_5%
TON
+5VALW
SNUB_+1.5VP
PQ502 PC511
FB
S5
S3
2
1
2 FDMC7692S_MLP8-5 0.033U_0402_16V7K
2
PC510
1
2
3
10
6
1U_0603_10V6K
+5VALW
2
PR501
1
10.2K_0402_1%
@ PC512 FB_1.5V 2 1 +1.5VP
TON_1.5V
680P_0402_50V7K
2
2
PR503
S5 L off off
1
887K_0402_1% PR502 PC513
S3 L off on PR508 1.5V_B+ 1 2 10K_0402_1% .1U_0402_16V7K
0_0402_5%
S0 H on on
2
1 2 EN_1.5V
37,39 SYSON
1
Note: S3 - sleep ; S5 - power off
EN_0.75VSP
1 @ PC514
0.1U_0402_10V7K
B B
2
PR510
0_0402_5%
PJP501
2 1
1 2 37,39 SUSP#
PAD-OPEN 4x4m
1
PJP502
1 2 +1.5V (9A,360mils ,Via NO.= 18) @ PC515
+1.5VP
0.1U_0402_10V7K
2
PAD-OPEN 4x4m
PJP503
A A
D D
PL801
SY8036DBC_DFN10_3X3 PL802
4
+5VALW HCB1608KF-121T30_0603 PU801 0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 2 1.1V_B+ 10 PVIN 2 LX_+1.1V 1 2
PG
LX +1.1VALWP
9 PVIN LX 3
4.7_1206_5%
1
1
@ PC801 PC802 8 SVIN
PR802
22U_0805_6.3V6M
22U_0805_6.3V6M 6 FB_+1.1V
2
FB
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
5
2
EN
1
SS
TP
LX
PC803
PC804
PC805
PC806
PR801
11
2
1 2 EN_1.1V
SNUB_+1.1V
37 FCH_1.1PWR_EN
0.1U_0402_10V7K
0_0402_5%
47K_0402_5%
PC807
C C
PR804
1
PR803
ISS355_SOD323-2
1 2 2 1
@
2
@ PD801 @ 2
8.45K_0402_1%
680P_0603_50V7K
PC809
PC808
2
1
2 1
PR805
22P_0402_50V8J
+1.1VALWP
10K_0402_1%
2
PJP801
+1.1VALWP
1 2
Iocp=4.94A
+1.1VALWP +1.1VALW
PAD-OPEN 4x4m (6A,240mils ,Via NO.= 12)
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.1VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS QML70 LA-8371P 0.01
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, October 19, 2011 Sheet 45 of 51
5 4 3 2 1
5 4 3 2 1
PL701
HCB1608KF-121T30_0603
+1.2VSP_B+ 2 1
B+
2200P_0402_50V7K
10U_0805_25V6K
0.1U_0402_25V6
1
1
PC703
PC702
PC704
2
2
5
D PQ701 D
PR702
PC706
2.2_0603_5% 4
1 2 1 2
PU701 0.1U_0603_25V7K
1 10 BST_+1.2VSP PR711 SIS412DN-T1-GE3_POW ERPAK8-5
3
2
1
PGOOD VBST 0_0402_5%
PR703
1 2 TRIP_+1.2VSP 2 TRIP DRVH 9 UG_+1.2VSP 1 2 PL702
27.4K_0402_1% 1UH_ETQP3W 1R0W FN_11.8A_20%
PR701 EN_+1.2VSP 3 8 SW _+1.2VSP 1 2
37,39 VLDT_EN
0_0402_5% EN SW
+1.2VSP
1 2 FB_+1.2VSP 4 7 +1.2VSP_5V
VFB V5IN
+5VALW
2
RF_+1.2VSP LG_+1.2VSP
47K_0402_1%
5 6
0.1U_0402_16V7K
RF DRVL
1
1
PQ702
PR710
1
@ PC701
11
330U_D2_2.5VY_R15M
TP PC707 @ PR704 +
PC708
FDMC7692S_MLP8-5
2
2
@ PR705 2
4
470K_0402_1%
1
@ PC709
2
1000P_0603_50V7K
3
2
1
2
C @ @ C
PC710 PR706
2 1 2 1
PJP701 +1.2VS
PR707 1000P_0402_50V7K 1.2K_0402_1% +1.2VSP 2 2 1 1
7.15K_0402_1% @ JUMP_43X118
2 1
+1.2VSP
Iocp=13A
2
PR708
10K_0402_1%
1
B B
PU702
APL5508-25DC-TRL_SOT89-3
+3VS PJP702
2 IN OUT 3 +2.5VSP
+2.5VSP 2 1 +2.5VS
2 1
1
GND @ JUMP_43X39
4.7U_0805_6.3V6K
1
1
@ PR709
PC712
1 (0.38A,20mils ,Via NO.=1)
PC711 10K_1206_5%
1U_0603_10V6K
2
2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.2VSP/+2.5VSP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS QML70 LA-8371P 0.01
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: W ednesday, October 19, 2011 Sheet 46 of 51
5 4 3 2 1
A B C D E
PL201
@PR202
@ PR202 @ PC202 HCB2012KF-121T50_0805
2K_0402_1% 330P_0402_50V7K CPU_B+ 1 2 B+
2 1 1 2 PL205
100U_25V_M
100U_25V_M
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PR204 PR205 PC203 HCB2012KF-121T50_0805
MDV1525URH_PDFN33-8-5
MDV1525URH_PDFN33-8-5
PR203
PQ201
PQ207
0.1U_0603_25V7K
+APU_CORE_NB 3.57K_0402_1% 137K_0402_1% 390P_0402_50V7K 1 1 1 2
PC299
1 2 1 2 1 2 1 2
1
PC206
PC207
PC208
PC209
PC201
PR206 PC204 PR243 + +
2
10_0402_1% 0_0402_5% 1000P_0402_50V7K PC205 0_0603_5%
2
1 2 1 2 1 2 1 2 @ PR208 UGATE1 1 2 4 4 @
2
PR207 32.4K_0402_1% 2 2
8 APU_VDDNB_SEN @ PC210 100P_0402_50V8J PHASE1
301_0402_1% PR209
1 2
1
2.2_0603_5% 0.36UH_ETQP4LR36WHC_24A_20%
3
2
1
3
2
1
330P_0402_50V7K BOOT1 1 2 1 2 PL202 1 4 +APU_CORE
4.7_1206_5%
1 1
VSUM+_NB PC211 2 3
5
0.22U_0603_25V7K PR213 PR214
1
1
PQ202
10K_0402_1% 10K_0402_1%
MDU1512RH 1N POWERDFN56-8
PR212
0.1U_0402_25V6
0.047U_0402_16V7K
ISEN11 2 1 2 ISEN2
1
1
11K_0402_1%
PC212
2.61K_0402_1%
680P_0603_50V7K
PC213
PR210 PR215
PR211
LGATE1 4 3.65K_0402_1%
1 2
1 2
VSUM+1 2
PC214
2
PH202 PR216
10K_0402_5%_ERTJ0ER103J 1_0402_1%
3
2
1
2
PR217 VSUM-1 2
649_0402_1%
2
VSUM-_NB 1 2
1
2
PC215 @ PR218 @ PC216 PR219 CPU_B+
0.1U_0402_25V6 1 2 1 2 41.2K_0402_1%
2
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
5
5
100_0402_1% 220P_0402_50V7K
MDV1525URH_PDFN33-8-5
MDV1525URH_PDFN33-8-5
1
PQ208
PQ203
1
PC217
PC218
PC219
PR263
FCCM_NB
10K_0402_1% PR261
1 2 0_0603_5%
2
UGATE2 1 2 4 4
PHASE2
48 PR220
47
46
45
44
43
42
41
40
39
38
37
PU201 2.2_0603_5% 0.36UH_ETQP4LR36WHC_24A_20%
3
2
1
3
2
1
PR222 BOOT2 1 2 1 2 PL203 1 4
ISEN1_NB
ISUMP_NB
ISUMN_NB
VSEN_NB
FB_NB
COMP_NB
PGOOD_NB
FCCM_NB
PWM2_NB
LGATEX
PHASEX
UGATEX
+APU_CORE
4.7_1206_5%
PR221 27.4K_0402_1%
2 +5VS PC221 2
1 2 1 2 2 3
5
1 36 PR226 0.22U_0603_25V7K PR224 PR225
ISEN2_NB BOOTX
1
0_0603_5% CPU_B+
PQ204
9.76K_0402_1% PH201 10K_0402_1% 10K_0402_1%
MDU1512RH 1N POWERDFN56-8
PR223
PC222 2 1 2 35 1 2 ISEN21 2 1 2 ISEN1
1000P_0402_50V7K 470K_0402_5%_TSM0B474J4702RE NTC_NB VIN
680P_0603_50V7K
1 2 3 34 BOOT2 PC224 PR229
IMON_NB BOOT2 0.22U_0603_50V7K LGATE2 3.65K_0402_1%
4
1 2
2PR227 1 1 PR228 2 4 33 UGATE2 VSUM+1 2
2
8 APU_SVC SVC UGATE2
PC223
107K_0402_1% 0_0402_5%
1 PR231 2 5 32 PHASE2 PR230
8,37 H_PROCHOT#_EC 0_0402_5% VR_HOT_L PHASE2 1_0402_1%
3
2
1
2
1 PR232 2 6 31 LGATE2 +5VS VSUM-1 2
PR260 8 APU_SVD SVD LGATE2 CPU_B+
0_0402_5% ISL6277HRTZ-T_TQFN48_6X6
+3VS 1 2 +1.5VS 1 PR233 2 7 30 PR201
0_0402_5% VDDIO VDDP 1_0603_5%
2
100K_0402_1% 1 PR234 2
PAD-OPEN 4x4m
8 29 1 2
8 APU_SVT SVT VDD
PJP201
0_0402_5%
PC225 1 PR235 2 9 28 PWM_Y
ENABLE PWM_Y
1
37 VR_ON
1U_0603_16V6K
PC226
1000P_0402_50V7K 0_0402_5% PC227
1 2 1 PR236 2 10 27 LGATE1 1U_0603_16V6K
13 APU_PWRGD_L 0_0402_5% PWROK LGATE1
1
2PR237 1 11 26 PHASE1 NB_B+
107K_0402_1% IMON PHASE1
10U_0805_25V6K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
1 2 1 PR239 2 12 25 UGATE1
NTC UGATE1
5
PGOOD
27.4K_0402_1%
MDV1525URH_PDFN33-8-5
MDV1525URH_PDFN33-8-5
BOOT1
ISUMN
ISUMP
COMP
ISEN3
ISEN2
ISEN1
PQ205
PQ209
VSEN
PR238 PH203
RTN
1
FB2
PC228
PC229
PC230
9.76K_0402_1% 2 1
FB
TP
470K_0402_5%_TSM0B474J4702RE PR262
+3VS 0_0603_5%
13
14
ISEN1 15
16
17
18
19
20
21
22
23
24
49
2
+5VS 1 2 4 4
PU202
1
0_0402_5% 1 8
BOOT1
3
2
1
4.7_1206_5% 3
2
1
BOOT FCCM
0.22U_0402_16V7K
0.22U_0402_16V7K
PC233
@ 10K_0402_1% PWM_Y 3 6
2
PWM VCC
1
PC232
1 2 PC234 0.22U_0603_25V7K 2 3
5
VGATE 14,37 4 5
1
GND LGATE
1
1U_0603_16V6K
PQ206
PR242
VSUM- ISL6208BCRZ-T_QFN8_2X2
MDU1512RH 1N POWERDFN56-8
680P_0603_50V7K
PC235 FCCM_NB PR244
VSUM+ 1 2 4 3.65K_0402_1%
1 2
VSUM+_NB
1 2
1
PC238
10P_0402_50V8J
0.22U_0402_10V6K
0.022U_0402_16V7K
PR248
1
1
11K_0402_1%
PC236
3
2
1
2
PC239
PR245 1 2 1 2 1 2 VSUM-_NB
1 2
PR246
1 2
330P_0402_50V8J
PR251 @
590_0402_1% 2.74K_0402_1% 137K_0402_1% 390P_0402_50V7K
2
VSUM- 1 2
2
@ PR252
1
2K_0402_1% @PR253
@ PR253
2
2 1
0.01U_0402_50V7K
1
100_0402_1% 820P_0402_50V7K
1
@ PC246
PR255 PR256 680P_0402_50V7K
1
4 0_0402_5% 0_0402_5% 4
PR257 PR258
2
1 2 1 2 +APU_CORE
10_0402_5% 10_0402_5%
8 APU_VDD_RUN_FB_L APU_VDD_SEN 8
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/29 Deciphered Date Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+CPU_CORE/VDDNBP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom QML70 LA-8371P 0.01
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, October 19, 2011 Sheet 47 of 51
A B C D E
A
B
C
D
PC273 PC257 PC247
0.22U_0402_16V7K 22U_0805_6.3V6M 22U_0805_6.3V6M
2 1 2 1 2 1
2
1
+
PC268
330U_D2_2V_Y
PC274
0.22U_0402_16V7K
2 1
+APU_CORE
+APU_CORE
5
5
PC258 PC248
22U_0805_6.3V6M 22U_0805_6.3V6M
2 1 2 1
PC277
2
1
+
+APU_CORE
0.01U_0402_50V7K
PC269 2 1
330U_D2_2V_Y
Local
@
PC263 PC261 PC249
PC278 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
0.01U_0402_50V7K 2 1 2 1 2 1
2 1
2
1
+
PC270
330U_D2_2V_Y PC279
0.01U_0402_50V7K
2 1 @ PC264 PC262 PC250
22U_0805_6.3VAM 22U_0805_6.3V6M 22U_0805_6.3V6M
2 1 2 1 2 1
PC280
180P_0402_50V8J
2 1
2
1
+
PC271
330U_D2_2V_Y
@
4
4
PC275 PC252
+VGA_CORE
PC253
PC276 22U_0805_6.3V6M
PC957 PC947 PC937 PC924 0.22U_0402_16V7K 2 1
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 2 1
Issued Date
2 1 2 1 2 1 2 1 PC254
+VGA_CORE
22U_0805_6.3V6M
PC282 2 1
PC958 PC948 PC938 PC925 180P_0402_50V8J
Security Classification
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M PC255
+VDDC
2 1
+APU_CORE_NB
2 1 2 1 2 1 2 1 22U_0805_6.3V6M
2 1
3
3
PC283
PC959 PC949 PC969 PC926 180P_0402_50V8J PC256
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 2 1 10U_0805_6.3V6K
2 1 2 1 2 1 2 1 2 1
@
PC284 PC260
PC960 PC950 PC940 PC928 180P_0402_50V8J 22U_0805_6.3V6M
1U_0402_6.3V6K 1U_0402_6.3V6K 1U_0402_6.3V6K 10U_0603_6.3V6M 2 1 2 1
2011/07/29
2 1 2 1 2 1 2 1
2 1 2 1 2 1 2 1
Deciphered Date
PC266
330U_D2_2V_Y
2 2 1 1
PC921 PC934
2
1
+
10U_0603_6.3V6M 1U_0402_6.3V6K
@
2 1 2 1 PC267
330U_D2_2V_Y
PJP902
2
2
+APU_CORE_NB
PC922 PC939
10U_0603_6.3V6M 1U_0402_6.3V6K
JUMP_43X79
2 1 2 1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+VGA_CORE
PC930 PC935
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
10U_0603_6.3V6M 1U_0402_6.3V6K
Local
2 1 2 1
PC954
1U_0402_6.3V6K
2 1
A3
Size
Title
Date:
PC968
1U_0402_6.3V6K
2 1
PC956
1U_0402_6.3V6K
2 1
+VDDCI
Document Number
PC936
1U_0402_6.3V6K
2 1
W ednesday, October 19, 2011
PC967
1U_0402_6.3V6K
2 1
1
1
Sheet
QML70 LA-8371P
PC972
1U_0402_6.3V6K
2 1
48
PC973
+VDDCI
of
1U_0402_6.3V6K
Compal Electronics, Inc.
2 1
+VDDCI
51
PROCESSOR DECOUPLING
Rev
0.01
A
B
C
D
A B C D
PL901
HCB2012KF-121T50_0805
1 2 VGA_B+
B+
10U_0805_25V6K
10U_0805_25V6K
4.7U_0805_25V6-K
1
0.1U_0402_25V6
2200P_0402_50V7K
PC901
PC902
1
PC904
PC905
PC903
2
5
MDV1525URH_PDFN33-8-5
PQ902
MDV1525URH_PDFN33-8-5
+3VS
1 1
PQ901
2
PR902
10K_0402_1% 4 4
1
PU901 PR904 PC906
1 10 BST_VGA 1 2BST1_VGA 1 2
13,20 VGA_PW RGD
3
2
1
3
2
1
PGOOD VBST 2.2_0603_5%
1 PR9032TRIP_VGA 2 9 DH_VGA 2 1 0.1U_0603_25V7K PL902 +VGA_CORE
73.2K_0402_1% TRIP DRVH PR905 0_0603_5% 0.36UH_PDME104T-R36MS0R825_37A_20%
1 PR906 2 EN_VGA 3
EN SW 8 LX_VGA 1 2
20,26 1.5_VDD_PW REN PR901
1
0_0402_5% FB_VGA 4 7 V5IN_VGA 1 2
0.1U_0402_16V7K
VFB V5IN +5VALW
5
0_0603_5% PR907
PC907
MDU1512RH 1N POWERDFN56-8
MDU1512RH 1N POWERDFN56-8
0.1U_0402_10V7K
5 6 DL_VGA PQ903 PQ904 4.7_1206_5% 1 1 1 1
330U_D2_2V_Y
330U_D2_2V_Y
330U_D2_2V_Y
330U_D2_2V_Y
2
RF DRVL
1
RF_VGA
2
@ + + + +
PC974
PC910
PC919
PC920
PC984
11
2
TP
2
1SNUB_VGA
TPS51212DSCR SON 10P 4 4
1
2 2 2 2
2
PC909
2.2U_0603_6.3V6K
3
2
1
3
2
1
PR908 PC911
470K_0402_1% 680P_0402_50V7K
2
PR919
2 PR909 2
1 2 +VGA_CORE1 2 1 GCORE_SEN 22
23.7K_0402_1%
100_0402_1%
35.7K_0402_1%
5.1K_0402_1%
2
PR911
PR910
+3VSG
+3VSG
17.8K_0402_1%
FB1_VGA1
FB0_VGA 1
2
2
PR912 @ @ PR913
10K_0402_1%
10K_0402_1%
2
@ PR915
PR914
5.1K_0402_1%
1
1
D
1
19 GPU_VID1 PR917
SSM3K7002FU_SC70-3
D
1
19 GPU_VID0
PQ905
2GPU_VID1_1 1 2 5.1K_0402_1%
0.1U_0402_16V7K
1
2
G 2 GPU_VID0_1 1 2
1
S @ PR916 G
0.1U_0402_16V7K
3
2
10K_0402_5%
PC912
S
1
@ PQ906 @ PR918
PC913
2
10K_0402_5%
1
@ SSM3K7002FU_SC70-3
1
Rtrip = 73.2K, OCP = 34.42A
Rrf = 470K, FSW = 290KHz
+5VALW
3 3
1
PC914 +1.5V
1U_0402_6.3V6K
2
PR924 4.53K 3K
1
PR920 PC915
@ PD901 0_0402_5% 4.7U_0805_6.3V6K
6
PU902
2
RB751V-40_SOD323-2 5
VCNTL
2
VIN
For Whistler (Thames) 1 2 7 POK
4 +VGA_PCIEP
1/2Delta I=4.05A VOUT
Vtrip=36.5K*10uA=0.365V PR921
VOUT 3
1
40.2K_0402_1%
22U_0805_6.3V6M
Iocpmin=0.365V/(8*1.6m)+1/2Delta I=28.51A+4.05A VGA_PW R_ON
PC917
20,26,43 VGA_PW R_ON 1 2 8 EN FB 2
1
=32.56A PR922
0.1U_0603_25V7K
GND
2
1
1.15K_0402_1%
PC918
VIN 9
PR923
2
PR925 47K_0402_5% APL5912-KAC-TRL_SO8
2
1K_0402_5%
2
PC916
2
1
Thames 0.01U_0402_25V7K
PR924
PJP901
GPU_VID0 Core Voltage Level 4.53K_0402_1%
4
+VGA_PCIEP 2 1 +1.0VSG
4
2
2 1
1 0.9V JUMP_43X79
@
0 1.0V
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/29 Deciphered Date 2012/07/29 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VGA_CORE
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS QML70 LA-8371P 0.01
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: W ednesday, October 19, 2011 Sheet 49 of 51
A B C D
V ersion Change L ist ( P. I. R . L ist ) for Pow er Circuit
R equest
P age# T itle D ate Issue D escription Solution D escription
O w ner
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
Base on GPU Reference schematic 0.02 22 Reserve pull-up / pull-down resistor 100ohm on GCORE_SEN 08/30 SR
1
D D
0.02 15 Modify Netname of SPI signal of U5 08/30 SR
2
0.02 26 Change Q91.2 from 1.5_VDDC_PWREN# to 1.5VSG_PWREN# 08/30 SR
3
4 These components are for VGA 0.02 26 Change BOM Structure of R349, R350, R354, R355, Q95, Q96 to PX@ 08/30 SR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW-PIR1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom QML70 LA-8371P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, October 19, 2011 Sheet 51 of 53
5 4 3 2 1
5 4 3 2 1
Item Fixed Issue Reason for change Rev. PG# Modify List Date Phase
13
14
15
16
17
B B
18
19
20
21
22
23
24
25
A A
26
27
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/07/29 Deciphered Date 2012/07/29 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW-PIR2
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom QML70 LA-8371P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, October 19, 2011 Sheet 52 of 53
5 4 3 2 1
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