CP2103

S I N G L E - C H I P USB T O UART B R I D G E

Single-Chip USB to UART Data Transfer Virtual COM Port Device Drivers
Integrated USB transceiver; no external resistors Works with existing COM Port PC applications
required Royalty-free distribution license
Integrated clock; no external crystal required Windows®98 SE/2000/XP
Integrated 1024-Byte EEPROM for vendor ID, product MAC OS-9
ID, serial number, power descriptor, release number, MAC OS-X
and product description strings
Linux 2.40
On-chip power-on reset circuit
On-chip voltage regulator: 3.3 V output USBXpress™ Direct Driver Support
USB Function Controller Example Applications
USB Specification 2.0 compliant; full-speed (12 Mbps) Upgrade of RS-232 legacy devices to USB
USB suspend states supported via SUSPEND pins Upgrade of RS-485 legacy devices to USB
Cellular phone USB interface cable
Asynchronous Serial Data BUS (UART) PDA USB interface cable
All handshaking and modem interface signals USB to RS-232 serial adapter
Data formats supported:
- Data bits: 5, 6, 7, and 8 Supply Voltage
- Stop bits: 1, 1.5, and 2 Self-powered: 3.0 to 3.6 V
- Parity: odd, even, mark, space, no parity USB bus powered: 4.0 to 5.25 V
Baud rates: 300 bps to 1 Mbits
I/O voltage: 1.8 V to VDD
576 Byte receive buffer; 640 byte transmit buffer
Hardware or X-On/X-Off handshaking supported Package
Four GPIO signals for status and control Lead free 28-pin QFN (5 x 5 mm)
Configurable I/O (1.8 V to VDD) using VIO pin
Ordering Part Number
Configurable I/O (VDD to 5 V) using external pull-up
CP2103-GM
RS-485 mode with bus transceiver control
Temperature Range: –40 to +85 °C

CP2103 GPIO_0
19
5
VIO 18
External GPIO_1 (to external circuitry
voltage supply for status and
17 control)
or direct GPIO_2
connection 4 16
to VDD GPIO_3
7
REGIN IN
Voltage
Regulator 9
OUT RST
(to external circuitry
12 for USB suspend
SUSPEND
6 3.3 V states)
VDD 11
SUSPEND

2
GND 1
RI
48 MHz
28
8 Oscillator DCD
VBUS
USB 27
DTR
CONNECTOR External RS-232
26
1 DSR transceiver or
VBUS 4 UART UART circuitry
2 D- USB USB Function 25
D- TXD
3 3 Transceiver Controller
D+ D+ 24
4 RXD
GND 640B 576B
1024B 23
TX RX RTS
EEPROM
6
5

Buffer Buffer 22
CTS

Figure 1. Example System Diagram

Preliminary Rev. 0.2 9/05 Copyright © 2005 by Silicon Laboratories CP2103

This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
CP2103

2 Preliminary Rev. 0.2

 CP2103
TA B L E O F C O N T E N TS

Section Page
1. System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3. Global DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
4. Pinout and Package Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
5. USB Function Controller and Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6. Asynchronous Serial Data Bus (UART) Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7. GPIO Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
8. Internal EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
9. Virtual Com Port Device Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
10. USBXpress™ Direct Driver Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
11. Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

Preliminary Rev. 0.2 3

CP2103
1. System Overview
The CP2103 is a highly-integrated USB-to-UART Bridge Controller providing a simple solution for updating
RS-232/RS-485 designs to USB using a minimum of components and PCB space. The CP2103 includes a USB
2.0 full-speed function controller, USB transceiver, oscillator, EEPROM, and asynchronous serial data bus (UART)
with full modem control signals in a compact 5 x 5 mm QFN-28 package (sometimes called “MLF” or “MLP”). No
other external USB components are required.
The on-chip EEPROM may be used to customize the USB Vendor ID, Product ID, Product Description String,
Power Descriptor, Device Release Number, and Device Serial Number as desired for OEM applications. The
EEPROM is programmed on-board via the USB allowing the programming step to be easily integrated into the
product manufacturing and testing process.
Royalty-free Virtual COM Port (VCP) device drivers provided by Silicon Laboratories allow a CP2103-based
product to appear as a COM port to PC applications. The CP2103 UART interface implements all RS-232/RS-485
signals, including control and handshaking signals, so existing system firmware does not need to be modified. The
device also features up to (4) GPIO signals that can be user-defined for status and control information. Support for
I/O interface voltages down to 1.8 V is provided via a VIO pin. In many existing RS-232 designs, all that is required
to update the design from RS-232 to USB is to replace the RS-232 level-translator with the CP2103. See
www.silabs.com for the latest application notes and product support information for CP2103.
An evaluation kit for the CP2103 (Part Number: CP2103EK) is available. It includes a CP2103-based USB-to-
UART/RS-232 evaluation board, a complete set of VCP device drivers, USB and RS-232 cables, and full
documentation. Contact a Silicon Labs’ sales representatives or go to www.silabs.com to order the CP2103
Evaluation Kit.

4 Preliminary Rev. 0.2

 CP2103
2. Absolute Maximum Ratings

Table 1. Absolute Maximum Ratings

Parameter Conditions Min Typ Max Units

Ambient temperature under bias –55 — 125 °C
Storage Temperature –65 — 150 °C
Voltage on any I/O Pin or RST with respect to GND –0.3 — 5.8 V
Voltage on VDD or VIO with respect to GND –0.3 — 4.2 V
Maximum Total current through VDD, VIO, and GND — — 500 mA
Maximum output current sunk by RST or any I/O pin — — 100 mA
Note: Stresses above those listed may cause permanent damage to the device. This is a stress rating only, and functional
operation of the devices at or exceeding the conditions in the operation listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods may affect device reliability.

3. Global DC Electrical Characteristics

Table 2. Global DC Electrical Characteristics

VDD = 2.7 to 3.6 V, –40 to +85 °C unless otherwise specified.

Parameter Conditions Min Typ Max Units

Supply Voltage (VDD) 3.0 3.3 3.6 V
Supply Voltage (VIO) 1.8 3.3 VDD V
Supply Current VDD = 3.3 V — 26 — mA
Supply Current in Suspend VDD = 3.3 V — 330 — µA
VIO Supply Current VBUS = 0 — 500 — µA
VDD = 0
VIO = 3.0 V
Specified Operating Temperature Range –40 — +85 °C

Preliminary Rev. 0.2 5

CP2103

Table 3. UART and Suspend I/O DC Electrical Characteristics

VIO = VDD = 2.7 to 3.6 V, –40 to +85 °C unless otherwise specified.

Parameters Conditions Min Typ Max UNITS

Output High Voltage (VOH) IOH = –10 µA VIO – 0.1 — —
IOH = –3 mA VIO – 0.7 — — V
IOH = –10 mA — VIO – 0.8 —
Output Low Voltage (VOL) IOL = 8.5 mA — — 0.6
V
IOL = 10 µA — — 0.1
Input High Voltage (VIH) 2.0 — — V
Input Low Voltage (VIL) — — 0.8 V
Input Leakage Current weak pull-ups enabled — 25 50 µA
weak pull-ups disabled — — ±1
Maximum Input Voltage Open drain, logic high (1) — — 5.8 V

Table 4. UART and Suspend I/O DC Electrical Characteristics (Low-Voltage Operation)

VIO = 1.8 V to 2.7 V, –40 to +85 °C unless otherwise specified.

Parameters Conditions Min Typ Max UNITS

Output High Voltage (VOH) IOH = TBD TBD — —
IOH = TBD TBD — — V
IOH = TBD — TBD —
Output Low Voltage (VOL) IOL = TBD — — TBD
V
IOL = TBD — — TBD
Input High Voltage (VIH) TBD — — V
Input Low Voltage (VIL) — — TBD V
Input Leakage Current TBD — TBD TBD µA
Maximum Input Voltage Open drain, logic high (1) — — TBD V

6 Preliminary Rev. 0.2

 CP2103
4. Pinout and Package Definitions

Table 5. CP2103 Pin Definitions

Name Pin # Type Description
VDD 6 Power In 3.0–3.6 V Power Supply Voltage Input.

Power Out 3.3 V Voltage Regulator Output. See Section 11.

VIO 5 Power In 1.8 V to VDD I/O Supply Voltage Input.
GND 2 Ground. Must be tied to ground.
SGND Ground. Must be tied to ground.
RST 9 D I/O Device Reset. Open-drain output of internal POR or VDD monitor. An
external source can initiate a system reset by driving this pin low for
at least 15 µs.
REGIN 7 Power In 5 V Regulator Input. This pin is the input to the on-chip voltage regu-
lator.
VBUS 8 D In VBUS Sense Input. This pin should be connected to the VBUS sig-
nal of a USB network. A 5 V signal on this pin indicates a USB net-
work connection.
D+ 3 D I/O USB D+
D– 4 D I/O USB D–
TXD 25 D Out Asynchronous data output (UART Transmit)
RXD 24 D In Asynchronous data input (UART Receive)
CTS 22* D In Clear To Send control input (active low)
RTS 23* D Out Ready to Send control output (active low)
DSR 26* D in Data Set Ready control input (active low)
DTR 27* D Out Data Terminal Ready control output (active low)
DCD 28* D In Data Carrier Detect control input (active low)
RI 1* D In Ring Indicator control input (active low)
SUSPEND 12* D Out This pin is driven high when the CP2103 enters the USB suspend
state.
SUSPEND 11* D Out This pin is driven low when the CP2103 enters the USB suspend
state.
NC 10, 13–15, These pins should be left unconnected or tied to VDD.
20–21
GPIO.3 16 D I/O User-configurable input or output.
GPIO.2 17 D I/O User-configurable input or output.
GPIO.1 18 D I/O User-configurable input or output.
GPIO.0 19 D I/O User-configurable input or output.
*Note: Pins can be left unconnected when not used.

Preliminary Rev. 0.2 7

CP2103

DCD

DSR

RXD
DTR

TXD

RTS

CTS
28

27

26

25

24

23

22
SGND

RI 1 21 NC

GND 2 20 NC

D+ 3 19 GPIO.0

D- 4
CP2103 18 GPIO.1
Top View
VIO 5 17 GPIO.2

VDD 6 16 GPIO.3
SGND
REGIN 7 15 NC
10

11

12

13

14
8

NC

SUSPEND

SUSPEND

NC

NC
VBUS

RST

Figure 2. QFN-28 Pinout Diagram (Top View)

8 Preliminary Rev. 0.2

 CP2103

Bottom View
Table 6. QFN-28 Package

10

11

12

13

14
8

9
Dimensions
L MM
7 15 MIN TYP MAX
A 0.80 0.90 1.00
6 16 A1 0 0.02 0.05
D2
A2 0 0.65 1.00
5 D2 17 A3 — 0.25 —
b

2 b 0.18 0.23 0.30

6xe
E2
4 18

E
D — 5.00 —
R
e

D2 2.90 3.15 3.35

3 19
E — 5.00 —
E2
2

E2 2.90 3.15 3.35

2 20
e — 0.5 —
1 21 L 0.45 0.55 0.65
DETAIL 1 N — 28 —
ND — 7 —
NE — 7 —
28

27

26

25

24

23

22

R 0.09 — —
6xe AA — 0.435 —
D BB — 0.435 —
CC — 0.18 —
Side View DD — 0.18 —
A2

e
A3

A1

DETAIL 1
AA
BB

CC
DD

Figure 3. QFN-28 Package Drawing

Preliminary Rev. 0.2 9

CP2103

Top View

0.50 mm

0.20 mm

0.20 mm

0.30 mm
0.85 mm

0.50 mm

0.10 mm
0.50 mm

0.35 mm
0.20 mm
b

Optional
GND
Connection

D2

D
L

E2
e

0.20 mm

0.30 mm

0.50 mm 0.35 mm

0.85 mm 0.10 mm

Figure 4. Typical QFN-28 Landing Diagram

10 Preliminary Rev. 0.2

 CP2103

Top View

0.50 mm

0.20 mm

0.20 mm

0.30 mm
0.85 mm

0.50 mm

0.10 mm
0.50 mm

0.35 mm
0.20 mm 0.60 mm

0.60 mm

0.70 mm 0.30 mm

0.20 mm
b

0.40 mm

D2

D
L
e

E2

0.20 mm

0.30 mm

0.50 mm 0.35 mm

0.85 mm 0.10 mm

Figure 5. Typical QFN-28 Solder Paste Diagram

Preliminary Rev. 0.2 11

CP2103
5. USB Function Controller and Transceiver
The Universal Serial Bus function controller in the CP2103 is a USB 2.0 compliant full-speed device with integrated
transceiver and on-chip matching and pull-up resistors. The USB function controller manages all data transfers
between the USB and the UART as well as command requests generated by the USB host controller and
commands for controlling the function of the UART.
The USB Suspend and Resume signals are supported for power management of both the CP2103 device as well
as external circuitry. The CP2103 will enter Suspend mode when Suspend signaling is detected on the bus. On
entering Suspend mode, the CP2103 asserts the SUSPEND and SUSPEND signals. SUSPEND and SUSPEND
are also asserted after a CP2103 reset until device configuration during USB Enumeration is complete.
The CP2103 exits the Suspend mode when any of the following occur: (1) Resume signaling is detected or
generated, (2) a USB Reset signal is detected, or (3) a device reset occurs. On exit of Suspend mode, the
SUSPEND and SUSPEND signals are de-asserted.
Both SUSPEND and SUSPEND temporarily float high during a CP2103 reset. If this behavior is undesirable, a
strong pulldown (10 kΩ) can be used to ensure SUSPEND remains low during reset. See Figure 6 for other
recommended options.

I/O Voltage

5
CP2103
V IO
1 µF
VDD
R1
4.7 kΩ Option 1
7
REGIN
C1 9
RST
1 µF
(to external circuitry
12
SUSPEND for USB suspend
states)
6 11
VDD SUSPEND
C4 R2
C2
4.7 µF 10 kΩ
0.1 µF
TANT 2
GND 1 Option 4
RI
Option 2
28
8 DCD External RS-232
VBUS
USB 27 transceiver or
DTR
CONNECTOR UART circuitry
26
1 DSR
VBUS
2 4 25
D- D- TXD
3
D+ 3 24
4 D+ RXD
GND
23
RTS
6
5

D1 D2 D3
Option 3 22
CTS

19
GPIO.0

18
GPIO.1 External
17 Application
GPIO.2
Circuitry
16
GPIO.3

Option 1: A 4.7 kΩ pull-up resistor can be added to increase noise immunity.

Option 2: A 4.7 µF tantalum capacitor can be added if powering other devices from the on-chip regulator.
Option 3: Avalanche transient voltage suppression diodes should be added for ESD protection .
Option 3: Use Littlefuse p/n SP0503BAHT or equivalent.
Option 4: 10 kΩ resistor to ground to hold SUSPEND low on initial power on or device reset.

Figure 6. Typical Connection Diagram

12 Preliminary Rev. 0.2

 CP2103
6. Asynchronous Serial Data Bus (UART) Interface
The CP2103 UART interface consists of the TX (transmit) and RX (receive) data signals as well as the RTS, CTS,
DSR, DTR, DCD, and RI control signals. The UART supports RTS/CTS, DSR/DTR, and X-On/X-Off handshaking.
The UART is programmable to support a variety of data formats and baud rates. The data format and baud rate
programmed into the UART is set during COM port configuration on the PC. The data formats and baud rates
available are listed in Table 7.

Table 7. Data Formats and Baud Rates

Data Bits 5, 6, 7, and 8
Stop Bits 1, 1.51, and 2
Parity Type None, Even, Odd, Mark, Space

Baud Rates2 300, 600, 1200, 1800, 2400, 4000, 4800, 7200, 9600, 14400, 16000, 19200,
28800, 38400, 51200, 56000, 57600, 64000, 76800, 115200, 128000,
153600, 230400, 250000, 256000, 460800, 500000, 576000, 9216003
Notes:
1. 5-bit only.
2. Additional baud rates are supported. See “AN205: CP210x Baud Rate Support”.
3. 7 or 8 data bits only.

7. GPIO Pins
The CP2103 supports (4) user-configurable GPIO pins for status and control information. More information
regarding the configuration and usage of these pins can be found in “AN144: CP210x Customization Guide” and
“AN223: Port Configuration and GPIO for CP210x” available on the Silicon Laboratories website.

8. Internal EEPROM
The CP2103 includes an internal EEPROM that may be used to customize the USB Vendor ID, Product ID,
Product Description String, Power Descriptor, Device Release Number, and Device Serial Number as desired for
OEM applications. Customization of the USB configuration data is optional. If the EEPROM is not programmed
with OEM data, the default configuration data shown in Table 8 is used. However, a unique serial number is
required for OEM applications in which it is possible for multiple CP2103-based devices to be connected to the
same PC.
The internal EEPROM is programmed via the USB. This allows the OEM's USB configuration data and serial
number to be written to the CP2103 on-board during the manufacturing and testing process. A stand-alone utility
for programming the internal EEPROM is available from Silicon Laboratories. A library of routines provided in the
form of a Windows® DLL is also available. This library can be used to integrate the EEPROM programming step
into custom software used by the OEM to streamline testing and serial number management during manufacturing.
The EEPROM has a typical endurance of 100,000 write cycles with a data retention of 100 years.
USB descriptors can be locked to prevent future modification.

Preliminary Rev. 0.2 13

CP2103

Table 8. Default USB Configuration Data

Name Value
Vendor ID 10C4h
Product ID EA60h
Power Descriptor (Attributes) 80h
Power Descriptor (Max. 32h
Power)
Release Number 0100h
Serial Number 0001 (63 characters maximum)
Product Description String “CP2103 USB to UART Bridge Controller” (126 characters maximum)

9. Virtual Com Port Device Drivers

The CP210x Virtual COM Port (VCP) device drivers allow a CP2103-based device to appear to the PC's
application software as an additional COM port (in addition to any existing hardware COM ports). Application
software running on the PC accesses the CP2103-based device as it would access a standard hardware COM
port. However, actual data transfer between the PC and the CP2103 device is performed over the USB. Therefore,
existing COM port applications may be used to transfer data via the USB to the CP2103-based device without
modifying the application. Contact Silicon Laboratories for the latest list of supported operating systems.
Note: Silicon Laboratories’ VCP device drivers are required for device operation and are only distributed as part of the CP2103
Evaluation Kit (Part Number: CP2103EK). Contact any of Silicon Lab’s sales representatives or go to www.silabs.com to
order the CP2103 Evaluation Kit. The CP210x drivers and programming utilities are subject to change without notice.
Subscription to the website "Auto Email Alert" system for automatic notification of updates and the use of the "Product
Update Registration" service is recommended.

10. USBXpress™ Direct Driver Support

The Silicon Laboratories USBXpress™ for CP210x Development Kit provides an alternate solution for interfacing
with CP2103 devices than using the Virtual COM port. No Serial Port protocol expertise is required. Instead, a
simple, high-level application program interface (API) is used to provide simpler CP2103 connectivity and
functionality.
The USBXpress for CP210x Development Kit includes Windows device drivers, Windows device driver installer
and uninstallers, and a host interface function library (host API) provided in the form of a Windows Dynamic Link
Library (DLL). The included device drivers and installation files support MS Windows 98SE/2000/XP.

11. Voltage Regulator

The CP2103 includes an on-chip 5 to 3 V voltage regulator. This allows the CP2103 to be configured as either a
USB bus-powered device or a USB self-powered device. These configurations are shown in Figure 7 and Figure 8.
When enabled, the 3 V voltage regulator output appears on the VDD pin and can be used to power external 3 V
devices. See Table 9 for the voltage regulator electrical characteristics.
Alternatively, if 3 V power is supplied to the VDD pin, the CP2103 can function as a USB self-powered device with
the voltage regulator disabled. For this configuration, it is recommended that the REGIN input be tied to the 3 V net
to disable the voltage regulator. This configuration is shown in Figure 9.
The USB max power and power attributes descriptor must match the device power usage and configuration. See
application note “AN144: CP210x Customization Guide” for information on how to customize USB descriptors for
the CP2103.
Note: It is recommended that additional decoupling capacitance (e.g., 0.1 µF in parallel with 1.0 µF) be provided on the REGIN
input.

14 Preliminary Rev. 0.2

 CP2103

Table 9. Voltage Regulator Electrical Specifications

–40 to +85 °C unless otherwise specified.

Parameter Conditions Min Typ Max Units

Input Voltage Range 4.0 — 5.25 V
Output Voltage Output Current = 1 to 100 mA* 3.0 3.3 3.6 V
VBUS Detection Input Threshold 1.0 1.8 4.0 V
Bias Current — 110 — µA
*Note: The maximum regulator supply current is 100 mA.

CP2103

VBUS

From VBUS VBUS Sense

REGIN
5 V In Voltage Regulator (REG0)

3 V Out

To 3 V VDD Device
Power Net Power Net

Figure 7. Configuration 1: USB Bus-Powered

CP2103

VBUS
From VBUS

VBUS Sense

From 5 V REGIN
5 V In Voltage Regulator (REG0)
Power Net

3 V Out

To 3V VDD Device
Power Net Power Net

Figure 8. Configuration 2: USB Self-Powered

Preliminary Rev. 0.2 15

CP2103

CP2103

VBUS
From VBUS

VBUS Sense

REGIN
5 V In Voltage Regulator (REG0)

3 V Out

From 3 V VDD Device

Power Net Power Net

Figure 9. Configuration 3: USB Self-Powered, Regulator Bypassed

16 Preliminary Rev. 0.2

 CP2103
Document Change List
Revision 0.1 to Revision 0.2
Updated “Linux 2.40” bullet on page 1.

Preliminary Rev. 0.2 17

CP2103
CONTACT INFORMATION
Silicon Laboratories Inc.
4635 Boston Lane
Austin, TX 78735
Tel: 1+(512) 416-8500
Fax: 1+(512) 416-9669
Toll Free: 1+(877) 444-3032
Email: [email protected]
Internet: www.silabs.com

The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice.
Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from
the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed fea-
tures or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty,
representation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
consequential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intend-
ed to support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where
personal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized
application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.

Silicon Laboratories, Silicon Labs, and USBXpress are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders

18 Preliminary Rev. 0.2