Professional Documents
Culture Documents
Mitsubishi Semiconductor Mitsubishi Semiconductor
Mitsubishi Semiconductor Mitsubishi Semiconductor
MITSUBISHI
SEMICONDUCTOR
SEMICONDUCTOR
<Dual-In-Line
<Dual-In-Line
Package
Package
Intelligent
Intelligent
Power
Power
Module>
Module>
PS22056
PS22056
TRANSFER-MOLD
TRANSFER-MOLDTYPE
TYPE
INSULATED
INSULATED
TYPE
TYPE
PS22056
INTEGRATED POWER FUNCTIONS
1200V/25A low-loss 4 th generation IGBT inverter bridge
for 3 phase DC-to-AC power conversion
APPLICATION
AC400V 0.2kW~3.7kW inverter drive for small power motor control.
30✕2.54(=76.2)
2.54±0.3
Heat sink side
1. VUFS 22. P
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
2. VUFB 23. U
3. VP1 24. V
27.4±0.5
4. UP 25. W
Type name , Lot No. 5. VVFS 26. NU
42.6±0.5
48.6±0.6
34±0.5
6. VVFB 27. NV
44±0.5
QR 7. VP1 28. NW
Code 8. VP
20.4±0.5
2-φ4.5±0.2
18.5±0.5
9. VWFS
10. VWFB
22 23 24 25 26 27 28
11. VP1
12. VPC
A 13. WP
8±0.3 10.16±0.3
14. VN1
67±0.3 15. VNC
79±0.5 16. CIN
17. CFO
18. FO
16.1±0.3
19. UN
20. VN
21. WN
(0.3)
(1.7)
(0.3)
8.2±0.5
(2)
(2.5)
Heat sink side
(2)
Detail : A
All external terminals are treated with lead free solder (ingredient : Sn-Cu) plating.
May 2005
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS22056
TRANSFER-MOLD TYPE
INSULATED TYPE
CBW+
CBW–
CBV+
CBU–
CBV–
CBU+
C1 : Tight tolerance, temp-compensated electrolytic type High-side input (PWM)
(5V line) (Note 1,2)
(Note : The capacitance depends on the PWM control C2
scheme used in the applied system.) C1
Input signal Input signal Input signal
C2 : 0.22~2µF R-category ceramic capacitor for noise filtering conditioning conditioning conditioning
DIP-IPM
Drive circuit Drive circuit Drive circuit
Inrush current
limiter circuit
P
AC line input
H-side IGBTS
U
V
(Note 4)
W
M
C
AC line output
Z
NU
(Note 8) NV L-side IGBTS
NW
N1 VNC CIN
Drive circuit
Z : ZNR (Surge absorber)
C : AC filter (Ceramic capacitor 2.2~6.5nF) Protection Control supply
Input signal conditioning Fo logic Under-Voltage
(Protection against common-mode noise) circuit
protection (UV)
(Note 7)
Low-side input (PWM) FO CFO
(5V line) (Note 1, 2) Fault output (5V line)
(Note 3, 5)
VNC VD
(15V line)
Note1: To prevent input signals oscillation, an RC coupling at each input terminal is recommended.
2: By virtue of integrating HVIC inside the module, direct coupling to MCU terminals without any opto-coupler or transformer isolation is possible.
3: Fo output is open drain type. The signal line should be pulled up to the positive side of a 5V supply with an approximate 10kΩ resistor.
4: The wiring between the power DC-link capacitor and the P/N1 terminals should be as short as possible to protect DIP-IPM against catastrophic high
surge voltage. For extra precaution, a small film type snubber capacitor (0.1~0.22µF, high voltage type) is recommended to mount closely to the
P and N1 terminals.
5: Fo output pulse width (t FO) should be determined by connecting external capacitor between CFO and VNC terminals. (Example : t FO=2.4ms(typ.)
at CFO=22nF)
6: High voltage (1200V or more) and fast recovery type (less than 100ns) diodes should be used for the bootstrap circuit.
7: It is recommended to insert a Zener diode (24V/1W) between each pair of control supply terminals to prevent surge destruction.
8: To prevent LVIC from surge destruction, it is recommended to mount a fast recovery type diode between VNC and NU, NV, NW terminals.
DIP-IPM
H-side IGBTS
U
V
W
L-side IGBTS
External protection circuit
Shunt
NU
N1 resistor A NV Collector current
(Note 1) NW waveform
R 0
C Drive circuit 2 tw (µs)
B CIN
Short Circuit Protective Function (SC) :
Protection circuit SC protection is achieved by sensing the L-side DC-Bus current (through the external
C VNC
(Note 2) shunt resistor) with a suitable filtering time (defined by the RC circuit).
Note1: In the recommended external protection circuit, please select the RC time When the sensed shunt voltage exceeds the SC trip-level, all the L-side IGBTs are turned
constant in the range 1.5~2.0µs. OFF and a fault signal (Fo) is output.
2: To prevent erroneous protection operation, the wiring of A, B, C should be Since the SC fault may be repetitive, it is recommended to stop the system and check the fault,
as short as possible. when the Fo signal is received.
May 2005
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS22056
TRANSFER-MOLD TYPE
INSULATED TYPE
TOTAL SYSTEM
Symbol Parameter Condition Ratings Unit
VD = 13.5~16.5V, Inverter part
VCC(PROT) Self protection supply voltage limit 800 V
(short circuit protection capability) Tj = 125°C, non-repetitive, less than 2 µs
TC Module case operation temperature (Note 2) –20~+100 °C
Tstg Storage temperature –40~+125 °C
60Hz, Sinusoidal, AC 1 minute, connection
Viso Isolation voltage 2500 Vrms
pins to heat-sink plate
Control terminals
Heat-sink
TC
Power terminals TC
May 2005
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS22056
TRANSFER-MOLD TYPE
INSULATED TYPE
THERMAL RESISTANCE
Limits
Symbol Parameter Condition Unit
Min. Typ. Max.
Rth(j-c)Q Junction to case thermal Inverter IGBT part (per 1/6 module) — — 1.28 °C/W
Rth(j-c)F resistance (Note 3) Inverter FWDi part (per 1/6 module) — — 1.70 °C/W
Rth(c-f) Contact thermal resistance Case to fin, (per 1 module) thermal grease applied — — 0.047 °C/W
Note 3: Grease with good thermal conductivity and long-term endurance should be applied evenly with about +100µm~+200µm on the con-
tacting surface of DIP-IPM and heat-sink.
May 2005
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS22056
TRANSFER-MOLD TYPE
INSULATED TYPE
+ – 3.25mm
Measurement location
Heat-sink side
–
+
Heat-sink side
May 2005
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS22056
TRANSFER-MOLD TYPE
INSULATED TYPE
VUFB DIP-IPM
VUFS P
HVIC1
VP1 VCC VB IGBT1 Di1
UP IN HO
COM VS U
VVFB
VVFS
HVIC2
VP1 VCC VB IGBT2 Di2
VP IN HO
COM VS V
VWFB
VWFS
HVIC3
VP1 VCC VB IGBT3 Di3
WP IN HO
VPC COM VS W
LVIC IGBT4
Di4
UOUT
UVNO NU
VN1 VCC
IGBT5
Di5
VOUT
VVNO NV
UN UN IGBT6
Di6
VN VN WOUT
WN WN
WVNO NW
Fo Fo
CIN
VNC GND
CFO
CFO CIN
May 2005
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS22056
TRANSFER-MOLD TYPE
INSULATED TYPE
Lower-arms control a6 a7
input
SC a4
a1
Output current Ic a8
SC reference voltage
Sense voltage of the
shunt resistor
CR circuit time
constant DELAY
Error output Fo a5
Control input
UVDr
Control supply voltage VD b1 UVDt b6
b3
b4
b2 b7
Output current Ic
Error output Fo
b5
May 2005
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS22056
TRANSFER-MOLD TYPE
INSULATED TYPE
Control input
UVDBr
Control supply voltage VDB c1 UVDBt c5
c3
c2 c4 c6
Output current Ic
10kΩ DIP-IPM
UP,VP,WP,UN,VN,WN
MCU
Fo
VNC(Logic)
Note : RC coupling at each input (parts shown dotted) may change depending on the PWM control scheme used in
the application and the wiring impedance of the application’s printed circuit board.
The DIP-IPM input signal section integrates a 2.5kΩ(min) pull-down resistor. Therefore, when using a external
filtering resistor, pay attention to the turn-on threshold voltage requirement.
NU Shunt resistor
NV
VNC NW Please make the wiring connection
of shunt resistor to GND as short as
Please insert fast
recovery type diode possible.
between VNC and
NU, NV, NW terminals.
May 2005
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS22056
TRANSFER-MOLD TYPE
INSULATED TYPE
COM VS U
C2 VVFB
C1 VVFS
HVIC2
VP1
VCC VB
C3
VP
IN HO
V
C2
COM VS M
VWFB
C1 VWFS
HVIC3
VP1
VCC VB
C3
WP
IN HO
MCU
VPC
COM VS W
LVIC
UOUT
VN1 UVNO NU
VCC
C3
5V line
VOUT
VVNO NV
UN
UN
VN
VN WOUT
WN
WN WVNO NW If this wiring is too
Fo long, short circuit
Fo might be caused.
CIN
VNC
GND CFO C
CFO CIN
C4(CFO )
R1 B
15V line
Shunt
C5 resistor
A N1
The long wiring of GND might generate noise If this wiring is too long, the SC level fluctuation
on input and cause IGBT to be malfunction. might be larger and cause SC malfunction.
Note 1 : To avoid malfunction, the wiring of each input should be as short as possible. (less than 2-3cm)
2: By virtue of integrating HVIC inside the module, direct coupling to MCU terminals without any opto-coupler or transformer isolation is possible.
3: Fo output is open drain type. The signal line should be pulled up to the positive side of a 5V supply with an approximate 10kΩ resistor.
4: Fo output pulse width (tFO) should be determined by connecting external capacitor C4 between CFO and VNC terminals. (Example :
tFO=2.4ms(typ.) at CFO=22nF)
5: Input signal is High-Active type. There is a 2.5kΩ (Min.) resistor inside IC to pull down each input signal line to GND.
When employing RC coupling circuits at each input, set up RC couple such that input signal agree with turn-off/turn-on threshold voltage.
6: To prevent errors of the protection function, the wiring of A, B, C should be as short as possible.
7: The time constant R5C1 of the protection circuit should be selected in the range of 1.5~2µs. SC interrupting time might vary with the
wiring pattern.
8: All capacitors should be mounted as close to the terminals of the DIP-IPM as possible.
9: To prevent surge destruction, the wiring between the smoothing capacitor and the P&N1 terminals should be as short as possible.
Generally a 0.1~0.22µF snubber between the P&N1 terminals is recommended.
10: It is recommended to insert a Zener diode (24V/1W) between each pair of control supply terminals to prevent surge destruction.
11: To prevent LVIC from surge destruction, it is recommended to mount a fast recovery type diode between VNC and NU, NV, NW
terminals.
Fig. 9 EXAMPLE OF EXTERNAL PROTECTION CIRCUIT WITH 3 SHUNT RESISTORS
DIP-IPM
• The time constant RC of external comparator should be selected in the range
Drive circuit
of 1.5~2µs. SC interrupting time might vary with the wiring pattern.
• The threshold voltage Vref should be set up the same rating of short circuit
P trip level (VSC(ref) typ. 0.48V).
• Please select the external shunt resistance such that the SC trip-level is less
L-side IGBTS
External protection circuit
R
+
NW
C
NV Vref – OR logic
NU circuit
Drive circuit R
+
C
Protection circuit Vref –
VNC CIN
R
+
Shunt
resistor C
Vref – Comparator
May 2005