AVR® Microcontroller Hardware Design Considerations
AVR® Microcontroller Hardware Design Considerations
Introduction
®
This application note provides basic guidelines to be followed while designing hardware using AVR
microcontrollers. Some known problems faced in typical designs have been addressed by providing
possible solutions and workarounds to resolve them.
The scope of this application note is to provide an introduction to potential design problems rather than
being an exhaustive document on designing applications using AVR microcontrollers.
Note: Read application note AVR040 - “EMC Design Considerations” before starting a new design,
especially if the design is expected to meet the requirements of the EMC directive or other similar
directives in countries outside Europe.
Features
• Guidelines for Providing Robust Analog and Digital Power Supply
• Connection of Reset Line
• Interfacing Programmers/Debuggers to AVR Devices
• Using External Crystal or Ceramic Resonator Oscillators
Table of Contents
Introduction......................................................................................................................1
Features.......................................................................................................................... 1
1. Abbreviations.............................................................................................................4
2. Power Supply............................................................................................................ 5
2.1. Digital Supply............................................................................................................................... 5
2.2. Analog Supply.............................................................................................................................. 6
8. Revision History.......................................................................................................22
Customer Support......................................................................................................... 23
Legal Notice...................................................................................................................24
Trademarks................................................................................................................... 24
1. Abbreviations
ADC Analog-to-Digital Converter
AREF Analog Reference Voltage
CPU Central Processing Unit
DC Direct Current
DIP Dual In-line Package
EEPROM or E2PROM Electrically Erasable Programmable Read-Only Memory
EMC Electromagnetic Compatibility
ESD Electrostatic Discharge
GND Ground
HVPP High-Voltage/Parallel Programming
Hz Hertz
I/O Input and Output
IDE Integrated Development Environment
ISP In-System Programming
kHz KiloHertz
LED Light Emitting Diode
MCU Microcontroller Unit
MHz MegaHertz
MISO Master In Slave Out
MOSI Master Out Slave In
PCB Printed Circuit Board
PDI Program and Debug Interface
RC Filter Resistor-Capacitor Filter
RST Reset
SPI Serial Peripheral Interface
TPI Tiny Programming Interface
UPDI Unified Program and Debug Interface
VCC Supply Voltage
XTAL Crystal Oscillator
2. Power Supply
The power supply is a critical part of any hardware design and affects directly the performance of the
system. Two important aspects to be considered while designing a power supply for the discrete/digital
elements of an AVR device are ESD Protection and Noise Emission. These aspects are detailed in the
AVR040 application note, hence only a short summary is included in this document.
GND
Ground Plane
The figure above shows an example of insufficient decoupling. The capacitor is placed too far away from
the microcontroller, creating a larger high-current loop. The power and ground planes are part of the high-
current loop. As a result, noise is spread more easily to other devices on the board and radiated emission
from the board is increased even further. The whole ground plane will act as an antenna for the noise,
instead of only the high-current loop. This will be the case when the power and ground pins are
connected directly to the planes (typical for hole-mounted components) and the decoupling capacitor is
connected to the planes some distance away. This is sometimes observed in boards with surface-mount
components where the integrated circuits are placed on one side of the board and the decoupling
capacitors are placed on the other side.
The figure below shows a better placement of the capacitor. The lines that are part of the high-current
loop are not part of the power or ground planes. This is important, as the power and ground planes
otherwise will spread a lot of noise. The figure also shows another method of improving decoupling; a
series ferrite bead is inserted to reduce the switching noise on the power plane. The series impedance of
the ferrite bead should be low enough to ensure that there is no significant drop in the DC voltage. The
ferrite bead may not be necessary, especially if the power supply itself is sufficiently filtered.
GND
Ground Plane
Another decoupling alternative is to connect the device power and ground pins directly to the planes and
connect the decoupling capacitor(s) to the planes as close as possible to the power and ground pins. For
large packages, placing decoupling capacitors on the opposite side of the board may be the best way of
getting them as close as possible to the power and ground pins. Also, in this approach, it is critical to
minimize the loop area formed between the decoupling capacitor and device power and ground pin. The
downside of this approach is that power plane noise can more easily be coupled to the device power
supply - thus making sure that the power plane is properly filtered in general becomes more important.
In AVR devices, where power and ground pins are placed close together, there will be better decoupling
than in devices with industry standard pinout. In industry standard pinout, the power and ground pins are
placed in opposite corners of the DIP package. For devices with multiple pairs of power and ground pins,
it is essential that there is a decoupling capacitor for every pair of pins.
The main power supply should also have a tantalum or ceramic capacitor to stabilize it.
R D MCU
4.7kΩ
Reset Reset
External Reset Module
C
100nF
GND
Note: The values of resistor R and capacitor C are typical values used for the RESET pin. For specific
design requirements of an application, these values must be changed accordingly.
A few ISP programmers are powered by the target power supply. In this way they easily adapt to the
correct voltage level of the target board. Other ISP programmers, such as STK600, can alternatively
power the target board via the VTG line. In such a case, it is important that the power supply on the target
is not switched on.
Note: Refer to the respective programmer user guide for more information on the capabilities and
physical interface.
Reset
®
AVR MCU
Note:
1. These typical values are used to limit the input current to 10 mA for a supply voltage (VCC) of 3.3V.
It may vary depending on the programmer/debugger used and the requirements of specific
hardware design.
2. The AVR device will never drive the SPI lines in a programming situation. The AVR device is held in
Reset to enter Programming mode, which puts all AVR device pins to tri-states.
In a single application, multiple AVR devices can share the same ISP interface. This enables
programming of all the devices through a minimal interface. However, if there are no special design
considerations, then all the AVR devices will respond to the ISP instructions. The SPI clock lines should
be separately provided (can be gated using jumpers or DIP switches) so that only one AVR device at a
time receives SPI clock. Other SPI lines (MOSI and MISO) can be shared. This method ensures that AVR
devices are separated from the programmer by the same protection resistors since they are all held in
Reset while the ISP Reset line is activated. The ISP clock can be gated using jumpers or DIP switches.
An alternate solution is to use multiple ISP interfaces, one for each device, all protected separately with
series resistors.
Note: Refer to the specific user guide of programmers/debuggers for more information about the JTAG
interfacing with AVR devices.
The protection resistors shown in Figure 4-2 are required if the JTAG lines are used in the application. For
example, ADC input pins often have analog filters on the lines. In such cases, the filter capacitor must be
removed while programming, to ensure that the load is resistive. The following figure illustrates the steps.
Figure 4-5. JTAG Interface Connections – Correct and Incorrect Ways
Connect to Vcc during programming
JTAG probe
R R
JTAG PIN Analog input signal
C
OK!
JTAG probe
R
JTAG PIN Analog input signal
Fails! C
JTAG probe
R R
JTAG PIN Analog input signal
Likely to fail C
The following figure shows the standard PDI connector supplied with Microchip programmers. Only two
pins on the device are required for using this interface; RESET, also called PDI_CLK, and the dedicated
PDI_DATA pin. The target’s voltage supply allows power to the device or ensures correct signal levels
during programming.
Figure 4-6. Standard PDI Header
Note: Refer to the respective programmer user guide for more information about the capabilities and
physical interface of PDI.
The RESET pin can be reconfigured as an I/O pin by programming the RSTDISBL fuse of the device.
This disables the reset functionality and requires +12V to be applied to Reset for programming to work.
Only a few programming tools are capable of generating this voltage.
Note: Refer to the respective programmer user guide for more information about the capabilities and
physical interface of TPI.
Programming and debugging are performed using the UPDI Physical interface (UPDI PHY), which is a
UART-based half-duplex 1-wire interface for data reception and transmission. It uses the Reset line to
detect the debugger probe.
Figure 4-8. Standard UPDI Header
Single-wire interface can be enabled by setting a fuse or by 12V programming, which disables the reset
functionality. Not all programming tools are capable of generating this voltage.
Note: Refer to the respective programmer user guide for more information about the capabilities and
physical interface of UPDI.
Note: The information provided in the table is to showcase the differences. For more details about the
oscillator, refer to the device-specific data sheet.
Note: * The ppm variation in the ceramic resonator depends on the quality of the ceramic resonator.
The parallel resonator is used in circuits which contain reactive components such as capacitors. Such
circuits depend on the combination of the reactive components and the resonator to accomplish the
phase shift required to start and maintain the oscillation at a specific frequency. Basic oscillator circuits
used for parallel resonators are illustrated in the following diagram. The part of the circuit above the
dashed line represents the oscillator circuit present internally in the AVR device. Simply, the AVR device
built-in oscillator circuits can be understood as an inverter-based oscillator circuit, as shown in the
following figure.
Figure 5-1. Basic Inverter Circuits Equivalent to the Oscillator Circuits in AVR Devices
Ci1 Ci2
Internal
XTAL1/ XTAL2/ External
TOSC1 TOSC2
The circuit depicted in Figure 5-1 includes internal capacitive load (Ci), the stray capacitance (Cs) of a
circuit, and the optional external capacitance (Ce) to match the capacitive load (CL) of the resonator.
Note: Some AVR devices may not include internal capacitors, or may have a fuse setting to enable/
disable the internal capacitors. Always check the device data sheet before choosing the resonator.
When using resonators with the AVR device, it may be necessary to apply (external) capacitors according
to the requirements of the resonator used. A parallel resonator will not be able to provide stable
oscillation if an insufficient capacitive load is applied. When the capacitive load is too high, the oscillation
may not start as expected due to drive level dependency of the load. The capacitive load of the crystal
(CL), found in the data sheet of the resonator, is the recommended capacitive load of the resonator
(viewed from the terminals of the resonator). To match the capacitive load (CL) the engineer must
calculate the external capacitors (Ce) using Equation - 1. The closer the total capacitance of Ci, Cs, and
Ce are to CL, the more exact the frequency one should get.
Equation - 1
��1 + ��1 + ��1 ��2 + ��2 + ��2
�� =
��1 + ��2 + ��1 + ��2 + ��1 + ��2
Where Ce1 and Ce2 refer to the external capacitors seen in the figure above, and Cs1 and Cs2 are stray
capacitances at the XTAL/TOSC pins of the AVR device, and Ci1 and Ci2 are the internal capacitances.
Assuming symmetric layout, so that Ci1 and Ci2 = Ci and Cs1 and Cs2 = CS (CS can be estimated to be
2 pF - 5 pF), and then the external capacitors can be determined by the following equation, with CL given
by resonator data sheet.
Equation - 2
�� + �� = 2�� − ��
Important:
Recommendations given in this chapter are guiding values only. Always check the data sheet,
and calculate values accordingly.
When using the external crystal oscillator on non-PB AVR devices, crystals with a nominal frequency
range starting from 400 kHz can be used. For the standard high-frequency crystals, the recommended
capacitor value range is in the range of 22 pF - 33 pF. For the newer AVR PB, the recommended
capacitor value range is 12 pF - 22 pF, the total capacitance (Ce + Ci + Cs) for each pin must not exceed
22 pF.
The external low-frequency crystal is intended for 32.768 kHz crystals. When selecting this clock source,
the internal oscillator circuit might provide the required capacitive load. By programming the CKOPT Fuse
(1), the user can enable internal capacitors on XTAL1 and XTAL2. The value of the internal capacitor is
typical 20 pF but can vary. External capacitors are not required when using a 32.768 kHz crystal that
does not require more load. Then the value of the external capacitor can be determined using the
Equation - 2. The CKOPT Fuse should not be programmed when using external capacitors.
In other cases, an external capacitive load specified by the manufacturer of the crystal must be used.
When using the external ceramic resonator, refer to the device data sheet for determining the capacitors
values. Always use the recommended capacitive load, as the resonant frequency of the ceramic
resonator is very sensitive to capacitive load.
Note:
1. Some AVR devices may not come with internal capacitors. Some AVR devices may not have the
CKOPT fuse, instead they have dedicated pins (TOSC1-TOSC2), to connect the 32.768 kHz
crystal.
2. Refer to the device data sheet for specific details related to oscillator connections.
8. Revision History
Doc Rev. Date Comments
B 02/2018 1. Explanations in the Digital Supply section were improved.
2. Obsolete section on Noise Implications was removed.
2521R 09/2016 1. The filename and the document number in part of this revision history have
been corrected.
2. Trademark corrections.
3. Some minor corrections in the text.
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ISBN: 978-1-5224-2611-0
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