Part2 Vasudevan Uvm Tips and Tricks PDF

UVM Tips and Tricks
- Runtime Tips
Presented by Srivatsa Vasudevan - Synopsys, Inc.
Slides by Srinivasan Venkataramanan, VerifWorks
© 2014-2016, www.verifworks.com
UVM TB Hierarchy
uvm_test_top
uvm_driver
uvm_env uvm_agent
uvm_sequencer
uvm_monitor
uvm_scoreboard
2/29/2016 © 2014-2016, www.verifworks.com 2

Factory Pattern + Constraint Example
s2p_xactn_with_payload_pattern Program
Environment
Monitor scoreboard
components
Transactions
s2p_xactn
Command

component

Simulation
# UVM_INFO @ 0: reporter [RNTST] Running test factory_test...
# UVM_INFO @ 0: reporter [] Doing build

ns s2p_env [Trace:INTERNAL] | Building verification environment...
# UVM_INFO @ 0: uvm_test_top [FACTORY] Overriding s2p_xactn with pattern

testcase
# UVM_INFO @ 0: uvm_test_top.env_0.agent0.driver [S2P_DRIVER] S2P_DRIVER : item

sent is --------------------------------------------------------------------
--
# Name Type Size Value
# ----------------------------------------------------------------------
# req s2p_xactn_with_pld+ - req@67
# pkt_pld integral 32 'hff

Multiple Overrides - Replace
1st override
set_type_override_by_type(
.original_type
(s2p_xactn::get_type()),
.override_type( A while later..
s2p_err_xn::get_type()));
// ... some time later
.original_type
.override_type(
s2p_new_err_xn::get_type())
Default - replace
.replace(1));

Multiple Overrides - Replace
• Sample log
• ID: TPREGR
[TPREGR] Original object type ’s2p_xactn'

already registered to produce ’s2p_err_xactn'.
Replacing with override to produce type
’s2p_new_err_xn'.

Multiple Overrides - Ignore
1st override
.original_type
.override_type( A while later..
// ... some time later
.original_type
.override_type(
s2p_new_err_xn::get_type())
replace = 0
.replace(0));

Multiple Overrides - Ignore
• Sample log
• ID: TPREGRD
[TPREGD] Original object type ’s2p_xactn'

already registered to produce ’s2p_err_xactn'.
Set 'replace' argument to replace the existing
entry.

Replace in Instance Specific
Override?
• No “replace” feature in instance specific API

• No warning/information from UVM BCL either!

Factory Debug
• UVM has built-in debug features for factory

• uvm_factory::print()
– Not a static method though!
Recommended

Factory Debug - Print
• all_types = 1 (Default)
Registered user
types

• all_types = 0 (Recommended by VerifLabs, CVC)
Overrides alone!

• all_types = 2 (Includes uvm_* too)
Overrides +
Registered user
types +
UVM_*

Factory Undo? Anyone?
• Allowed in UVM 1.2

• Needs a work-around in UVM
1.1d

Undo Trial…
A while later..
.original_type
.override_type(
.original_type
.override_type(
s2p_xactn::get_type()));

Undo – Error in UVM 1.1d
• Sample log
• ID: TYPDUP
[TYPDUP] Original and override type arguments

are identical: s2p_xactn

uvm_component::new()
• Consistent, pre-defined prototype for new() for all
components
– name (string)
– parent (uvm_component)
• All components – driver, sequencer, monitor, etc.
SHOULD use this
class s2p_driver extends uvm_driver #(s2p_xactn);
function new(string name,
uvm_component parent);
super.new(name, parent);
endfunction : new

s2p_agent::build_phase()
 Use factory pattern – type_id::create()

Instead
of new()
s2p_driver_0 = s2p_driver::type_id::create
("s2p_driver_0",this);
s2p_sqr_0 =
s2p_sequencer::type_id::create
("s2p_sqr_0",this); name
end

Instance Paths - name

axi_fabric_env – How to Name It?
Crazy??

axi_fabric – Factory Overrides
Fails 
OK 
Better!


Objections in UVM
• No news is good news

• By default no one objects!
– Hence test ends at ZERO time if not taken care of!

Scalable End Of Test via “Objection”
http://www.cvcblr.com/blog/?p=414

Test Should raise_objection

Debugging Phase Execution
• UVM has built-in debug feature for Phases

• vw_uvm_sim +UVM_PHASE_TRACE
• Look for ID - [PH/TRC/*]
UVM_INFO @ 0: reporter
[PH/TRC/SKIP] Phase
'uvm.uvm_sched.main' (id=284)
No objections raised, skipping phase

Advanced Debug Methodology –
Hangs?
Built-in
display_
objections

Advanced Debug Methodology –
Hangs?
The above indicates there are 3 folks opposing

it with clear pointers to who they are.

Phase Jumping
• UVM allows phase jumps

– Forward
– Backward
• Handy if a test wants to “run” few times
• Multiple runs through:
– reset-cfg-main-shutdown
– cfg-main-shutdown
– reset-main

Subsystem Test
• phase_ready_to_end callback

Subsystem Test
• Mimics reset,
config via
#delays
• Uses a virtual
sequence in
main_phase

Innings Break!
Innings
break!

Second Innings
Match
not over
yet!
JUMP!

Phase Synchronization
• By default, all components must allow all other

components to complete a phase before all
components move to next phase
VIP 1: reset configure main shutdown
time

UVM Domain

Phases - Guidelines
• Use correct phasing

• Use objections
• Learn UVM CLP for debug
• Advanced debug – display_objections
• Jumps are cool!
– And useful 
• Can also use domains!
– Advanced topic, call us again 

UVM Config DB
Configuration Database

Field Name vs. Value
• Typically field_name and value are kept the same

• Not a must, set and get must agree on the
field_name

Field
value
name

Field
name
value

What if “set”, no “get”?
• Usually a BIG problem!

• Hard to detect bugs (TB bugs)
• uvm_component has handy debug functions for
this!

check_config_settings

check_config_settings
Set
num_masters
(write)
NO get
(read)

Config DB Auditing

Sample Log of Audit

Command Line Processor

UVM CLP Max Error Count
+UVM_MAX_QUIT_COUNT=2 Quit after N number of

errors
Default  No limit
Only aware of `uvm_error
SVA action blocks, DPI calls

should use uvm_error

UVM CLP Options for Debug
• Built into UVM library at the major points of execution

• Dump important runtime data into log for debug or post-
processing
• Can be activated from command line options
+UVM_PHASE_TRACE Turns on tracing of phase
execution
+UVM_OBJECTION_TRACE Turns on tracing of objection
activities
+UVM_RESOURCE_DB_TRACE Turns on tracing of resource DB
access (get & set)
+UVM_CONFIG_DB_TRACE Turns on tracing of configuration
DB access

+UVM_CONFIG_DB_TRACE
SET-s
GET-s

+UVM_CONFIG_DB_TRACE
• ID: CFGDB/GET, CFGDB/SET

+UVM_OBJECTION_TRACE
• Displays “added objections” for raise_objection

+UVM_OBJECTION_TRACE
• Displays “dropped objections” for drop_objection

• ID: OBJTN_TRC

Popular, Simple Options
• +UVM_TESTNAME=my_test
– Executes “class my_test extends from uvm_test”
– Should be registered with factory
• `uvm_component_utils (my_test)
– Overrides value (if present) in code:
• run_test (“default_test”)
– Only one test is run at a time

UVM_TESTNAME - Multiple
• Multiple values – ignored, warning issued

• vw_uvm_sim +UVM_TESTNAME=first_test
+UVM_TESTNAME=second_test
Multiple (2) +UVM_TESTNAME arguments

provided on the command line.
'first_test' will be used.
Provided list: first_test, second_test

Verbosity Setting
• vw_uvm_sim +uvm_set_verbosity Template
vw_uvm_sim
+uvm_set_verbosity=<comp>,<id>,<verbo
sity>,<phase|time>,<offset>
Example
vw_uvm_sim
+uvm_set_verbosity=uvm_test_top.env0.
agent1.*,_ALL_,UVM_FULL,time,800

Severity Override in CMD Line
• vw_uvm_sim +uvm_set_severity Template
vw_uvm_sim
+uvm_set_severity=<comp>,<id>,<orig_s
everity>,<new_severity>
Example
vw_uvm_sim
+uvm_set_severity=uvm_test_top.env_0.
*,SBRD,UVM_INFO,UVM_WARNING

Changing “action” on Messaging
• vw_uvm_sim +uvm_set_action Template
vw_uvm_sim
+uvm_set_action=<comp>,<id>,<severity
>,<action[|action]>
Example
vw_uvm_sim
+uvm_set_action=uvm_test_top.env_0.*,
_ALL_,UVM_INFO,UVM_NO_ACTION

UVM CLP - Guidelines
• Change verbosity, severity, error count on CMD

line
• Avoid factory overrides via CMD line
– Hard to regress
– Verification becomes spread across UVM, Perl/Scripts

Summary
• Runtime tricks & tips in UVM

• Several built-in hooks in UVM for run-time
debug
• Look for our DVRules product to flag these @
http://www.verifworks.com
• Use our DVCreate tools to generate quality
UVM

Thank You!

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UVM Tips and Tricks

Slides by Srinivasan Venkataramanan, VerifWorks

2/29/2016 © 2014-2016, www.verifworks.com 2

2/29/2016 © 2014-2016, www.verifworks.com 3

# UVM_INFO @ 0: reporter [] Doing build

# UVM_INFO @ 0: uvm_test_top [FACTORY] Overriding s2p_xactn with pattern

# UVM_INFO @ 0: uvm_test_top.env_0.agent0.driver [S2P_DRIVER] S2P_DRIVER : item

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[TPREGR] Original object type ’s2p_xactn'

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[TPREGD] Original object type ’s2p_xactn'

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• No “replace” feature in instance specific API

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• UVM has built-in debug features for factory

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• all_types = 0 (Recommended by VerifLabs, CVC)

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• all_types = 2 (Includes uvm_* too)

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• Allowed in UVM 1.2

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[TYPDUP] Original and override type arguments

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 Use factory pattern – type_id::create()

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• No news is good news

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• UVM has built-in debug feature for Phases

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The above indicates there are 3 folks opposing

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• UVM allows phase jumps

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• By default, all components must allow all other

VIP 1: reset configure main shutdown

VIP 2: reset configure main shutdown

VIP 3: reset configure main shutdown

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• Use correct phasing

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• Typically field_name and value are kept the same

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• Usually a BIG problem!