5 - Verilog Language Elements (Datatype)
5 - Verilog Language Elements (Datatype)
(Data Types)
Prof. A. K. Swain
Asst. Prof., ECE Dept., NIT Rourkela
• A wire net and a tri net are identical in syntax and semantics. 1 X 1 X 1
• The tri net may be used to describe a net where multiple drivers drive a X X X X X
net.
Z 0 1 X Z
Example:
wire Reset;
tri [3:1] C, P, S;
tri [MSB-1 : LSB+1] A1;
Here is an example.
assign C = P & S ; //C=01X
assign C = P ^ S ; //C=X1X
In this example, C has two drivers.
C=X1X
Example: 1 0 1 X 1
wand [7:0] Databus; X 0 X X X
triand Reset , Clk; Z 0 1 X Z
If multiple drivers drive a wand net, the given table
is used to determine the effective value.
Example:
supply0 Gnd, ClkGnd;
supply1 [2:0] Vcc;
Example:
wire vectored [3:1] G; // Bit-select G[2] and part-select G[3:2]
// are NOT allowed.
wor scalared [4:0] B; // Same as: wor [4:0] B;
// Bit-select B[2] and part-select B[3:1]
//are allowed.
Examples:
reg [3:0] S; // S is a 4-bit register,
reg Cnt; // Cnt is a 1-bit register,
reg [1:32] K1, P1, L1;
A single reg declaration can be used to declare both registers and memories.
Example:
parameter ADDR_SIZE = 16, WORD_SIZE = 8;
reg [1:WORD_SIZE] RamPar [ADDR_SIZE-1 : 0], DataReg;
*RamPar is a memory, an array of sixteen 8-bit registers, while DataReg is a 8- bit register.*
The file may also contain explicit addresses of the form: @hex_address value
Example:
@5 11001
@2 11010
In this case the values are read into the specified addresses of the memory.
When only a start value is specified, read continues until the right-hand index bound of
the memory is reached.
Example:
$readmemb ("rom.patt", RomB, 6); // Starts from address 6 and continues until 1.
$readmemb ("rom.patt'', RomB, 6, 4); // Reads from addresses 6 through 4.
Examples:
integer A, B, C; // Three integer registers,
integer D[3:6] ; // An array of four integers.
Example:
reg [31:0] Breg;
integer B; // B[6] and B[20:10] are not allowed.
Breg = B;
/* At this point, B[6] and B[20:10] are allowed and
give the corresponding bit-values from the integer B */
• If no range is specified, each identifier stores one time value which is at least 64 bits.
• A time register holds only an unsigned quantity.
• Time is not supported for synthesis and hence is used only for simulation purposes.
• It can be used with $time to hold current simulation time and writing a timing check.
Examples:
time Events[0:31] ; // Array of time values.
time CurrTime; // CurrTime holds one time value.
Syntax:
parameter [signed] [ [MSB:LSB]] param1 =const_expr1 ,
param2 = const_exp2 , . . . ,
paramN = const_exprN ;
Examples:
parameter LINELENGTH = 132, ALL_X_S = 16 'bx;
parameter BIT = 1, BYTE =8, PI = 3 .14;
parameter STROBE_DELAY = (BYTE + BIT) / 2;
parameter TQ_FILE = "/home/bhasker/TEST/add. tq" ;
website:
asic-world.com
www.xilinx.com