SCH-Philips+L12M1 1L+LA PDF
SCH-Philips+L12M1 1L+LA PDF
L12M1.1L
LA
Contents Page
1. Revision List 2
2. Technical Specifications and Connections 2
3. Precautions, Notes, and Abbreviation List 5
4. Mechanical Instructions 9
5. Service Modes, Error Codes, and Fault Finding 20
6. Alignments 27
7. Circuit Descriptions 29
8. IC Data Sheets 37
9. Block Diagrams
Wiring Diagram 32" (5000 series) 43
Wiring Diagram 42" (5000 series) 44
Wiring Diagram 42" (6000 series) 45
Wiring Diagram 42" (7000 series) 46
Wiring Diagram 47" (5000 series) 47
Wiring Diagram 47" (7000 series) 48
Block Diagram Video 49
Block Diagram Audio 50
Block Diagram Control & Clock Signals 51
Block Diagram I2C 52
Supply Lines Overview 53
10. Circuit Diagrams and PWB Layouts
A 272217190587 - 272217190588 PSL 54 56-57
B 313912365391 SSB MT5396 R2 LATAM 58 72-73
E 272217190554 - 272217190562 Keyboard Control
Module 74 75
J 272217190629 Sensor board 76 77
11. Styling Sheets
5000 series 32" 78
5000/6000 series 42"/47" 79
7000 series 42" 80
7000 series 47" 81
Published by ER/JY 1264 BG TV Quality Printed in the Netherlands Subject to modification EN 3122 785 19300
2012-Apr-20
©
2012 TP Vision Netherlands B.V.
All rights reserved. Specifications are subject to change without notice. Trademarks are the
property of Koninklijke Philips Electronics N.V. or their respective owners.
TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust
earlier supplies accordingly.
PHILIPS and the PHILIPS’ Shield Emblem are used under license from Koninklijke Philips Electronics N.V.
EN 2 1. L12M1.1L LA Revision List
1. Revision List
Manual xxxx xxx xxxx.0
• First release.
2 4 7 9 10 11
Mechanics Descr. Block Diagrams Schematics Styling
E (Keyboard/Leading Edge)
Connection Overview
Assembly Removal
J (Sensor Board)
Control & Clock
Wiring Diagram
Wire Dressing
Power Supply
Power Supply
Supply lines
Dressing
Audio
Sheet
Video
SSB
I2C
CTN
32PFL5007G/78 2.3 4-1 4.3 7.2 9-1 9-7 9-8 9-9 9-10 9-11 10.1 10.2 10.4 10.3 11.1
42PFL7007G/78 2.3 4-5 4.3 - 9-4 9-7 9-8 9-9 9-10 9-11 - 10.2 10.4 10.3 11.3
42PFL5007G/78 2.3 4-2 4.3 - 9-2 9-7 9-8 9-9 9-10 9-11 - 10.2 10.4 10.3 11.2
42PFL6007G/78 2.3 4-4 4.3 - 9-3 9-7 9-8 9-9 9-10 9-11 - 10.2 10.4 10.3 11.2
47PFL5007G/78 2.3 4-3 4.3 - 9-5 9-7 9-8 9-9 9-10 9-11 - 10.2 10.4 10.3 11.2
47PFL7007G/78 2.3 4-6 4.3 - 9-6 9-7 9-8 9-9 9-10 9-11 - 10.2 10.4 10.3 11.4
2012-Apr-20
Technical Specifications and Connections L12M1.1L LA 2. EN 3
2.3 Connections
USB 3
SERV.U
1
AV IN AUDIO IN
NETWORK DVI/VGA
5 6 7 8
USB 2
9 10 11 12 13 14 14 3
DIGITAL
AUDIO
OUT
4
VGA CVI USB 1 (1) ARC (2) (3)
TV ANTENNA HDMI
19300_046_120417.eps
120417
Note: The following connector color abbreviations are used 1 - D2+ Data channel j
(according to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, 2 - Shield Gnd H
Gy= Grey, Rd= Red, Wh= White, Ye= Yellow. 3 - D2- Data channel j
4 - D1+ Data channel j
2.3.1 Side Connections 5 - Shield Gnd H
6 - D1- Data channel j
7 - D0+ Data channel j
1 - USB2, -3
8 - Shield Gnd H
9 - D0- Data channel j
1 2 3 4
10 - CLK+ Data channel j
10000_022_090121.eps
090121 11 - Shield Gnd H
12 - CLK- Data channel j
Figure 2-2 USB (type A) 13 - Easylink Control channel/CEC jk
14 - n.c.
1 - +5V k 15 - DDC_SCL DDC clock j
2 - Data (-) jk 16 - DDC_SDA DDC data jk
3 - Data (+) jk 17 - Ground Gnd H
4 - Ground Gnd H 18 - +5V j
19 - HPD Hot Plug Detect j
2 - Head phone (Output) 20 - Ground Gnd H
Bk - Head phone 32 - 600 ohm / 10 mW ot
4 - Cinch: S/PDIF - Out
3 - HDMI: Digital Video, Digital Audio - In Bk - Coaxial 0.4 - 0.6VPP / 75 ohm kq
19 1
18 2
10000_017_090121.eps
090428
2012-Apr-20
EN 4 2. L12M1.1L LA Technical Specifications and Connections
5 - RJ45: Ethernet 1 2 3 4
10000_022_090121.eps
090121
10000_025_090121.eps 1 - +5V k
120320
2 - Data (-) jk
Figure 2-4 Ethernet connector 3 - Data (+) jk
4 - Ground Gnd H
1 - TD+ Transmit signal k
2 - TD- Transmit signal k 13 - HDMI1: Digital Video, Digital Audio - In - Audio Return
3 - RD+ Receive signal j Channel
4 - CT Centre Tap: DC level fixation 19 1
5 - CT Centre Tap: DC level fixation 18 2
2012-Apr-20
Precautions, Notes, and Abbreviation List L12M1.1L LA 3. EN 5
2012-Apr-20
EN 6 3. L12M1.1L LA Precautions, Notes, and Abbreviation List
result in sets which have the same CTN (Commercial Type 6 = play 16 : 9 format, 12 = play 4 : 3
Number; e.g. 28PW9515/12) but which have a different B.O.M. format
number. AARA Automatic Aspect Ratio Adaptation:
By looking at the third digit of the serial number, one can algorithm that adapts aspect ratio to
identify which B.O.M. is used for the TV set he is working with. remove horizontal black bars; keeps
If the third digit of the serial number contains the number “1” the original aspect ratio
(example: AG1B033500001), then the TV set has been ACI Automatic Channel Installation:
manufactured according to B.O.M. number 1. If the third digit is algorithm that installs TV channels
a “2” (example: AG2B0335000001), then the set has been directly from a cable network by
produced according to B.O.M. no. 2. This is important for means of a predefined TXT page
ordering the correct spare parts! ADC Analogue to Digital Converter
For the third digit, the numbers 1...9 and the characters A...Z AFC Automatic Frequency Control: control
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be signal used to tune to the correct
indicated by the third digit of the serial number. frequency
AGC Automatic Gain Control: algorithm that
Identification: The bottom line of a type plate gives a 14-digit controls the video input of the feature
serial number. Digits 1 and 2 refer to the production centre (e.g. box
SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M. AM Amplitude Modulation
code, digit 4 refers to the Service version change code, digits 5 AP Asia Pacific
and 6 refer to the production year, and digits 7 and 8 refer to AR Aspect Ratio: 4 by 3 or 16 by 9
production week (in example below it is 2010 week 10 / 2010 ASF Auto Screen Fit: algorithm that adapts
week 17). The 6 last digits contain the serial number. aspect ratio to remove horizontal black
bars without discarding video
information
ATSC Advanced Television Systems
Committee, the digital TV standard in
the USA
ATV See Auto TV
Auto TV A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way
AV External Audio Video
AVC Audio Video Controller
AVIP Audio Video Input Processor
B/G Monochrome TV system. Sound
carrier distance is 5.5 MHz
BDS Business Display Solutions (iTV)
BLR Board-Level Repair
BTSC Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
10000_053_110228.eps countries
110228 B-TXT Blue TeleteXT
C Centre channel (audio)
Figure 3-1 Serial number (example) CEC Consumer Electronics Control bus:
remote control bus on HDMI
3.3.7 Board Level Repair (BLR) or Component Level Repair connections
(CLR) CL Constant Level: audio output to
connect with an external amplifier
If a board is defective, consult your repair procedure to decide CLR Component Level Repair
if the board has to be exchanged or if it should be repaired on ComPair Computer aided rePair
component level. CP Connected Planet / Copy Protection
If your repair procedure says the board should be exchanged CSM Customer Service Mode
completely, do not solder on the defective board. Otherwise, it CTI Color Transient Improvement:
cannot be returned to the O.E.M. supplier for back charging! manipulates steepness of chroma
transients
CVBS Composite Video Blanking and
3.3.8 Practical Service Precautions
Synchronization
DAC Digital to Analogue Converter
• It makes sense to avoid exposure to electrical shock. DBE Dynamic Bass Enhancement: extra
While some sources are expected to have a possible low frequency amplification
dangerous impact, others of quite high potential are of DCM Data Communication Module. Also
limited current and are sometimes held in less regard. referred to as System Card or
• Always respect voltages. While some may not be Smartcard (for iTV).
dangerous in themselves, they can cause unexpected DDC See “E-DDC”
reactions that are best avoided. Before reaching into a D/K Monochrome TV system. Sound
powered TV set, it is best to test the high voltage insulation. carrier distance is 6.5 MHz
It is easy to do, and is a good service precaution. DFI Dynamic Frame Insertion
DFU Directions For Use: owner's manual
3.4 Abbreviation List DMR Digital Media Reader: card reader
0/6/12 SCART switch control signal on A/V DMSD Digital Multi Standard Decoding
board. 0 = loop through (AUX to TV), DNM Digital Natural Motion
2012-Apr-20
Precautions, Notes, and Abbreviation List L12M1.1L LA 3. EN 7
2012-Apr-20
EN 8 3. L12M1.1L LA Precautions, Notes, and Abbreviation List
2012-Apr-20
Mechanical Instructions L12M1.1L LA 4. EN 9
4. Mechanical Instructions
Index of this chapter:
4.1 Cable Dressing Notes:
4.2 Service Positions • Figures below can deviate slightly from the actual situation,
4.3 Assy/Panel Removal due to the different set executions.
4.4 Set Re-Assembly
19300_047_120417.eps
120417
2012-Apr-20
EN 10 4. L12M1.1L LA Mechanical Instructions
19300_048_120417.eps
120417
19300_049_120417.eps
120417
2012-Apr-20
Mechanical Instructions L12M1.1L LA 4. EN 11
19300_050_120417.eps
120417
19300_051_120418.eps
120418
2012-Apr-20
EN 12 4. L12M1.1L LA Mechanical Instructions
19300_052_120418.eps
120418
2012-Apr-20
Mechanical Instructions L12M1.1L LA 4. EN 13
19300_053_120418.eps
120418
2012-Apr-20
EN 14 4. L12M1.1L LA Mechanical Instructions
6
6 6
7
6
5 6
6
7 7 7 7
19300_055_120418.eps
120418
ATTENTION!
The LVDS connector(s) require(s) a special procedure for
disconnecting.
Refer to Figure 4-10 to Figure 4-12 for clarification.
1. Press the catches [1] simultaneously.
2. Slide the LVDS cable sidewards carefully [2].
Failure to pressing the catches leads to a damaged LVDS
cable [3]!
Any LVDS cable that is damaged at the notch area must be
replaced with a new one to avoid future unnecessary
repair actions. 19054_001_111010.eps
111010
LVDS CABLE
2
LVDS CABLE
1
19220_067_120229.eps
120229
2012-Apr-20
Mechanical Instructions L12M1.1L LA 4. EN 15
1 1
3
19300_071_120419.eps
120419
5
3
4
4
19300_072_120419.eps
120419
2012-Apr-20
EN 16 4. L12M1.1L LA Mechanical Instructions
19300_056_120418.eps
120418
19300_057_120418.eps
120418
Figure 4-16 Cable dressing back cover 32PFL5007G (keyboard control panel)
19300_058_120418.eps
120418
2012-Apr-20
Mechanical Instructions L12M1.1L LA 4. EN 17
19300_059_120418.eps
120418
Figure 4-18 Cable dressing back cover 42PFL5007G & ...6007G (keyboard control panel)
19300_060_120418.eps
120418
2012-Apr-20
EN 18 4. L12M1.1L LA Mechanical Instructions
19300_061_120418.eps
120418
Figure 4-20 Cable dressing back cover 42PFL7007G (keyboard control panel and Ambilight fixation double-sided tape)
2012-Apr-20
Mechanical Instructions L12M1.1L LA 4. EN 19
19300_062_120419.eps
120419
Figure 4-21 Cable dressing back cover 47PFL7007G (keyboard control panel and Ambilight fixation double-sided tape)
2012-Apr-20
EN 20 5. L12M1.1L LA Service Modes, Error Codes, and Fault Finding
MODEL:
and a TV on I2C /UART level and can be used by a Service 32PF9968/10
PROD.SERIAL NO:
engineer to quickly diagnose the TV set by reading out error AG 1A0620 000001
codes, read and write in NVMs, communicate with ICs and the (CTN Sticker)
uP (PWM, registers, etc.), and by making use of a fault finding
database. It will also be possible to up and download the 10000_038_090121.eps
090819
software of the TV set via I2C with help of ComPair. To do this,
ComPair has to be connected to the TV set via the ComPair
Figure 5-1 Location of Display Option Code sticker
connector, which will be accessible through the rear of the set
(without removing the rear cover).
During this algorithm, the NVM-content must be filtered,
In this chassis, the set has to be put in Service Mode (SDM,
because several items in the NVM are TV-related and not SSB-
SDA) before you can use ComPair.
related (e.g. Model and Prod. S/N). Therefore, “Model” and
“Prod. S/N” data is changed into “See Type Plate”.
In case a call centre or consumer reads “See Type Plate” in
CSM mode, he needs to look to the side/bottom sticker to
identify the set, for further actions.
2012-Apr-20
Service Modes, Error Codes, and Fault Finding L12M1.1L LA 5. EN 21
Purpose
• To change option settings.
• To display / clear the error code buffer.
• To perform alignments.
SDM Specifications
• Operation hours counter (maximum five digits displayed).
• Software version, error codes, and option settings display.
• Error buffer clearing.
• Option settings.
• Software alignments (White Tone).
19300_068_120419.eps • NVM Editor.
120419 • Set screen mode to full screen (all content is visible).
• Set Smart Picture to “Game”.
Figure 5-2 Service pad
How to Activate
On Screen Menu To activate SAM, use one of the following methods:
After activating SDM, the following items are displayed, with • Press the following key sequence on the remote control
“SDM” in the upper right corner of the screen to indicate that the transmitter: “062596” directly followed by the INFO[i+] /OK
television is in Service Default Mode. button. Do not allow the display to time out between entries
Menu items and explanation: while keying the sequence.
• xxxxx: Operating hours (in decimal). • Or via ComPair.
2012-Apr-20
EN 22 5. L12M1.1L LA Service Modes, Error Codes, and Fault Finding
After entering SAM, the following items are displayed, with How to Exit
“SAM” in the upper right corner of the screen to indicate that the Switch the set to STANDBY by pressing the mains button on
television is in Service Alignment Mode. the remote control transmitter or the television set, or by
keying-in the “00” sequence on a standard RC-transmitter.
Menu items and explanation:
1. System Information. Note:
• Op Hour: This represents the life timer. The timer • When the TV is switched “off” by a power interrupt while in
counts normal operation hours, but does not count SAM, the TV will show up in “normal operation mode” as
Stand-by hours. soon as the power is supplied again. The error buffer will
• MAIN SW ID: See paragraph Software Identification, not be cleared.
Version, and Cluster for the SW name definition. • In case the set is in Factory mode by accident (with “F”
• ERR: Shows all errors detected since the last time the displayed on screen), pressing and holding “VOL-“ button
buffer was erased. Five errors possible. for 5 seconds and then followed by pressing and holding
• OP1/OP2: Used to read-out the option bytes. See the “CH-” button for another 5 seconds should exit the
paragraph 6.4 Option Settings in the Alignments Factory mode.
section for a detailed description. Ten codes are
possible. 5.2.4 Customer Service Mode (CSM)
2. Clear. Erases the contents of the error buffer. Select this
menu item and press the MENU RIGHT key on the remote
Purpose
control. The content of the error buffer is cleared.
The Customer Service Mode shows error codes and
3. Options. To set the option bits. See paragraph 6.4 Option
information on the TV’s operation settings. A call centre can
Settings in the “Alignments” chapter for a detailed
instruct the customer (by telephone) to enter CSM in order to
description.
identify the status of the set. This helps them to diagnose
4. Alignments.
problems and failures in the TV before making a service call.
• RGB Align. To align the White Tone. See White Tone
The CSM is a read-only mode; therefore, modifications are not
Alignment: for a detailed description.
possible in this mode.
• Ambilight. To align the Ambilight Units.
5. NVM editor.
• NVM Editor. To change the NVM data in the television Specifications
set. See also paragraph 5.6 Fault Finding and Repair • Ignore “Service unfriendly modes”.
Tips. • Set volume to 25%.
• Service Data. 12 nc data. • Set Smart Picture to “Game”.
6. Upload to USB. • Set Smart Sound to “Standard”.
7. Download from USB. • Line number for every line (to make CSM language
8. Initialise NVM. To initialize a (corrupted) NVM. Be careful, independent).
this will erase all settings! • Set the screen mode to full screen (all contents on screen
9. Dealer Options. is visible).
10. Event Count. • After leaving the Customer Service Mode, the original
• Hardware Events. To Display and Clear the hardware settings are restored.
events. • Possibility to use “CH+” or “CH-” for channel surfing, or
• Software Events. To Display and Clear the software enter the specific channel number on the RC.
events.
How to Activate
How to Navigate To activate CSM, press the following key sequence on a
• In the SAM menu, select menu items with the UP/DOWN standard remote control transmitter: “123654” (do not allow the
keys on the remote control transmitter. The selected item display to time out between entries while keying the sequence).
will be indicated. When not all menu items fit on the screen,
use the UP/DOWN keys to display the next / previous After entering the Customer Service Mode, the following items
menu items. are displayed:
• With the LEFT/RIGHT keys, it is possible to:
– Activate the selected menu item. Menu Explanation CSM1
– Change the value of the selected menu item. 1. Set Type. Type number, e.g. 32PFL3605/78. (*)
– Activate the selected sub menu. 2. Production code. Product serial no., e.g.
• When you press the MENU button twice while in top level BZ1A1008123456 (*). BZ= Production centre, 1= BOM
SAM, the set will switch to the normal user menu (with the code, A= Service version change code, 10= Production
SAM mode still active in the background). To return to the year, 08= Production week, 123456= Serial number.
SAM menu press the MENU button. 3. Installation date. Indicates the date of the first initialization
• The “INFO[i+]/OK” key from the user remote will toggle the of the TV. This date is acquired via time extraction.
OSD “on/off” with “SAM” OSD remaining always “on”. 4. a - Option Code 1. Option code information (group 1).
• Press the following key sequence on the remote control b - Option Code 2. Option code information (group 2).
transmitter: “062596” directly followed by the MENU button 5. SSB. Indication of the SSB factory ID (= 12nc). (*)
to switch to SDM (do not allow the display to time out 6. Display. Indication of the display ID (=12 nc). (*)
between entries while keying the sequence). 7. PSU. Indication of the PSU factory ID (= 12nc).
How to Store SAM Settings (*) If an NVM IC is replaced or initialized, these items must be
To store the settings changed in SAM mode (except the re-written to it. ComPair will foresee in a possibility to do this.
OPTIONS and RGB ALIGN settings), leave the top level SAM Also the NVM editor in the SAM menu can be used.
menu by using the POWER button on the remote control
transmitter or the television set. The mentioned exceptions Menu Explanation CSM2
must be stored separately via the STORE button. 1. Current Main SW. Shows the main software version.
2. Standby SW. Shows the Stand-by software version.
3. Panel Code. Shows the current display code.
4. Bootloader ID. Shows the Bootloader software ID.
5. NVM Version. The NVM software version no.
2012-Apr-20
Service Modes, Error Codes, and Fault Finding L12M1.1L LA 5. EN 23
Introduction
5.4 Error Codes
ComPair (Computer Aided Repair) is a Service tool for Philips
Consumer Electronics products. and offers the following:
5.4.1 Introduction
1. ComPair helps you to quickly get an understanding on how
to repair the chassis in a short and effective way.
2. ComPair allows very detailed diagnostics and is therefore Error codes are required to indicate failures in the TV set. In
capable of accurately indicating problem areas. You do not principle a unique error code is available for every:
have to know anything about I2C or UART commands • Activated (SW) protection.
yourself, because ComPair takes care of this. • Failing I2C device.
3. ComPair speeds up the repair time since it can • General I2C error.
automatically communicate with the chassis (when the uP The last five errors, stored in the NVM, are shown in the
is working) and all repair information is directly available. Service menu’s. This is called the error buffer.
4. ComPair features TV software up possibilities. The error code buffer contains all errors detected since the last
time the buffer was erased. The buffer is written from left to
right. When an error occurs that is not yet in the error code
Specifications
buffer, it is displayed at the left side and all other errors shift one
ComPair consists of a Windows based fault finding program
position to the right.
and an interface box between PC and the (defective) product.
An error will be added to the buffer if this error differs from any
The (new) ComPair II interface box is connected to the PC via
error in the buffer. The last found error is displayed on the left.
an USB cable. For the TV chassis, the ComPair interface box
An error with a designated error code never leads to a
and the TV communicate via a bi-directional cable via the
deadlock situation. It must always be diagnosable (e.g. error
service connector(s).
buffer via OSD or blinking LED or via ComPair).
In case a failure identified by an error code automatically
How to Connect results in other error codes (cause and effect), only the error
This is described in the ComPair chassis fault finding database. code of the MAIN failure is displayed.
2012-Apr-20
EN 24 5. L12M1.1L LA Service Modes, Error Codes, and Fault Finding
5.4.2 How to Read the Error Buffer • 12 short blinks followed by a pause of 1.5 seconds,
• 9 short blinks followed by a pause of 1.5 seconds,
You can read the error buffer in three ways: • 6 short blinks followed by a pause of 1.5 seconds,
• On screen via the SAM/SDM/CSM (if you have a picture). • 1 long blink of 1.5 seconds to finish the sequence,
Example: • The sequence starts again with 12 short blinks.
– ERROR: 0 0 0 0 0 : No errors detected
– ERROR: 6 0 0 0 0 : Error code 6 is the last and only 5.5.2 Displaying the Entire Error Buffer
detected error
– ERROR: 9 6 0 0 0 : Error code 6 was detected first and Additionally, the entire error buffer is displayed when Service
error code 9 is the last detected (newest) error Mode “SDM” is entered.
• Via the blinking LED procedure (when you have no
picture). See paragraph 5.5 The Blinking LED Procedure.
• Via ComPair.
5.6 Fault Finding and Repair Tips
Notes:
• It is assumed that the components are mounted correctly
5.4.3 Error codes with correct values and no bad solder joints.
• Before any fault finding actions, check if the correct
The “layer 1” error codes are pointing to the defective board. options are set.
They are triggered by LED blinking when CSM is activated. In
the LC10 platform, only two boards are present: the SSB and 5.6.1 NVM Editor
the PSU/IPB, meaning only the following layer 1 errors are
defined: In some cases, it can be convenient if one directly can change
• 2: SSB
the NVM contents. This can be done with the “NVM Editor” in
• 3: IPB/PSU
SAM mode. With this option, single bytes can be changed.
• 4: Display
Caution:
Table 5-1 Error code table • Do not change these, without understanding the
function of each setting, because incorrect NVM
Layer-1 Defective Layer-2 settings may seriously hamper the correct functioning
error code board error code Defective device of the TV set!
3 IPB/PSU 16 +12 V missing/low, PSU defective • Always write down the existing NVM settings, before
3 IPB/PSU 17 POK line defective changing the settings. This will enable you to return to the
2 SSB 13 general I2C bus error on SSB original settings, if the new settings turn out to be incorrect.
2 SSB 35 EEPROM I2C error on SSB, 24MC64-W
2 SSB 34 tuner I2C error on SSB
5.6.2 Load Default NVM Values
2 SSB 27 channel decoder on SSB
2012-Apr-20
Service Modes, Error Codes, and Fault Finding L12M1.1L LA 5. EN 25
5.6.4 Unstable Picture via HDMI input • Transport stream output from 7210 is available; if yes,
check Video section.
Check (via ComPair) if HDMI EDID data is properly
programmed. 5.6.13 USB troubleshooting
5.6.5 No Picture via HDMI input • USB hub does not work when it is plugged in to USB2 and
-3.
Check if HDCP key is valid. This can be done in CSM. -> Connect USB hub to USB1 (only this port supports hub)
• TV cannot detect the presence of USB devices.
-> USB device maybe faulty, replace with another USB
5.6.6 HDMI CEC Not Functioning
device.
• TV cannot detect the presence of USB devices.
Go to Home/Menu ->Setup -> Installation -> Preference and
-> Ensure USB device connected to the TV USB input ports
set the Easylink option to “on”. Also check if the connected
comply with USB standard (USB certified).
device is CEC enabled. • TV sometimes can/cannot detect USB devices.
-> If connected to a passive USB hub, remove the passive
5.6.7 TV Will Not Start-up from Stand-by. USB hub.
-> Devices connected to a passive USB hub may have
Possible Stand-by Controller failure. Reflash the SW. drawn current exceeding 500 mA (= limit from TV USB
port).
5.6.8 Cannot measure 1 kHz signal at tweeter 1D01 connector
5.6.14 Ethernet troubleshooting
This is normal behavior. Sound system is active 2.1 system
with separate tweeter and subwoofer paths. Use 8 kHz test • Ethernet cannot establish link.
signal for tweeter measurement. -> Check the ethernet magnetic that it is stuffed with the
correct orientation.
5.6.9 Low output measured at tweeter 1D01 connector • When connected to computer, the speed indicated on the
computer screen is 10 Mbps instead of 100 Mbps.
This is normal behavior. Tweeter only covers higher frequency -> Check the computer network properties setting and
for rated power (4 W each), whereas the subwoofer output ensure that it is set to “Auto”.
(1D02 connector) is full range coverage for output power of 12 • Unable to login to NetTV website.
W. -> Make sure all of the keys are loaded in e.g. MAC
address, ECD key, etc.
2012-Apr-20
EN 26 5. L12M1.1L LA Service Modes, Error Codes, and Fault Finding
2012-Apr-20
Alignments L12M1.1L LA 6. EN 27
6. Alignments
Index of this chapter: In case you have a color analyzer:
6.1 General Alignment Conditions • Measure with a calibrated (phosphor- independent) color
6.2 Hardware Alignments analyzer (e.g. Minolta CA-210) in the centre of the screen.
6.3 Software Alignments Consequently, the measurement needs to be done in a
6.4 Option Settings dark environment.
• Adjust the correct x,y coordinates (while holding one of the
Note: Figures below can deviate slightly from the actual White point registers R, G or B on max. value) by means of
situation, due to the different set executions. decreasing the value of one or two other white points to the
correct x,y coordinates (see Table 6-1 White D alignment
General: The Service Default Mode (SDM) and Service values LC320EUE-SEM1 (panel ID 402) to 6-7 White D
Alignment Mode (SAM) are described in chapter 5. Menu alignment values LC420EUE-SEF2 (panel ID 411)).
navigation is done with the CURSOR UP, DOWN, LEFT or Tolerance: dx: 0.002, dy: 0.002.
RIGHT keys of the remote control transmitter. • Repeat this step for the other color Temperatures that need
to be aligned.
• When finished return to the SAM root menu and press
6.1 General Alignment Conditions STANDBY on the RC to store the aligned values to the
Perform all electrical adjustments under the following
conditions: NVM.
• Power supply voltage (depends on region):
– AP-NTSC: 120 VAC or 230 VAC / 50 Hz ( 10%). Table 6-1 White D alignment values LC320EUE-SEM1
– AP-PAL-multi: 120 - 230 VAC / 50 Hz ( 10%). (panel ID 402)
– EU: 230 VAC / 50 Hz ( 10%).
– LATAM-NTSC: 120 - 230 VAC / 50 Hz ( 10%). Value Cool (9480 K) Normal (8050 K) Warm (6100 K)
– US: 120 VAC / 60 Hz ( 10%). x 0.280 0.292 0.319
• Connect the set to the mains via an isolation transformer y 0.299 0.314 0.347
with low internal resistance.
• Allow the set to warm up for approximately 15 minutes.
Table 6-2 White D alignment values LC420EUE-SEM2
• Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to (panel ID 403)
AUDIO_GND).
Caution: It is not allowed to use heatsinks as ground. Value Cool (9710 K) Normal (8170 K) Warm (6150 K)
• Test probe: Ri > 10 Mohm, Ci < 20 pF. x 0.280 0.291 0.318
• Use an isolated trimmer/screwdriver to perform y 0.296 0.311 0.345
alignments.
Table 6-3 White D alignment values LC470EUE-SEM2
6.2 Hardware Alignments (panel ID 404)
There are no hardware alignments foreseen for this chassis.
Value Cool (9490 K) Normal (8060 K) Warm (6080 K)
6.3 Software Alignments x 0.281 0.292 0.319
With the software alignments of the Service Alignment Mode y 0.297 0.311 0.345
(SAM) the RGB settings can be aligned.
Purpose: To keep the tuner output signal constant as the input Value Cool (9540 K) Normal (8060 K) Warm (6130 K)
2012-Apr-20
EN 28 6. L12M1.1L LA Alignments
If you do not have a color analyzer, you can use the default
values. This is the next best solution. The default values are
average values coming from production (statistics).
• Set the RED, GREEN and BLUE default values per
temperature according to the values in the “Tint settings”
table.
• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.
Colour Temp. R G B
Cool t.b.d. t.b.d. t.b.d.
Normal t.b.d. t.b.d. t.b.d.
Warm t.b.d. t.b.d. t.b.d.
Colour Temp. R G B
Cool t.b.d. t.b.d. t.b.d.
Normal t.b.d. t.b.d. t.b.d.
Warm t.b.d. t.b.d. t.b.d.
Colour Temp. R G B
Cool t.b.d. t.b.d. t.b.d.
Normal t.b.d. t.b.d. t.b.d.
Warm t.b.d. t.b.d. t.b.d.
6.4.1 Introduction
Notes:
• After changing the option(s), save them with the STORE
command.
• The new option setting becomes active after the TV is
switched “off” and “on” again with the mains switch (the
EAROM is then read again).
2012-Apr-20
Circuit Descriptions L12M1.1L LA 7. EN 29
7. Circuit Descriptions
Index of this chapter: 7.1 Introduction
7.1 Introduction The LC12M1.1L LA chassis is a digital chassis using a
7.2 Power Supply Mediatek chipset. It covers screen sizes of 32" to 55".
7.3 DC-DC converter
7.4 Front-End Main key components are the Mediatek MT5396 integrated
7.5 Audio “System On Chip” (SoC) that supports multimedia video/audio
7.6 USB configuration input.
Audio configuration:
• Texas Instruments Audio Class-D Amplifier
(TAS5731PHP).
• Texas Instruments Headphone Amplifier
(TPA6111A2DGN).
Tuner FHD@100Hz
DVB-T/C
ATSC
Display(5/6000) W-SL
TS FHD@60Hz
ISDB-T FHD@50Hz
Demodulator Backlight Control
PWM
7000
MediaTek LDM Ambilight series
only
MT5396
SOC Audio DAC Headphone
I2S BTL
Class-D
UART Service
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EN 30 7. L12M1.1L LA Circuit Descriptions
(Reserved)
(Reserved)
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Circuit Descriptions L12M1.1L LA 7. EN 31
DC-DC 1.1 V
DC-DC 3.3 V
DDR3
DC-DC 5 V
DDR3
MT5396
Headphone-Amp
Class-D amplifier
Digital
Demodulator
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EN 32 7. L12M1.1L LA Circuit Descriptions
V-Disp switch
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Circuit Descriptions L12M1.1L LA 7. EN 33
Connector
no. 1308 1M95 1M99 1M11 1M09
Descr. Mains PSU to SSB PSU to SSB Ambilight/Bolt-on Bolt-on
Pin CN1 CN4 CN5 CN6 CN7
1 N 3V3stdby GND_AL GND_AL GND_BO
2 L Standby +12V_AL +12V_AL +12V_BO
3 - GND1 GND_AL GND_AL GND_BO
4 - GND1 +12V_AL +12V_AL +12V_BO
5 - +12V GND1 - GND_BO
6 - +12V +12V - +12V_BO
7 - +Vsnd GND1 - -
8 - +Vsnd +12V - -
9 - GND_SND - - -
10 - GND_SND - - -
11 - BL-ON - - -
12 - BL-DIM (Vsync) - - -
13 - BL-I-CTRL - - -
14 - POK - - -
15 - - - - -
BL Driver 1
Line Back Light
filter PFC Resonant
converter BL Driver 2
ACin
198 V - 264 V Diode
VSSB
90 V - 276 V bridge
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EN 34 7. L12M1.1L LA Circuit Descriptions
Apply the mains voltage (ACin) Check the Standby voltage Check the entire block (PC102, VCC, etc.)
at C306: measure 3.3 V
Check the main supply at C208: measure 12.3 V Check the entire block (VCC, ICs, etc.)
Check the audio supply at C233: measure 24.5 V
Pull the BL_ON_OFF pin to HIGH (3.3 V) Allow the power supply to start-up a few times No turn on
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SAFETY INSTRUCTION
Replace safety components, indicated by the symbol h, only
by components identical to the original ones. Any other
component substitution (other than original type) may increase
risk of fire or electrical shock hazard.
DC/DC
RT8288A +1V1_SW
Enable
DC/DC
RT8293A +1V5_SW
+12VS Enable
PSU/PSL
DC/DC
RT8293A
+5V_SW
Enable
DC/DC
RT8293A +3V3_SW
DELAY Enable
Lin
+1V2_SW
LD1117
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Circuit Descriptions L12M1.1L LA 7. EN 35
7.4 Front-End
Refer to Figure 7-8 for details.
RF input from
Antenna
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EN 36 7. L12M1.1L LA Circuit Descriptions
7.5 Audio
Refer to Figure 7-9 for the implementation.
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To be used for
• Mass storage
• Hub
• WiFi
• Bluetooth
• Camera
• Mouse/Keyboard.
To be used for
• Mass storage
• WiFi
• Bluetooth
• Camera
• Mouse/Keyboard.
To be used for
• Mass storage
• Hub
• WiFi
• Mouse/Keyboard.
2012-Apr-20
IC Data Sheets L12M1.1L LA 8. EN 37
8. IC Data Sheets
This section shows the internal block diagrams and pin layouts
of ICs that are drawn as "black boxes" in the electrical diagrams
(with the exception of "memory" and "logic" ICs).
8.1 Diagram 10-2-2 B02, Tuner & Demodulator, Type SUT-RA214 (IC1201)
Block diagram
Terr.
In
PLL
FIL 100Ω
10
IQ Gen. I2C 100Ω Tuner I2C (SDA, SCL)
11
100Ω
7
IFOUT2
Image 8
Balun
Rejection 100Ω 2
IFOUT1
3
AGC
1KΩ
9 AGC2
4 AGC1
1KΩ
3.3 V
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EN 38 8. L12M1.1L LA IC Data Sheets
8.2 Diagram 10-2-2 B02, Tuner & Demodulator, Type CXD2828 (IC7210)
Block diagram
TSCLK
TSSYNC
ISDB-T TSVALID
TAINP TSDATA[7:0]
TAINM
Viterbi RS
ADC TSIF
OFDM decoder decoder
Demodulator
TIFAGC Status
Terrestrial AGC TMCC
Tuner Monitor
SDA
SCL
Tuner I2C Host I2C
TTUSDA
TTUSCL CXD2828ER
OSCEN_X
XTALSEL
Pinning information
OSCMODE
OSCEN_X
SLVADR0
XTALO
RST_X
CVDD
PVDD
XVDD
XTALI
XVSS
PVSS
VSS
36 35 34 33 32 31 30 29 28 27 26 25
TAINM 37 24 TESTMODE
TAINP 38 23 VSS
TAVSS 39 22 CVDD
TAVDD 40 21 SDA
SLVADR1 41 20 SCL
XTALSEL 42 19 DVDD
CXD2828ER-T4
VSS 43 18 VSS
CVDD 44 17 TSDATA7
TTUSDA 45 16 TSDATA6
TTUSCL 46 49 15 TSDATA5
GPIO1 47 14 TSDATA4
TIFAGC 48 13 TSDATA3
1 2 3 4 5 6 7 8 9 10 11 12
TSCLK
VSS
TSDATA0
TSDATA1
TSVALID
GPIO2
DVDD
CVDD
GPIO0
TSSYNC
VSS
TSDATA2
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IC Data Sheets L12M1.1L LA 8. EN 39
Block diagram
MT5396JDNJ
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EN 40 8. L12M1.1L LA IC Data Sheets
ARDQS2
A BRDQ0 BRDQ6 DDRV DDRV ARDQ21 ARDQM2 ARDQ22 ARBA0 ARA2 ARA13 ARDQ8 DVSS
#
ARRESE
B BRDQ9 BRDQ2 DDRV DDRV ARDQ23 ARDQ30 ARDQS2 ARDQ31 ARDQ18 ARA3 ARA7 ARDQ1 DVSS
T
ARCLK1
C BRDQ13 BRDQ4 DDRV DDRV ARDQ19 ARDQ24 ARDQ28 ARDQS3 ARDQ29 ARDQ27 ARDQ16 ARDQ20 ARA11 ARA14 ARDQ5 ARDQ3 DVSS ARDQM0
#
ARDQS3
D BRDQM1 BRDQ15 BRDQ11 DDRV DDRV ARDQ17 ARDQ26 ARCLK1 ARDQ25 DVSS DVSS ARA8 ARWE# ARDQ7 ARBA2 ARDQ10 DVSS ARDQ14
#
BRDQS0
E BRDQS0 DDRV DDRV DVSS DVSS DVSS ARDQM3 DVSS DVSS AR A4 ARA6 ARA9 ARCS# ARCAS# ARODT DVSS
#
BRDQS1 BRCLK0
F BRDQS1 BRCLK0 DVSS DDRV DDRV DVSS DVSS ARCKE ARA10 DVSS ARA12 ARA1 ARA0 ARA5 ARRAS# ARCSX# DVSS
# #
RVREF_
G BRDQM0 BRDQ12 BRDQ14 BRCSX# DDRV DDRV MEMTN MEMTP ARBA1 DVSS DDRV DVSS DVSS DDRV DVSS
B
H BRDQ10 BRRAS# BRCAS# BRODT DDRV DDRV DDRV DVSS DDRV DVSS
J BRDQ1 BRDQ3 BRDQ8 DVSS DVSS DVSS DDRV DDRV DVSS DVSS
BRRESE
M BRA2 BRA9 BRA13 BRA11 DVSS
T
AVDD33_ AVSS33_
N BRBA0 BRA3 BRA1 BRA6 BRA12 BRA4 DDRV
MEMPLL MEMPLL
RVREF_
P BRDQ22 BRDQ18 BRDQ20 BRA10 BRBA1 BRCKE DDRV VCCK VCCK VCCK VCCK VCCK VCCK
C
R DVSS DVSS DVSS DVSS DVSS DVSS DVSS VCCK DVSS DVSS DVSS DVSS DVSS
T BRDQ27 BRDQ16 DDRV DDRV DVSS DVSS VCCK DVSS DVSS DVSS DVSS DVSS
U BRDQM3 BRDQ31 BRDQ29 BRDQ25 DDRV DDRV DVSS VCCK DVSS DVSS DVSS DVSS DVSS
Y BRDQM2 BRDQ30 BRDQ28 DVSS DVSS DVSS DVSS DVSS VCCK DVSS DVSS DVSS DVSS DVSS
AA BRDQ24 BRDQ26 DVSS DVSS VCCK DVSS DVSS DVSS DVSS DVSS
AB BRDQ21 BRDQ23 BRDQ19 BRDQ17 DVSS DVSS VCCK DVSS DVSS DVSS DVSS DVSS
AC DDRV DDRV DDRV DDRV DDRV DDRV VCCK VCCK VCCK VCCK VCCK VCCK
LB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 RT
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IC Data Sheets L12M1.1L LA 8. EN 41
SPI_DAT SPI_CLK
DVSS GPIO37 GPIO29 SPI_CLE CI_INT N
A 1
PVR_TS PVR_TS
VCCK DVSS DVSS VCCK GPIO30 SPI_CLK P
DATA0 DATA1
PVR_TS PVR_TS PVR_TS CI_TSDA CI_TSVA CI_TSSY
DVSS DVSS DVSS DVSS VCCK R
VAL SYNC CLK TA0 L NC
DEMOD_ DEMOD_ DEMOD_ DEMOD_ DEMOD_ DEMOD_ DEMOD_ CI_TSCL
DVSS DVSS DVSS DVSS VCCK T
TSDATA3 TSVAL TSCLK TSDATA2 RST TSSYNC TSDATA0 K
AVDD12_ DEMOD_
DVSS DVSS DVSS DVSS RF_AGC IF_AGC U
PCIE11 TSDATA1
AVDD33_ DEMOD_ DEMOD_ DEMOD_ DEMOD_
DVSS DVSS DVSS VCCK OSDA2 OSCL2 V
PCIE11 TSDATA7 TSDATA6 TSDATA5 TSDATA4
AVDD12_
AVSS12_ PCIE11_ PCIE11_ PCIE11_ PCIE11_
DVSS DVSS DVSS VCCK HDMI_2_ W
PCIE11 TXN TXP REFCKN REFCKP
RX
AVDD12_ AVDD33_
PCIE11_ PCIE11_
DVSS DVSS DVSS VCCK HDMI_1_ HDMI_2_ ASPDIF1 ALIN Y
RXN RXP
RX RX
AVDD12_ AVDD33_
HDMI_C HDMI_2_ HDMI_2_ HDMI_2_ HDMI_2_
DVSS DVSS DVSS VCCK HDMI_0_ HDMI_1_ AA
EC RX_1B RX_1 RX_2B RX_2
RX RX
AVDD12_ AVDD33_ AVSS33_
HDMI_2_ HDMI_2_ HDMI_2_
DVSS DVSS DVSS DVSS HDMI_3_ HDMI_0_ HDMI_R AB
SDA RX_0B RX_0
RX RX X
AVDD33_
HDMI_2_ HDMI_2_ HDMI_2_ HDMI_1_ HDMI_1_ HDMI_2_ HDMI_2_
VCCK VCCK VCCK VCCK VCCK HDMI_3_ AC
PWR5V HPD SCL RX_2B RX_2 RX_CB RX_C
RX
AVDD33_ AVSS33_
AVDD33_ AVDD33_ HDMI_1_ HDMI_1_ HDMI_1_
VDAC_B VCCK VCCK HDMI_R AD
VDAC DEMOD SDA RX_1B RX_1
G X
AVSS33_ HDMI_1_ HDMI_1_ HDMI_1_ HDMI_1_ HDMI_1_ HDMI_1_ HDMI_1_
AE
DAC1 PWR5V HPD SCL RX_CB RX_C RX_0B RX_0
AVSS33_ AVSS33_
AVDD33_ HDMI_0_ HDMI_0_ HDMI_0_
HDMI_R HDMI_R AF
DAC1 SDA RX_2B RX_2
X X
AVDD33_ HDMI_0_ HDMI_0_ HDMI_0_ HDMI_0_ HDMI_0_ HDMI_0_ HDMI_0_
AG
DAC PWR5V HPD SCL RX_0B RX_0 RX_1B RX_1
AVSS33_
HDMI_3_ HDMI_3_ HDMI_3_ HDMI_0_ HDMI_0_
XTAL_ST AH
PWR5V SCL SDA RX_CB RX_C
B
AVSS33_
AVDD10_ AVSS12_ AVSS12_ VMID_AA AVSS33_ HDMI_3_ HDMI_3_ HDMI_3_ HDMI_3_ HDMI_3_ HDMI_3_
VDAC_B AJ
LDO RGB DEMOD DC AADC HPD RX_C RX_1B RX_1 RX_2B RX_2
G
AVDD33_
AVDD33_ AVDD33_ AVDD33_ AVSS33_ HDMI_3_ HDMI_3_ HDMI_3_
XTAL_ST AK
PLLGP CVBS_1 CVBS_2 DAC RX_CB RX_0B RX_0
B
AVSS33_ AVSS33_ AVDD12_ AVDD33_
AL
VDAC CVBS_1 DEMOD AADC
OPWRS ORESET ADIN7_S ADIN6_S AVSS33_ AVSS33_ AVSS33_ AR1_AD AL2_ADA AL1_ADA AL3_ADA AR3_AD AR2_AD
VSYNC AM
B # RV RV CVBS_2 PLLGP DEMOD AC C C C AC AC
OPCTRL OPCTRL LED_PW ADIN0_S ADIN1_S AL0_ADA AR0_AD
HSYNC MPXP CVBS0P LOUTP AN
1 3 M1 RV RV C AC
OPCTRL LED_PW VGA_SC ADIN2_S VDACY_ CVBS_C AIN4_L_ AIN2_L_ AIN6_L_ AIN5_L_
COM SOY1 PR1P Y0P SC0 LOUTN AP
8 M0 L RV OUT OM AADC AADC AADC AADC
OPCTRL STB_SD VGA_SD ADIN3_S AIN4_R_ AIN6_R_ AIN5_R_ AIN3_L_
GP RP PB1P SOY0 PR0P SY0 CVBS2P CVBS1P AR
0 A A RV AADC AADC AADC AADC
OPCTRL STB_SC ADIN5_S ADCINN_ AIN1_R_ AIN3_R_ AIN1_L_
SOG COM1 PB0P CVBS3P XTALI AT
10 L RV DEMOD AADC AADC AADC
OPCTRL ADIN4_S VDACX_ ADCINP_ AIN0_L_ AIN2_R_ AIN0_R_
OIRI BP Y1P COM0 XTALO AU
11 RV OUT DEMOD AADC AADC AADC
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 RB
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EN 42 8. L12M1.1L LA IC Data Sheets
Personal Notes:
10000_012_090121
110
2012-Apr-20
Block Diagrams L12M1.1L LA 9. EN 43
9. Block Diagrams
9-1 Wiring Diagram 32" (5000 series)
LED Power
8M95
1316 1M95
8P 14P
1D02 1M95
3P 14P
1G51
52P
USB 3
SSB
B (1150)
USB 2
8G51
1D01
8D01
4P
HDMI
SIDE
SERV.U
DIGITAL
1C22
11P
8C20 AUDIO
OUT
E NETWORK
AV IN AUDIO IN
DVI/VGA
N L
VGA CVI USB 1 (1) ARC (2) (3)
KEYBOARD CONTROL
1308
TV ANTENNA
2P HDMI
51P
8308
(1114)
RED Wires
White wires
CN2 CN1
J2 J1 SENSOR BOARD
3P J 11P (1122)
1M95 (B01)
1. +3V3STBY
2. STANDBY
3. GND 1C22 (B04C) J1 (J)
4. GND 1. LIGHT-SENSOR 1. SDA-SET
5. +12Vin 2. 3D-LED 2. GND
6. +12Vin 3. LED-2 3. SCL-SET
7. +12VAUDIO 1G51 (B04D) 4. GND 4. +5 V
8. +12VAUDIO 1. +VDISP 5. KEYBOARD 5. RC
9. GND 2. +VDISP 6. +3V3-STANDBY 6. +3.3 V - STANDBY
10. GND 3. +VDISP 7. RC 1D01 (B03) 1D02 (B03) 7. KEYBOARD J2 (J)
11. BL-ON-1 4. +VDISP 8. +5V 1. LEFT-+ 1. LEFT-+ 8. GND 1. +5 V
12. BL-DIM-1 | 9. SCL-SET 2. LEFT-- 2. GND 9. LED-2 2. KEYBOARD
13. BL-I-CTRL-1 | 10. GND 3. RIGHT-+ 3. RIGHT-- 10. 3D-LED 3. +3.3 V - STANDBY
14. POWER-OK-1 51. 11. SDA-SET 4. RIGHT-- 11. LIGHT-SENSOR
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Block Diagrams L12M1.1L LA 9. EN 44
8M95
1316 1M95
8P 14P
1D02 1M95
3P 14P
1G51
52P
MAIN POWER SUPPLY
A (1005)
USB 3
SSB
B (1150)
USB 2
N L
1D01
4P
1308
2P
HDMI
SIDE
SERV.U
DIGITAL
1C22
11P
AUDIO
OUT
AV IN AUDIO IN
NETWORK DVI/VGA
8308 8G51
E VGA CVI
TV ANTENNA
USB 1 (1) ARC (2)
HDMI
(3)
KEYBOARD CONTROL
8D01
51P
RED Wires
White wires
(1114)
8C20
CN2 CN1
J2 J1 SENSOR BOARD
3P J 11P (1122)
1M95 (B01)
1. +3V3STBY
2. STANDBY
3. GND 1C22 (B04C) J1 (J)
4. GND 1. LIGHT-SENSOR 1. SDA-SET
5. +12Vin 2. 3D-LED 2. GND
6. +12Vin 3. LED-2 3. SCL-SET
7. +12VAUDIO 1G51 (B04D) 4. GND 4. +5 V
8. +12VAUDIO 1. +VDISP 5. KEYBOARD 5. RC
9. GND 2. +VDISP 6. +3.3 V - STANDBY 6. +3.3 V - STANDBY
10. GND 3. +VDISP 7. RC 1D01 (B03) 1D02 (B03) 7. KEYBOARD J2 (J)
11. BL-ON-1 4. +VDISP 8. +5 V 1. LEFT-+ 1. LEFT-+ 8. GND 1. +5 V
12. BL-DIM-1 | 9. SCL-SET 2. LEFT-- 2. GND 9. LED-2 2. KEYBOARD
13. BL-I-CTRL-1 | 10. GND 3. RIGHT-+ 3. RIGHT-- 10. 3D-LED 3. +3.3 V - STANDBY
14. POWER-OK-1 51. 11. SDA-SET 4. RIGHT-- 11. LIGHT-SENSOR
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Block Diagrams L12M1.1L LA 9. EN 45
8M95
1316 1M95
8P 4P 14P
1D02 1M95
3P 14P
1G51
52P
MAIN POWER SUPPLY
A (1005)
USB 3
SSB
B (1150)
USB 2
N L
1D01
4P
1308
2P
HDMI
SIDE
SERV.U
DIGITAL
1C22
11P
AUDIO
OUT
AV IN AUDIO IN
NETWORK DVI/VGA
8308 8G51
E VGA CVI
TV ANTENNA
USB 1 (1) ARC (2)
HDMI
(3)
8M54
KEYBOARD CONTROL
8D01
51P
RED Wires
White wires
(1114)
8C20
CN2 CN1
J2 J1 SENSOR BOARD
3P J 11P (1122)
1M95 (B01)
1. +3V3STBY
2. STANDBY
3. GND 1C22 (B04C) J1 (J)
4. GND 1. LIGHT-SENSOR 1. SDA-SET
5. +12Vin 2. 3D-LED 2. GND
6. +12Vin 3. LED-2 3. SCL-SET
7. +12VAUDIO 1G51 (B04D) 4. GND 4. +5 V
8. +12VAUDIO 1. +VDISP 5. KEYBOARD 5. RC
9. GND 2. +VDISP 6. +3.3 V - STANDBY 6. +3.3 V - STANDBY
10. GND 3. +VDISP 7. RC 1D01 (B03) 1D02 (B03) 7. KEYBOARD J2 (J)
11. BL-ON-1 4. +VDISP 8. +5 V 1. LEFT-+ 1. LEFT-+ 8. GND 1. +5 V
12. BL-DIM-1 | 9. SCL-SET 2. LEFT-- 2. GND 9. LED-2 2. KEYBOARD
13. BL-I-CTRL-1 | 10. GND 3. RIGHT-+ 3. RIGHT-- 10. 3D-LED 3. +3.3 V - STANDBY
14. POWER-OK-1 51. 11. SDA-SET 4. RIGHT-- 11. LIGHT-SENSOR
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Block Diagrams L12M1.1L LA 9. EN 46
8M83
LED Power
8M99
8M95
1316 1316 1M99 1M95
8P 8P 4P 8P 14P
1M83
20P
1M84
20P
8M59
1G51
51P
MAIN POWER SUPPLY
A (1005)
USB 3
SSB
B (1150)
1G51
41P
USB 2
AMBILIGHT MODULE 10 LED
1D01
4P
1308
2P
HDMI
SIDE
SERV.U
DIGITAL
1C22
11P
AUDIO
OUT
AV IN AUDIO IN
NETWORK DVI/VGA
TV ANTENNA
USB 1 (1) ARC (2)
HDMI
(3)
(1163)
(1163)
KEYBOARD CONTROL
8D01
AL
AL
41P 51P
RED Wires
White wires
(1114)
8C20
1M83
20P
CN2 CN1
J2 J1 SENSOR BOARD
3P J 11P (1122)
1M95 (B01)
1. +3V3STBY
2. STANDBY
3. GND 1C22 (B04C) J1 (J)
4. GND 1. LIGHT-SENSOR 1A04 (B08) 1. SDA-SET
5. +12Vin 2. 3D-LED 1. 3V3_AL 11. GND 2. GND
6. +12Vin 3. LED-2 2. DATA_GND 12. GND 3. SCL-SET
7. +12VAUDIO 1G50/1G51 (B04D) 4. GND 3. SPI-DATA-OUT 13. 12V_AL 4. +5 V
8. +12VAUDIO 1. +VDISP 5. KEYBOARD 4. DATA_GND 14. 12V_AL 5. RC
9. GND 2. +VDISP 6. +3.3 V - STANDBY 5. SPI-DATA-RETURN 15. 12V_AL 6. +3.3 V - STANDBY
10. GND 3. +VDISP 7. RC 1D01 (B03) 1D02 (B03) 6. DATA_GND 16. 12V_AL 7. KEYBOARD J2 (J)
11. BL-ON-1 4. +VDISP 8. +5 V 1. LEFT-+ 1. LEFT-+ 7. AMBI_TEMP 17. 12V_AL 8. GND 1. +5 V
12. BL-DIM-1 | 9. SCL-SET 2. LEFT-- 2. GND 8. GND 18. 12V_AL 9. LED-2 2. KEYBOARD
13. BL-I-CTRL-1 | 10. GND 3. RIGHT-+ 3. RIGHT-- 9. GND 19. 12V_AL 10. 3D-LED 3. +3.3 V - STANDBY
14. POWER-OK-1 41. / 51. 11. SDA-SET 4. RIGHT-- 10. GND 20. GND 11. LIGHT-SENSOR
19300_037_120416.eps
120416
2012-Apr-20 back to
div. table
Block Diagrams L12M1.1L LA 9. EN 47
8M95
1315 1316 1M95
8P 8P 14P
1D02 1M95
3P 14P
1G51
52P
MAIN POWER SUPPLY
A (1005) USB 3
SSB
B (1150)
USB 2
1D01
N L
4P
1308
2P HDMI
SIDE
SERV.U
DIGITAL
1C22
11P
AUDIO
OUT
AV IN AUDIO IN
NETWORK DVI/VGA
E
KEYBOARD CONTROL
8D01
51P
RED Wires
White wires
(1114)
8C20
CN2 CN1
J2 J1 SENSOR BOARD
3P J 11P (1122)
1M95 (B01)
1. +3V3STBY
2. STANDBY
3. GND 1C22 (B04C) J1 (J)
4. GND 1. LIGHT-SENSOR 1. SDA-SET
5. +12Vin 2. 3D-LED 2. GND
6. +12Vin 3. LED-2 3. SCL-SET
7. +12VAUDIO 1G51 (B04D) 4. GND 4. +5 V
8. +12VAUDIO 1. +VDISP 5. KEYBOARD 5. RC
9. GND 2. +VDISP 6. +3.3 V - STANDBY 6. +3.3 V - STANDBY
10. GND 3. +VDISP 7. RC 1D01 (B03) 1D02 (B03) 7. KEYBOARD J2 (J)
11. BL-ON-1 4. +VDISP 8. +5 V 1. LEFT-+ 1. LEFT-+ 8. GND 1. +5 V
12. BL-DIM-1 | 9. SCL-SET 2. LEFT-- 2. GND 9. LED-2 2. KEYBOARD
13. BL-I-CTRL-1 | 10. GND 3. RIGHT-+ 3. RIGHT-- 10. 3D-LED 3. +3.3 V - STANDBY
14. POWER-OK-1 51. 11. SDA-SET 4. RIGHT-- 11. LIGHT-SENSOR
19300_038_120416.eps
120416
2012-Apr-20 back to
div. table
Block Diagrams L12M1.1L LA 9. EN 48
8M83
LED Power
8M99
8M95
1316 1316 1M99 1M95
8P 8P 4P 8P 14P
1M83
20P
1M84
20P
8M59
1G51
51P
MAIN POWER SUPPLY
A (1005) USB 3
SSB
B (1150)
1G51
41P
USB 2
AMBILIGHT MODULE 12 LED
4P
1308
2P HDMI
SIDE
SERV.U
DIGITAL
1C22
11P
AUDIO
OUT
AV IN AUDIO IN
NETWORK DVI/VGA
E
(1163)
(1163)
KEYBOARD CONTROL
8D01
AL
AL
41P 51P
RED Wires
White wires
(1114)
8C20
1M83
20P
CN2 CN1
J2 J1 SENSOR BOARD
3P J 11P (1122)
1M95 (B01)
1. +3V3STBY
2. STANDBY
3. GND 1C22 (B04C) J1 (J)
4. GND 1. LIGHT-SENSOR 1A04 (B08) 1. SDA-SET
5. +12Vin 2. 3D-LED 1. 3V3_AL 11. GND 2. GND
6. +12Vin 3. LED-2 2. DATA_GND 12. GND 3. SCL-SET
7. +12VAUDIO 1G50/1G51 (B04D) 4. GND 3. SPI-DATA-OUT 13. 12V_AL 4. +5 V
8. +12VAUDIO 1. +VDISP 5. KEYBOARD 4. DATA_GND 14. 12V_AL 5. RC
9. GND 2. +VDISP 6. +3.3 V - STANDBY 5. SPI-DATA-RETURN 15. 12V_AL 6. +3.3 V - STANDBY
10. GND 3. +VDISP 7. RC 1D01 (B03) 1D02 (B03) 6. DATA_GND 16. 12V_AL 7. KEYBOARD J2 (J)
11. BL-ON-1 4. +VDISP 8. +5 V 1. LEFT-+ 1. LEFT-+ 7. AMBI_TEMP 17. 12V_AL 8. GND 1. +5 V
12. BL-DIM-1 | 9. SCL-SET 2. LEFT-- 2. GND 8. GND 18. 12V_AL 9. LED-2 2. KEYBOARD
13. BL-I-CTRL-1 | 10. GND 3. RIGHT-+ 3. RIGHT-- 9. GND 19. 12V_AL 10. 3D-LED 3. +3.3 V - STANDBY
14. POWER-OK-1 41. / 51. 11. SDA-SET 4. RIGHT-- 10. GND 20. GND 11. LIGHT-SENSOR
19300_039_120416.eps
120416
2012-Apr-20 back to
div. table
Block Diagrams L12M1.1L LA 9. EN 49
2 4 DEMOD_TSVAL T31
TO DISPLAY
IF1_P IF_N 38 DEMOD_TSVAL
3 IF_P 37 3 DEMOD_TSSYNC T35
IF1_N DEMOD_TSSYNC AE PX2 3
17 DEMOD_TSDATA7 T36
DEMOD_TSDATA0
AGC2 9 IF_AGC2 U35 IF_AGC 1G51
IF2_N AT32 ADCINN_DEMOD 40
IF2_P 7
BO PX3
IF2_N 8 IF2_P AU32 ADCINP_DEMOD
TO DISPLAY
B06C VGA
1A01 B06B VIDEO_IO BE PX4 11
1 RP AR25 RP
10
15
2 GP AR24 GP
5
3 BP AU24
BP B05B USB
13 HSYNC
1
AN25 HSYNC
6
11
B04C GPIO_USB
14 VSYNC AM25 VSYNC
VGA 1C01
CONNECTOR 1
1
B06B ANALOG I/O-COMPONENT & COMPOSITE D37 USB_DM_P1 2
HDD
3 2
USB_DM_P1
1VA1 D36 USB_DP_P1 3
USB_DP_P1
4
10 SPR0P AR28 PR0P 4
18 SPB0P AT28 PB0P
CVI1
14 SY0P AP27
Y0P 1C02
5 CVBS_AV4 AR31 CVBS1P
1
1
AU13 USB_DM_P2 2
USB_DM_P2 SKYPE
3 2
AT13 USB_DP_P2 3
USB_DP_P2
4
4
CVBS CVBS_AV3 AN29 CVBS0P 1C03
SIDE
1
1
AU14 USB_DM_P3 2
B05A USB_DM_P3
3 2
DIGITAL I/O-HDMI AT14 USB_DP_P3 3 SIDE
B05A HDMI-ETHERNET USB_DP_P3
1B01 4
4
1 RX_3_2 AJ37
3 RX_3_2B AJ36
1
6 RX_3_1B AJ34 1
1
7 RX_3_0 AK35 HDMI_3_RX C37 USB_DM_P0 2
3 2
USB_DM_P0 WIFI
9 RX_3_0B AK34 C36 USB_DP_P0 3
USB_DP_P0
18
19
4
10 RX_3_C AJ33
12 RX_3_CB AK33
HDMI 1 RES
CONNECTOR
1B02
B04C FLASH+CONTROL+EJTAG
1 RX_0_2 AF35 7700
3 RX_0_2B AF34 B04C SERIAL_NAND H27U4G8F2D
1
2
10 RX_0_C AH35
HDMI 2 12 RX_0_CB AH34
CONNECTOR
1B03
B04B DDR3
1 RX_1_2 AC35 B04B DDR3
3 RX_1_2B AC34
BRDQ BRDQ(0-31)
1
4 RX_1_1 AD35
2
6 RX_1_1B AD34
ARDQ ARDQ(0-31)
7 AE37 HDMI_1_RX
ARDQ(16-31)
BRDQ(16-31)
RX_1_0
ARDQ(0-15)
BRDQ(0-15)
9 RX_1_0B AE36 7601 7602 7603 7604
18
19
4 RX_2_1 AA35
6 RX_2_1B AA34
7 RX_2_0 AB35 HDMI_2_RX
ARA ARA(0-14)
9 RX_2_0B AB34
18
19
2012-Apr-20 back to
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Block Diagrams L12M1.1L LA 9. EN 50
B04A RESET-AUDIO 5
1401
AIN2_L AP34 AIN2_L_AADC 1
PC_AUDIO
AMPLI-
AIN2_R AU36 AIN2_R_AADC HPOUT_L 7
B06Q
AL3_ADAC AM35 2 FIER
HPOUT_R HEADPHONE
AR3_ADAC AM36 6
OUT 3.5 mm
AIN1_L AT37 AIN1_L_AADC
CVBS AIN1_R AT35 AIN1_R_AADC
SIDE
B04C GPIO_USB
B05B USB 1C01
1
1
D37 USB_DM_P1 2
B03 CLASS-D & MUTING HDD
3 2
USB_DM_P1
D36 USB_DP_P1 3
USB_DP_P1
4
1D03 2 4
+3V3_SW
SPDIF 1 SPDIF_OUT AR16 ASPDIF0
OUT 3 1C02
ARC Y32 ASPDIF1 1
1
AU13 USB_DM_P2 2
USB_DM_P2 SKYPE
3 2
AT13 USB_DP_P2 3
USB_DP_P2
B05A DIGITAL I/O-HDMI 4
4
5B01 2B01 3B09
1B01
B05A HDMI-ETHERNET 1C03
1 RX_3_2 AJ37 1
3 AJ36
1
RX_3_2B USB_DM_P3 2
AU14
USB_DM_P3
3 2
1
AT14 USB_DP_P3 3
6 RX_3_1B AJ34 USB_DP_P3
4
4
7 RX_3_0 AK35 HDMI_3_RX
9 RX_3_0B AK34
18
19
1
CONNECTOR 14 C37 USB_DM_P0 2
3 2
USB_DM_P0 WIFI
C36 USB_DP_P0 3
USB_DP_P0
1B02 4
4
1 RX_0_2 AF35
RES
3 RX_0_2B AF34
1
2
4 RX_0_1 AG37
B04C FLASH+CONTROL+EJTAG
6 RX_0_1B AG36 7700
7 RX_0_0 AG35 HDMI_0_RX B04C SERIAL_NAND H27U4G8F2D
PDD
9 RX_0_0B AG34 SDIO_SPI
18
19
10 RX_0_C AH35
HDMI 2 12 RX_0_CB AH34 PDD
FLASH
NAND_PDD(0-7)
CONNECTOR 4Gb
1B03
1 RX_1_2 AC35
3 RX_1_2B AC34
B04B DDR3
B04B DDR3
1
4 RX_1_1 AD35
2
ARDQ(16-31)
BRDQ(16-31)
ARDQ(0-15)
BRDQ(0-15)
19
10 RX_1_C AE35
7601 7602 7603 7604
12 RX_1_CB AE34
HDMI 3 H5TQ2G63BFR H5TQ2G63BFR H5TQ1G63DFR H5TQ1G63DFR
CONNECTOR
1B04 SDRAM SDRAM SDRAM SDRAM
1 RX_2_2 AA37 2Gb 2Gb 1Gb 1Gb
3 RX_2_2B AA36
1
2
4 RX_2_1 AA35
6 RX_2_1B AA34
7 RX_2_0 AB35 HDMI_2_RX
9 RX_2_0B AB34
18
19
2012-Apr-20 back to
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Block Diagrams L12M1.1L LA 9. EN 51
ARDQ(16-31)
BRDQ(16-31)
ARDQ(0-15)
BRDQ(0-15)
TO B04C GPIO_USB
POWER 7601 7602 7603 7604
11 BL_ON_OFF C31 H5TQ2G63BFR H5TQ2G63BFR H5TQ1G63DFR H5TQ1G63DFR
SUPPLY GPIO47
7503
B04C SERIAL_NAND
B04C FLASH+CONTROL+EJTAG
MUTE AR19
B03 OPCTRL4 SDIO_SPI 7700
H27U4G8F2D
VGA_DETECT AN18
B06C OPCTRL9
ENABLE_WOLAN AP19 PDD NAND_PDD(0-7)
B05B OPCTRL5
FLASH
WOLAN_IRQ AR20 4Gb
B05B OPCTRL0
Pcontrol NAND_control
B04C FLASH+CONTROL+EJTAG
1C20
3 LED2 AN22 LED2_PWM1
4 AM9 AMBI_SPI_SDO
LDM_CS B08
6 B04C GPIO_USB
TO +3V3STBY AU11 AMBI_SPI_SCKO
5 KEYBOARD AU23 LDM_CLK B08
IR/LED PANEL ADIN4_SRV
AND AT23
1 LIGHT-SENSOR
KEYBOARD ADIN5_SRV
CONTROL AT23
2 3D-LED ADIN5_SRV B07 ETHERNET
8 B05A HDMI_ETHERNET
+5V_SW AT18 TXVP_0
B04C MISC TXVP_0
7 RC AU21 AU18 TXVN_0
OIRI TXVN_0
AT34 AT17 RXVP_1
XTAL1 RXVP_1
+3V3STBY 1703 AU17 RXVN_1 ETHERNET
RXVN_1 CONNECTOR
7701 27M
BD45292G AU34 RJ45
XTALO
5
VDD
VOUT
4 ORESET AM22
ORESET B08 AMBILIGHT
1A04
1701 3 AMBI_SPI_SDO 3
B08
3 AP18 UORX AMBI_SPI_SCKO 5 TO
UART B08 AMBILIGHT
AMBI_TEMP 7
SERVICE 2 AR18 UOTX B04C
CONNECTOR
1
B04C GPIO_USB
LCD_PWR_ON E32
B04D GPIO43
3D_2D_SELECT AR9
B04D GPIO54
YPBPR_DETECT D31
B06B GPIO46
CVBS_DETECT E30
B06B GPIO48
ENABLE_3V3_AMBIn AT9
B08 GPIO53
AMBI_TEMP AM23
B08 ADIN7_SRV
2701 AP9
GPIO52
SDM
2700 E29
GPIO51
PANEL 19300_027_120405.eps
120405
2012-Apr-20 back to
div. table
Block Diagrams L12M1.1L LA 9. EN 52
7300 +3V3_SW
MT5396
3735
3734
B04C MISC
AP12 SDA
OSDA0
AN12 SCL
OSCL0
3741
3740
3402
3403
3799
3798
ERR
13
5 6 23 24
7702
F32 SYS_EEPROM_WE 7
GPIO44 7705 7400
M24C64 TAS5731PHP
1T71
EEPROM CLASS D 1
(NVM) AMPLIFIER TEMPERATURE
+3V3_SW
3 SENSOR
ERR
35
3784
3783
1C20
VCOM_SDA 3759 11 RES
OSDA0 AP15 STB_SDA TO
B04D B04A LOCAL
VCOM_SCL 37A9 9 CONTROL
OSCL0 AN15 STB_SCL
RES
RES
3213
3212
V34 DEMOD_SDA 3232
OSDA2
V35 DEMOD_SCL 3231
OSCL2
+3V3_SW
3205
3204
B04C OPTCTRL_
TCON 7210 45 TUNER_SDA
3B22
3B21
1B04 CXD2828ER
46 TUNER_SCL
AB33 HDMI_2_SDA 16
1
2
HDMI_2_SDA DIGITAL
3218
3217
HDMI 4 (SIDE) DEMODULATOR
AC33 HDMI_2_SCL 15 CONNECTOR
HDMI_2_SCL
18
19
OPWR1_5V 11 10
ERR
27 1201
3B12
3B11
1B03 SUT-RA214ZN
AD33 HDMI_1_SDA 16
1
HDMI_1_SDA
2
MAIN
HDMI 3
HDMI_SDA2 HDMI_1_SCL 15 TUNER
HDMI_1_SCL AE33 CONNECTOR
18
19
HDMI_SCL2 OPWR0_5V ERR
34
3B02
3B01
1B02
AF33 HDMI_0_SDA 16
HDMI_0_SDA
1
2
HDMI 2
HDMI_SDA1 AG33 HDMI_0_SCL 15
HDMI_0_SCL CONNECTOR
18
19
HDMI_SCL1 OPWR3_5V
3B31
1B01
AH33 HDMI_3_SDA 16
1
2
HDMI_3_SDA
HDMI 1
AH32 HDMI_3_SCL 15 CONNECTOR
HDMI_3_SCL
18
19
+3V3STBY
B06C VGA 7D04
PCA9540BDP
1G51
3537
3538
4D23
3A20
3A21
1A01
4D24
10
VCOM_SDA
15
VGA_SDA 3A26 12
5
VGA_SDA AR22
VGA B04C
3A27 15 CONNECTOR VCOM_SCL
VGA_SCL AP22 VGA_SCL
1
RES
11
19300_001_120330.eps
120330
2012-Apr-20 back to
div. table
Block Diagrams L12M1.1L LA 9. EN 53
8 8 T1A
4402
4403
1B02
4 4 5416 +3V3D OPWR0_5V
HDMI 2 18 B04a
CONNECTOR
5 5 +12VS 7216
+3V3_AUDIO 1B03
6 6 IN OUT HDMI 3 18 OPWR1_5V
COM B04a
CONNECTOR
7 7 +VSND B03
1B04
8 8 HDMI 4 SIDE 18 OPWR2_5V
B04a
CONNECTOR
9 9
B04A MTK POWER
10 10
+1V2_SW +1V2_SW
B01
11 11 BL_ON_OFF +1V1_SW +1V1_SW
B04C B01
SENSE+1V1_MT5396
12 12 PWM-DIMMING B01 B05B DIGITAL I/O - USB
B04C
+3V3STBY +3V3STBY +5V_SW +5V_SW
13 13 BACKLIGHT-BOOST-A B01 B01
B04C
+1V5_SW +1V5_SW 1C01
3C01 +5V_USB1 1
14 14 POWER-OK B01
B04A
+3V3_SW +3V3_SW
B01 1C02
3C11 +5V_USB2 1
+12VS +12VS
+12VS B01
OPWR0_5V OPWR0_5V 1C03
7116 B05a
3C21 +5V_USB3 1
RT8293 B02,B03,B04a,
5101 2 5100 +3V3_SW OPWR1_5V OPWR2_5V
Synchronous 3 B04c,B04d,B05a,B05a
Step-down 7113 B06a,B07,B08
Converter +1V2_SW OPWR2_5V OPWR2_5V 1C31
IN OUT B02,B04a B05a 3C31
COM USB_PWR_P0 1
7117
OPWR3_5V OPWR3_5V
RT8293 B05a
5103 2 Synchronous 3 5102 +5V_SW 7C01
B02,B04c,B05b, RT9715
Step-down B06c
Converter +3V3STBY 5 1 +3V3_WOLAN
B01
B04B DDR3
7118
RT8293 +1V5_SW +1V5_SW 4
5105 2 5104 +1V5_SW B01
Synchronous 3 B04a,B04b
Step-down SENSE+1V5_MT5396 ENABLE_WOLAN
B01
Converter 6 SENSE+1V5_MT5396 B04a
7110
RT8288 B06A ANOLOG I/O - HEADPHONE
5106 2 5107 +1V1_SW
Synchronous 3 B04a B04C CONTROLLER
+3V3_SW +3V3_SW
Step-down B01
Converter 6 SENSE+1V1_MT5396 B04a +3V3_SW +3V3_SW
B01 +3V3STBY +3V3STBY
B01
+3V3STBY +3V3STBY
B01
+5V_SW +5V_SW
B01
B06C VGA
1C20
6 +5V_SW +5V_SW
TO B01
37A1 8 CONTROL
6A06
PANEL
1E01
VGA 9 3A19 6A07 5A06 5V_DC
CONNECTOR
19300_029_120406.eps
120406
2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 54
DC_LINK
TP230 is on Pin 3 of L602 but this pin is not indicated here
TP20
! BD601 L501
10A 600V
TP17
TP24
TP29
TP18
2
! L602
TP72
TP84
BFS3550A
D601 D601A
4 1 1 4 R130
Q501 TP63
400uH S3V60 S3V60 D602 OPEN R511 5N50_D PACK
OPEN
OPEN
D112
TP134
TP253
R129
3
D
R518 C512 D211
E
G
! CY105 ! C601 ! C600 Q103 4.3KF 105 OPEN
R512
! CY106 TP25 NUR 460 TP85
B L205
470nF / 500V C506 U501 47
TP65
470pF 470nF / 500V OPEN
BFD3565R
470pF TP74
TP126
VLED
TP129
S
R510 L6599
L603
GND1 TP23
D503 R519 BFD3565R
1
C
1 16
TP64
T501 C411
TP57
C120 750K TP81
CSS VBOOT
TP115 ! MBRF10150CT
OPEN 10 TP133
68uF/100V
TP125
2 15 MMSD4148W
C504 DELAY HVG 12
GND1
R520
10K
1
C505 TP69
! L601
TP76
470k F
PQ3211/10mm 331 C0G 4 13 104
R615
RFMIN NC TP231 TP229
2 10
12V3_OVP
4
TP27 VCC
12
TP56
5 STBY VCC Q510 BFS3550A TP127 TP174
L202
! VA102 TP26
TP98
TP98 is on the pattern of Heatsink2. TP35
TP55
5N50_D PACK
9
12V3_SND
C610A
C610B
TP50
750V ! C645 6 11
C610
TP33
470k F 470k F
D
Q602 ISEN LVG R521 BFS3550A
R616
TP78
D 3 8
R604 C509A G OPEN
R609 68uF/450V 7 10 C510 C205 C214
TP128
C509 R501 LINE GND TP54
47TP53 C206
3.3KF
100K F R507
R508
G G 7
225/ 25V NXB 1000uF/16V OPEN
TP47
100
TP36
open 100K 10KF
TP254
8 9 D504 R522 R523 S
TP135
NXB 1000uF/16V
DIS PFC_STOP
47p / 1KV
TP44
47p / 1KV
47p / 1KV
TP140 TP116
R617
TP49 6
MDF11N60
4
D603 R608 IC-SOP-16-L6599
S
S TP28
10 10K
TP62
GND_SND
TP97
TP70
MMSD4148W TP222 TP117
R610
TP99
5
10k
VCC TP60
D512
JW1
TP235
TP59
MMSD4148 10 TP34 LINE TP77
R509 L201 L201A
PEE3232 +12V
36K
470k F
R502
R618
C526 R531 BFS3550A BFS3550A
R507A
47 1N4148 C513 L512
TP58
! CY202 TP234
TP121
C215
C511
0
R513
TP71
C602 C203
104
IC600 100pF/1kV 100/1W D212B
56
103 6.8nF/1kV 471 OPEN
104 C501
TP39
SCY99102BDR2G TP38
C502 MBRF2060CTL NXB 1000uF/16V
TP252 JUMPER GND1
TP233
TP232
C609
D 222
C613 1 FB VCC 8 VCC R612 G
TP236
TP79
TP93
DRV 7 TP251
TP255 MMSD4148W NXB 1000uF/16V NXB 1000uF/16V
R251
620
S
STK0160
SA101
GND1
TP101
TP40
33 ! PC501
TP42
4 CS ZCD 5 102
ZD503
TP112
R256
5.6V
TP46 TP37
102/50V EL817MC
! CY104 ! CY103 R602 C507 TP120
OPEN OPEN 10K F TP100
1K F
R619
12KF
C608
4.3K F
10K F
TP22 TP215
R257
R252
473 TP43
R603
TP114
120 1W
2W 0.12
2W 0.12
TP106
C606
R101
C604
R633
R614
120 F
R620
TP45
56 F
MMSD4148 105
TP111
TP105
U203
AS431AZ
2.4K F
R253
! LF102
3 4
HOT TP113
300 F
R254
1 2
GND1 GND1
CS1820250M DC_LINK
ST3V3
3V3_OVP
COLD
TP123
TP122
TP237
1kF
TP30
! CY101 R131TP87 R132 L301
! T101 D301 12V3_OVP
P6KE160A
TP258
TP238
5 10
C119 D102
TP15
102 1KV 4 9
GND1 R133 R134 4.7uH
R113 IN4007 68K 68K MMSD4148 C302
TP91
3 C301 R272
TP95 TP94 TP80 8
NXB 1000uF/10V NXB 680uF/10V
CX101 200 D106A D106 KTN2222S / SOT-23 D107 R105 24K F
! TP32
1 7
TP31
2.7K F
100nF MMSD4148
8
7
6
5
TP124
R305
100K 2 6 R302 1kF
FSL106MR
1K
TP92
GND DRAIN
VCC DRAIN
DRAIN
VSTR
C107 R103
R102
TP107
U101
1.5KF
TP136
TP138
TP137
225 EFD1515
R303
TP96
R304
IPK
TP73
OPEN ZD105
1
2
3
4
TP145
TP16
C102 ! PC101 C260
R260
! VA101 EL817MC 102
2KF
1.5K F
TP52
OPEN C303
TP214
R306
225
TP153
GND1
TP144
U301
Q105
120 F
TP21
STVCC AZ431L
R307
! F101 R120 2N7002 R308
LINE
T3.15AH 250V 470K 560
GND1
TP239
TP89
C115 D101
9.1V
TP51
TP104
OPEN
TP66
TP90
R122
TP67
TP68
TP146 TP147
2N7002 C106
ZD103A
AC-inlet 220K
E
R128
104
105
GND1
TP86
TP211
TP259
3V3_OVP
STVCC D151
R156 C151 R160
1N4148W R152 R314
1KF 104 10 1KF
R312 51K F
TP143
TP139
TP103
E
! PC103
B KTN2907A 1KF
EL817MC R311 R317
TP83
Q151
0F
C
TP142
1KF
B TP141
Q150
KTN2222A TP48
U306
E
GND1
GND1
1 2011-12-08
2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 55
TP250
6
R3 Cathode R3
TP161 R481F 5.1k
7
R2 R481C
R2 Cathode R3 TP6
R6 TP3
E
TP162
R412
E
8 5.1k TP189
TP177
BCX52-16 TP110 100 F 100 F
Q403F
C
Q403C TP184 TP190
C
TP209/210 is on the solderjoint of the LED connector R482F
R410
TP192
R482C TP8
44
43
42
41
40
39
38
37
36
35
34
103 R409 R486C R483C R484C 30 F 3.9 F OPEN
30 F 3.9 F OPEN
PWM6
NC
NC
100KF
PWM3
PWM5
IS7
CMP8
IS8
PWM1
PWM2
PWM4
TP220
TP216
1 NC PWM7 33
2 CMP7 PWM8
32 TP178 GND1 GND1
R408
TP217
3 IS6 RT 31
IS6
4 CMP6 30 150K F GND1
CMP6 COMM
5 IS5 29
IS5 ADIM ADIM
6 CMP5 U401 28 STATUS
CN4_1M95 CMP5 STATUS
LQFP-48 pin 0.8 Pitch OZ9909TN TP202 R407 10 TP247
3V3stdby 1 ST3V3 7 IS4 VIN 27 +12V
TP119
IS4
Standby 2 C319 TP155
8 CMP4 26
STANDBY CMP4 ENA BL-ON-OFF
OPEN R481B 5.1K TP160
R481E 5.1k
TP5
3
TP118
9 IS3 25 R406
GND1 GND1 IS3 VREF R2 R5 TP1
10K
E
GND1
TP183 VREF SOT89 R485B TP181
TP188
19 RANGELED
+12V 5 TP182
11 IS2 23
TP201
BCX52-16 100 F
+12V IS2 SYNC
18 SSTCMP
Q403B
C
Q403E
C
R415 R482B
TP187
15 GNDA
21 GNDP
12 CMP2
14 CMP1
6
17 UVLS
+12V C407 C408 R482E
16 OVP
22 DRV
+12V
20 ISW
13 IS1
100K IS2
104 105 1K IS5
+Vsnd 7 12V3_SND 1k
TP12
TP9
TP154
+Vsnd 8 12V3_SND R486B R483B R484B
TP176
TP180
R486E R483E R484E
9 30 F 3.9 F OPEN 30 F 3.9 F OPEN
GND_SND GND_SND CMP2
GND_SND 10 GND1
GND_SND TP218
IS1 DRV
TP152
BL-ON 11 BL-ON-OFF GND1
CMP1 ISW
BL-DIM(Vsync) 12
TP151
GND1
BL-DIM(VSYNC)
TP219
TP248
TP150 UVLS GND1
E
SOT89 R485A SOT89 R485D
B B
CMP1 CMP4
BCX52-16 100 F BCX52-16 100 F
Q403A Q403D
C
TP186
R482A TP179
R482D
IS1 IS4
TP13
1K 1K
TP10
CN6_1M11 100
1 GND1 R478 R477 POK
GND_AL GND1
GND1
2 4.7K 5.6K
+12V_AL +12V VREF
3
GND_AL C469
TP242
2041145-4 TP246
GND1
CN7_1M09
1
GND_AL/ GND_SND TP228
2
+12V_AL/+Vsnd TP227
3
GND_AL/ GND_SND TP226
4
+12V_AL/+Vsnd TP225
D401A
TP131
TP130
5
GND_AL/ GND_SND TP224
! L401
6 D401 L402
+12V_AL/+Vsnd TP223
1 4
VLED LED_A
2041145-6 BFD3565R
TP196 MBRS3200
R411 55uH C410 R421
10K F 101 1KV C413 22K F
TP193
TP198
TP197
R418 D410
GND1
68uF/100V
R411A 15 D TP108
R421A
D4148W
TP194
G TP108.207.208 is on the pattern of Heatsink4 TP207
TP199 10K F DRV TP208
22K F
TP175
R468
TP245 R417 100 Q402
GND1
KTN2907A TP159
R411B S
AOD478/D-PACK TP204 R421B
560 TP158
R470B TP195
TP191
TP132
R470A
OPEN
OPEN
3.9KF
R462
R470
Q407 1K
3.9K
R455A 1F
R455B 1F
R455C 1F
R455D 1F
R455E 1F
R455F 1F
R455 1F
TP212
TP200
C460
TP241 TP157
C423 OPEN C422
C471
OPEN OPEN
TP109
TP169
R469
680F
1.2KF
TP156
R464
R473
R467
100K
47K
R471
12KF
Q451 TP168
2N7002
TP148 TP260
R465
BL-I-CTRL
10K
C472
R466
R461
220K
220F
C474 C473
OPEN R460 475 105
TP244
GND1 0R0
GND1 GN D 1 GND1 GND1 GND1
TP167
ZD401 TP166
Q408
2N7002
5.1V C475
R475
470K 103 TP221
1 2011-12-08
2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 56
1 2011-12-08
2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 57
1 2011-12-08
2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 58
DC-DC
B01 12V/3V3 CONVERSION
7116
B01
RT8293AHGSP
5101 I144 3102 I154 2103
2 1
VIN BOOT
33R I145 1R0 100n 5100 F101
7 3
10u 16V
EN SW +3V3_SW
100K
2196
2101
3100
RES
2102
10u
10u
2100 I146 I136 10u
8 5
4K7 1%
SS FB
3105
RES 2126
RES 2118
2105
2104
22u
22u
22u
22u
100n I106
10 6
VIA COMP
To Be Connected Directly to 1A04/1A05 With 3mm Track.
GND
GND HS *
2193
220n
2107
3103
4
RES
10R
3n3
SS1_GND 1M99
1K5 1%
100K
3104
3106
1 F133 GND_AL
I118 2
3 F134 GND_AL
* F131
+12V_AL
F132
SS1_GND 4 *
3107
RES 2108
RES
2106
470p
12K
10n
5
SS1_GND SS1_GND SS1_GND 6 +12VS
7
8
2199
2131
RES
10n
10u
12V/5V CONVERSION SS1_GND SS1_GND 2041145-8
7117
RT8293AHGSP
5103 I147 3109 I155 2113 GND_AL
33R I150
2
VIN BOOT
1
1R0 100n 5102 F127
* AMBILIGHT
7 3
10u 16V
EN SW +5V_SW
100K
2111
2110
3108
RES
2112
10u
10u
10u
2109 I120 I149 +3V3STBY
8 5
220u 6.3V
10K 1%
SS FB 3129
3112
2114
2116
2117
RES 2197
2115
STANDBY
2136
22u
22u
22u
22u
1n0
100n I122
10 6
VIA COMP 68R
2191
2192
2180
2137
RES
RES
10u
10u
1n0
GND
1n0
GND HS
2194
220n
2120
SS2_GND
RES
3110
4
RES
10R
3n3
+12VS
100u 16V
I119
RES 2189
RES 2188
100n
RES 2187
100n
1M95
SS2_GND
15K 1%
1 F113
3111
RES 2121
RES
2119
470p
10n
2 F114
SS2_GND
F115
2K2 1%
3
3114
3113
F102
12K
4 +12VS
5 F103
6 F118
12V/1V5 CONVERSION SS2_GND
SS2_GND
7
8
F119
F120 +VSND
SS2_GND
SS2_GND 9 F121
7118 10 F122
RT8293AHGSP 11 F123 3126 68R BL_ON_OFF
12 F106 PWM-DIMMING
5105
2
VIN BOOT
1
I135 3115 I156 2166
13
14
F107
F108
*
RES 3128
3127 68R
68R BACKLIGHT-BOOST-A
POWER_OK
33R I132 1R0 100n 5104
7 3
10u 16V
EN SW +1V5_SW
2124
2123
2125
RES
10u
10u
2122 1-2041145-4
I152 I151 3u6
100K
3116
8 5
SS FB
3119
2168
RES
2169
RES 2170
RES 2171
10K
22u
22u
22u
22u
100n I127
10 6
VIA COMP
GND
GND HS 2133 3127
SS3_GND *
3118
2164
4
RES
10R
3n3
220n
RES
RES 2127
100p
RES 2128
100p
2185
2143
100n
2132
100p
2133
100p
2134
100p
2145
2198
100n
TM100 Panel No No
RES
10n
1n0
SENSE_1V5_DDR
0R
*
I134
3120
15K
SS3_GND
3117
RES 2165
2172
470p
RES
8K2
10n
SS3_GND
18K 1%
330K
3121
3122
2174
100n
SS3_GND SS3_GND
12V/1V1 CONVERSION
SS3_GND SS3_GND
7110-1
3V3/1V2 CONVERSION
RT8288AZSP
7
7113
5106 VCC I138 2175 I140 3123 LD1117DT12
1 4
VIN BOOT F129
33R 100n 0R +3V3_SW 3 2
IN OUT +1V2_SW
2
5107
100K
2179
100n
2178
2177
RES 2176
3170
SW 3
22u 6.3V
10u
10u
10u
I139 +1V1_SW
COM
2154
100n
2156
2157
5
2155
RES
10n
22u
EN I158 I143 2u0
6
1
FB
RES 3133
RES 3167
2182
2183
3137
RES 2147
RES 2148
RES
22R
22R
10R
22u
22u
22u
22u
GND
GND HS
8
I157
3146 F130
2184
2146
RES
RES
1n0
10n
SENSE_1V1_MT5396
1K0 1%
0R
3162
SS4_GND
3168
I153
39K
2K2 1%
RES 3169
3130
3131
33K
22
23
24
25
26
18 10
19 11
VIA SS4_GND
20 VIA 12
21 13
VIA
14
15
16
17
1 2012-01-20
19300_002_120402.eps
120402
2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 59
100n
100n
100n
100n
100n
100n
100n
100n
2215
100n
2207
2208
2209
2210
2211
2213
2214
2216
1205
1 3
41M
4
2
2200
2201
8p0
8p0
3200
1K0
7210
10
22
28
44
19
32
33
40
CXD2828ER
PVDD
XVDD
TAVDD 7220
CVDD DVDD LD1117S25
5 3210 33R DEMOD_TSCLK
TSCLK 2
35 4 3211-2 2 7 22R DEMOD_TSVAL F200
XTALI TSVALID 3 4
3 3211-3 3 6 22R DEMOD_TSSYNC +5V_SW IN OUT +2V5_SW
TSSYNC
34
+3V3_SW XTALO COM
10u 16V
RES 2248 100n 8 3211-1 1 8 22R DEMOD_TSDATA7
0
2225
RES 2223
RES 2226
100n
2224
100n
RES 2227
22u
10u
IF1_N 3201 47R 4201 RES 42 9 +3V3_SW
XTALSEL 1
IF1_P 3202 47R RES 3203 1K0 12
1
2
3226 47R 38 13
TAINP 3
IF_AGC1 3227 37 TSDATA 14
2K2
2K2
47R
TAINM 4
2204
2205
15
82p
82p
+3V3_SW 5
1 16
GPIO0 6
47 17
GPIO1 7
3212
3213
2 7216
GPIO2 F212 LD1117S33
20 3231 47R DEMOD_SCL
SCL 2
21 3232 47R DEMOD_SDA
3206 SDA 3 4
3204
3205
48 +5V_SW
3K3
3K3
330u 6.3V
22u 6.3V
2206 100n 51 COM
2249
100n
RES 2229
2230
100n
RES 2232
2228
RES 2231
RES
22u
10u
TUNER_SCL 46 52
TTUSCL
TUNER_SDA 45 53 1
TTUSDA
54
55
24 56
TESTMODE
3228
57
22K
58
RES 3207 1K0 25 59
+3V3_SW SLVADR0
RES 4202 41 60
SLVADR1
61
3208 0R I206 26 VIA 62
OSCEN_X
63
64
DEMOD_RST F202
29 65
RST_X
66
67
3209
30 68
4K7
OSCMODE
69
70
71
72
73
GND_HS
TAVSS
74
XVSS
VSS
2246
6
11
18
23
27
31
43
36
39
49
47n 7300-7
MT5396
3230
DEMOD_IF
22K 3223
IF_AGC2 U35
IF_AGC
U34
10K RF_AGC
DEMOD_RST T34 R34
DEMOD_RST PVR_TSCLK
DEMOD_TSCLK T32 R32
5200 DEMOD_TSCLK PVR_TSVAL
+3V3_TUN DEMOD_TSVAL T31 R33
DEMOD_TSVAL PVR_TSSYNC
DEMOD_TSSYNC T35 P33
4u7 DEMOD_TSSYNC PVR_TSDATA0 IF2_N
DEMOD_TSDATA7 T36 P34 3224 100R I207
DEMOD_TSDATA0 PVR_TSDATA1
2217
2218
100n
U36
47u
DEMOD_TSDATA1
1201 T33 P35
DEMOD_TSDATA2 SPI_CLK
14
15
SUT-RA214ZN
RES 2247
T30 N37
10p
DEMOD_TSDATA3 SPI_CLK1
150R
3222
2244
V33 N35
47p
DEMOD_TSDATA4 SPI_CLE
1 F203 V32 N34
A3.3V DEMOD_TSDATA5 SPI_DATA
2 A209 2239 1u0 5203 1K0 IF1_N V31 N36
IF1_P DEMOD_TSDATA6 CI_INT
3 A210 2240 1u0 5204 1K0 IF1_P V30
IF1_N DEMOD_TSDATA7
4 F211 3229 4K7 IF_AGC1 AT32
AGC1 ADCINN_DEMOD
TUNER
2245
8 2220 1u0 5202 1K0 IF2_P R35
47p
IF2_N A205 CI_TSDATA0
9 F206 3214 4K7 IF_AGC2
AGC2
10 F207 3217 15R TUNER_SCL
I2C_SCL
11 F208 3218 15R TUNER_SDA
I2C_SDA
47p
47p
22p
16
13
12
2221 22p
2233 10n
2222
RES
2235
2236
RES
1 2012-01-20
19300_003_120402.eps
120402
2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 60
+VSND
47u 35V
47u 35V
2474
2475
* *
2465
2432
2433
2434
2435
2436
220n
2437
220n
5404
2438
2439
2440
2441
2466
2442
220n
2443
220n
5405
30R
30R
10u
10u
10u
10u
10u
10u
10u
10u
10u
10u
* * * * * * * * * *
47u 25V
47u 25V
2467
3422
2469
3424
10K
10K
** * ** * SPEAKER_R-
* *
2428 100n
2429 100n
2463 10u
47u 25V
2468
3423
2470
3425
10K
10K
3411 * * * *
+3V3D
1R0
* * * *
3412
+3V3D
1R0
I415
2426
10n
*
*
I416 5400 5414
SPEAKER_L+
10u 30R
3418
2413
220n
2414
220n
2417
RES
18R
10n
15K
+3V3D +3V3D +3V3D 3404
* *
RES 3419 15K
I421
* *
13
27
34
35
2
3
AVDD
DVDD
PVDD_AB
PVDD_CD
2412
330p
AOLRCK 20
LRCLK
3401
AOBCK 21
10K
SCLK
* * 5410
3400
1 SPEAKER_L+
47K
OUT_A
AOMCLK 15
MCLK 30R
4 I410 2408 33n
BST_A
AOSDATA0 22 43 I411 2409 33n
SDIN BST_B
2416
3
RES
D_RESET
10n
SDA 3402 47R 23 7400 46 SPEAKER_L-
SDA TAS5731PHP OUT_B
5 SCL 3403 47R 24
I420 7401-2
PUMH2
SCL
39
5401
RES
5406
**
6
4 14
A_SEL
OUT_C
42 I412 2410 33n
I417
** SPEAKER_L-
F401
2473
220n
D_RESET 25 33 I413 2462 33n 1D01 RES 5411 1D02
RESET BST_D
Left+ F403
2418
RES 5407
2431
POWER_DOWN 2 1 F411
RES
30R
7401-1 1
10n
10n
PUMH2 19 36 2
1
PDN OUT_D
* *
Left-
3
30R
** F412
2
11
P OSC_RES
16 I414 3407 18K2 3408 * 2419
*
Right+
Right- 4
RES 5412 3
1407
1406
1408
I404 470R 6
47n I405 SSTIMER 10u 30R
2425
RES
10n
F409
2422
2400 4n7 26 5
STEST
3409
220n
2423
220n
2424
MUTE 7 RES 3420 22K
18R
**
10n
1402
1403
1404
1405
2404 2n2 I407 12 40
RES
VR_ANA
NC 41 SPEAKER_R-
18 44 *
VR_DIG I423 2421
** *
I419
45
31
3406 2402 VREG 330p
3410
18R
50 60 +3V3_SW
470R 47n RES
2403 51 61
I406
52
53
62
63
I424
5403
* * 5408 SPEAKER_R-
3417
54 64
1R0
2405
2420
330p
2427
RES 5409
55 VIA VIA 65
RES
30R
10n
10u
56 66 SPDIF
57 67
I408
*
PGND_CD
1D03
PGND_AB
VCC
DVSSO
I409 59 69
AGND
DVSS
AVSS
SPDIF_OUT 1
VIN
100n 33R
30
28
17
29
47
48
37
38
49
3
GND
MT
2461
33p
4 5
7402
+12VS
* 4402 LD1117DT33
GND_PLL
+VSND
*4403 3
IN OUT
2 +3V3_AUDIO F410
* * 5413
22u 6.3V
COM
30R
2471
100n
2472
1
GND_PLL
2430
10n
F405
**
OUTPUT DIVERSITY
1D02 **
2467, 2468, 2469, 2414, 2423, 2426, 2430, 2431, 2470, 2473. 2413, 2416, 2418, 2425, 2422, 2427,
F408 5416
+3V3D +3V3_AUDIO 3422, 3423, 3424, 3425.
5410, 5413. 5406, 5408
30R
ACTIVE 2.1
RES 5417 YES NO
+3V3_SW (CURRENT)
2.0 NO YES
30R
2474, 2475. 2432, 2433, 2434, 2435, 2438, 2439, 2440, 2441, 2465, 2466.
*
+12VAudio
4402
NO
4403
YES
+24VAudio YES NO
1 2012-01-20
19300_004_120402.eps
120402
2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 61
MTK5396 Power
B04A B04A
+1V1_SW
7300-3 +1V5_SW
MT5396
CORE_VCC
100n
100n
100n
100n
100n
100n
100n
7300-6
25A2
P14 AN8 MT5396
4u7
SENSE_1V1_MT5396 VCCK_1 VCCK_25
P15 AP7
25A0
25A1
2595
2596
2597
2598
2599
P16
VCCK_2 VCCK_26
AP8
DDR_POWER
VCCK_3 VCCK_27
P17 AR7 A3 T6
VCCK_4 VCCK_28 DDRV_1 DDRV_26
100n
100n
100n
100n
2506 100n
100n
2508 100n
100n
100n
100n
100n
100n
100n
2515 100n
100n
2517 100n
100n
100n
100n
100n
100n
100n
2524 100n
100n
2526 100n
100n
100n
4u7
P18 AR8 A4 U5
220u 2V0
2500
P19 AT7 B3 U6
22u
100n
100n
100n
100n
100n
R14 AT8 B4 V5
2501
2502
2503
2504
2505
2507
2509
2510
2511
2512
2513
2514
2522
2516
2518
2519
2520
2521
2523
2525
2527
2528
VCCK_7 VCCK_31 DDRV_4 DDRV_29
T14 AU7 C3 V6
VCCK_8 VCCK_32 DDRV_5 DDRV_30
U14 AU8 C4 AC1
2580
2581
2582
2583
2584
VCCK_9 VCCK_33 DDRV_6 DDRV_31
V14 P20 D4 AC2
VCCK_10 VCCK_34 DDRV_7 DDRV_32
W14 P23 D5 AC3
VCCK_11 VCCK_35 DDRV_8 DDRV_33
Y14 R24 E5 AC4
VCCK_12 VCCK_36 DDRV_9 DDRV_34
AA14 T24 E6 AC5
VCCK_13 VCCK_37 DDRV_10 DDRV_35
AB14 V23 F6 AC6
VCCK_14 VCCK_38 DDRV_11 DDRV_36
AC14 W23 F7 A25
VCCK_15 VCCK_39 DDRV_12 DDRV_37
AC15 Y23 G6 B25
VCCK_16 VCCK_40 DDRV_13 DDRV_38
100n
100n
100n
100n
100n
AC16 AA23 G7 C25
VCCK_17 VCCK_41 DDRV_14 DDRV_39
AC17 AC20 G15 D25
VCCK_18 VCCK_42 DDRV_15 DDRV_40
AC18 AC21 G18 E20
2585
2586
2587
2588
2589
VCCK_19 VCCK_43 DDRV_16 DDRV_41
AC19 AC22 H7 E23
VCCK_20 VCCK_44 DDRV_17 DDRV_42
AD18 AC23 H8 E24
VCCK_21 VCCK_45 DDRV_18 DDRV_43
AM7 AC24 H10 F20
VCCK_22 VCCK_46 DDRV_19 DDRV_44
AM8 AD23 H13 F23
VCCK_23 VCCK_47 DDRV_20 DDRV_45
AN7 AD24 J8 F24
VCCK_24 VCCK_48 DDRV_21 DDRV_46
J10 G20
DDRV_22 DDRV_47
N7 G23
DDRV_23 DDRV_48
100n
100n
100n
100n
100n
P7 G24
DDRV_24 DDRV_49 +3V3STBY
T5
DDRV_25
2590
2591
2592
2593
2594
100n
100n
100n
100n
100n
F507 3502
POWER_DOWN
25A3
25A4
25A5
25A6
25A7
3K3
3503
15K
BZX384-C3V3
6500
RES
5506
+1V2_SW 7501
BC847BW F510
30R
100n
100n
100n
100n
100n
2534 100n
100n
2536 100n
100n
100n
100n
100n
2542 1u0
3505 I518 6501
2543
4u7
7502 +12VS
BC847BW
2529
2530
2531
2532
2533
2535
2537
2538
2540
2541
1K0 BZX384-C8V2
25A8
220n
3504
1K0
+3V3STBY
+3V3_SW
2544 7300-4
MT5396
4u7 CORE_VSS
4K7
4K7
4K7
10K
7300-1
5500
3506
4K7
DVSS_1 DVSS_71
B18 Y4
AC_POWER C18
DVSS_2 DVSS_72
Y5
DVSS_3 DVSS_73
AJ20 D11 Y6 STANDBY
3508
3509
3510
3512
AVDD10_LDO DVSS_4 DVSS_74
D12 Y7 3
DVSS_5 DVSS_75 +3V3STBY
U24 W30 D18 Y8
AVDD12_PCIE11 AVSS12_PCIE11 DVSS_6 DVSS_76 3507
1 I508
100n
100n
100n
100n
100n
4u7
2547
2548
2549
2550
4K7
AJ6 F9 AA16
10K
AVDD12_LVDS_2 DVSS_15 DVSS_85 3511 I509
AF6 F12 AA17 7503 1
AVDD12_VPLL DVSS_16 DVSS_86 4K7
100n
100n
100n
100n
100n
3534
F19 AA18 BC847BW
10K
DVSS_17 DVSS_87 1K0
N14 N15 G14 AA19 25AB 1n0 7300-12
AVDD33_MEMPLL AVSS33_MEMPLL DVSS_18 DVSS_88 2
V24 D34 G16 AB5 RES MT5396
3518
3528
2551
2552
2553
2554
2555
3514
AL31 AK30 R2 F22
4K7
AVDD33_AADC AVSS33_DAC DVSS_34 DVSS_104
AG30 AE30 R3 F25 3524 100R AM20
AVDD33_DAC AVSS33_DAC1 DVSS_35 DVSS_105 OPWRSB
AF30 AL16 R4 G22
AVDD33_DAC1 AVSS33_LD DVSS_36 DVSS_106
AD17 AL15 R5 G25 HDMI_CEC AA32
AVDD33_LD AVSS33_COM DVSS_37 DVSS_107 HDMI_CEC
AD16 AH5 R6 H22 HDMI_0_SDA AF33
AVDD33_COM AVSS33_LVDSA DVSS_38 DVSS_108 HDMI_0_SDA
AH7 AE5 R7 J22 HDMI_0_SCL AG33 F27
AVDD33_LVDSA AVSS33_LVDSB DVSS_39 DVSS_109 HDMI_0_SCL TCON0
25A9
3500
3501
5504
47R
HDMI_0_HPD
30R
10u
AVDD33_LVDSB DVSS_40 DVSS_110 HDMI_0_HPD TCON1
R16 P21 F30
DVSS_41 DVSS_111 3530 TCON2
E34 R17 P22 OPWR0_5V AG31 F29
I504 VCC3IO_A_1 DVSS_42 DVSS_112 HDMI_0_PWR5V TCON3
2567
100n
100n
47u 6.3V
2563
2565
2564
2566
100n
2571 100n
100n
2573 100n
100n
100n
100n
100n
100n
100n
V16 W21
4u7
3537
3538
V17 W22 AH31
RES
RES
4K7
4K7
2569
2570
2572
2574
2575
2576
2577
2578
2579
3525
3526
10K
10K
F506
1 2012-01-20
19300_005_120402.eps
120402
2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 62
B04B B04B
1% 3632 1K0
1% 3627 1K0
1% 3625 1K0
1% 3634 1K0
100n
100n
100n
100n
2651
2649
2655
2653
7300-5
MT5396JDNJ
DDR3 +1V5_SW +1V5_SW
ARA(0) F15 K6 BRA(0)
ARA0 BRA0
ARA(1) F14 N3 BRA(1)
3633 1K0
3628 1K0
1% 3626 1K0
1% 3635 1K0
ARA1 BRA1
100n
100n
100n
100n
ARA(2) A14 M1 BRA(2)
ARA2 BRA2
ARA(3) B13 N2 BRA(3)
ARA3 BRA3
ARA(4) E13 N6 BRA(4)
2652
2650
2656
2654
ARA4 BRA4
ARA(5) F16 K5 BRA(5)
1%
1%
ARA5 BRA5
ARA(6) E14 N4 BRA(6)
ARA6 BRA6
G7
G7
C1
D9
N1
N9
R1
R9
C1
C9
D2
H2
H9
C9
D2
H2
D9
N1
N9
R1
R9
H9
A8
E9
B2
K2
K8
A1
A8
E9
B2
K2
K8
A1
F1
F1
ARA(7) B15 L3 BRA(7)
ARA7 BRA7
ARA(8) D13 L6 BRA(8)
ARA8 BRA8 VDD VDDQ VDD VDDQ
ARA(9) E15 M3 BRA(9)
ARA9 BRA9
ARA(10) F11 P4 BRA(10) ARA(0) 3657-2 2 7 22R N3 ARA(0) 3651-2 2 7 22R N3
ARA10 BRA10 0 0
ARA(11) C14 M5 BRA(11) ARA(1) 3645-3 3 6 22R P7 ARA(1) 3653-3 3 6 22R P7
ARA11 BRA11 1 1
ARA(12) F13 N5 BRA(12) ARA(2) 3648-4 4 5 22R P3 ARA(2) 3655-4 4 5 22R P3
ARA12 BRA12 2 2
ARA(13) A15 M4 BRA(13) ARA(3) 3648-3 3 6 22R N2 ARA(3) 3655-3 3 6 22R N2
ARA13 BRA13 3 3
ARA(14) C15 L5 BRA(14) ARA(4) 3646-1 1 8 22R P8 D7 ARDQ(8) ARA(4) 3636-1 1 8 22R P8 D7 ARDQ(24)
ARA14 BRA14 4 0 4 0
ARA(5) 3657-1 1 8 22R P2 C3 ARDQ(9) ARA(5) 3651-1 1 8 22R P2 C3 ARDQ(25)
5 1 5 1
ARBA(0) A13 N1 BRBA(0) ARA(6) 3645-4 4 5 22R R8 A C8 ARDQ(10) ARA(6) 3653-4 4 5 22R R8 A C8 ARDQ(26)
ARBA0 BRBA0 6 2 6 2
ARBA(1) G11 P5 BRBA(1) ARA(7) 3647-4 4 5 22R R2 C2 ARDQ(11) ARA(7) 3652-4 4 5 22R R2 C2 ARDQ(27)
ARBA1 BRBA1 7 3 7 3
ARBA(2) D16 K4 BRBA(2) ARA(8) 3645-2 2 7 22R T8 DQU A7 ARDQ(12) ARA(8) 3653-2 2 7 22R T8 DQU A7 ARDQ(28)
ARBA2 BRBA2 8 4 8 4
ARA(9) 3647-2 2 7 22R R3 7601 A2 ARDQ(13) ARA(9) 3652-2 2 7 22R R3 A2 ARDQ(29)
9 H5TQ2G63BFR-H9C 5 9 7602 5
ARCASn E17 H5 BRCASn ARA(10) 3646-4 4 5 22R L7 B8 ARDQ(14) ARA(10) 3636-4 4 5 22R L7 H5TQ2G63BFR-H9C B8 ARDQ(30)
ARCAS BRCAS 10 6 10 6
ARRASn F17 H4 BRRASn ARA(11) 3645-1 1 8 22R R7 A3 ARDQ(15) ARA(11) 3653-1 1 8 22R R7 A3 ARDQ(31)
ARRAS BRRAS 11 7 11 7
ARCKE F10 P6 BRCKE ARA(12) 3646-2 2 7 22R N7 ARA(12) 3636-2 2 7 22R N7
ARWEn
ARCSn
D14
E16
ARCKE
ARWE
BRCKE
BRWE
L4
K3
BRWEn
BRCSn
ARA(13)
ARA(14)
3647-3
3631-4
3
4
6
5
22R
22R
T3
T7
12
13
DDR3#1 DQSU
C7
B7
ARDQS1
ARDQS1n
ARA(13)
ARA(14)
3652-3 3 6 22R
22R
T3
T7
12
13
DDR3#2 DQSU
C7
B7
ARDQS3
ARDQS3n
ARCS BRCS 14 DQSU 3697 14 DQSU
F18 G5 M7 M7
ARCSX BRCSX 15 15
F3 ARDQS0 F3 ARDQS2
BC DQSL BC DQSL
ARCLK0 A20 F4 BRCLK0 G3 ARDQS0n G3 ARDQS2n
ARCLK0 BRCLK0 AP DQSL AP DQSL
ARCLK0n A21 F3 BRCLK0n
ARCLK0 BRCLK0
ARCLK1 D9 V4 BRCLK1 H1 E3 ARDQ(0) H1 E3 ARDQ(16)
ARCLK1 BRCLK1 VREFDQ 0 VREFDQ 0
ARCLK1n C9 V3 BRCLK1n M8 F7 ARDQ(1) M8 F7 ARDQ(17)
ARCLK1 BRCLK1 VREFCA 1 VREFCA 1
F2 ARDQ(2) F2 ARDQ(18)
2 2
ARDQ(0) C23 A1 BRDQ(0) 3608 240R L8 F8 ARDQ(3) 3688 240R L8 F8 ARDQ(19)
ARDQ0 BRDQ0 ZQ 3 ZQ 3
ARDQ(1) B17 J1 BRDQ(1) DQL H3 ARDQ(4) DQL H3 ARDQ(20)
ARDQ1 BRDQ1 4 4
ARDQ(2) D23 B2 BRDQ(2) ARBA(0) 3648-2 2 7 22R M2 H8 ARDQ(5) ARBA(0) 3655-2 2 7 22R M2 H8 ARDQ(21)
ARDQ2 BRDQ2 BA0 5 BA0 5
ARDQ(3) C17 J2 BRDQ(3) ARBA(1) 3646-3 3 6 22R N8 G2 ARDQ(6) ARBA(1) 3636-3 3 6 22R N8 G2 ARDQ(22)
ARDQ3 BRDQ3 BA1 6 BA1 6
ARDQ(4) D24 C2 BRDQ(4) ARBA(2) 3657-3 3 6 22R M3 H7 ARDQ(7) ARBA(2) 3651-3 3 6 22R M3 H7 ARDQ(23)
ARDQ4 BRDQ4 BA2 7 BA2 7
ARDQ(5) C16 K1 BRDQ(5)
ARDQ5 BRDQ5
ARDQ(6) C24 A2 BRDQ(6) ARRASn 3631-3 3 6 22R J3 ARRASn 3659-3 3 6 22R J3
ARDQ6 BRDQ6 RAS RAS
ARDQ(7) D15 K2 BRDQ(7) ARODT 3631-2 2 7 22R K1 ARODT 3659-2 2 7 22R K1
ARDQ7 BRDQ7 ODT ODT
ARDQ(8) A17 J3 BRDQ(8) ARCASn 3631-1 1 8 22R K3 ARCASn 3659-1 1 8 22R K3
ARDQ8 BRDQ8 CAS CAS
ARDQ(9) A23 B1 BRDQ(9) ARCLK0 J7 ARCLK1 J7
ARDQ9 BRDQ9 CK CK
ARDQ(10) D17 H3 BRDQ(10) K7 J1 K7 J1
ARDQ10 BRDQ10 CK CK
ARDQ(11) B23 D3 BRDQ(11) K9 J9 K9 J9
ARDQ11 BRDQ11 CKE CKE
100R
100R
3656
3650
ARDQ(12) D20 G3 BRDQ(12) L2 NC L1 L2 NC L1
ARDQ12 BRDQ12 CS CS
ARDQ(13) D22 C1 BRDQ(13) L3 L9 L3 L9
ARDQ13 BRDQ13 WE WE
ARDQ(14) D19 G4 BRDQ(14) T2 T2
ARDQ14 BRDQ14 RESET RESET
ARDQ(15) C22 D2 BRDQ(15) ARCLK0n ARCLK1n
ARDQ15 BRDQ15
ARDQ(16) C12 T4 BRDQ(16) E7 E7
ARDQ16 BRDQ16 DML DML
ARDQ(17) D6 AB4 BRDQ(17) ARCKE 3629 22R D3 ARCKE 3658 22R D3
ARDQ17 BRDQ17 DMU VSS VSSQ DMU VSS VSSQ
ARDQ(18) B12 P2 BRDQ(18) ARCSn 3630 22R ARCSn 3660 22R
ARDQ18 BRDQ18
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
ARDQ(19) C5 AB3 BRDQ(19)
ARDQ19 BRDQ19
ARDQ(20) C13 P3 BRDQ(20) ARWEn 3648-1 1 8 22R ARWEn 3655-1 1 8 22R
ARDQ20 BRDQ20
ARDQ(21) A5 AB1 BRDQ(21) ARRESET 3647-1 1 8 22R ARRESET 3652-1 1 8 22R
ARDQ21 BRDQ21
ARDQ(22) A12 P1 BRDQ(22) ARDQM0 ARDQM2
ARDQ22 BRDQ22
ARDQ(23) B5 AB2 BRDQ(23) ARDQM1 ARDQM3
ARDQ23 BRDQ23
ARDQ(24) C6 AA3 BRDQ(24)
ARDQ24 BRDQ24
ARDQ(25) D10 U4 BRDQ(25)
ARDQ25 BRDQ25
ARDQ(26) D7 AA4 BRDQ(26)
ARDQ26 BRDQ26 +1V5_SW +1V5_SW
ARDQ(27) C11 T3 BRDQ(27)
ARDQ27 BRDQ27 +1V5_SW +1V5_SW
ARDQ(28) C7 Y3 BRDQ(28)
ARDQ28 BRDQ28
ARDQ(29) C10 U3 BRDQ(29)
ARDQ29 BRDQ29
ARDQ(30) B7 Y2 BRDQ(30)
1% 3607 1K0
1% 3613 1K0
ARDQ30 BRDQ30
100n
100n
ARDQ(31) B10 U2 BRDQ(31)
1% 3622 1K0
1% 3624 1K0
ARDQ31 BRDQ31
100n
100n
ARDQM0 C19 G2 BRDQM0
BRDQM0
2609
2613
ARDQM0
ARDQM1 D21 D1 BRDQM1
BRDQM1
2606
2615
ARDQM1
ARDQM2 A7 Y1 BRDQM2
ARDQM2 BRDQM2
ARDQM3 E10 U1 BRDQM3
ARDQM3 BRDQM3
+1V5_SW
ARDQS0 C21 E4 BRDQS0 +1V5_SW
ARDQS0 BRDQS0
ARDQS0n B21 E3 BRDQS0n
3678 1K0
3614 1K0
ARDQS0 BRDQS0
100n
100n
1% 3621 1K0
1% 3623 1K0
100n
100n
ARDQS1 B20 F1 BRDQS1
ARDQS1 BRDQS1
ARDQS1n C20 F2 BRDQS1n
2610
2614
ARDQS1 BRDQS1
1%
1%
2605
2611
ARDQS2 B9 V2 BRDQS2
ARDQS2 BRDQS2
G7
D9
N1
N9
R1
R9
C1
C9
D2
H2
H9
B2
K2
K8
A1
A8
E9
F1
ARDQS2n A9 V1 BRDQS2n
ARDQS2 BRDQS2
G7
D9
N1
N9
R1
R9
C1
C9
D2
H2
H9
B2
K2
K8
A1
A8
E9
F1
VDD VDDQ
ARDQS3 C8 W3 BRDQS3
ARDQS3 BRDQS3 VDD VDDQ
ARDQS3n D8 W4 BRDQS3n BRA(0) 3677-2 2 7 22R N3
ARDQS3 BRDQS3 0
BRA(1) 3617-3 3 6 22R P7 BRA(0) 3693-2 2 7 22R N3
1 0
ARODT E18 H6 BRODT BRA(2) 3619-4 4 5 22R P3 BRA(1) 3689-3 3 6 22R P7
ARODT BRODT 2 1
ARRESET B14 M2 BRRESET BRA(3) 3619-3 3 6 22R N2 BRA(2) 3691-4 4 5 22R P3
ARRESET BRRESET 3 2
BRA(4) 3618-1 1 8 22R P8 D7 BRDQ(8) BRA(3) 3691-3 3 6 22R N2
4 0 3
G21 BRA(5) 3677-1 1 8 22R P2 C3 BRDQ(9) BRA(4) 3690-1 1 8 22R P8 D7 BRDQ(24)
RVREF_A 5 1 4 0
G13 BRA(6) 3617-4 4 5 22R R8 A C8 BRDQ(10) BRA(5) 3693-1 1 8 22R P2 C3 BRDQ(25)
+1V5_SW RVREF_B
P13 BRA(7) 3665-4 4 5 22R R2
6 2
C2 BRDQ(11) BRA(6) 3689-4 4 5 22R R8
5
A
1
C8 BRDQ(26)
RVREF_C 7 3 6 2
V7 BRA(8) 3617-2 2 7 22R T8 DQU A7 BRDQ(12) BRA(7) 3694-4 4 5 22R R2 C2 BRDQ(27)
RVREF_D 8 7603 4 7 3
BRA(9) 3665-2 2 7 22R R3 A2 BRDQ(13) BRA(8) 3689-2 2 7 22R T8 DQU A7 BRDQ(28)
9 H5TQ1G63DFR-H9C 5 8 4
BRA(10) 3618-4 4 5 22R L7 B8 BRDQ(14) BRA(9) 3694-2 2 7 22R R3 7604 A2 BRDQ(29)
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
10 6 9 5
BRA(11) 3617-1 1 8 22R R7 A3 BRDQ(15) BRA(10) 3690-4 4 5 22R L7 H5TQ1G63DFR-H9C B8 BRDQ(30)
11 7 10 6
BRA(12) 3618-2 2 7 22R N7 BRA(11) 3689-1 1 8 22R R7 A3 BRDQ(31)
12
DDR3#3 C7 BRDQS1 BRA(12) 3690-2 2 7 22R N7
11 7
DDR3#4
269M
269G
RES
RES
RES
RES
RES
RES
269C
269D
269H
269E
269K
269F
269L
BC DQSU 12
269J
B7 BRDQS1n C7 BRDQS3
AP DQSU BC DQSU
B7 BRDQS3n
AP DQSU
F3 BRDQS0
DQSL
G3 BRDQS0n F3 BRDQS2
FOR EMC +1V5_SW DQSL DQSL
G3 BRDQS2n
DQSL
H1 E3 BRDQ(0)
VREFDQ 0
M8 F7 BRDQ(1) H1 E3 BRDQ(16)
+1V5_SW VREFCA 1
F2 BRDQ(2) M8
VREFDQ 0
F7 BRDQ(17)
220R 1%
100n
100n
100n
100n
100n
100n
BA0 5 4
47u 6.3V
1u0
BA1 6 BA0 5
2671
RES
BA2 7 BA1 6
BRBA(2) 3693-3 3 6 22R M3 H7 BRDQ(23)
3600
2661
2663
2664
2665
2666
2667
2668
2669
BA2 7
2662
CK NC 22R BRCLK1 CK
K9 T7 3620-4 5 4 BRA(14) K7 L9
CKE CK NC
100R
3666
100R
3695
L3 T3 3665-3 6 3 BRA(13) L2 M7
WE CS 3694-3
1601 1602 1603 1604 1605 T2 L3 T3 6 3 BRA(13)
RESET WE
HOOK1 HOOK1 HOOK1 HOOK1 HOOK1 BRCLK0n T2
2618
RESET 22R
E7 BRCLK1n
3601
DML
BRCKE 3662 22R D3 E7
DMU VSS VSSQ DML
BRCSn 3663 22R BRCKE 3682 22R D3 VSSQ
DMU VSS
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
BRWEn 3619-1 1 8 22R
BRRESET 3665-1 1 8 22R BRWEn 3691-1 1 8 22R
BRDQM0 BRRESET 3694-1 1 8 22R
BRDQM1 BRDQM2
BRDQM3
1606 1607 1608 1609
HOOK1 HOOK1 HOOK1 HOOK1 SENSE_1V5_DDR
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
220u 2.0V
47u 6.3V
47u 6.3V
47u 6.3V
220u 2.0V
330u 6.3V
1u0
1u0
1u0
1u0
4u7
4u7
4u7
4u7
1 2012-01-20
269B
RES 269A
RES 2670
2646
2634
2682
2635
2693
2647
2616
RES
RES
RES
10u
10u
10u
10u
2638
2639
2640
2641
2642
2643
2644
2645
2672
2674
2675
2676
2677
2678
2679
2680
2681
2683
2685
2686
2687
2688
2689
2690
2691
2692
2694
2696
2697
2698
2699
2602
2601
2608
2612
2637
2673
2684
2695
19300_006_120402.eps
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2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 63
4K7
4K7
G34 220R
GPIO6
4K7
4K7
10K
H34
GPIO7
L34
GPIO8
L32
GPIO9
3718
K33 7700
3716
12
37
GPIO10
2707
100n
RES 2708
100n
H27U4G8F2D
3756
3757
3758
K32
GPIO11
H33 VCC
GPIO12
L35
GPIO13 NAND_PDD(0) 29 1
K36 0
GPIO14 NAND_PDD(1) 30 2
J32 1
GPIO15 NAND_PDD(2) 31 3
J34 2
GPIO16 NAND_PDD(3) 32 4
K34 7300-13 3
GPIO17 MT5396 NAND_PDD(4) 41 IO 5
K35 4
GPIO18 NAND_PDD(5) 42 10
K37 C36 USB_DP_P0 SERIAL_NAND 5
GPIO19 USB_DP_P0 NAND_PDD(6) 43 11
J36 C37 USB_DM_P0 6
GPIO20 USB_DM_P0 SDIO_SPIPDD0 C32 NAND_PDD(0) NAND_PDD(7) 44 14
J37 D36 USB_DP_P1 7
GPIO21 USB_DP_P1 A32 NAND_PDD(1) 15
J35 D37 USB_DM_P1 PDD1
GPIO22 USB_DM_P1 B36 B32 NAND_PDD(2) NAND_PCLE 16 20
J33 AT13 USB_DP_P2 SD_CMD PDD2 CLE
GPIO23 USB_DP_P2 B37 A31 NAND_PDD(3) NAND_PALE 17 21
G33 AU13 USB_DM_P2 SD_CLK PDD3 ALE
GPIO24 USB_DM_P2 A37 B31 NAND_PDD(4) NAND_POCE I725 9 22
H35 AT14 USB_DP_P3 SD_D0 PDD4 CE_
GPIO25 USB_DP_P3 C35 D30 NAND_PDD(5) NAND_POOE 8 23
H31 AU14 USB_DM_P3 SD_D1 PDD5 RE
GPIO26 USB_DM_P3 A36 C30 NAND_PDD(6) NAND_POWE 18 24
F34 SD_D2 PDD6 WE
GPIO27 B35 D29 NAND_PDD(7) I726 19 NC 25
E36 AN23 3726 10K SD_D3 PDD7 WP
GPIO28 ADIN0_SRV D33 NAND_POCE 6 26
N33 AN24 3727 10K POCE0 SE
GPIO29 ADIN1_SRV AT11 B34 NAND_PARB 7 27
P32 AP23 3728 10K LDM_CS POCE1 R
GPIO30 ADIN2_SRV AMBI_SPI_SDO AM9 D32 NAND_PARB 28
+3V3_SW +3V3_SW +3V3_SW M35 AR23 3729 10K LDM_DO PARB B
GPIO31 ADIN3_SRV AP10 C34 NAND_PALE 33
+3V3_SW M37 AU23 3730 100R KEYBOARD
GPIO32 ADIN4_SRV LDM_DI PAALE
M33 AT23 3731 100R LIGHT_SENSOR AMBI_SPI_SCKO AU11 A34 NAND_PCLE 34
GPIO33 ADIN5_SRV LDM_CLK PACLE
F35 AM24 RES 37A4 100R SRF_IRQ AR10 A35 NAND_POWE 35
GPIO34 ADIN6_SRV LDM_VSYNC POWE
4K7
C33 NAND_POOE 38
4K7
E35 AM23 3733 100R AMBI_TEMP POOE
GPIO35 ADIN7_SRV C29 39
4K7
4K7
4K7
4K7
E37 EMMC_CLK
GPIO36
2725
100p
3761
RES
40
4K7
N32
GPIO37
37AD
45
37AB
RES
M34
RES
4K7
10K
GPIO38 46
37A5
M36
37A6
RES
RES
GPIO39 +3V3_SW 47
M32
3719
3720
3714
3715
GPIO40 48
L33
GPIO41
E33
GPIO42
LCD_PWR_ON 3701 100R E32 RES
GPIO43 VSS
100K
3762
SYS_EEPROM_WE 3702 100R F32 1C22
GPIO44
13
36
A29 1
GPIO45
YPBPR_DETECT 3704 100R D31 2
GPIO46 LIGHT_SENSOR 3763
BL_ON_OFF 3705 100R C31 3
GPIO47 2709 1n0
CVBS_DETECT F736 3706 100R E30 4
GPIO48 100R
E31 5
GPIO49 Temperature Sensor
F737 3708 100R F31 6
GPIO50
F700
5 6 RES
3799
4K7
37AA
RES 2722
100p
RES 2723
100p
2724
RES
502386-0470 F719 1
10u
10u
4K7
4K7
10K
1u0
100R LED2
PANEL
RES
2 2
100R
F722 3 3
3724
3767
2700
2701
RES
+3V3STBY F720 4 4
3723
F717 5 5
6K8
+3V3STBY F723 6 6
KEYBOARD 3768
F721 7 7
2713 100n +5V_SW 37A1 0R3 F724 8 8
10R
STBY_SCL RES 37A9 47R F740 9 9
+T
10 10
+3V3_SW RES 3759 47R
STBY_SDA F741 11 11
F702
SYS_EEPROM_WE 12 13 12
3766
LED1 13
+3V3STBY
2714
100p
2715
100n
2712 1n0 FH52-11S-0.5SH 14
+3V3_SW 100R
5700 15
+3V3_SW
30R 16
4K7
4K7
10K
10K
SRF_IRQ 17
NEAR TO MTK IC
37A7
100K
+3V3STBY
RES
2703 100n 18
3738 +3V3_SW 19 20
10K 3742 RES
37A8 F742
FH52-18S-0.5SH
3739 4K7
3734
3735
3736
3737
F704
7705
BAS316
100R F739
2716
2717
6702
3770
3743
3744
RES
RES
RES
RES
RES
M24C64-WDW6
10K
4K7
4K7
4u7
4u7
8
33R RES
7702 7701
Φ BD45292G
BC847BW
5
RES F705
7 (8K × 8) VDD UART_TX_1 3745 33R
WC
EEPROM I741 1 Φ F725 RES F706
SCL F745 3740 22R 6 1 4 4701 ORESET UART_RX_1 3746 33R
SCL 0 ER VOUT
2
BAS316
ADR 1
37A3
F746
100K
RES
6704
3769
2718
100n
SDA
RES
5 3
18K
3741 22R
SDA 2 +3V3_SW
SUB GND
4
3
2704
2705
10p
10p
4K7
4K7
RES 3783
RES 3784
+3V3_SW
+3V3_SW
F744
VCOM-SCL
F743
5 10K
6 10K
7 10K
8 10K
10K VCOM-SDA
3793
1K0
RES
7300-11 +3V3_SW
+3V3_SW MT5396
MISC 3
3794
BACKLIGHT-BOOST-A
+3V3STBY AM22 AN12 RES
SCL
4
3
2
1
4K7
FOR DEBUGGING ORESET OSCL0 RES 1K0
4K7
3791
3775 4K7 I732 D27 AP12 SDA 1 7704
3772-4
3772-3
3772-2
3772-1
2719
G9 AN15 BC847BW
1K0
1u0
MEMTN OSCL1 10K
RES G10 AP15 2
MEMTP OSDA1
3747
3748
4K7
OSCL2
1 JTCK AP14 V34 DEMOD_SDA
3788
3787
JTCK OSDA2
2 JTDO AR14
1701 JTDO 3792
UART_TX 3749 33R F711 2 3 F726 JTRST JTRST AN14 AR12 BOOST_CONTROL 3785 1R0 F734
JTRST OPWM0 F735
3 4 F727 JTDI JTDI AM14 AT12 BACKLIGHT_CONTROL 3786 1R0
JTDI OPWM1 1R0
UART_RX 3750 33R F712 1 5 F728 JTMS JTMS AR15 AU12
JTMS OPWM2
6 F729 JTCK
MSJ-035-69A-B-RF-PBT-BRF
7 F730 UART_RX 3778 100R AP18 AU21 RC
BZX384-C6V8
BZX384-C6V8
3774
JTDO U0RX OIRI
8 F731 UART_TX 3779 100R AR18
U0TX
6700
6701
1710
1711
9 33R
UART_RX_1 3796 100R RES AU16 AT34
U1RX XTALI
10 UART_TX_1 3797 100R RES AT16 AU34
U1TX XTALO
27p
11 AN30
LOUTP
RES
RES
3789
3790
12 13 F732 AP31
LOUTN
820K
1703
3225
2720
2
3780
3781
3782
1
BM11B-SRSS-TBT W37
10K
10K
10K
PCIE11_REFCKP
27M
W36
NC
PCIE11_REFCKN
W35
+3V3_SW PCIE11_TXP
4K7
4K7
PWM DIMMING
27p
W34
3
4
3795
PCIE11_TXN
Y35
PCIE11_RXP
Y34
PCIE11_RXN
2721
3754
680R
3752
7703
1R0
BC847BW
RES
I744 2706 3755
2u2 4K7
BAS316
3753
RES 6703
1K0
RES
3751
PWM-DIMMING
100R
1 2012-01-20
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2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 64
LVDS Display
B04D B04D
RESERVED
LVDS#2 (FOR VCOM ALIGNMENT)
+3V3_SW
VCOM-SDA
1G50 VCOM-SCL
50 51
48 49
46 47
100p
100p
FD27 44 45
RES 4D23
RES 4D24
2D20 2D21 3D23
42
41
43 RES
2D13
*
Non TM100 Panel No No No
2D18
2D19
3D_2D_SELECT 40 TM100 Panel Yes Yes Yes
4D30
RES 39 100n RES
38 7D04
PCA9540B 3
37
36 VDD SC0 5
35
34 SC1 8
7300-10
MT5396 33
32 VGA_SCL 1 SCL SD0 4
PX1A- FD01 I2 C
LVDS_EPI FD02 31 INP
RES
PX4A+ AG3
BE0P AE0P
AT2 PX2A+
PX1A+
FD03 30
29
VGA_SDA 2 SDA FIL
-BUS
CTRL SD1 7 * 3D23
AG4 AU2
PX4A-
PX4B+ AG1
BE0N AE0N
AT1
PX2A-
PX2B+
PX1B-
PX1B+
FD04
FD05 28 VSS
68R
TO DISPLAY
2D20
2D21
BE1P AE1P
100p
100p
RES
RES
AG2 AU1 27 6
PX4B- BE1N AE1N PX2B- FD06 LVDS#1
PX4C+ AF3 AR1 PX2C+ PX1C- 26
BE2P AE2P
PX4C-
PX4D+
AF4
AE1
BE2N AE2N
AR2
AN1
PX2C-
PX2D+
PX1C+ FD07
FD08
25
24 * * 1G51
FD62
BE3P AE3P 60 61
PX4D- AE2 AN2 PX2D- PX1CLK- 23
BE3N AE3N 22 58 59
PX4E+ AD1 AM3 PX2E+ PX1CLK+ FD09
BE4P AE4P PWM-DIMMING 56 57
PX4E- AD2 AM4 PX2E- FD10 21
BE4N AE4N 2D17 10n 54 55
PX4CLK+ 3D11 0R AE3 AP1 3D15 0R PX2CLK+ PX1D- FD11 20
BECKP AECKP 19 52 53
PX4CLK- 3D12 0R AE4 BECKN AECKN
AP2 3D16 0R PX2CLK- PX1D+ FD12
51
18 4D25 F738
17 FD64 50
PX3A+ AL3 AT6 PX1A+ PX1E-
BO0P AO0P 16 FD65 49
PX3A- AL4 AU6 PX1A- PX1E+ FD14
BO0N AO0N 48
PX3B+ AL1 AP6 PX1B+ FD15 15
BO1P AO1P 14 47
PX3B- AL2 AR6 PX1B- FD16 RES 3D21 RES 3D19
BO1N AO1N 13 46
PX3C+ AK3 AP5 PX1C+ PX2A- FD17 +3V3_SW +3V3_SW
BO2P AO2P 45
PX3C- AK4 AR5 PX1C- PX2A+ FD18 12 4K7 4K7
BO2N AO2N 11 FD66 44
PX3D+ AJ1 AP4 PX1D+ FD19 RES 3D22 RES 3D20 4K7
BO3P AO3P 10 43
PX3D- AJ2 AR4 PX1D- PX2B-
BO3N AO3N OPC_ENABLE 42
PX3E+ AH3 AP3 PX1E+ PX2B+ FD20 9 4K7
BO4P AO4P 8 3D_2D_SELECT 41
PX3E- AH4 AR3 PX1E- FD21
BO4N AO4N 7 PX3A- FD36 40
PX3CLK+ 3D13 0R AJ3
BOCKP AOCKP
AT4 3D17 0R PX1CLK+ PX2C-
PX3A+ FD37 39
PX3CLK- 3D14 0R AJ4 AU4 3D18 0R PX1CLK- PX2C+ FD22 6
BOCKN AOCKN 5 PX3B- FD38 38
FD23
3D00 4 PX3B+ FD39 37
AG7 PX2CLK- FD24
REXT_VPLL PX3C- FD40 36
PX2CLK+ FD25 3
24K PX3C+ FD41 35
2
1 34
PX2D-
PX3CLK- FD42 33
PX2D+ 32
PX3CLK+ FD43
20519-041E
31
PX2E-
PX3D- FD44 30
PX2E+ 29
PX3D+ FD45
PX3E- FD46 28
PX3E+ FD47 27
RES 4D26 26
RES
2D14 10n FD13 25
PX4A- FD48 24
PX4A+ FD49 23
PX4B- FD50 22
PX4B+ FD51 21
PX4C- FD52 20
PX4C+ FD53 19
18
PX4CLK- FD54 17
PX4CLK+ FD55 16
15
PX4D- FD56 14
PX4D+ FD57 13
PX4E- FD58 12
PX4E+ FD59 11
RES 4D27 10
+12VS RES 4D28 9
8
7
6
F829 RES 4D29 5
+VDISP
4
4D04
4D05
4D06
3
2
1
100u 16V
2D15
100n
2D16
20519-051E
8 5D00
3 7 33R
2 6 5D01
+VDISP
1 5 33R
5D02
3D10
RES
33R
1K0
7D00
SI4835DDY-GE3
3D01
4
(TOP side)
SML-310
47K
6D00
6D01
RES
BZX384-C6V8
47K
+3V3STBY
3D07
15K
ID05
3D06 6
7D02
BC857BW ID07
10K
7D03-1 2 3
3D05 BC847BS(COL) ID17 3D09 FD61
1 7D03-2 5 LCD_PWR_ON
10K
BC847BS(COL)
1K0
2D12
3D08
220n
4
1K0
1 2012-01-20
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div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 65
47K
47K
47K
RX_0_CB HDMI_0_RX_C
AH34
HDMI_0_RX_CB
RX_1_0 AE37
RES RES HDMI_1_RX_0
6B35 6B05 RX_1_0B AE36
3B31
3B32
3B01
3B02
RX_1_1 HDMI_1_RX_0B
1B01 IP4281CZ10 1B02 IP4281CZ10 AD35
HDMI_1_RX_1
1 RX_3_2 RX_3_1B 1 2 RX_3_1 1 RX_0_2 RX_0_1B 1 2 RX_0_1 RX_1_1B AD34
RX_1_2 HDMI_1_RX_1B
2 3 2 3 AC35 AT18 TXVP_0
HDMI_1_RX_2 TXVP_0
3 RX_3_2B 3 RX_0_2B RX_1_2B AC34 AU18 TXVN_0
RX_3_1 RX_0_1 RX_1_C HDMI_1_RX_2B TXVN_0
4 8 4 8 AE35 AT17 RXVP_1
HDMI_1_RX_C RXVP_1
5 RX_3_2 5 4 RX_3_2B 5 RX_0_2 5 4 RX_0_2B RX_1_CB AE34 AU17 RXVN_1
HDMI_1_RX_CB RXVN_1
6 RX_3_1B 6 RX_0_1B AD15
REXT IB01
7 RX_3_0 7 RX_0_0 RX_2_0 AB35 AM16 PHYLED0
6 7 9 10 6 7 9 10 HDMI_2_RX_0 PHYLED0
8 RX_3_2 RX_3_1B 8 RX_0_2 RX_0_1B RX_2_0B AB34 AN16 PHYLED1
HDMI_2_RX_0B PHYLED1
9 RX_3_0B 9 RX_0_0B RX_2_1 AA35
HDMI_2_RX_1
10 RX_3_C RX_3_2B RX_3_1 10 RX_0_C RX_0_2B RX_0_1 RX_2_1B AA34
1%
HDMI_2_RX_1B
3B50
11 11 RX_2_2 AA37
24K
HDMI_2_RX_2
12 RX_3_CB 12 RX_0_CB RX_2_2B AA36
RES RES HDMI_2_RX_2B
13 FB01 HDMI_CEC_A 6B36 13 HDMI_CEC_A 6B06 RX_2_C AC37
HDMI_2_RX_C
14 FB02 HDMI_0_ARC 5B01 30R HDMI_ARC IP4281CZ10 14 IP4281CZ10 RX_2_CB AC36
HDMI_2_RX_CB
15 FB03 HDMI_3_SCL RX_3_CB 1 2 RX_3_C 15 FB11 HDMI_0_SCL RX_0_CB 1 2 RX_0_C
16 FB04 HDMI_3_SDA 3 16 FB12 HDMI_0_SDA 3 RX_3_0 AK35
HDMI_3_RX_0
17 17 RX_3_0B AK34
FB19 FB23 HDMI_3_RX_0B
18 8 18 8 RX_3_1 AJ35
OPWR3_5V OPWR0_5V HDMI_3_RX_1
19 FB05 RX_3_0 5 4 RX_3_0B 19 FB13 RX_0_0 5 4 RX_0_0B RX_3_1B AJ34
RES RES HDMI_3_RX_1B
21 20 3B52 4K7 21 20 3B54 4K7 RX_3_2 AJ37
HDMI_3_RX_2
FB24
3B33
3B03
23 22 23 22 RX_3_2B AJ36
1K0
1K0
6 7 9 10 6 7 9 10 HDMI_3_RX_2B
FB18
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
RX_3_CB
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
47266-9002 RES 4B31 47266-9002 RES 4B01 AK33
HDMI_3_RX_CB
RX_3_0B RX_3_C RX_0_0B RX_0_C
RES 6B32
RES 6B33
3B34
100K
RES 6B01
RES 6B02
RES 6B03
3B04
100K
1K0 1K0
7B31 7B01
BC847BW BC847BW
RES
3B05
RES
1K2
7B00
BSH111
2B01 3B09
HDMI_ARC ARC
HDMI_CEC_A 4B00 HDMI_CEC
1u0 180R
3B07
100K
3B08
82R
47K
47K
47K
RES RES
6B15 6B25
3B11
3B12
3B21
3B23
23 22 23 22
1K0
1K0
6 7 9 10 6 7 9 10
FB25
FB21
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
CDS2C05HDMI2 5.6V
RES 6B12
RES 6B13
3B14
100K
RES 6B21
RES 6B22
RES 6B23
3B24
100K
1K0 1K0
7B11 7B21
BC847BW BC847BW
1 2012-01-20
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2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 66
0R3
0R3
RES 3C03
3C01
+T
+T
USB PORT 1 (HDD)
1 3C02-1 8
+5V_USB1
1C01
100K
1 FC33 +5V_USB1 FC50
2 FC34 USB_DM_P1 USB_OC_P1 2 3C02-2 7
3 FC35 USB_DP_P1
100K
4 FC01
3C02-3
6 5 3 6
100K
USB-01-PBT-B-30-CU2-BRF
3C02-4
4 5
100K +5V_SW
0R3
3C11
USB PORT 2 (SKYPE)
+T
3C12-1
1 8
+5V_USB2
1C02
100K
1 FC11 +5V_USB2 FC49
USB_DM_P2 USB_OC_P2 3C12-2
2 FC36 2 7
3 FC37 USB_DP_P2
100K
4 FC42
6 5 3 3C12-3 6
100K
USB-16-PBT-B-30-CU1-BRF
3C12-4
4 5
100K +5V_SW
+T 0R3
3C21
USB PORT 3 (SIDE)
1 3C22-1 8
+5V_USB3
1C03
100K
1 FC21 +5V_USB3 FC48
USB_DM_P3 USB_OC_P3 3C22-2
2 FC38 2 7
3 FC39 USB_DP_P3
100K
4 FC43
3C22-3
6 5 3 6
100K
USB-16-PBT-B-30-CU1-BRF
3C22-4
4 5
100K
RES
3C05
100K
5
RES 3C04-1
RES 3C04-2
RES 3C04-3
RES 3C04-4
+T 0R3
+T 0R3
0R
0R
0R
0R
3C06
3C31
RES
RES
FC45 FC46
1 4 ENABLE_WOLAN
+3V3_WOLAN VOUT EN
1
EN
USB_PWR_P0
2C02
2C03
RES
RES
GND
10u
1u0
RES 2C01
2
100n
USB_PWR_P0
RES
1C31 RES
1 FC32 3 1C32 2
2 FC40 USB_DM_P0
3 FC41 4 1 USB_DP_P0
4 FC44 ACM2012
5
6
FC51
8 7 WOLAN_IRQ
502386-0670
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Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 67
4
7801-2
5 PUMD12
3
F809
HEADPHONE
A_PLOP
A_STBY
F810 1401
HP_LOUT LEFT 2
3
F811
6 RIGHT 1
PESD5V0S1BA
2801
1801
RES
1n0
MSJ-035-12D-B-AG-PBT-BRF
RES
RESET_AUDIO
6800
2 7801-1
PUMD12
1
F804
HP_ROUT
PESD5V0S1BA
2802
1802
RES
1n0
6801
RES
+3V3_SW
3805
2812
2803
2805
22K
1n0
47p
1u0
7800 3807-1
1 8
TS489IST 8
33R
Φ VDD
33R
3806
2813
3814
2804
22K
22K
1n0
47p
1 2012-01-20
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Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 68
PESD5V0S1BA
6919
1927
RES
CVBS_AV4 I947 3967 RES
PESD5V0S1BA
1R0 I910 3922 F924
CVBS_AV3
2979 RES
2980
RES 3968
6916
1924
CVBS SIDE
RES
75R
RES
47p
15p
PESD5V0S1BA
1R0
AIN1_L
75R 1%
2924
2925
3921
6913
1914
RES
RES
47p
15p
AIN1_R CVBS
CVBS_GND
PESD5V0S1BA
2906
3902
1922
56R
10p
6902
2
I911 2926 I945 1
3958 3923 F925
F921
MSJ-035-75C-Y-RF-PBT-BRF
PESD5V0S1BA
30K 10u 1R0
CVI1
2927
2928
6914
RES
RES
1n0
4n7
1915
PESD5V0S1BA 1VA1
F927 1
2907
3903
6903
1923
2
56R
10p
3
5901
F900 4
I903 3904
SPB0P F923 5
18R 6
60R
7
8
I912 3959 2929 I946 3924 F919
9
F903 PR0P 10
PESD5V0S1BA
30K 10u 1R0
11
2961
2930
6915
1916
12
RES
RES
1n0
4n7
13
F904 Y0P 14
I952 15
SOY0 16
17
I904 3905 5902 F905 PB0P 18
SY0P
60R F902 19 PC_AUDIO
PESD5V0S1BA
18R F928
CVBS_DETECT
1905
20
2908
3906
6904
PESD5V0S1BA
21
56R
10p
22 5 1A02
F929 4
6917
1925
RES
I953 F901 23 I948 I949
3907 3970 2984 3971 F930 3
SY0N 24 AIN2_R
25 26
1R0 30K 10u 1R0
PESD5V0S1BA
F931 2
2985
2986
1928
Near To SOC Near To Connector 49045-0011 1
RES
RES
1n0
1n0
6920
RES
3953 2903 3901
MSJ-035-75C-BL-RF-PBT-BRF
AIN0_L
30K 10u 1R0
PESD5V0S1BA
RES 6901
1921
2904
2905
RES
RES
1n0
1n0
PESD5V0S1BA
30K 10u 1R0
2988
2989
1929
PESD5V0S1BA
RES
RES
1n0
1n0
1920
6921
2901
2902
RES
RES
RES
1n0
1n0
6900
RES
7300-2
MT5396
SOY0 3936 1R0 2944 1n5 RES
7300-14
3974 AUDIO_DAC_ADC
MT5396 AN28
10K MPXP
VIDEO_IO AOBCK 2 3961-2 10R 7 AR11
AOBCK
HSYNC AN25 AOLRCK 3 3961-3 10R 6 AP11
HSYNC AOLRCK
VSYNC AM25 AOMCLK 4 3961-4 10R 5 AM12
VSYNC AOMCLK
BP 3950 100R 2958 10n AU24 AR27 AOSDATA0 1 3961-1 10R 8 AN9
BP SOY0 AOSDATA0
SOG 3937 1R0 2945 1n5 AT24 AP25 AN10
SOG SOY1 2962 AOSDATA1
GP 3938 100R 2946 10n AR24 AR29 CVBS_GND_1 CVBS_GND AN11
GP SY0 AOSDATA2
RP 3939 100R 2947 10n AR25 AP28 AM11
RP SC0 1u0 AOSDATA3
GN 3940 100R 2948 10n AP24 AP30 AM10
COM CVBS_COM AOSDATA4
SPB0P 3941 100R 2949 10n AT28 AN29 2957 47n 3949 100R CVBS_AV3 SPDIF_OUT AR16 AN34
PB0P CVBS0P ASPDIF0 AL0_ADAC
AR26 AR31 2981 47n 3969 100R CVBS_AV4 ARC Y32 AM34
PB1P CVBS1P ASPDIF1 AL1_ADAC
AR28 AR30 RES RES Y33 AM33
PR0P CVBS2P ALIN AL2_ADAC 3965
SPR0P 3951 100R 2951 10n AP26 AT30 AM35 HPOUT_L
PR1P CVBS3P AL3_ADAC
AP27 AU30 AIN0_L AU35 AN35
Y0P VDACX_OUT AIN0_L_AADC AR0_ADAC 20K
AU26 AP29 AIN0_R AU37 AM32
Y1P VDACY_OUT AIN0_R_AADC AR1_ADAC
SY0P 3944 100R 2954 10n AU28 AIN1_L AT37 AM37
COM0 AIN1_L_AADC AR2_ADAC 3966
AT26 AIN1_R AT35 AM36 HPOUT_R
COM1 AIN1_R_AADC AR3_ADAC
3960
RES
AIN2_L AP34
75R
AIN2_L_AADC 20K
SY0N 3946 100R 2955 10n AIN2_R AU36
AIN2_R_AADC
AR37
AIN3_L_AADC
DEB AT36
AIN3_R_AADC
AP32
AIN4_L_AADC
AR33
AIN4_R_AADC
AP37
AIN5_L_AADC
AR36
AIN5_R_AADC
AP36
AIN6_L_AADC
AR35
AIN6_R_AADC
AJ27
VMID_AADC
100p
100p
100p
100p
100p
100p
10n
1u0
RES 2963
RES 2964
RES 2965
RES 2966
2977
2978
RES 2982
RES 2983
RES
1 2012-01-20
MT5396 R2 LATAM 2K12
Analog I/O - Component & 3139 123 6539
Composite
19300_012_120402.eps
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Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 69
PESD5V0S1BA
RES
2A07
3A16
6A00
1A00
75R
10p
IA02 5A01
GP FA02
PESD5V0S1BA
60R
SOG
2A08
3A15
6A01
1A08
0001
RES
75R
10p
IA09 3A10
GN
1R0
IA03 5A02
BP
PESD5V0S1BA
+5V_SW 60R
2A09
3A14
6A02
1A20
0001
RES
75R
10p
BAS316
6A07
1A01
FA08 5A06 6A06 1
3A19
IA07 +5V_DC 2
VGA_DETECT 3 FA03 3
PESD5V0S1BA
60R BAS316 120R
IA08 6A08 4
3A22
2A14
2A15
6A05
1
RES
2u2
1n0
7A01 5
BC847BW 6
10K BAS316
2 7
3A23
8
10K FA04 9
IA04 5A04 10
3A24
HSYNC H_SYNC 11
12
PESD5V0S1BA
100R FA13
30R
FA05 13
2A12
RES 3A17
6A03
1A03
RES
FA06
2K2
14
5p6
FA14 15
16 17
FA07
PESD5V0S1BA
100R 30R
+5V_DC +5V_DC
2A13
RES 3A18
6A04
1A07
RES
2K2
5p6
3A20
3A21
10K
10K
VGA_SDA 3A26
100R
CDS2C05HDMI2
2A16
100p
RES
6A09
1A09
RES
VGA_SCL 3A27
100R
CDS2C05HDMI2
2A17
100p
RES
6A10
1A10
RES
1 2012-01-20
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Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 70
Ethernet
B07 B07
RES
5F05 FF12
+3V3_SW +3V3AN
30R
2F07
2F08
2F09
100n
100n
RES
RES
RES
10u
+3V3AN
GND_LAN
2F24
2F25
RES
RES
5p6
5p6
ETHERNET CONNECTOR
1 3F01-1 8
5
3F01-2
3F01-3
3F01-4
RES
RES
RES
RES
51R
51R
51R
51R
2
4
TD+ 16 5F06-1 1 TX+ 1F01
RD+ RX+ FF10 1
TCT 15 2 TXCT+ FF06 2
RDTC RXCT FF11 3
1F03 TD- 14 3 TX- FF07 4
TXVP_0 4 ACM2012 1 RD- E2101 RX- 5
FF08 6
TXVN_0 3 2 7
RD+ 11 5F06-2 6 RX+ 8
1F04 TD+ TX+ 9
RXVP_1 4 ACM2012 1 RDTC 10 7 RXCT+
TCT TXCT 3-338088-3
RXVN_1 3 2 RD- 9 8 RX-
FF09
TD- E2101 TX-
75R
75R
75R
75R
5F01
5F02
5F03
5F04
RES
RES
RES
RES
27n
27n
27n
27n
5
8
7
6
CDA5C16GTH
CDA5C16GTH
CDA5C16GTH
CDA5C16GTH
GND_LAN
2F26
2F27
RES
RES
5p6
5p6
6F03-3
6F03-4
6F03-1
6F03-2
RES
3F05
3F06
RES
RES
RES
16V
16V
16V
16V
0R
0R
4
1
2
3
2F11
2F12
2F13
2F14
RES
RES
RES
RES
15p
15p
15p
15p
3F18-4
3F18-1
3F18-2
3F18-3
3
2
RES 3F11
RES 2F15
RES 3F12
RES 2F16
RES 3F13
RES 2F17
RES 3F14
RES 2F18
15p
15p
15p
15p
0R
0R
0R
0R
GND_LAN IF05
2F19
2F21
2F22
2F23
100n
100n
10n
10n
2F20
2KV
1n0
PHYLED0
PHYLED1
GND_LAN
SML-310
SML-310
6F02
6F01
RES
RES
2F28
1n0 2KV
2F29
330R
330R
RES
3F07
3F08
RES
1n0 2KV
GND_LAN
Reserved
For Debug Only
1 2012-01-20
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Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 71
Ambilight
B08 B08
RESERVED
+3V3_AL +3V3_AL
+3V3_SW
RES 2G7G
2G7F
1u0
1u0
RES
3G08
RES
1A05 1A04
10K
1 1 FG70
2 RES 4G08 RES 5G57 30R 2 FG71 4G06
3 IG01 FG78 RES 3G7C 100R 3 FG72 3G7G 100R AMBI_OUT_SPI_SDO
4 RES 2G7H 10p 4 2G7M 100p
5 FG79 RES 3G7D 100R 5 FG73 3G7H 100R AMBI_OUT_SPI_SCKO
6 RES 2G7J 10p 6 FG74 5G55 30R 2G7N 100p
7 RES 4G10 7 FG75 3G70 100R AMBI_TEMP
8 8
2G71
2G70
3G10
100n
9 9
10K
1u0
GND_AL
10 10
RES 2G94
11 11 FG76
12 12 GND_AL 100n
13 4G09 RES 13 FG81 4G07
FG77 1G06
14 FG80 14
+12V_AL
15 15
T 2.0A 63V
16 16
RES 2G7K
RES 2G7L
2G95
2G96
17 17
10u
10u
10u
10u
18 18
20 19 20 19
FH34SRJ-18S-0.5SH(50) FH34SRJ-18S-0.5SH(50)
GND_AL GND_AL
RES
3G09
100K
RES
2G12
RES
1u0
7G01
RT9715GGB
AMBI_SPI_SDO 4 4G00-4 5 AMBI_OUT_SPI_SDO
+3V3_SW 5 3
VIN FLG 3 4G00-3 6 AMBI_OUT_SPI_SCKO
5G58 1G07 FG01 FG02
+3V3_SW +3V3_AL ENABLE_3V3_AMBIn 4 1 +3V3_AL
EN VOUT
30R T 1.0A 63V EN
GND
2G13
2G14
100n
RES
RES
10u
2
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Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 72
2179
1M95 1M99
2177
1D02
4G06 2G7F
5G55 2G14
4G08 2G7G
5G57
5106 2176
4G09
2G7H 2G7J 2G13
3G7C
1G06
4G10
3G70
2G94
2G7M
3G7G
3G7H
2G7N
4G07
3G09
2724 2723 2722
3G7D
2G7K
2185 2128 2127 3126 2143 2198 2145 2191 2137 2136
3799 3798 2G71 2G96
2187 2G7L 7G01 2G70
2180
1G07
2134
3128 3127
2G95
2131
7110
5107
2192 3129 2188 3G10
2132
2197
2189
2133
3G08
2G12
5G58
1408 1406 1407 5105 2125
2431 2199
2124
2123
2182
2183
2147
2148
2D15
7118
5104
2D16
3761
3758
3716
4D29
1602 37A6
7700
2708
4D28 37A5
4D27
1606 5701
3648
2168
2169
2170
2171
2707
5101
2634
3756
2102
3647
1G51
3718
3757 2196
3631 3657
3630 2101
2D14
2670 7116
5100
2155
2154
3646 3645
7602
7601
2655
3625 3714
3626
3709
2700
1C03
2656
37AC 37AB
2104
2105
2126
2118
3688
7113
2647
3629 3708
3706
37AA
1604
3705 3719
3704 3720
3702 3737
4D25
3736
2D17
3701
5103
2112
3614 7702 2156 2111
2614
3613 3650 3656
2613 3738 3739 2157 2110
7705
2703
5700
5102
7117
2D19
4D24
4D23
2D18
3742
1601
3740
2704
2705
3741
2568 5505
7603
3734 3735
7D04
3775
2567 2545
3666
2562
2565
2114
2115
2117
2116
2564
3500
2561
5500 5504
2635
2566
3501
3663
2563
2D13
3662
3665
3619 3677 3620 3617 3618
2671
2475
2247
3230 2249
2474
3223 2246
4B00
7B00
2559 5503
1605
2558
1603
1C02
7300
1G50
7604
3695
3530
3531
3B50 3532
3D00
3D11 3C11
1609
3C12
3D12
3622
3621
2605
3696
2606
3D13
3D14
3C06
2806
2807
3541
3C05
3D15
3D16
7C01
3C04
2C02
2C03 3807
2720
2721
3533
3960
3727 3726 37A4
3728
3D17
3D18
3795
1703
6801 6800
3519
3729
2805
3423 3422 5404 5405 3424 3425 2802 2801
3C31
3959 2966
2965
1802 1801
2810 2803
2812 3805
1608 1607
1D01 1C31
2C01
2804
3806
2809 2813
7800
3965
3966
3811
3958
2467 2469
3712
2808 3813
4G00
2725
37AD
3713
37AE
3222
2963
2964
3972
3970
3733
3770
4701
37A3 3769
1401
2245 3225
2244 3224
3780
3781
3774
3773
3782
3771
3812
3723 3814
1C32 3772
7701
3711 3710
3961 3949 2957
3936 2944 3941 2949
3944 2954 3946 2955
3969 2981 3951 2951
7402 6702
3937 2945 3950 2958
3940 2948 3938 2946
3939 2947
3788 3785
3787 3786
3724
2701
3779
3778
7801
2471
3953
3952
3715
3518
3784
3783
2716
3974
2430
3791 3790
3789
3755
2962
3523
3524
4403 3753
3792
2706
6703 3754
25A9
5412
5408
2426
3506 3507
3508
7703
2417
1402 4402
7500
2472
7704
5411
3731
3526
3511 3513
5413
3509 3521
7504
3514
3730
3525
2473
2719
3794
3534
3520
3793
2418
2416
3751
5410 7503
3512
5416 3752
3510
5407
5402
5406
1403 5417
3747
1404
3748
3749
1F04 3750
2424
5401 6701
6F03
6700
2427 2425
5415
5F06
3F01
5409
1711
1405 1710
2413 3409 2421
1701
1B04
5414 2423 2422 1F03
6B26 6B25
2419
2414
2409
2410
5400
3408
5403
3410
2207
2213
3210
3211
2221
3217
3218
2222
2420
2206
2442
2443
2437
2436
6B21
3204 3B21 6B22
3205 3B22 6B23
2208
2984
3B24 3B23
2248 3B55
2929
2926
2464
2462
3203
2408 2404 3212 4201
2407
3504
1F01
3971
2709
2711 3763
6921
3B34 2961 3924 3923 2927
4401 2429 2211 2987
7501
7502
2930
2928
2988
2403 3973
3765 6B32 6920
3503
2204
3B05
3502
3405
2400
7401
2714 3767
1A02
2F29
3207
3208
2209
3209
2210
2216
3B07 3B09
1VA4
1205
5B01
2B01 3B08
3402
3403
3400
2428
3411
3419 3404
3407
3B30
1928
1C20
2710 3764
2405
2406
3B52 6B31
2715
37A1
37A9
3538 2463 6917
1914 1925
3759 3537
2225
37A8
3745
37A7
2230 3C03
3922 2925
1D03
3744
6913
3743
5901 3904
2903
2900
1201
2712
3C01
2907 3903
3901 2904
3766
2902 2901
3967
3906
3C02
7220 7216
2905
3B12
3B11
3900
3B02
3B01
7B01
3A25 3905
2906
6902 3907
3B13 3B14
6A06
3A24
3968
2979
5900 3925
3B00
3A10
5A04
3A18
5A05
5A02
4B11
5A01
5A00
2908
3A17
3A19
2A14
6903
6901
6900
3B54
2A09
3A14
2A08
3A15
2A07
3A16
6904
7B11
6B03
6B02
6B01
3B10
3B53
6B13
6B12
6B11
6919
6916
3A21
3A27
2A17
6A08
3A23
3A22
6A09 6A10
1A09 1A10
1C01 1B01 1B02 1B03
1A01 1VA1
1 2012-01-20
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Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 73
FG76 FG70 F133 F131 F134 F132 F113 F114 F115 F102 F103 F118 F119 F120 F121 F122 F123 F106 F107 F108 F411 F412
F707
F709
FG74
FG79
FG02 F708
FG71 FG80
IG01
FG81
3170 FG75
FG72
FG73 FG78
3133 2184
FG77
3167
2174
3123
I143
I153
3169 I158
3162
2146
3131 I139 I138 3116
I726
I135
5D00
3146
I157 3137 3115 4D06 5D01
I152 I156
2122
4D05 5D02 3D10
6D01
2166
F130 2167 I132
4D04
2172 3118
FD59 FD58
3117
2164 I127
I134
2165 ID03
6D00 F829 FD56
I151 3D01
2D11
269H
3121
3122
3120
269M ID02 3D02 FD57
7D00
3652 3655
I159 3D03 7D02 FD53 FD52
269K 3119
I145 3100 3D06 ID05
3163 F128
269D
3D07 7D03 2D12 FD55 FD54 FD51
3651
I725
ID07
3D08
3697
3D05
3659
2193 4D26
I154 2651 3653 FD13 FD48 FD49
2642
2653 2675
3107
2108 I106
2676
2106 3103 3632
2587
FD45 FD47
2107
I118 3633
269J
3636
2644
269E
2682
FD46
FG01 2652
FD44
3104
3106
3105
I136 F700
FD66
3658
3634
2649
2636
3627
F737 3608
2D20
3628 3D23
2681
FC43 2643 2679 FD42 FD43
2650 2D21
3635
2654
2637
2674 FD39
3D19 3D20
F101 F736 2645 3D22
2638
FC39 FD41
FD38
2641
3D21
2646
F738
F702
2680
FC38 FD40
FC21
2677
2640
FD65
2673
2672
FD36 FD37
3C21 2639 2678
FD64
FC48
3C22 F129
F704
I150 3108
I120 I147
2683
2119 3110 2113 3109
269B
2109 F744
2500
2692
2194 I155
3111
2121 I122
F745 F743
2690
2689
2684
2120
I119 F746
2501
3114
3113
3112
I149
2693
I501
3607
2688
2687
2686
2685
2610
3678
3667
I505 I503 2609
269C
F127
I504
25A1
2691
25A3 2661
2664
2590
25A0
2580
2662 2581
3683
F213 I732
2665 2582
2617
25A6
3694 3691
2669 2666 3692
2583
F212
FB07 2594 3693
25A7
2589
2575
2668
2584
2571
2569
FB08
2570
2574 2593 2585
2588
2572
2573
FB11 FB12 2546
3698
3689
2526
2502
2503
2504
2505
2506
2507
FD23 FD22
2551 25A4
I502
F506 2591
3690
2543
FD25
2508
2542
3600 2663 FD21
2509
5506
2618
3601 3682
2527
FD24
2530
2555 25A5 2611 FD20
2608
25A2
2694
2592
2667
2696
2695 2612 FD19
3623
3624
FC42 2531 2521 2510 2519 FD17 FD16
2615
2601
269A
2549 2532 2512
FD18
269G
2598
2597
2596
FC37 2533 2511
IB01 2599 FD15
2535 2518
2528 2520 2522 2616 269L FD12
2525
2595 2602
2586
2698
2699
2697
FC36 2550
2529
2560
FD14
2552 2537 2540
FD11
2547
2578
2577
2576
FD62
2553
2554
2541 2536
FC11
FD06
2538 2544 FD09 FD10
FC49 F7252718
2579 2534
2548 269F
FD05 FD08
2514
2523
2515 FD02 FD07
FD01
2978 2516
2977
FC47
FD03 FD04
2517
2513
4D30
25AA FC45
FD27
3796
3797
F807 FC46
I812
F804
I948
2983 I510
2982
I911 I950
I912
I811 I809
I810
FC32
I808
F808
3527
FC51
25AB F732 F728
6F01 3F07 I517
3528
3529 F730
F810
F811
F731
FC44
F735 F401
I741 F734
3232
I744 F404
3535
3231
3536
I508 F403
I509
F511
F408
2438 2465
F509 F409
2439 2435
2F18
F512
2F23
2F22
3F14
2F13 2F14
2440
2441
2433
2434
F712 IF05 5F03
3F13
3F18
2F17
2F19 3F12
2F12
2F16
2F21
2F11 3F11
3F05
2F20
I423
I412 I411
5F02
2F09 F203 I422
5F01
2F08
2F15 I417
F711
2F07 FF12
2217 5200 I424
FC01 I419 I418 I421
5F05
2218 I416
FB01 F720
FB15
FB16
FB17
F208 F206 F211
FF07
FB22 FF08 FF06 FF10 I415
I949
I951 I413 I410
FF11 I407
I945 I946 I409
2F27
2F26
2F25
2F24
2214
F722
F507
F202 I406
F207 I405
F930
F407
F717
F919 A205 A204 A210 A209 I404 F716
F721
2236 2239 5203 F410
F723
5202 2220 2240 5204
I414
5201 2219 2226 F724
2232 F741
F706
3921
F739
I947
I904
F406 FB23 I902
2223
FC50 I952
2224
F705
2229
I953
F921
FB02 FC33 IA01 IA09
F901 F902 F905 F923 F927 IA02 IA03 IA04 FA07
F904
FB21 FB09 FB24 FB13
FA04
FA03
FB20
FC35 FC34
IA07
FA14 FA13
IA08
1 2012-01-20
19300_017_120403.eps
120403
2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 74
+3.3 V
J1
R6 6.8 kΩ
3
2
1
CON3 VSS R1 R2 R3 R5 R4
1.5 kΩ 3.9 kΩ 5.6 kΩ 18 kΩ 8.2 kΩ
C1
103 ZD1
RES RES
VSS
1.1 2012-02-06
2722 171 90554, 2722 171 90555,
Keyboard Control Module 2722 171 90556, 2722 171 90557,
2722 171 90561, 2722 171 90562
19300_019_120403.eps
120403
2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 75
1.1 2012-02-06
19300_020_120403.eps
120403
2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 76
Sensor Board
J J
+3.3V +3.3V
2
+3.3V VDD
R2 4 +3.3V
ZD2 100R GND
ESD C3
5.6V
RES RES 10uF/6.3V 1
2
GND R4
VSS TSOP75236 47R/100R
RED LED
+5V D1 D1*
+5V 95-21
RES
8
1
1 5 U2B
R26 Q2 RES
2 470R 7 LIGHT SENSOR
BC847
6 100R
C
LM358 LED2 R3 2 2
B B
LM358
4
10k
E
Q1 C14
ZD1 ZD3
C12 R23 BC857 102
R19 R20 R24 5.6V
VSS 15k 3.3V RES
3
22k R21 18k R25 RES
47k 0.1u R5
100k 100k 10k RES
VSS
VSS VSS VSS VSS VSS VSS
C110.1u C13 0.1u
1 2011-12-27
Sensor Board
2722 171 90629
19300_023_120404.eps
120404
2012-Apr-20 back to
div. table
Circuit Diagrams and PWB Layouts L12M1.1L LA 10. EN 77
C4
C10
U2 ZD1 C50 ZD3
R5
R3
ZD2
R1 R9 J1 Q1
J12
C3 R2 R13 C14 Q2
C11 R22 C13 R14
C2
C1
R21 C12 R25 R26 G1 R10 V1.0
R20 R23 R24 R19 U1 J2 C5 GWA7.820.742-1R4 D1
1 2011-12-27
Sensor Board
2722 171 90629
layout
19300_025_120404.eps
120404
2012-Apr-20 back to
div. table
Styling Sheets L12M1.1L LA 11. EN 78
1150 5214
5215 0040
0012
0032
1004 5215
2012-Apr-20 back to
div. table
Styling Sheets L12M1.1L LA 11. EN 79
5000/6000 42/47"
5215
0032
1150
1005
5214
0012
5215
0260
2012-Apr-20 back to
div. table
Styling Sheets L12M1.1L LA 11. EN 80
0031
1163
0085
1150
0008
0035
0032 1163
0020
5214
0040
1005
2012-Apr-20 back to
div. table
Styling Sheets L12M1.1L LA 11. EN 81
0031
1163 0035
0020 0032
1150
5217
1163
1005
0008
1114
0007
5214
Pos No. Description Remarks
0007 Top Deco assembly
0008 Left Deco assembly
0040 0009 Right Deco assembly
0017 Bottom Deco assembly
0020 Rear Cover
0031 Ambilight Door
0032 IR Cover
0035 Swivel Pom
5218 0040 Main inlet bracket
0085 Left filler assembly Not displayed
1004 0086 Right filler assembly Not displayed
0253 Wifi Dongle Not displayed
0259 Stand accessory Not displayed
1122 0260 Stand assembly
0269 3D Goggle Not displayed
1004 Panel
1005 Board PSU
1085 Remote Control Not displayed
1114 Keyboard assembly
1122 IR assembly
0009 1150 SSB panel
1163 Ambilight
0017 5214 Loudspeaker
5217 Left tweeter Loudspeaker
0260 5218 Right tweeter Loudspeaker
2012-Apr-20 back to
div. table