CIS 5100 Homework Assignment #3 Solutions Fall 2020, Dr. Song Xing
CIS 5100 Homework Assignment #3 Solutions Fall 2020, Dr. Song Xing
Stephen D. Burd
Chapter 5: Vocabulary Exercises
5. __________ is typically stated in milliseconds for secondary storage devices and nanoseconds for
primary storage devices.
Answer: Access time
6. The access method for RAM is __________ or __________ if words are considered the unit of
data access. The access method is __________ if bits are considered the unit of data access.
Answer: random, direct, parallel
7. A(n) __________ mimics the behavior and physical size of a magnetic disk drive but has no
moving parts.
Answer: solid-state drive
8. The data transfer rate of a magnetic or optical disk drive can be calculated by dividing 1 by the
drive’s access time and multiplying the result by the __________.
Answer: data transfer unit size
9. Tape drives are __________ devices. __________ are random or direct access devices.
Answer: serial access, disk drives
10. Modern desktop and laptop computers generally use memory packaged on small standardized
circuit boards called __________.
Answer: SIMMs or DIMMs
11. For most disk drives, the unit of data access and transfer is a(n) __________ or
__________.
Answer: block, sector
12. Software programs stored permanently in ROM are called __________.
Answer: firmware
More exercises
2. wait states
3. addressable memory
Flash RAM wears out after several hundred thousand read/write cycles. Therefore, it
would have to be replaced frequently if used as primary storage in a general-purpose
computer.
2. Describe serial, random, and parallel access. What types of storage devices use each method?
Serial access reads or writes data units in sequential order. Magnetic tape is the only
widely used form of serial access storage. Random access can “jump” directly between
two noncontiguous data units. All primary storage and disk storage devices (including
SSD) use random access. Parallel access reads or writes portions of a data item in parallel
on separate storage devices or media. RAM can also be considered a parallel access
device.
3. In what way(s) is/are SSDs an improvement over magnetic disk drives? In what way(s)
isn't/aren't they an improvement over magnetic disk drives?
By avoiding all mechanical delays in accessing storage locations, SSDs yield a significant
performance improvement compared to magnetic disk drives. However, their lifetime, as
measured in write cycles, is significantly less than magnetic disk drives. Also, their cost per unit
of storage is generally higher than for magnetic disk drives.
1. What characteristics of the CPU and of the system bus should be balanced to achieve maximum
system performance?
Answer: The width of the data bus should equal or exceed CPU word size. The bus clock
rate should match the CPU clock rate, though this is difficult or impossible to achieve.
2. How can a cache be used to improve performance when reading data from and writing data to a
storage device?
Answer: A cache controller attempts to guess what data will be requested next and
prefetch this data into the cache. If the cache controller guesses correctly, data can be
supplied more quickly. A cache controller confirms a write operation as soon as data is
written to the cache but before it’s written to the storage device. This improves the
performance of a program waiting for write confirmation by reducing the interval
between the write request and the write confirmation.
3. What is a multicore processor? What are its advantages compared with multiple-processor
architecture?
Answer: A multicore processor is a single microchip containing two or more fully
functional CPUs. The main advantage of multicore architecture compared with multi-
CPU architecture with CPUs of equivalent number and power is more efficient inter-CPU
communication, which increases total computational power when multiple CPUs
cooperate on the same task. Multicore processors didn’t become available until the mid-
2000s because that’s when the capabilities of modern semiconductor manufacturing
methods evolved to the point that enough transistors could be placed on a single chip to
implement multiple CPUs and their memory caches.
In the following figure, fetch cycles are shown in red and execution cycles in blue. The memory
access includes the time to transmit the access request and receive the result by the CPU. As the
processor cycle time is 0.4167 nanoseconds, so 24 CPU cycles (10 divided by 0.4167) are
required to complete the fetch operation. Half of the next cycle (the fetch portion) is wasted
waiting for the execution cycle to begin (the execution can’t begin until 10.21 nanoseconds have
elapsed), so 24 wait states are incurred.
2.
Storage device Average access time Data transfer unit size Data transfer rate