HVLED001A

Offline controller for LED lighting with constant voltage primary-

sensing and high power factor
Datasheet - production data

Description
The HVLED001A is an enhanced peak current
mode controller capable of controlling high power
factor (HPF) flyback or buck-boost topologies in
LED drivers that have an output power of up to
SSO10 150 W. Other topologies, such as buck, boost and
SEPIC, can also be implemented.
ST’s innovative high voltage technology allows
Features direct connection of the HVLED001A device to
the input voltage to start up the device and to
 Quasi resonant (QR) topology monitor the input voltage, without the need for
 Optimized output voltage accuracy at any load external components.
(PSR mode) The device embeds advanced features to control
 Improved transient response and startup time either the output voltage or the output current
 Direct optocoupler connection for current loop precisely and reliably using a reduced number of
regulation with feedback disconnection mainly passive components. Startup and light
detection load conditions are managed by dedicated
operating schemes to improve the quality of the
 800 V high voltage startup regulation of the output variable in the final
 High power factor and low THD over wide application. Abnormal conditions such as open
range of input voltage and load variations circuit, output short-circuit, input overvoltage/
 High efficiency and output stability over wide undervoltage and circuit failures like open loop
voltage and current range and overcurrent of the main switch are effectively
controlled.
 Low startup and quiescent current
A smart auto-recover timer (ART) function is built-
 Programmable minimum off-time
in to guarantee automatic application recovery,
 Integrated input voltage detection for high without loss of reliability.
power factor capability and protection
triggering Table 1. Device summary
 Latch-free device guaranteed by smart auto- Order code Package Packaging
reload timer (ART)
HVLED001A Tube
 0-10 and PWM dimming compatible SSO10
HVLED001ATR Tape and reel
 Remote control pin

Applications
 Single stage LED drivers with high power factor
up to 75 W
 Two stages LED drivers up to 150 W

May 2016 DocID029000 Rev 2 1/30

This is information on a product in full production. www.st.com
Contents HVLED001A

Contents

1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 Typical application - HPF flyback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6 Typical electrical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

7 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7.1 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7.1.1 Startup mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7.1.2 Active mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.1.3 Stop mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.1.4 Low consumption mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.1.5 Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.2 Control loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.2.1 Current sense input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.2.2 Feedback input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.2.3 Zero current detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.2.4 Primary side regulation feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.2.5 Burst mode operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.2.6 Gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.3 IC supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.3.1 VCC supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.3.2 High voltage startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.4 Auto-restart timer (ART) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2/30 DocID029000 Rev 2

HVLED001A Contents

7.5 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.5.1 Overcurrent protection (OCP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.5.2 Input overvoltage protection (I-OVP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.5.3 Brownout protection (BO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.5.4 Optocoupler failure protection (OFP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.5.5 Output overvoltage protection (oOVP) . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.6 Disable and monitor feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

8 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.1 SSO10 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

DocID029000 Rev 2 3/30

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Block diagram HVLED001A

1 Block diagram

Figure 1. Block diagram

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4/30 DocID029000 Rev 2

HVLED001A Typical application - HPF flyback

2 Typical application - HPF flyback

Figure 2. Typical application

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DocID029000 Rev 2 5/30

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Pin settings HVLED001A

3 Pin settings

Figure 3. Pin connection

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Table 2. Pin description

Symbol Pin Description

High voltage startup and input voltage detection.

The pin, able to withstand 800 V, is intended to be tied to the input voltage using a low value resistor
(1 k typ.) . It embeds the internal startup unit that charges the capacitor connected between the
HVSU 1
VCC pin and GND pin during the startup and low consumption.
During the operational mode, the voltage at this pin is used to both - measure the input voltage and
detect input overvoltages.
N.C. 2 Not connected pin.
A blanking time for zero voltage detection can be set applying a voltage to this pin. A minimum
TOFF 3
blanking time is obtained leaving the pin unconnected.
Input for loop regulation.
The pin is intended to be directly driven by the phototransistor (emitter-grounded) of an optocoupler
and/or to be connected to the compensation network related to the output voltage primary side
FB 4 regulation loop.
An upper threshold VOFP detects a failure of the optocoupler.
The burst mode is also related to the voltage applied to this pin.
This pin is used to disable the IC and generate the soft-start ramp.
CTRL 5
External active circuitry can be used to turn-off the application.
Multiple function pin able to detect the zero current instant, to sense the output voltage for the
primary side regulation and the input voltage for brownout detection. A negative-going edge triggers
ZCD 6
the MOSFET's turn-on, while an internal starter unit is active to generate the triggering signal when
not externally available (e.g.: startup).
Input to the current sense comparator for the power regulation. A second level overcurrent (OCP)
CS 7 threshold detects abnormal currents (e.g.: due to transformer's saturation) and, on this occurrence,
activates the second level overcurrent protection procedure.
GND 8 Reference pin.

6/30 DocID029000 Rev 2

HVLED001A Pin settings

Table 2. Pin description (continued)

Symbol Pin Description

GD 9 Gate driver output. The output stage is able to drive the power MOSFET's and IGBT's gate.
Supply voltage of the IC.
Internal UVLO logic prevents the operation at voltages that are insufficient for the efficient gate
driving or signal processing. Both a bulk capacitor (typically around 10 µF) and a high frequency
VCC 10 filter capacitor (100 nF ceramic, mounted as close as possible to the device) are connected between
this pin and GND. An internal clamp structure prevents accidental low energy spikes damaging the
device. An external clamping device should be used to avoid the voltage applied to the VCC pin to
overcome the AMR.

DocID029000 Rev 2 7/30

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Electrical data HVLED001A

4 Electrical data

4.1 Absolute maximum ratings

Table 3. Absolute maximum ratings
Symbol Pin Parameter Test condition Min. Max. Unit

VHVSU,bd HVSU HVSU breakdown voltage IHVSU < 100 µA, VCC = 15 VDC 800 V
VHVSU,neg HVSU HVSU negative voltage IHVSU source < 2 mA - 0.3 V
VGD GD Maximum swing voltage - 0.3 VCC V
Current sense applied
VCS CS - 0.3 7 V
voltage
7 V
VZCD ZCD ZCD pin voltage
Negative, Isource < 1 mA - 0.3 V
VFB FB FB voltage - 0.3 3.6 V
VCTRL CTRL CTRL voltage Stop mode - 0.3 VCC V
ICTRL CTRL CTRL injected current 1 mA
VCC,MAX VCC IC supply voltage 18 V
VTOFF TOFF Maximum applied voltage - 0.3 7 V

Note: Where not otherwise indicated the AMR values are intended to be applied when
VCC > VCC,on. When VCC < VCC,on the minimum between the indicated value and VCC + 0.3
V has to be considered.

4.2 Thermal data

Table 4. Thermal data
Symbol Parameter Value Unit

RthJA Thermal resistance junction to ambient 120 °C/W

TJ Junction temperature operating range -40 to 125 °C
Tstg Storage temperature range -55 to 150 °C

8/30 DocID029000 Rev 2

HVLED001A Electrical data

Table 5. Recommended operating conditions

Symbol Parameter Min. Max. Unit Remarks

VCC VCC supply voltage VCC,su 16.5 V

Linearity not guaranteed between 480 V
VHV,op HVSU negative voltage 0 480 V
and VHVSU,bd
VFB FB pin regulation voltage range 1.085 2.8 V
VCS,op CS pin operative condition 0 VCS,lim V
VZCD ZCD pin operative voltage Self limited 3.3 V
IZCD_sink ZCD pin operative current IBO 650 A
VCTRL CTRL pin operative voltage VCTRL,dis Vadis V
VTOFF TOFF pin operative voltage 0 3.3 V

DocID029000 Rev 2 9/30

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Electrical characteristics HVLED001A

5 Electrical characteristics

Tj = 40 °C to 125 °C, 25 °C production tested, VCC = 15 V, unless otherwise specified.

Table 6. Electrical characteristics

Symbol Pin Parameter Test condition Min. Typ. Max. Unit

Supply voltage

Vcc,on VCC Turn-on threshold (1)

11.8 13 14.2 V
(1)
Low consumption mode Low consumption mode 8.8 9.2 9.7 V
Vcc,su VCC
activation Startup 2.2 3 3.8 V
Vcc,shd VCC VCC for IC reset Low consumption(1) 7.8 8.5 9.2 V

Supply current

Istart-up VCC Startup current Startup, Vcc < Vcc,on 125 250 A
(2)
Operating supply No switching 3.15 mA
ICC VCC
current See Figure 4 on page 14
Low consumption mode,
Iq VCC Quiescent current 330 480 A
CTRL < VCTRL,dis

High-voltage startup generator

VHV HVSU Breakdown voltage IHV < 100 A 800 V

VHVstart HVSU Start voltage IVcc < 100 A 40 46 55 V
Icharge,su VCC Initial charging current VHVSU > VHvstart, Vcc < 2 V 0.25 0.43 0.8 mA
VHVSU > VHvstart,
Icharge VCC VCC charge current 2 3.4 5 mA
Startup, VCC < Vcc,on
VHVSU > VHvstart, Vcc < 2 V 0.3 0.65 1.1
IHV, ON HVSU ON-state current VHVSU > VHvstart, startup, mA
2.3 4 6
Vcc < Vcc,on
OFF-state leakage
IHV, OFF HVSU VHVSU = 400 V, active mode 18 30 A
current

Input voltage sensing

Surge protection
Vsurge HVSU 500 570 620 V
threshold
Max. stop state duration
Tsurge HVSU VHVSU > Vsurge(3) 7 10 15 ms
after surge

Feedback input

VFB,ref FB FB reference voltage Active mode(4), (5), (6) 1 V

Active mode, VFB = 2.8 V,
kp FB Multiplier gain 0.35 0.4 0.46 -
VHVSU = 300 V(6)
Active mode, VZCD,off = 2.0 V,
IFBsrc FB FB pin pull-up current 0.67 1 1.35 mA
VFB = 1.65 V

10/30 DocID029000 Rev 2

HVLED001A Electrical characteristics

Table 6. Electrical characteristics (continued)

Symbol Pin Parameter Test condition Min. Typ. Max. Unit

Active mode, VZCD,off = 3.2 V,

IFBsnk FB FB pull-down current 1.3 2 2.7 mA
VFB = 1.65 V
VBm FB Burst mode threshold Active mode(5) 0.97 1.054 1.11 V
Burst mode repetition
Tbm FB VFB = 0.8 V(3), VTOFF = 2.5 V 0.8 1.04 1.4 ms
rate
Optocoupler failure
VOFP FB Active mode(5) 2.75 2.95 3.4 V
protection threshold
Max. active mode
TOFP FB duration after FB VFB > VFB,max(3) 70 100 130 ms
clamping

PSR function

Tamb = 25 °C(7) 2.55 2.6 2.65

VREF,PSR FB PSR loop reference V
(4), (7)
Over all temperature range 2.5 2.6 2.7
IFB = ± 10 A,
gm FB Transconductance 1.3 2.3 3.2 mS
VFB = 1.65 V

Current sense input(8)

VHVSU = DC voltage,
Current sense
VCS,lim CS VFB = 3.3 V, 620 750 890 mV
reference clamp
1.9 V < VCTRL < 2.4 V
Current sense minimum
VCS,min CS 30 55 80 mV
level
Current sense pin bias
ICS CS VCS = 500 mV(4) 2.5 5 µA
current
TLEB CS Leading edge blanking 140 340 470 ns
Saturation protection
VOCP CS During Ton 1 1.1 1.2 V
threshold
Max. stop state duration
TOCP CS tpulse = 1 µs, amplitude 2 V(3) 0.72 1.04 1.41 ms
after OCP
VCTRL = 0.7 V 280 348 450 mV
VCS_SS CS VCS during SS
VCTRL = Vctrl,bias VCS,lim mV

ZCD input

VZCD,arm ZCD ZCD arming threshold After Tblank,min(7) 0.42 0.5 0.6 V
ZCD triggering
VZCD,trig ZCD Negative going edge(7) 0.24 0.3 0.38 V
threshold
TBLANK,min ZCD ZCD min. blanking time From MOS turn off 1.5 3.2 4.6 µs
ZCD programmable VTOFF = 0 V(9), from 1st ZCD trig
TBLANK,var ZCD 120 200 290 µs
blanking time after TBLANK,min
ZCD negative clamping
VZCD,cl_l ZCD IZCD src = 1 mA -230 -100 mV
voltage

DocID029000 Rev 2 11/30

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Electrical characteristics HVLED001A

Table 6. Electrical characteristics (continued)

Symbol Pin Parameter Test condition Min. Typ. Max. Unit
(4)
IZCDb ZCD ZCD pin biasing current VZCD = 0.1 to 2.6 V 1 µA
Brownout detection
IBO ZCD Sourcing during on time 65 105 140 µA
level
Brownout detection
TBO ZCD IZCD < IBO(3) 70 100 130 ms
time

Timing

Recovery time after

Trec opto failure, analogue (3)
1.7 2.5 3.2 s
disable or brownout

Gate driver

VGDH GD Output high voltage IGD,source = 5 mA 14.5 V

VGDL GD Output low voltage IGD,sink = 5 mA 0.1 V
Output source peak
Isource GD VGD = 7.5 V(4) 0.3 A
current
Output sink peak
Isink GD VGD = 7.5 V(4) 0.6 A
current
Tf GD Fall time CGD = 1 nF, from 13.5 V to 1.5 V 6 ns
Tr GD Rise time CGD = 1 nF, from 1.5 V to 13.5 V 35 ns
Maximum voltage
VGD,shd GD VCC < Vcc,shd , IGD = 2 mA 0.2 1 1.5 V
during shut-down

CTRL input

VCTRL,dis CTRL Disabling threshold Negative going edge(7) 0.4 0.5 0.6 V
Timed disabling (7)
Vadis CTRL 2.4 2.6 2.85 V
threshold
Max. operating interval
TADIS CTRL after analog disable VCTRL > Vadis(3) 70 100 130
ms
feature triggering
Tamb = 25 °C(10) 1.84 2.05 2.26 V
Vctrl,bias CTRL CTRL biasing voltage
Over whole temp. range 1.75 2.35
Ictrl,bias CTRL CTRL biasing current VCTRL = 0 V 5 10 15 µA
(11)
Rctrl CTRL Internal parallel resistor 205 k
Pin voltage during low
Vctrl,pd CTRL consumption (power Low consumption, ICTRL = 0.2 mA 0.2 V
good)
(10)
Veoss CTRL End of soft-start level Pulse duration greater than 5 µs 1.7 1.8 1.95 V

12/30 DocID029000 Rev 2

HVLED001A Electrical characteristics

Table 6. Electrical characteristics (continued)

Symbol Pin Parameter Test condition Min. Typ. Max. Unit

TOFF characteristics

Minimum fixed TBLANK (4)

VTOFF,fix TOFF 2 V
voltage
TOFF characteristic (4)
koff TOFF 100 µs/V
slope
ITOFFpu TOFF Pull-up current 6 12 18 µA
(4)
VTOFF,bias TOFF Internal bias voltage 2.4 V
1. Parameters in tracking group 1.
2. Calculated during testing procedure as difference between measured ICC and FB source current.
3. Parameter calculated.
4. Parameters not tested in production.
5. Parameters in tracking group 2.
6. The Kp parameter includes the overall tolerances of the multiplier block defined as per note(8).
7. Parameters in tracking group 3.
VHVSU
8. VCS  kp  VFB  VFB,ref  OR VCS,min , VHVSU,pk indicates the maximum value of VHVSU.
VHVSU,pk

9. TBLANK.var  koff  VTOFF, fix - VTOFF 

10. Parameters in tracking group 4.
11. VCTRL,bias/ICTRL,bias.

DocID029000 Rev 2 13/30

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Typical electrical characteristic HVLED001A

6 Typical electrical characteristic

Figure 4. VCC current consumption

14/30 DocID029000 Rev 2

HVLED001A Application information

7 Application information

7.1 Operating modes

The HVLED001A QR flyback controller is able to operate either as a single stage high
power factor (HPF) flyback controller or as a DC/DC flyback controller in dual-stage
topologies.
Application schematics of the two main topologies are reported in Figure 5 and Figure 6.

Figure 5. High power factor flyback - constant output current

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DocID029000 Rev 2 15/30

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Application information HVLED001A

Figure 6. High power factor flyback – primary side regulated constant output voltage
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The HVLED001A has four main operating modes: the startup mode, active mode, stop
mode and low consumption mode.

16/30 DocID029000 Rev 2

HVLED001A Application information

7.1.1 Startup mode

This state is entered to begin the switching activity (during application's turn-on or exiting
from the low consumption state). The HVSU is involved into the mechanism of VCC
charging; all other peripherals, except the UVLO and logic supply, are turned off to minimize
the startup time.
During this state the CTRL pin is internally pulled to ground.

Figure 7. Initial startup phase

DocID029000 Rev 2 17/30

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Application information HVLED001A

7.1.2 Active mode

It is the normal operational mode. During this state the external MOSFET is driven
accordingly to signals coming from the application in order to regulate the desired output
parameter in the closed loop (peak current control method).
The active mode is exited when abnormal conditions are present or VCC drops below the
Vcc,su threshold. The HVSU is inactive during the active mode.

7.1.3 Stop mode

This state is intended to stop the switching activity without turning off the entire function set,
to quickly restart when abnormal or disabling conditions end. During this state the power
consumption is not minimized and the soft-start procedure is not enabled.

7.1.4 Low consumption mode

This state is intended to stop the switching activity reducing the power consumption to
a minimum level. The soft-start procedure is set to be performed when abnormal or
disabling condition is removed.
During this state the VCC is kept between VCC,su and VCC,on by the high voltage startup
unit (HVSU) delivering Icharge to the output capacitor.
Note: IMPORTANT: The HVSU charges the VCC so any other external voltage (including
auxiliary winding) must be decoupled using a diode (e.g.: 1N4148).

7.1.5 Soft-start
The soft-start phase is entered after the startup and every time the IC exits from the low
consumption mode. This phase lasts until the voltage at the CTRL pin reaches the “end of
soft-start” level (Veoss).
The current sense maximum limit is derived from this voltage, therefore the charging time of
a capacitor placed between the CTRL pin and GND defines the soft-start time.
During this phase some protections [optocoupler failure protection (OFP), brownout (BO)
and analog disable (AN_DIS)] are ignored.

18/30 DocID029000 Rev 2

HVLED001A Application information

7.2 Control loop

The control loop is based on the current mode quasi resonant flyback control scheme and is
therefore performed by turning off the MOSFET when the peak of its source current reaches
the threshold set by the control loop, and by turning on the MOSFET in correspondence of
the resonant valley following the demagnetization of the transformer or inductor.
A detail of the block involved into this scheme is shown in Figure 8.

Figure 8. Control loop blocks

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7.2.1 Current sense input

The peak of the primary current is read across a shunt resistor placed between the
MOSFET's source and compared with a threshold equal to:

Equation 1

Where the term VHVSU,pk is the maximum value of the HVSU voltage within around 20 ms
and is used to compensate the dependency on the input voltage of the open loop gain
transfer function. The gain kp collects all the proportional terms between the HVSU voltage
and CS threshold.
A leading edge blanking time (LEB) is applied after the MOSFET's turn-on.
The VCS signal is upper limited to a value that depends on the CTRL voltage and is lower
limited to 55 mV.
A second level OCP threshold is present to temporarily stop the switching activity in case of
inductor saturation.

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Application information HVLED001A

7.2.2 Feedback input

The FB pin is intended to be connected to the compensation network for the primary side
control (PSR) loop of the output voltage (see Section 7.2.4) as well as to be connected
directly to the collector of the optocoupler that provides the galvanic insulation to the
secondary side regulation control loop.
In case of constant output voltage applications, the PSR loop can be used to regulate the
output voltage saving the secondary side error amplifier.
The FB voltage is also used as an input parameter for the burst mode operation described in
Section 7.2.5.
The pin embeds a protection to prevent from the operation with a failed optocoupler.

7.2.3 Zero current detection

The zero level detection is performed by a trigger logic that, once armed (if a ZCD voltage is
higher than VZCD,arm after Tblank,min starting from GD turn-off instant), is sensitive to
falling edges. The advanced ZCD logic is able to discriminate between the normal
operation, output short-circuit or startup condition.
An internal blanking time prevents any triggering signal to activate the MOSFETs at the very
beginning of the off-time, where spurious resonances could be present. As a result, the first
falling edge occurring after the blanking time turns on the MOSFET.
To ensure a proper operation, the transformer has to be designed to guarantee that the
inductor's demagnetization time is longer than TBLANK (at VTOFF > VTOFF,fix) when the
VCS value (Equation 1) is higher than 0.7 V (typ.).
The TOFF pin is intended to select the blanking time duration. If the pin is left unconnected
a fixed blanking time is provided.
The TBLANK value depends on the TOFF voltage (Figure 9).
An internal starter provides the triggering signal whenever a valid arming signal is not
detected.
The ZCD pin embeds a negative clamp to limit the negative-going current.

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Figure 9. Tblank time vs. TBLANK voltage (typical, measured starting form first ZCD
falling edge)





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7.2.4 Primary side regulation feature

The ZCD pin is also used as input of the PSR error amplifier (E/A). The reference voltage of
this loop is internally fixed to VREF,PSR and applied to the non-inverting input of the E/A.
The output of such error amplifier is connected to the FB pin where the relevant
compensation network has to be connected.
In a flyback or buck-boost topology the output voltage can be read from the primary side
using an auxiliary winding of the power magnetic: in this case the output voltage is obtained
using Equation 2:

Equation 2

The internal small signal model of the PSR E/A is obtained by considering the voltage gain
(GV = 73 dB) and the gain bandwidth product (GBWP = 1 MHz) and is illustrated in
Figure 10:

Figure 10. PSR E/A small signal model

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7.2.5 Burst mode operation

As soon as the FB pin drops below Vbm the burst mode operating mode is entered. The
switching activity is temporarily interrupted until the FB voltage returns above the Vbm
value. An internal hysteresis improves the noise rejection of this feature. The FB biasing
current follows the same rules as in the normal operation; therefore the burst mode
operation is either defined by a secondary side error amplifier when an optocoupler is used
or by the internal error amplifier if the PSR operation is on.
During the burst mode, the output voltage value is refreshed every millisecond by means of
the generation of four switching pulses separated by the ZCD voltage's falling edge. The
TBLANK,min interval is also present between each pulse.
A minimum power delivery is associated with the burst mode. A small preloading device
(resistor or clamping Zener) should be placed on the output port to prevent the output
voltage runaway when no load is connected to the output port.

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7.2.6 Gate driver

The output stage, connected to VCC potential and capable of the 300 mA source and
600 mA sink current, is suitable to drive high current MOSFETs. The resulting managed
power can be greater than 150 W.

7.3 IC supply management

The IC's voltage supply is managed by the UVLO circuitry together with the high voltage
startup unit and reference generators. These logics define also supply currents during
different operating conditions.

7.3.1 VCC supply management

The IC is designed to operate with a range of supply voltage to ensure optimum gate
driving. An active limiting device is embedded to prevent low energy fluctuations to bring the
VCC voltage above the technological constraints.
Both the active mode and the low consumption mode exhibit very low supply currents in
order to meet the energy saving regulation.
The VCC pin can be driven independently from the HVSU pin's connection, for example
when auxiliary supply voltage is present. In this case the HVSU pin will be used solely to
monitor input voltage.
A bulk capacitor, having a capacitance of around 10 µF, followed by a ceramic capacitor,
having a typical capacitance of 100 nF and connected very tight to the VCC pin, are
necessary to properly sustain the VCC voltage during all operating phases.

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7.3.2 High voltage startup

The high voltage startup (HVSU) circuitry is primarily intended to provide the startup current
to the VCC pin and maintain the IC responsive during low consumption modes.
This structure is able to sustain at least 800 V to avoid any damage in case of a surge or
burst on the stage's input.
The overall structure is off until input voltage reaches the VHVSU,start threshold, after that it
sources a minimum current (Icharge,su) to charge the VCC pin up to the Vcc,su threshold.
This condition prevents the IC from severe damages in case of the short-circuit on the VCC
pin.
At this VCC voltage a higher current (Icharge) is provided to the VCC to reach the VCC,on
threshold. At this occurrence the active mode is invoked and the HVSU is turned off.
During other active mode's phases and the stop mode the HVSU is off.
If the low consumption mode is entered, the HVSU unit is turned on.
Table 7 summarizes the HVSU behavior in all IC conditions.

Table 7. HVSU operating modes

Operating condition (see Figure 7) VCC range OFF Icharge,su Icharge

All states if VIN < VHVSU,ON - X

Startup (logic startup) 0 V … Vcc,su X
Startup (IC startup) Vcc,su … Vcc,on X
Active mode Vcc,su … VCC,MAX X
Stop mode Vcc,su … VCC,MAX X
Low consumption mode Vcc,su Vcc,on (rising) X
Low consumption mode
(after the end of entering conditions) Vcc,su … Vcc,on X

7.4 Auto-restart timer (ART)

The auto-restart timer unit is responsible for the generation of the protection intervals and of
the restart times after the low consumption mode. A summary of all possible combinations
of times is described in Section 7.5.

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7.5 Protections
A comprehensive set of protections is embedded to ensure a high level of reliability of the
final application using a limited number of components.

7.5.1 Overcurrent protection (OCP)

To prevent any damage to active components in case of inductor's saturation the MOSFET
is immediately turned off by fast OCP protection. At this occurrence the IC temporarily
enters the stop state for a time equal to TOCP.

7.5.2 Input overvoltage protection (I-OVP)

Disturbances of the input voltage like surges or bursts may increase the voltage applied to
the transformer primary side. Worst, an excessive input voltage could be applied to the
application. These occurrences may result into MOSFET’s damages during the off state
when the drain voltage rises to Vin plus reflected voltage, eventually above the maximum
absolute rating of the MOSFET itself.
An input voltage higher than VSurge, measured by HVSU structure, immediately stops the
IC. If the extra voltage diminishes before Tsurge the device restarts immediately without
activating the startup procedure, otherwise the low consumption mode is entered until the
input voltage returns below the safety threshold. An internal hysteresis improves the noise
rejection of this feature. In the latter case the ART activates the startup procedure.

7.5.3 Brownout protection (BO)

The current sourced by the ZCD pin's negative clamp during the on time is compared to
a minimum value to determine whether the input voltage is lower than the input range
specification (brownout protection). If a value lower than IBO for a time longer than TBO,
managed by the ART, is detected the IC is stopped for Trec and then restarted.
When the protection is triggered, the ART performs the autoreloading procedure after Trec.
The brownout protection is active during the active mode, but blanked during the soft-start.

7.5.4 Optocoupler failure protection (OFP)

This protection detects either the absence of the optocoupler control (no pull-down) or the
overload condition for more than a time equal to TOFP and switches off the application
putting the device in the low consumption mode. This prevents the output power from a
rising above excessive values due to the loss of control.
The ART manages the TOFP interval and performs the auto-reloading procedure after Trec.
The OFP is active during the active mode, but blanked during the soft-start.

7.5.5 Output overvoltage protection (oOVP)

In case of the ZCD sampled voltage is well above the VREF,PSR voltage (around 3 V) OTA
provides an extra sink current ( 2 mA typ.) to the FB pin to speed up the energy transfer
reduction and limiting the output voltage overshooting.

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7.6 Disable and monitor feature

Several disabling means are available to externally disable the IC:
1. Driving the CTRL pin low (CTRL_DIS): this occurrence immediately puts the device
in the low consumption mode; when the CTRL pin is left free, the internal biasing mean
pulls up the voltage above the threshold entering the soft-start procedure.
2. Driving the CTRL pin high (AN_DIS): a CTRL voltage higher than the threshold for
a time longer than Tdis causes the device to enter the low consumption mode. The
ART timer performs an auto recover procedure after Trec.
Anytime the HVLED001A device enters low consumption an internal pull-down discharges
the soft-start capacitor and resets the soft-start time.

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8 Package information

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.

8.1 SSO10 package information

Figure 11. SSO10 package outline

8140761 rev. A

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Table 8. SSO10 package mechanical data

Dimensions (mm)
Symbol
Min. Typ. Max.

A 1.75
A1 0.10 0.25
A2 1.25
b 0.31 0.51
c 0.17 0.25
D 4.80 4.90 5
E 5.80 6 6.20
E1 3.80 3.90 4
e 1
h 0.25 0.50
L 0.40 0.90
K 0° 8°

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9 Revision history

Table 9. Document revision history

Date Revision Changes

24-Mar-2016 1 Initial release.

Updated document status to Datasheet - production
26-May-2016 2
data on page 1.

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 HVLED001A

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