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DIGITAL CIRCUITS-I 

LAB 
04.12.2020 
─ 
 
 
 
JADAVPUR UNIVERSITY 
 
Exp No  Experiment 
Name 

Implement the boolean expression (A+B).(C+D​C​).E and then verify its
truth table.
 
2  IMPLEMENT THE FUNCTION F(x,y,z)=xy+yz+zx USING TWO INPUT NAND
GATE
 
3  DESIGN BCD TO EXCESS 3 CODE CONVERTER 
 
 
 
 
 
 
 
 
 
S. No  Name  Roll No 
1  Asipi Praveen Rao  001910701073 
2  Gaurav Nandy  001910701074 
3  Sagnik Das  001910701075 
4  Souvik Barman  001910701076 
 
​EXPERIMENT NO-1
OBJECTIVE:​To implement the boolean expression (A+B).(C+D​C​).E and then verify its
truth table.

TRUTH TABLE OF THE EXPRESSION:

A B C D E F
0 0 0 0 0 0
0 0 0 0 1 0
0 0 0 1 0 0
0 0 0 1 1 0
0 0 1 0 0 0
0 0 1 0 1 0
0 0 1 1 0 0
0 0 1 1 1 0
0 1 0 0 0 0
0 1 0 0 1 1
0 1 0 1 0 0
0 1 0 1 1 0
0 1 1 0 0 0
0 1 1 0 1 1
0 1 1 1 0 0
0 1 1 1 1 1
1 0 0 0 0 0
1 0 0 0 1 1
1 0 0 1 0 0
1 0 0 1 1 0
1 0 1 0 0 0
1 0 1 0 1 1
1 0 1 1 0 0
1 0 1 1 1 1
1 1 0 0 0 0
1 1 0 0 1 1
1 1 0 1 0 0
1 1 0 1 1 0
1 1 1 0 0 0
1 1 1 0 1 1
1 1 1 1 0 0
1 1 1 1 1 1
IMPLEMENTATION OF THE BOOLEAN EXPRESSION:

Fig (a)

CASE 1:A=1,B=0,C=0,D=1,E=1.

Fig (b)
CASE 2:A=1,B=1,C=1,D=0,E=0.

Fig (c)

CASE 3: A=1,B=1,C=1,D=1,E=1.

Fig (d)
CASE 4:A=1,B=1,C=0,D=0,E=1.

Fig (e)

RESULT​
:

Thus performing the above experiment in the a circuit simulator we were able to verify
the values obtained by truth table

We clearly found out the truth table results were actually correct.
EXPERIMENT : 2

IMPLEMENT THE FUNCTION F(x,y,z)=xy+yz+zx USING TWO INPUT


NAND GATE

FLUNCTION :​F(x,y,z) ​= ​xy+yz+zx

Circuit :

Truth Table:

X Y Z F(​x,y,z​)

0 0 0 0

0 0 1 0

0 1 0 0

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 1

Example:
Case 1:
x=1 y=z=0

Case 2:
x=y=1 and z=0

Case 3:
x=y=z=1
 
Experiment :- 3 
 
DESIGN BCD TO EXCESS 3 CODE 
CONVERTER 
 
Objective 
To verify and implement the code converter from BCD to Excess-3. 
 
 
Theory 
The BCD representation is done for numbers from 0-9 under base 10 in 
binary form. The BCD representation can be done in 2 formats, Packed 
BCD and Unpacked BCD. For the given implementation we consider 
Packed BCD. Packed BCD format is a representation using 4 bits. 
The EXCESS-3 code is a sequential code, non-weighted code and self 
complimentary code i.e. the numbers under base 10 and base 2 
represented have 1’s compliment equal to 9’s compliment respectively.   
 
 
 
 
Truth Table 
 
Here ABCD in Binary form and XYZW is in EXCESS-3 form. 
 
A  B  C  D  X  Y  Z  W 
0  0  0  0  0  0  1  1 
0  0  0  1  0  1  0  0 
0  0  1  0  0  1  0  1 
0  0  1  1  0  1  1  0 
0  1  0  0  0  1  1  1 
0  1  0  1  1  0  0  0 
0  1  1  0  1  0  0  1 
0  1  1  1  1  0  1  0 
1  0  0  0  1  0  1  1 
1  0  0  1  1  1  0  0 
1  0  1  0  X  X  X  X 
1  0  1  1  X  X  X  X 
1  1  0  0  X  X  X  X 
1  1  0  1  X  X  X  X 
1  1  1  0  X  X  X  X 
1  1  1  1  X  X  X  X 
 
BCD code can be written for numbers from 0-9 (decimal form). Hence the 
binary form of decimal numbers from 10-15 is not valid for BCD to EXCESS 
-3 conversion. 
 
 
 
 
 
 
 
 
 
 
X=∑m(5,6,7,8,9) 
 
Using K-Map, 

 
X= A + BD + BC = A + B (C+D) 
 
Y=∑m(1,2,3,4,9) 
 
Using K-Map, 

 
Y= B’C + B’D + BC’D’ = B’ (C+D)+ B (C+D)’ = B EXOR (C+D) 
 
Z=∑m(0,3,4,7,8) 
 
Using K-Map, 

 
Z= C’D’ + CD = C EXNOR D  
 
 
 
 
 
W=∑m(0,2,4,6,8) 
 
Using K-Map, 

 
W=D’ 
 
Circuit Diagram 
 

 
Here ABCD in BCD format with “A” as MSB (Most significant bit) and XYZW 
in EXCESS-3 format with “X” being the MSB (Most significant bit). 
 
 
 
 
 
 
 
 
 
 
 
 
CASE 1: ​ABCD=0101 then XYZW=1000 

 
 
 
 
CASE 2:​ ABCD=1001 then XYZW=1100 

 
 
 
 
 
 
 
 
 
 
 
CASE 3​:​ ABCD=0011 then XYZW=0110 

 
Similarly for other cases of BCD code we can obtain the EXCESS-3 
conversion using the above Logic Implementation.  
 
 
 
RESULTS​:  
 
From the above circuit implementation we verified that we can convert BCD 
code to Excess-3 code using the above logical circuit. 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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