5 4 3 2 1

C0113 CON0100
[1] GGE_PA_HB_IN 50ohm 50ohm 1 2
C0101

L0101 L0102 3 4
L0114

1
GND_SIGNAL C0112

RF_20369-001E
8
7
6
5
4
3
2
1
U0101 RF-TEST-PAD

GND
GND
GND
GND
GND
GND
GND
GND

2
[1] GGE_PA_LB_IN GND
C0102
29
L0103 L0104 9 TX_HB_IN GND 28

SKY77590
10 TX_LB_IN GND 27
11 BS2 ANT 26
D D
12 BS1 GND 25
VBAT VBATT TRX_6 TRXB2 [2]
VBAT 13 24
14 VCC TRX_5 23 TRXB5 [2]

VRAMP
R0101

TRX_1
TRX_2
TRX_3
TRX_4
MODE
TXEN
[1] BS2

GND
R0103

TRXB8
C0103

15
16
17
18
19
20
21
22
R0104
R0102
[1] BS1
GND_SIGNAL TRXB8
TRXB1/B4 [2]
C0104 2G_LB_RX [1]
VBAT 2G_HB_RX [1]
R0105
WG_GGE_PA_VRAMP [1]
C0108
C0106
C0105

C0107

R0106
C0109

R207
1 2 GGE_PA_EN [1]

U1001-B VRF18_RF
C0110
MT6570N
R0108 C0116
MODE [1] BPI RF Power
F12 BPI_BUS0 GND_SIGNAL
BS2 [1] VRF18_RF
C9 BPI_BUS1 AVDD18_VTXLF D9
BS1 [1]
F13 BPI_BUS2 AVDD18_VTXHF D7
C MODE [1] C
C0111 D10 BPI_BUS3
GGE_PA_EN [1]
A10 BPI_BUS4 VTCXO22 E4 C0117
BPI_4_W_PA_B1_EN [2]
B10 BPI_BUS5 AVDD18_VRXHF E2
GPIO_SPK_EN [9]
E11 BPI_BUS6 AVDD18_VRXLF E1
BPI_6_W_PA_B5_EN [2]
E12 BPI_BUS7
CAM_RST2 [10] R0109
B12 BPI_BUS8 GND_SIGNAL 2 1 VRF18_RF
CAM_PDN2 [10] VRF18_PMU
EN_BLED
C12 BPI_BUS9 GND_RF
C13 BPI_BUS10
BPI_10 [4]
B11 BPI_BUS11
BPI_11 [2,4]
AVSS_CEL C3
D12 VM0 AVSS_CEL C4
VM0 [2]
A15 VM1 AVSS_CEL C5
VM1 [2]
AVSS_CEL C7
VTCXO_PMU
RFI-RX AVSS_CEL C8
AVSS_CEL D3
AVSS_CEL D4
AVSS_CEL D5 C0118
A1 RFIP_B1 AVSS_CEL E3
3GB1_RXP [2]
B1 RFIN_B1 LNA3_HIGH_BAND. AVSS_CEL E6
3GB1_RXN [2] GND_SIGNAL VRF18_RF
AVSS_CEL E8
B3 RFIP_B2 AVSS_CEL F7
3GB2_RXP [2]
B4 RFIN_B2 LNA1_HIGH_BAND AVSS_CEL F8
3GB2_RXN [2]
AVSS_CEL F9
A2 G2 C0119
3GB5_RXP [2] RFIP_B5 AVSS_CEL
A3 RFIN_B5 LNA2_LOW_BAND AVSS_CEL G3
3GB5_RXN [2] VRF18_RF
L0106
AVSS_CEL G5 GND_SIGNAL
3GB8_RXP B5 RFIP_B8 AVSS_CEL G6
L0109 3GB8_RXN A5 RFIN_B8 LNA4_LOW_BAND AVSS_CEL G7
10

Z0101 L0108
AVSS_CEL G8
G9 C0120
GND

R0110 AVSS_CEL
[1] 2G_LB_RX 1 LBIN LBOUT 9 C2 RFIP_2GLB AVSS_CEL G10
L0107 B2 RFIN_2GLB AVSS_CEL H5
2 8 H6 GND_SIGNAL
GND LBOUT AVSS_CEL
C0121
D1 RFIP_2GHB AVSS_CEL H7
C0122
3 GND HBOUT 7 D2 RFIN_2GHB AVSS_CEL H8
AVSS_CEL H9
B [1] 2G_HB_RX 4 HBIN HBOUT 6 L0110 RFI-TX AVSS_CEL H10 B
GND

R0111
AVSS_CEL J7
L0112 L0113
AVSS_CEL J8
A6 J9
5

C0123 L0105 GGE_PA_HB_IN [1] TXO_HB1 AVSS_CEL

AVSS_CEL K7
W_PA_B1_IN [2] B6 TXO_HB2 AVSS_CEL K8
L0111 GND_SIGNAL
B7 TXO_HB3
W_PA_B2_IN

B8 TXO_LB1
W_PA_B5_B8_IN[2]
R0112
GGE_PA_LB_IN [1] A8 TXO_LB2

VTCXO_PMU CLK GND_SIGNAL

Logic
MODE DCXO_ XMODE VXODIG F2 VXODIG MISC
F1 EN_32K_TP1
F3 XMODE_TP2 RCAL F4
32K_EN
0(GND) 1(VIO18) 1(VIO18) VCOMON F6
DCXO + 32K XO K6 XO_NFC_TP3
K5 XO_AUD_TP4
CLK4_AUDIO [7] R0113 R0114
DET D6 [2]
B5_CPL_OUT_3G_ALL
1(VTXCO22) 1(VTXCO22) 1(VTXCO22) J5 OUT32K DETGND D8 GND_SIGNAL
DCXO + 32K-Less OUT_32K [7]

APC J4 WG_GGE_PA_VRAMP [1]

H1 XTAL2
H2 XTAL1 TMEAS F10 R0115

R0117
AUXADC_REF [7] X0101 XO_AUD_TP4 / XTAL-1-2 / APC nets
2 1
A AUXADC_TSX [7] 4 THERM HOT 3
cannot overlap each other. GND_SIGNAL A
SH0101

C0124 R0119 1 HOT GND 2

2 1
AUXADC_GND [7]
SH0102

R0121 Title
31_RF_TXM_2G
Mircohand
Size
C MTK Confidential
Date: Wednesday, November 09, 2016 Sheet 1 of 14
5 4 3 2 1
 W PA OUT HB SPDT
WCDMA_B1&B5 PA

W_PA_OUT_B5 [2]

[1] W_PA_B5_B8_IN L0201

C0201
C0206 C0207

BPI_6_W_PA_B5_EN [1]
C0202

VBAT U0299
VTCXO_PMU
VBAT 4
VDD
5
C0245 RFIN
W_PA_OUT_HB 6 BPI_11
C0204 C0208
2 1 CTRL
C0203 3
C0249 RF1 2
C0209 2 1 GND

RF2

1
C0239 C0241
GND_SIGNAL

1
R0201
[1] W_PA_B1_IN

2
C0205

1 VEN_LB RFOUT_LB 14 L0298

R0202
W_PA_OUT_B1/B4
2 RFIN_LB 1 2 GND_SIGNAL
GND 13

2
3 VBAT VCC 12
C0235 C0236
W_PA_OUT_HB [2]

1
4 RFIN_HB RFOUT_HB 11
L0202
R0203
5 VM1 CPL_IN 10
[1] VM1 AW9102 True Table

15 GND_SLUG
L0297
6 VM0 C0210 C0211 W_PA_OUT_B2
[1] VM0 GND 9 1 2 V1-BPI_10 V2-BPI_11 Mode

2
7 VEN_HB CPL_OUT 8
[1] BPI_4_W_PA_B1_EN
C0237 C0238
L L Idle
B5_CPL_OUT_3G_ALL [1]

1
U0201 H L RF1
H H RF2
RF1

WCDMA_B1&B5 Duplexer WCDMA_B2 Duplexer

W_PA_OUT_B1/B4 [2]
[1] 3GB1_RXP
C0212
U0202

3 TX ANT 6 TRXB1/B4 [1]

1 RX C0215
L0204
L0203 8 RX
G
G
G
G

L0205
C0214
W_PA_OUT_B2 [2]
2
4
5
7

[1] 3GB1_RXN
C0213
3GB2_RXN 2 1 U0298

1
C0244

3 TX ANT 6 2 1
L0294 L0296 TRXB2 [1]
1 RX

2
8 RX
[1] 3GB5_RXP U0203 W_PA_OUT_B5[2]
L0206 C0243

G
G
G
G
C0242

1
L0295

2
4
5
7

2
3 TX ANT 6 TRXB5 [1]
1 RX C0216 3GB2_RXP 2 1
L0207 L0208
8 RX
G
G
G
G

C0246
2
4
5
7

L0210 L0211
[1] 3GB5_RXN
L0209

Title
Mircohand
31_RF_WCDMA
Size
C MTK Confidential
Date: Friday, January 23, 2015 Sheet 2 of 14
 5 4 3 2 1

D D

VPROC_PMU
U1001-G

MT6570N
GND GND_CONN
1

1
C100
C101 C102
1

C103 H19 GND AVSS_CONN A17

K11 A20
2

2
GND AVSS_CONN
K12 A23
2

GND AVSS_CONN
K13 GND AVSS_CONN B20
K14 GND AVSS_CONN B21
U1001-E K15 C17
GND AVSS_CONN
MT6570N K16
L6
GND
GND
AVSS_CONN
AVSS_CONN
C19
D16
L7 GND AVSS_CONN D17
VCCK L8 GND AVSS_CONN D18
L10 GND AVSS_CONN D19
R6 VCCK L11 GND AVSS_CONN E15
J10 VCCK L12 GND AVSS_CONN E16
J11 L13 F16
1

VCCK GND AVSS_CONN

1

C
C105 C106 K9 VCCK L14 GND AVSS_CONN H14
K10 L15 H15 C
VCCK GND AVSS_CONN
C104 M7 L16 J13
2

VCCK GND AVSS_CONN

1C107

1C108

1C109

1C110

1C111
M8 VCCK M10 GND AVSS_CONN J14
M9 VCCK M11 GND AVSS_CONN J15
C112

1
C113

1
M15 VCCK M12 GND
N7 M13 GND_SIGNAL
VCCK GND
N8 M14

2
VCCK GND

2
N9 VCCK M16 GND
N13 VCCK N2 GND
SH100 N14 VCCK N4 GND
1 2 N15 VCCK P5 GND
GND_VPROC_FB [7]
P7 VCCK P9 GND
P8 VCCK P10 GND
R7 VCCK P11 GND
GND_SIGNAL R8 VCCK P12 GND
T7 VCCK P13 GND
P14 GND
SH101 P15 GND
VPROC_FB [7]
VPROC_FB 1 2 VDDQ R9 GND
GND_SIGNAL R10 GND
U12 VCCIO_EMI R11 GND
U13 VCCIO_EMI R12 GND
U16 VCCIO_EMI R13 GND
U17 DDRV_CMD R14 GND
V12 VCCIO_EMI R15 GND
VM_PMU V14 VCCIO_EMI
V16 VCCIO_EMI T5 GND
V17 DDRV_CMD T6 GND
W12 VCCIO_EMI T9 GND
W14 VCCIO_EMI T10 GND
1

W16 VCCIO_EMI T11 GND

W17 VCCIO_EMI T14 GND
C115 Y14 T15
C114 VCCIO_EMI GND
2

U15 VCCIO_EMI T16 GND

T23 GND
T18 GND
U5 GND
B U6 GND GND B
U7 GND
U8 GND
U9 GND
U10 GND
U11 GND
GND_SIGNAL U14 GND
U18 GND
U19 GND
V6 GND
V7 GND
V8 GND
V9 GND GND AB7
V10 GND GND AB9
V11 GND GND AB10
V20 GND GND AB12
V21 GND GND AB14
N19 GND GND AB16
N21 GND GND AB18
W5 GND GND AB19
W6 GND GND AC4
W11 GND GND AC5
W19 GND GND AC9
W23 GND GND AC13
Y8 GND GND AC21
Y11 GND GND AD7
Y12 GND GND AD11
Y15 GND GND AD17
Y19 GND GND AD23
AA9 GND
AA12 GND
AA14 GND GND_SIGNAL
AA16 GND
AA17 GND
AA18 GND
AA19 GND
A
AA23 GND
AB2 A
GND
AB6 GND

GND_SIGNAL

Title
10_BB_POWER
Mircohand
Size
C MTK Confidential
Date: Wednesday, November 09, 2016 Sheet 3 of 14
5 4 3 2 1
 5 4 3 2 1

Booting device selection U1001-A

VIO18_PMU VIO18_PMU
PWRAP_SPI0_CSN [4,7] MT6570N
PMIC internal PU

1
PMU_IF CONN_IF
1

1
M3

R120
SYSRSTB [7,11] SYSRSTB
N3
R118

R119
WATCHDOG [7] WATCHDOG

2
V2 EINTX
D GND_SIGNAL EINT_PMIC [7] D
2

2
WB_RFIOP A21
WB_RFIOP [5]
BPI_11 [1,2] BPI_10 [1] R4 SRCLKENA0 WB_RFION A22
SRCLKENA0 [7] WB_RFION [5]
GPS_RFIN B17
BPI_10/11 CPU internal PD B19
GPS_RFIN [5]
FM_LANT_N FM_LANT_N [9]
N5 RTC32K_CK FM_LANT_P B18
CLK32K_BB [7] FM_LANT_P [9]
(BPIBUS11, BPIBUS10, PWRA_SPI0_CSN) XO_IN G14
(0, x, x) : eMMC
(1, 0, 1) : MLC Nand
(1, 0, 0) : SLC Nand PWRAP_SPI0_CSN [4,7] R1 PWRAP_SPI0_CSN
(1, 1, 0) : Toggle/ONFI/TLC Nand Type 1 PWRAP_SPI0_CK [7] T2 PWRAP_SPI0_CK MISC
(1, 1, 1) : Toggle/ONFI/TLC Nand Type 2 PWRAP_SPI0_MO [7] U2 PWRAP_SPI0_MO VGP2_PMU
PWRAP_SPI0_MI [7] T1 PWRAP_SPI0_MI CONN_XO_IN
TESTMODE E14 GND_SIGNAL 3 OUT VCC 4 VCN_2V8_PMU
SH1
R1032
[4,7] R3 E9 2 1
for debug ONLY VIO18_PMU VIO18_PMU AUD_CLK_MOSI
[7] P3
AUD_CLK_MOSI FSOURCE_P GND NC
AUD_DAT_MOSI AUD_DAT_MOSI
[7] R2 AUD_DAT_MISO U1002
AUD_DAT_MISO
C1030
1

1
C1032

Test Pin
R5 SRCLKENAI
EN2_AUDIO_PA
R123

R124
2

TP_MEMPLL Y20
SIM1_SCLK_PMU [4,7] AUD_CLK_MOSI [4,7]
REF POWER
1

(SIM1_SCLK , AUD_CLK_MOSI) TP_CDM3P5A Y5

(0, 0) : Normal function REFP J3 REFP
R125

R126

(0, 1) : SPI1 121 H3 REFN

1C
(1, 0) : MSDC1
2

(1, 1) : CAM GND_SIGNAL GND_SIGNAL SIM

2
AUX IN
GND_SIGNAL SIM1_SCLK M4
SIM1_SCLK_PMU [4,7]
SIM1_SIO L3
SIM1_SIO_PMU [7]
K4 AUX_IN2
AUX_IN1_LCD_ID [8]
C RF PA TEMPERATURE K2 AUX_IN1 SIM2_SCLK M5 C
SIM2_SCLK_PMU [7]
AP TEMPERATURE K3 AUX_IN0 SIM2_SIO L2
AUX_IN0_NTC [4] SIM2_SIO_PMU [7]
123 122

1C

1C
VIO18_PMU

2
GND_SIGNAL
GND_SIGNAL
GND_SIGNAL
2R127

Close to BB IC
1

NTC118 close to BB ,and located in the same layer

AUX_IN0_NTC [4]
Keep 5-7mm to BB
1
NTC118
2

GND_SIGNAL

U1001-F

MT6570N
DVDD AVDD_CONN
VCN_1V8_PMU
VIO18_PMU N1 DVDD18_IO1 AVDD18_WBT C20
D22 DVDD18_IO2 AVDD18_WBT_AFE D20
V23 DVDD18_IO5
VIO18_PMU W1 DVDD18_MSDC0 AVDD18_FM C18
VMC_PMU D23 DVDD28_MSDC1
B AVDD18_GPS A16 B

VIO18_PMU A9 DVDD18 125 126

C127

1C

1C

1
VIO28_PMU B9 DVDD28
128

1C
VIO18_PMU M23

2
DVDD18_MIPIIO

2
VIO18_PMU N22 DVDD18_MIPITX
129 130

2
1C

1C
131 132 P16 DVSS18_MIPIIO
1C

1C

135 R16 DVSS18_MIPITX

C134
1C
1
2

2
GND_SIGNAL
2

C133
AVDD
2
2

GND_SIGNAL
GND_SIGNAL
GND_SIGNAL GND_SIGNAL GND_SIGNAL
GND_SIGNAL GND_SIGNAL
Cloesd to MT6350
VIO18_PMU K1 AVDD18_AP
GND_SIGNAL
GND_SIGNALGND_SIGNAL
GND_SIGNAL

VA_PMU L1 AVDD28_DAC AVDD_WBT_TX_HV A19 VCN_3V3_PMU

VUSB_PMU H22 AVDD33_USB

VIO18_PMU F22 AVDD18_USB 136
C137
1C

1
C138

1
L120
VIO18_PMU H4 AVDD18_MD 2

2
2
L5 AVSS18_ABB
2

F21 AVSS33_USB
GND_SIGNAL
1

C139 C140 C141 C142 C143

GND_SIGNAL GND_SIGNAL GND_SIGNALGND_SIGNAL
GND_SIGNAL GND_SIGNAL
GND_SIGNAL GND_SIGNAL
Cloesd to MT6350

A A

GND_SIGNAL

Title
11_BB_1
Mircohand
Size
C MTK Confidential
Date: Wednesday, November 09, 2016 Sheet 4 of 14
5 4 3 2 1
 5 4 3 2 1

For discrete LPDDR3

MCP LP2 or LP3 need to check memory mux table.
U1001-D U1001-C

MT6570N MT6570N
MIPI CSI DRAM_IF
AA20 EA0
EA0
K21 AC22 EA1
USB MSDCs RCP [10]
L21
RCP EA1
AD22 EA2
RCN [10] RCN EA2
AC23 EA3
NFI0 AA1 EA3
K22 AB23 EA4
NFI1 W2 [11]
G_SENSER_INT2 RDP0 [10] RDP0 EA4
K23 AB20 EA5
NFI2 Y2 EINT_EAR
[9] RDN0 [10] RDN0 EA5
[11]
G_SENSER_INT1 AB21 EA6
NFI3 U3 EA6
K20 AB22 EA7
NFI4 AA2 GPS_LNA_EN[5] RDP1 [10] RDP1 EA7
L20 AA21 EA8
D NFI5 Y4 RDN1 [10] RDN1 EA8 D
Y21 EA9
NFI6 W4 EA9
G23 V4 RDP2 [10]
L17 RDP2
USB_DP [8] USB_DP NFI7 L18 AD16 ED0
G22 USB_DM NFI8 U4 RDN2 [10] RDN2 ED0
USB_DM[8] AB15 ED1
NFI9 W3 ED1
Y3 RDP3 [10]
M21 RDP3 ED2 AA15 ED3
NFI10 M20 AC16 ED2
NFI11 V1 CTP_RSTB [8] RDN3 [10] RDN3 ED3
ED4 AC15 ED4
AB3 CAM_CLK0[10]
R17 CAM_CLK0 ED5 AC14 ED5
MC0_DAT0 MSDC0_DAT0 [6] R18 AD13 ED7
MC0_DAT1 AB4 MSDC0_DAT1 [6] CAM_RST0[10] CAM_RST0 ED6
AC3 CAM_PDN0[10]
T20 CAM_PDN0 ED7 AD14 ED6
MC0_DAT2 MSDC0_DAT2 [6] AC12 ED8
MC0_DAT3 AC2 MSDC0_DAT3 [6] ED8
AD2 ED9 AC11 ED9
MC0_DAT4 MSDC0_DAT4 [6] J19 AD10 ED10
F23 USB_VRT MC0_DAT5 AD1 MSDC0_DAT5 [6] RCP_A [10] RCP_A ED10
AA5 RCN_A [10]
K19 RCN_A ED11 AC10 ED11
MC0_DAT6 MSDC0_DAT6 [6]
1

AA6 ED12 AA11 ED12

R144

MC0_DAT7 MSDC0_DAT7 [6] H21 AB11 ED13

MC0_CMD AC1 MSDC0_CMD [6] RDP0_A [10] RDP0_A ED13
H20 AC8 ED14
BC MC0_CK AA4 MSDC0_CLK[6] RDN0_A [10] RDN0_A ED14
AD8 ED15
MC0_RSTB AB1 MSDC0_RST [6] ED15
J22 RDP1_A ED16 Y18 ED21
2

RDP1_A [10]
GND_SIGNAL E20 J16 RDN1_A [10]
J23 RDN1_A ED17 AD20 ED17
CHD_DP[7] CHG_DP MSDC1_CMD MSDC1_CMD [8] AD19 ED16
F20 CHG_DM ED18
CHD_DM[7] P17 AC18 ED19
MSDC1_CLK G16 CAM_CLK1[10] CAM_CLK1 ED19
MSDC1_CLK [8] T22 Y17 ED23
CAM_RST1[10] CAM_RST1 ED20
G18 CAM_PDN1[10]
T19 CAM_PDN1 ED21 AC20 ED18
MSDC1_DAT3 MSDC1_DAT3 [8] AC19 ED20
KEYPAD MSDC1_DAT2 G19
MSDC1_DAT2 [8]
ED22
AC17 ED22
MSDC1_DAT1 H17 ED23
MSDC1_DAT1 [8] MIPI DSI AA8 ED25
MSDC1_DAT0 H18 ED24
MSDC1_DAT0 [8] AB8 ED24
B13 KPROW1 ED25
KPROW1 [11] W8 ED26
D13 KPROW0 ED26
KPROW0 [11] P20 W7 ED29
SPI TCP [8]
P19
TCP ED27
AC7 ED28
TCN [8] TCN ED28
A13 ED29 AC6 ED27
KPCOL1 [11] KPCOL1 M18 AD5 ED31
D14 KPCOL0 SPI1_CS B14 SRCLKENA1 [8] TDP0 [8] TDP0 ED30
KPCOL0 [11] M19 AD4 ED30
SPI1_SCK C15 TDN0 [8] TDN0 ED31
VIO18_PMU EINT_SIM1 [8]
SPI1_MOSI C16
EINT_HALL TDP1 [8] P23 W22 ECKE ECKE[6]
SPI1_MISO D15 TDP1 ECKE
EN_FLED TDN1 [8] P22 W18 EDCLK EDCLK[6]
C I2C TDN1 EDCLK0
V18 EDCLK_B EDCLK_B[6] C
EDCLK0_B
1

P21
I2S TDP2 [8] TDP2
R146

V22 TDN2 [8]

R21 TDN2 VREF0 AA13 EVREF EVREF [6]
R147

I2C_SCL0
U22 I2C_SDA0
C21 ECSM0_B AA22 ECS0_B ECS0_B[6]
I2S3_WS EINT_SIM2[8] Y22 ECS1_B ECS1_B[6]
D21 ECSM1BOOT_B
2

VIO18_PMU SCL0 [10] I2S3_BCK EINT_CTP [8] U20

C22 LCM_RST
2

SDA0 [10] I2S3_DO EINT_PS [10] LCM_RST [8] EDQM0 [6]

B16 DSI_TE [8]
U21 DSI_TE EDQM0 Y16 EDQM0
I2C_SCL1 M22 AB13 EDQM1 EDQM1 [6]
E13 I2C_SDA1 VRT EDQM1
AB17 EDQM2 EDQM2 [6]
UART EDQM2
EDQM3 [6]
1

T21 AA10 EDQM3

1
DISP_PWM0 [8] DISP_PWM EDQM3
R148

R152
EDQS0[6]
1

B15 T3 TP144 EDQS0 W13 EDQS0

R149

I2C_SCL2 UTXD1 Y13 EDQS0_B EDQS0_B [6]

A12 I2C_SDA2 URXD1 T4 TP145 EDQS0_B
EDQS1 W10 EDQS1 EDQS1[6]
2

2
SCL1 [8] Y10 EDQS1_B EDQS1_B [6]
UTXD2 B22 GND_SIGNAL EDQS1_B
RST_FP V15 EDQS2 EDQS2[6]
B23 EDQS2
2

SDA1 [8] VIO18_PMU URXD2 EN_FLED_FPC W15 EDQS2_B EDQS2_B [6]

EDQS2_B
EDQS3 W9 EDQS3 EDQS3[6]
USB_IDDIG EDQS3_B Y9 EDQS3_B EDQS3_B [6]
USB_DRVVBUS
REXTDN
1

REXTDN W20
R150

1
R151

R1208
2

SCL2 [10,11] WR02X36R0FAL

2

SDA2 [10,11]

2
GND_SIGNAL

GND_SIGNAL

B
WIFI/BT VCN_3V3_PMU
8
B
2

147 U145
1C

3 7
GND

C146
NC BAL 1 2 WB_RFION [4]
1

L144

1
ANT0305 ANT0301
2

GND_SIGNAL GND_SIGNAL 2 DC GND 6 GND_SIGNAL

1 1
2
3
4

1 1
2
3
4

C148 C149

2
2
3
4

2
3
4

GND

R153
R0301 50 Ohm 2 1 50 Ohm 1 5
50 Ohm UNBAL BAL 1 2 WB_RFIOP [4]
L145
4
1

C0302 C0303
C152 C153
2

GND_SIGNAL GND_SIGNAL GND_SIGNAL

ANT0302 VCN_2V8_PMU

GPS
1 1
2
3
4

1
2
3
4

¼æÈÝ

2 L0305
ANT0304 ANT0303
2
1 1
2
3
4

1 1
2
3
4

1 C0309
2
3
4

2
3
4

A A
GPS_LNA_EN [5]
U0302 AR8159

2
R0304 3 4
50 Ohm 2 1 RFIN VCC C0313
L0302

1
2 5 GND_SIGNAL
GND EN
1 6
GND RFOUT
1

2 1 GPS_RFIN [4]
1

C0305 C0310
C0306
C0001
C0308
2
2

GND_SIGNAL
Mircohand
1

GND_SIGNAL
C0311 C0312 Title
12_BB_2
2

Size
C MTK Confidential
Date: Wednesday, November 09, 2016 Sheet 5 of 14
5 4 3 2 1
 5 4 3 2 1

eMMC TLC type1 TLC type2

VIO18_PMU
R414 : NC R414 : NC R414 : Mount
EA[0:9] [5]
U0701 R424 : NC R424 : NC R424 : Mount
EA0 Y2 F3
EA1 Y3
CA0
CA1
VDD1
VDD1 F4 R416 : NC R416 : NC R416 : Mount
EA2 2 C0701
W2 F9

1
C0702
CA2 VDD1
EA3 W3 CA3 VDD1 G5 R425 : NC R425 : NC R425 : Mount
EA4 V3 CA4 VDD1 AA3

2
EA5
EA6
L3 CA5 VDD1 AA5
1
R421 : NC R421 : NC R421 : Mount
D K3 CA6 VDD1 AB3 D
EA7
EA8
J3
J2
CA7 VDD1 AB4
AB9
VM_PMU R418 : NC R418 : NC R418 : Mount
CA8 VDD1
ED[0:31] [5] EA9 H2 CA9
VDD2 F5
ED0 W12 DQ0 VDD2 F8
ED1 V11 DQ1 VDD2 J5 R415 : NC R415 : Mount R415 : NC
ED2 V13 DQ2 VDD2 K5
ED3
ED4
U11
U13
DQ3 VDD2 L2
L5
R423 : NC R423 : Mount R423 : NC
DQ4 VDD2
ED5 T11 M5
ED6 T13
DQ5
DQ6
VDD2
VDD2 N5 R410 : NC R410: Mount R410 : NC
ED7 R12 DQ7 VDD2 P5
ED8 N12 DQ8 VDD2 P8 R406 : NC R406 : Mount R406 : NC
ED9 M13 DQ9 VDD2 P11
ED10
ED11
M11
L13
DQ10 VDD2 R5
T5
R407 : NC R407 : Mount R407 : NC
DQ11 VDD2
ED12 L11 U5
DQ12 VDD2 R408 : NC R408 : Mount R408 : NC

2
C0703 C0704

1
1

1
ED13 K11 DQ13 VDD2 V5 C0707
ED14 K13 DQ14 VDD2 W5
ED15 J12 AB5

C07051

C07061
2

2
DQ15 VDD2
ED16 AB12 DQ16 VDD2 AB8
ED17
ED18
AB11 DQ17 C405 : Mount C405 : NC C405 : NC
AB10 DQ18 VDDQ G9
ED19 AA13 DQ19 VDDQ H8
ED20 AA12 DQ20 VDDQ H12
ED21 AA10 DQ21 VDDQ J11
ED22 Y13 DQ22 VDDQ K10 Put C204&C205 between BB and Memory.
ED23
ED24
Y11 DQ23 Power VDDQ K12
H11 DQ24 VDDQ L8
ED25 H13 DQ25 VDDQ L9
ED26 G10 DQ26 VDDQ M10
ED27 G12 DQ27 VDDQ M12
ED28 G13 DQ28 VDDQ N11
ED29 F10 DQ29 VDDQ R11
ED30 F11 DQ30 VDDQ T10
ED31 F12 DQ31 VDDQ T12
R0705 VDDQ U8
C ZQ0 G2 U9 C
1 2 ZQ0 VDDQ
ZQ1 G3 ZQ1 VDDQ V10
1R0706 2 V12
VDDQ
F13 VSSQ VDDQ W11
G11 VSSQ VDDQ Y8
H10 VSSQ VDDQ Y12
J8 VSSQ VDDQ AA9
J13 VSSQ
K8 VSSQ VDDCA K2
VEMC_3V3_PMU
K9 VSSQ VDDCA N2
L10 VSSQ VDDCA U2
L12 VSSQ VDDCA V2
M8 VSSQ
N13 VSSQ VCC B3
P9 VSSQ VCC B12
R13 VSSQ VCC B13
T8 VSSQ VCC C4
VIO18_PMU
U10 VSSQ VCC D8
U12 VSSQ VCCQ A4
V8 VSSQ VCCQ B6
V9 VSSQ VCCQ B9
W8 VSSQ VCCQ C7
W13 VSSQ VCCQ C11
Y10 VSSQ VCCI A11

C0712
AA11 VSSQ
RFU A7 2
F2 VSS CLKM B8 MSDC0_CLK
2

C0713
1

1
C1710 C0711

1
G4 VSS RST C2 MSDC0_RST C0716
G8 VSS eMMC CMD A6 MSDC0_CMD
C0708
H3

2
1
2

2
VSS 1
H5 VSS DAT7 B4 MSDC0_DAT7
L4 VSS DAT6 A5 MSDC0_DAT6
M3 VSS DAT5 A10 MSDC0_DAT5
M4 VSS DAT4 C9 MSDC0_DAT4
N4 VSS DAT3 B5 MSDC0_DAT3
N8 VSS DAT2 C6 MSDC0_DAT2
P4 VSS DAT1 B10 MSDC0_DAT1
B P12 VSS DAT0 A9 MSDC0_DAT0 GND_SIGNAL B
R3 VSS
R4 VSS
R8 VSS
T4 VSS
Y4 VSS CS0# U3 ECS0_B
Y5 VSS CS1# T3 ECS1_B
AA2 VSS LP-DDR3 VM_PMU
AA4 VSS CKE0 T2 ECKE
AA8 VSS CKE1 R2

H4 VSSCA CLK P3 EDCLK

1
J4 VSSCA CLK# N3 EDCLK_B
K4 VSSCA R0702
P2 VSSCA DQS0 T9 EDQS0
U4 VSSCA DQS0# R9 EDQS0_B
V4 M9 EDQS1

2
VSSCA DQS1
W4 VSSCA DQS1# N9 EDQS1_B EVREF
DQS2 Y9 EDQS2
A3 VSSM DQS2# W9 EDQS2_B

1
A8 VSSM DQS3 H9 EDQS3 C0714 C0715

1
A12 VSSM DQS3# J9 EDQS3_B R0703
B2 VSSM

2
B7 VSSM DM0 R10 EDQM0

2
B11 VSSM DM1 N10 EDQM1
C3 VSSM DM2 W10 EDQM2
C5 VSSM DM3 J10 EDQM3
C8 VSSM
C10 VSSM VREFCA M2 EVREF
C12 VSSM VREFDQ P13
C13 VSSM
D7 VSSM
A2 VSF
DNU
DNU
AB14
AB13 Schematic design notice of "40_Memory_eMCP LP2" page.
A13 VSF DNU AB2
B1 VSF DNU AB1
B14
D2
VSF DNU AA14
AA1
Please reserve R4011 / R4012 for co-layout different eMMC+LPDDR2 Type
VSF DNU
A D3 A14 A
VSF DNU
D4 A1
D5
VSF
VSF
DNU
R4011 / R4012 Remark
D6 VSF

ODT P10 MT6570 + eMMC 5.0 Device Mount R4011 / R4012

MT6570 + eMMC 4.5 Device Remove Check the eMMC 4.5 Device, if the F5/F9 Ball are real NC, the resistor cam be mounted

Title
Mircohand
42_discrete_eMMC_NAND
Size
C MTK Confidential
Date: Wednesday, November 09, 2016 Sheet 6 of 14
5 4 3 2 1
 5 4 3 2 1

U501

U500 VBAT K1 AU_SPKP

SPK_P AU_SPKP [9]
VBUS VBUS SPK_N L1 AU_SPKN
1 AU_SPKN [9]
[7] ISENSE COLLECTOR P1 VBAT_SPK
1
7 2 C501 L2 H1 AU_HSP
COLLECTOR EMITTER GND_SPK AU_HSP AU_HSP [9]
R500
AU_HSN G1 AU_HSN
8 MICBIAS0 AU_HSN [9]
1 2 VCDT [7]

1
COLLECTOR C500
H4 AU_HPL

2
VCDT rating: 1.268V AU_HPL AU_HPL [9]

R501
9 3 F2 J4 AU_HPR
COLLECTOR BASE AU_MICBIAS0 AU_HPR AU_HPR [9]

2
D 2 C502 MICBIAS1 G2 D
GND_SIGNAL AU_MICBIAS1

1
5 GND_SIGNAL
CHR_LDO GATE
[7] Main Mic R516

1
4 6 E4 E9 2 1

2
DRAIN SOURCE VDRV [7] GND_SIGNAL AU_VIN0_P [9] AU_VIN0_P AUDIO DRIVER ISINK0 FLED1- [10]
GND_SIGNAL F4 AU_VIN0_N ISINK1 C9
10 AU_VIN0_N [9] R517
DRAIN ISINK2 E10 2 1
1 2 FLASH_LED- [10]
CHR_LDO [7] G3 AU_VIN1_P ISINK3 C10
R502 AU_VIN1_P [9]
G4 AU_VIN1_N
AU_VIN1_N [9]
D2 AU_VIN2_P
VA_PMU AU_VIN2_P
[8]
D1
2nd MicAU_VIN2_N[8] AU_VIN2_N
J2 AVDD28_ABB
1 D3 AVDD28_AUXADC
C503 1 H2 GND_ABB
C504
VPROC_PMU
L500
E2 ACCDET
2 ACCDET [9] BUCK OUTPUT VPROC_FB [3]
VPROC C14 VPROC_SW C505
1 2

1
Differential 2
GND_SIGNAL CLK4_AUDIO [1]
E1 CLK26M VPROC D14
40mil GND_SIGNAL VPROC E14
ISENSE [7]
1

2
MAMK2520TR68M
R506 GND_VPROC_FB [3]
Rsense ISENSE/BATSNS 4mil CHARGER VPROC_FB B12
GND_VPROC_FB C12
SH500 differential to Rsense P13
2

BATSNS [7] BATSNS

1 2 C506 P12 ISENSE VPA A14 VPA_SW VPA_PMU
BATSNS [7] ISENSE [7]
40mil

1
K3 BATON VPA B14
BAT_ON [7]
A12 VCDT near-end cap
VCDT [7]
M13 D12

2
VDRV [7] VDRV VPA_FB
GND_SIGNAL
AUXADC_REF [1,7] Close to PMIC N13 L501
VSYS_PMU
CHR_LDO [7] CHRLDO
2

C507 GND_SIGNAL
R507

1
VSYS H14 VSYS_SW
R507 must to be close to 1 2
PMIC AUXADC_REF pin CONTROL SIGNAL

2
C R508 C
GND_SIGNAL 2 1 M2
1

VBAT PWRKEY [11] PWRKEY MAMK2520TR68M

GND_SIGNAL 40mil 40mil A1 SYSRSTB VCAMA_PMU
WATCHDOG [4]
C508 K4 RESETB
SYSRSTB [4,11]

1
CON500 R509 R510 ALDO OUTPUT
1 2 1 2 GND_SIGNAL A9 FSOURCE VA M3 VA_PMU
5 BAT_ON [7]
GND A7 INT
4 EINT_PMIC [4] C509
ID if battery NTC is 10kohm, R507=16.9K, R511=30K ESD N12 N3 VCN_2V8_PMU VRTC

1
GND EN_AUDIO_PA EXT_PMIC_EN VCN28
3 if battery NTC is 47kohm, R507=61.9K, R511=110K GND_SIGNAL L4 VTCXO_PMU
VBAT VTCXO
1

Refer to MT6350 HW design notice GND_SIGNAL N2

R511

2 PMU_TESTMODE

2
T500

ID P3 VCAMA_PMU
NTC500 VCAMA
1 E7 M6 VCN_3V3_PMU
GND AUD_DAT_MOSI [4] AUD_MOSI VCN33 GND_SIGNAL
E8 C3 VRTC

1
AUD_CLK_MOSI [4] AUD_CLK AVDD33_RTC
B09-AB03F15D B6
2

AUD_DAT_MISO [4] AUD_MISO C510

1
GND_SIGNAL A2 VEMC_3V3_PMU

R512
SRCLKENA0 [4] SRCLKEN DLDO OUTPUT
GND_SIGNAL M1 FCHR_ENB
FCHR_ENB [8]

2
VM J13 VM_PMU
D9 H11 VRF18_PMU

1
SPI_CLK VRF18 C512
PWRAP_SPI0_CK [4] C511
B7 L12 VIO18_PMU

1
PWRAP_SPI0_CSN [4] SPI_CSN VIO18
D8 SPI_MOSI VIO28 M4 VIO28_PMU
PWRAP_SPI0_MO [4]

2
B8 SPI_MISO VCN18 J12 VCN_1V8_PMU
PWRAP_SPI0_MI [4] GND_SIGNAL
GND_SIGNAL

2
VCAMD K14 VCAMD_PMU
TP1

VBAT L13
TP2
TP3

VCAM_IO VCAMD_IO_PMU GND_SIGNAL

F13 VBAT INPUT
VBAT_VPROC
F14 VBAT_VPROC
G13 VBAT_VPROC VEMC_3V3 P7 VEMC_3V3_PMU
A13 VBAT_VPA VMC L6 VMC_PMU VGP2_PMU
VMCH P4 VMCH_PMU
H13 VBAT_VSYS VUSB N6 VUSB_PMU 1
P8 VBAT_LDOS3 VSIM1 P9 VSIM1_PMU C513
P6 VBAT_LDOS3 VSIM2 N9 VSIM2_PMU VIBR_PMU
P5 VBAT_LDOS2 VGP1 L8 VGP1_PMU
P2 VBAT_LDOS1
VIBR M7 VIBR_PMU
J14 AVDD22_BUCK VGP2 N8 VGP2_PMU 2
D501
M14 L14
GND_SIGNAL VIBRATOR
VSYS_PMU AVDD22_BUCK VGP3 VGP3_PMU
VCAM_AF N7 VCAM_AF_PMU
1

C514
D500 15mil
B A8 DVDD18_DIG B
VIO18_PMU
2

A5 DVDD18_IO
GND_SIGNAL GND_SIGNAL
C515 AUXADC_REF [1,7]

MOTO500
C2 AUXADC

PAD_2P
1 2 AUXADC_VREF18 1
B1 AUXADC_AUXIN_GPS VREF P14 VREF C518 2
AUXADC_TSX [1]

1
C516 B2 AVSS28_AUXADC C517
1

2
AUXADC_GND [1]
2

2
BC 1.1
A10 N14
2
CHG_DM GND_VREF
SH501

CHD_DM [5]
A11 CHG_DP
CHD_DP [5]
GND_SIGNAL
1

C519C520C521 C522C523
GND_SIGNAL GND_SIGNAL
1

RTC_32K1V8 D5
SIM LVS RTC CLK32K_BB [4]
RTC_32K2V8 C4
1

C524 C525 C526 C527

B5 A3 32K_IN
2

SIM1_SCLK_PMU [4] SIM1_AP_SCLK XIN

M11 SIMLS1_AP_SIO XOUT A4 32K_OUT
SIM1_SIO_PMU [4]
E6
2

SIM1_AP_SRST
C528
GND_SIGNAL C5 B10 GND_SIGNAL

1
SIM2_SCLK_PMU [4] SIM2_AP_SCLK GND_ISINK
K11 SIMLS2_AP_SIO GND_VSYS G11
SIM2_SIO_PMU [4]
D6 SIM2_AP_SRST GND_VPA E13
Buck GND must connect to

2
GND_VPROC E11
SH505 M9 SIMLS1_SCLK GND_VPROC F11
SH502 SH503 SH504 cap, then to main GND SCLK1 [8]
1 1 1 1 N11 SIMLS1_SIO GND_VPROC F10
SH SH SH SH SIO1 [8]
M10 SIMLS1_SRST GND_SIGNAL
SRST1 [8]
GND_LDO K6
K9 SIMLS2_SCLK GND_LDO K8
SCLK2 [8] 2 1
L11 SIMLS2_SIO
GND_SIGNAL SIO2 [8] OUT_32K [1]
GND_SIGNAL GND_SIGNAL K10 SIMLS2_SRST GND_LDO F5
SRST2 [8]
GND_LDO F6 SH0703
GND_LDO F7
F8
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO

A
Mark point Test Points GND_SIGNAL C516 must to be close
to PMIC AUXADC_TSX pin
GND_LDO
GND_LDO
GND_LDO
F9
G5
G6 A
GND_SIGNAL
Connect X200 pin2 GND to MT6350 pin
J10
J9
J8
J7
J6
H10
H9
H8
H7
H6
H5
G9
G8
F500 F501 G7
GND_SIGNAL
TP500 B2 first then connect to main GND
FIDUCIAL FIDUCIAL VBAT TP501
(near pin B2)
GND_SIGNAL
F502 F503

FIDUCIAL FIDUCIAL
Title
20_POWER_MT6350
Mircohand
Size
C MTK Confidential
Date: Wednesday, November 09, 2016 Sheet 7 of 14
5 4 3 2 1
 5 4 3 2 1

LCM interface LCM Backlight LED Driver

D0901
L0901

VBAT A K LCM_LEDA

C0950
V167¶¨Òå C0903

C0904
6

4
¶¨ÒåΪ:V695

VIN

SW
D D
R0909

DISP_PWM0 [5] 5 U0901

[4] AUX_IN1_LCD_ID 1 CTRL
2 1 LCM_LEDK
3 FB
[5] TCP

C0951
4 2

C0952
[5] TCN 5 COMP

GND

GND
6 R0910
R0911
[5] TDP0 7
[5] TDN0 8

7
[5] TDP1 9
[5] TDN1 10
11
[5] TDP2 12
[5] TDN2 13
14
VIO18_PMU 15
VIO28_PMU 16
17
18
19
20
mark
[5] LCM_RST 21
VGP1_PMU
[5] DSI_TE 22
[8] LCM_LEDK 23

[5,8] CTP_RSTB
[8] LCM_LEDA 24
25
26
27
28
CTP
[5,8] EINT_CTP 29
[5,8] SDA1 30
[5,8] SCL1
J0901

31
VGP1_PMU
32
33

C0933 J0903
1
C C0902 C0901 [5,8] EINT_CTP C
2
[5,8] CTP_RSTB
3
4
[5,8] SDA1
5
[5,8] SCL1
6
C0905 7
8
R0912

ZIF_6P
VIO18_PMU

V618
mark mark mark
SIM2
SIM1
VIO18_PMU SUB FPC
NEW
VSIM2_PMU
SIM0901
V167 R0950
C0998

SIM0902
15

16

T0909 R0928
1
GND

GND

C1-VCC 17 EINT_SIM1 [5]

B 8 C1 5 8 S/W B
C1-VCC GND P4
7 9
P4 P5
[7] SRST2 2 6
C2-RST 6 R0810 [7] SCLK1 P3 R0809
9 C2
VSIM2_PMU [7,8] 5 10
C2-RST VPP P3 P6
3 4 VSIM1_PMU
[7] SCLK2 C3-CLK P2 11
10 C3 [7] SRST1 P7 SIO1 [7]
C3-CLK 7 3

[5] EINT_SIM2
R0955

R0956
4
CD
I/O SIO2 [7]
VSIM1_PMU
2
1
P1
P1
P2
P8
12
NEW
VIO18_PMU
GND

GND
T0904

J0920
13
14

12
11

C0906 1
14

13

2
3
4
5
6

T CARD USB MICBIAS0

7
8
C0918 9
[7] AU_VIN2_P
C0919 10
[7] AU_VIN2_N
NEW GND_SIGNAL
CLOSE TO PMU
11
12
C0925
VBUS DP DM 13
[9] SPK_P
14

NEW 15
9

[9] SPK_N
16
GND

GND

VMCH_PMU TF0902 VBUS 1

J0902

VBUS 17
[7] FCHR_ENB
[5] MSDC1_DAT2 T1 13 [5] USB_DM 2 18
A DAT2 GND D-
A
3 19
[5] MSDC1_DAT3 T2 12 [5] USB_DP D+ [7] VIBR_PMU
CD/DAT3 GND
C0999 20
MSDC1_CMD T3 11 4 VIO28_PMU
[5] CMD GND ID
T0906

T0908
T0905

T4 10 5 FPC_SUB_20PIN
VDD GND GND
GND

GND

[5] MSDC1_CLK T5
SCLK
6

C0997 T6 R0952
VSS
VIO18_PMU
[5] MSDC1_DAT0 T7
DAT0 Title
[5] MSDC1_DAT1 T8
DAT1 SWITCH
G1 R0951
SRCLKENA1 [5]
9_PERI_LCD_CTP
Size
C <Title>
Date: <Release Date> Sheet 8 of 14
5 4 3 2 1
 5 4 3 2 1

VIO18_PMU

Earphone Audio

2
R1100
close to IC close to connector ÐÂÎïÁÏ

1
CON1101
C1100 3
S_AU_HPL R
AU_HPL [7,9] 1 2
5
C1101 S_EINT_HP DET
AU_HPR [7] 1 2 S_AU_HPR 4
D L
D
2 GND
HP_MIC [9]
1 MIC

R1105
S_AUDJACK_GND 6 MIC
EINT_EAR [5] 2 1
2 1
FM_LANT_P [4]
FM_LANT_N [4]
SH0901
Differential pair
of FM_LANT_P and FM_LANT_N

C <= 1pF
1
1

T1102
2

1
L1100

2
1

2
R1109

R1110
C1102
C1103

2
Audio PA 2
GND_SIGNAL
1

SH0902

Single via to
GND plane

C
Audio PA (Class K) C

VBAT
Earphone MICPHONE MICBIAS1
C1150

C0002
C1160

2
R1112
R1143
19

GND_SIGNAL AU_SPKN [7]

4
8

R1144 Close to MIC

VDD
VDD

CP

CN

[1] GPIO_SPK_EN 18 AU_SPKP [7] Close to BB

PVDD Close to earjack

1
17
R1140 PVDD
1 12
SHDN PVDD C1105 C1106
U1101 C1151 AU_VIN1_N1
AU_VIN1_N [7] 2 1 1 2 GND of C1106(10uF) and
C1145 R1141 6 15 headset should tie

2
[7,9] AU_HPL INN VOP 2 SPK_P [8] together and single via to

R1115
C1163
C1199 1 GND plane
SPK_N [8]

1
C1146 R1142 7 13 C1108

2
INP VON SPK1101

1
GND
GND
GND
NC
NC

NC
NC
NC
FS

1
C1110
T1110

T1111

2
9
2
5

14
21
20

16
10
11

C1152 C1153 tie together and single via to

GND plane

1
C1114 C1112
HP_MIC
AU_VIN1_P [7] 2 1

R1118
2 1
ACCDET [7]
B B

Handset Microphone 1(MAIN) Receiver

MICBIAS0 1
2
R1199

6mil 6mil
AU_HSN [7]
REC1100

2
C1196 1
CLOSE TO BB 2

1
C1116
6mil 6mil PAD_2PIN_1.5X0.6_P
R1198
AU_HSP [7]

1
T1104

T1105
2

2
1 2

2
1

1
[7] AU_VIN0_P C1119 C1120
C1117 1
1
C1195
C1193
A C1190
MIC1100 A
2
2
C:CADENCEPSD_14.2TOOLSCAPTURELIBRARYDISCRETE.OLB
1 2
[7] AU_VIN0_N C1121
C1194 C1191C1192
T1190

T1191

R1193 GND_SIGNAL

Title
60_PERI_AUDIO_IO
Mircohand
together then single via to main GND
Size
C MTK Confidential
Date: Friday, January 23, 2015 Sheet 9 of 14
5 4 3 2 1
Rear CAMERA
VCAMA_PMU
B1001
[10]
AVDD
Front CAMERA
V167¶¨Òå
V186-170706
V167¶¨Òå GND_SIGNAL

[5] RDP3 1 1
[5] RDN3 2 2
[5] RCP_A
3 3
[5] RCN_A
[5] RDP2 4 4
[5] RDN2 5 [5] 5

Camera AGND µ¥µã½ÓµØ

RDP0_A
6 [5] 6
[5] RDN0_A
RDP1 7 7
[5] RDN1 8 [5] 8
RDP1_A
9 [5] 9
RDN1_A
[5] RDP0 10 10
[5] RDN0 11 [5] CAM_CLK1 11
12 12

Camera AGND µ¥µã½ÓµØ

[5] RCP 13 [5] CAM_PDN1 13
C1035 14
[5] RCN 14 [5] CAM_RST1
[5] C1001
15 15
CAM_CLK0 16 [5,10] 16
SDA0
CAM_RST0 [5] 17 [5,10] 17
SCL0
CAM_PDN0 [5] 18 18 ANGD
SCL0 [5,10] 19 19
[10] AVDD
SDA0 [5,10] 20 20
[7,10] VCAM_AF_PMU

20PIN AGND
21 ANGD [7,10] 21
VCAMD_PMU
AVDD 22 22
[7,10] VCAMD_IO_PMU
23

ECF031025G-L
23
VCAM_AF_PMU [1,2,7,8,9,10] VBAT 24
24 [7,10] FLED1-
VCAMD_IO_PMU 25 25
VCAMD_PMU 26 26
C1008

J1003
1
27 27
[1] CAM_PDN2
C1007
28

1
[1] CAM_RST2 C1012

1
29

C1015

2
30 GND_SIGNAL
[7,10] FLASH_LED-

2
31 GND_SIGNAL

2
[1,2,7,8,9,10] VBAT

32
33
GND_SIGNAL
J1001
GND_SIGNAL GND_SIGNAL

C1006
C1005
Camera AGND µ¥µã½ÓµØ
C1002
C1004
C1003

Camera AGND µ¥µã½ÓµØ

Rear FLED Front LED RGB & PS Sensor

FPC-2PIN-2.5X0.4

VIO28_PMU PS_VDD
FPC1001

C1009

V167¶¨Òå

2
+

R1006
-

1
1

PS_VDD 2
VBAT 3 7
[5,11] SCL2 LED_B
4 8

1
[5,11] SDA2 LED_G
5 9
[5] EINT_PS LED_R
6 10
R1007
VIO18_PMU 11
FLED1- [7,10] C1010
12

C1011
VBAT [1,2,7,8,9,10]
[1,2,7,8,9,10] VBAT

[7,10] FLASH_LED-
J1002
FPC_12PIN

Mircohand
Title
10_PERI_CAMERA_IO
Size
C <Title>
Date: <Release Date> Sheet 10 of 14
1
 5 4 3 2 1

G-Sensor (3-axis) G-Sensor (2-axis) VIO18_PMU

D D

U1 [5,10,11]
1 12 SCL2
SDO SCX

R1203
R1202
[5,10,11]
SDA2 2 11 VIO18_PMU [4,5,6,7,8,9,10,11]
SDX NC
[4,5,6,7,8,9,10,11] 3 10
VIO18_PMU VDDIO CS
4 9
NC GND
VIO28_PMU [5]
G_SENSER_INT1 5 8
INT1 GNDIO
[5] [4,7,8,10,11]
G_SENSER_INT2 6 7 VIO28_PMU
INT2 VDD
U1202

1
C1216 C1217
[5,10,11] SCL2 1 6
SCL VDD

2
2 5
NC SDA SDA2 [5,10,11]

1
C1220
3 4
GND INT

VIA0801
VIA0901

1
1
C C

½ÓµØÂÝË¿¿×

Power Key & Volume Key

V661¶¨ÒåÐÞ¸Ä KROW0 KROW1

[5,11] KPCOL1 1
FPC_KEY1301

[5,11] KPCOL0 2
Down
SUB_ANT
FPC_6PIN

3 KCOL0 Up
[5,11] KPROW0
[5,11] KPROW1 4
5
[7,11] PWRKEY
6
KCOL1 CAM
T1220
T1214

T1215

T1216

T1217

B B
TP1312
ANT1502

VIA0803

VIA0804
ANT1501 ANT1503
C1218

1
2
3
4

1
2
3
4

2
3
4
1
2
3
4
J1501

1
2
3
4

1
1
2
3
4

1
2 1 C1502

4 3 SUB2_GNDSUB2_GND
C1501 C1503

ECT818000500
[5,11] KPCOL1 1
[5,11] KPCOL0 2

Rest key
FPC_KEY1
FPC_6PIN

[5,11] KPROW0 3
[5,11] KPROW1 4 SUB2_GND SUB2_GND SUB2_GND
5
[7,11] PWRKEY
6
T1210
T1211

T1212

T1213

T1209

[4,7] SYSRSTB 2 2 1 1
T1221

K2

1
2
FPC_KEY2
FPC_6PIN

GND_SIGNAL 3
4
5
6

A A
GND

KCOL0 Up

KCOL1 Down
Title
63_PERI_SENSORS
V130
Size
C MTK Confidential
Date: Friday, January 23, 2015 Sheet 11 of 14
5 4 3 2 1
 5 4 3 2 1

Project : MT6570

eMMC
MSDC0 / eMMC
MT6570 SCH TOP LEVEL

or
NAND
D D

MSDC 4-bit
MSDC1
micro SD
+ hot-plug
BPI, APC

Connectivity ANT

CONN RF
WCN IF RF IQ
(WG+G) RX
Main 1 ANT
TX
LCD IF FEM
LCD LCD
module (MIPI DSI)
CLK Ctrl
Camera IF TSX
Camera 26M
C
Camera I2C
(MIPI
I2C_0 CSI)
C
Modules

I2C
Touch
I2C_1 26M_AUD

32K_OUT
MT6350
RTC
I2C
Sensor I2C_2

GPIOs
SPI LDOs LDOs
ABB Vibrator VIB

SIM1
SIM1
MT6350 SIM1
VCPU/
VCORE/ Bucks Headset
VPA (HPL, HPR, AU_VIN1)
SIM2 SIM LVS Receiver
SIM2 SIM2
AUD I/F AU_VIN0 => mic1
Audio I/F Audio
Speech
B B
SPI AU_VIN2 => mic2
PWRAP I/F

Class D/AB

GPIOs
I2S3 BC 1.1 BC1.1

Keypad Keypad

JTAG
MSDC1/Camera
UART /SPI Pin-MUX JTAG Charger / Battery
Debug PP
UART1
port

GPIOs
UART2

A A

USB USB 2.0 micro USB

USB 2.0

Title
01_Block Diagram
Size
C MTK Confidential
Date: Tuesday, November 08, 2016 Sheet 12 of 14
5 4 3 2 1
 5 4 3 2 1

I2C Function I2C Spec. Budgeted Timing I2C Slave Address (7-bit mode)

Rear camera (OV5693) I2C address: (Write:0x6C, Read:0x6D)

D Rear Camera 400 Kbps AF driver (F8N03C) I2C address: 0x0C (Write:0x18 , Read:0x19) D

I2C-0
Front camera (OV5693) I2C address: (Write:0x20, Read:0x21)
Front Camera 400 Kbps

CTP 400 Kbps Yes. GT1151 / CTP I2C address: 0X5D (Write:0xBA, Read:0xBB) or 0x14 (Write:0x28, Read:0x29)
I2C-1

Flash LED 5V boost 400 Kbps RT4505 / Flashlight Driver I2C address: 0X63 (Write:0xC6, Read:0xC7)

Accelerometer 400 Kbps Yes. MC3413 / Accelerometer I2C address: 0x4C (Write:0x98, Read:0x99)
I2C-2
Gyro 400 Kbps Yes. Gyro I2C Address: 0x68 (Write:0xD0, Read:0xD1)

M sensor 400 Kbps Yes. M-Sensor I2C Address: 0x0D (Write:0x1A, Read:0x1B)

Light&PS sensor 400 Kbps Yes. CM36652 / RGB + PS I2C address: 0X60 (Write:0xC0, Read:0xC1)
C C

Note :
I2C Spec. : Standard mode (100 kbps) and Fast mode (400 kbps), Fast mode Plus (1 Mbps) and High-speed mode (3.4 Mbps)

B B

A A

Title
02_I2C_ID_Overview
Size
C MTK Confidential
Date: Tuesday, November 08, 2016 Sheet 13 of 14
5 4 3 2 1
 5 4 3 2 1

Date Category Item

General First Release.

2016.11.07
(V0.4)

D D

C C

B B

A A

Title
03_Change_Notice
Size
C MTK Confidential
Date: Wednesday, November 09, 2016 Sheet 14 of 14
5 4 3 2 1