Biostar H55 HD Rev. 6.4 (Ih55a-Mhs)

5 4 3 2 1
TITLE SHEET Model Name : IH55A-MHS

D
COVER SHEET
BLOCK DIAGRAM
1
2 Marketing name : H55 HD D
CHANGE LIST 3
INTEL 1156 PROCESSOR-1
4
5
6
VER:6.4
INTEL 1156 PROCESSOR-4 7
CPU :
DDRII DIMMA1 8 Core i7 / i5 / i3/ Pentium
DDRII DIMMB1 9
PCH-1(PCI/USB/DMI/PCIE) 10
PCH-2(SATA/CPU HOST) 11 System Chipset :
PCH-3(AUDIO/SPI/MISC) 12
PCH-4(VGA/FDI/DSP/NVRAM) 13 Intel PCH(Ibex Peak H55)
PCH-5(CLOCK BUFFER/CAP) 14
PCH-6(POWER) 15
PCH-7(GND) 16
On Board Chip :
C
CLK GEN RTM885N-932 17 Clock Gen. -- REALTEK RTM885N-932 C
VGA CONNECTOR 18
DVI/HDMI CONNECTOR 19 Audio Codec -- REALTEK ALC662
PE X16 SLOT 20
PE X1 SLOT 21
Lan Chip -- REALTEK RTL8111DL/RTL8102EL
PCI SLOT 1/2 22 PWM Controller -- UP6219A + NIKO-SEM MOS
ATX POWER CON & MH 23
K/B,COM,PRINT HEADER 24 Super I/O -- ITE 8721FBX
IDE-VT6415
LAN RTL8111DL/RTL8102EL
25
26
SPI Flash 16M
AUDIO CODEC ALC662 27
AUDIO CONNECTOR 28 Main Memory :
USB PORT 29
FRONT PANEL & FAN 30 2 Channel DDR III * 2 (Max 4GB)
SUPER I/O IT8721F/BX 31
CPU_CORE DC-DC CONVER 32
B
VAXG DC-DC CONVER 33

Expansion Slot : B
VTT DC-DC CONVER 34 PCI Express x16 Slot * 1

MISC DC-DC-1 35
OVER VOLTAGE/HW MONITOR 36 PCI Express x1 Slot * 1
RESET BUFFER & SEQUENCE 37
BOM 38
PCI Slot * 2
Heatsink :
SB: SBLS-T
I/O Pannel : HW Engineer: Date:
47-RIOBRACKET-55E HW Leader: Date:
A A
PCB SIZE : ◇BIOSTAR'S PROPRIETARY INFORMATION◆
200.03*244.00mm ◇Any unauthorized use, reproduction,

duplication, or disclosure of this
4-layers-1080 document will be subject to the
applicable civil and/or criminal
Title
COVER SHEET
Size Document Number Rev
penalties.◆ Custom
IH55A-MHS 6.4
Date: Tuesday, June 29, 2010 Sheet 1 of 38

5 4 3 2 1
5 4 3 2 1
BLOCK DIAGRAM
800/1066/1333MHz
Channel A
D LGA1156 DDR3
D
PEG X16 SLOT Modules
PROCESSOR
800/1066/1333MHz
VRD11.1 Channel B DDR3
Modules
FDI
DMI
FDI LINK X4 DMI
FDI
DMI
PCI CONN 1
VGA 333MHz PCI CNTRL
PCI ADDR/DATA
PCI CONN 2
DVI LEVER SHIFTER
PCH
C IBEX PEAK C
GIGA
LAN 8111DL
USB1.1/2.0 USB PORT 0-7
PEG X1
SLOT
Serial ATA Interface SATA 1/2/3/4

SPI ROM
UDMA33/66//100 IDE Primary
LPC ASIC
HD Audio Codec
ALC662
B ITE 8721FBX B
LPC
LPC
Floopy Keyboard COM Header Parallel Header
Mouse
A A
◇ BIOSTAR'S PROPRIETARY INFORMATION◆
◇ Any unauthorized use, reproduction,

duplication, or disclosure of this Title
document will be subject to the BLOCK DIAGRAM
applicable civil and/or criminal Size Document Number Rev
IH55A-MHS 6.4
5it 3 2 1
5 4 3 2 1
1. 2009/12/14
Add HDMI ConnectorㄛChange IDE Controller to VT6415
Add CIR HeaderㄛRemove Floppy Connector
Change Rear I/O PortㄛFollow IH55E-MHT
CPU output (input colay Solid cap.)
Marketing Name modify to H55 HD
D Memory Type change to DDR3-1600(OC)/1333/1066/800 D
Flash ROM 64M-->16M
2. 2010/01/02
Del U14 ASM1442T,HDMI Level Shifter
3. 2010/01/20
HDMI鷂DVI揹諉layout蜊傖Y倰殤?+ Rt ?郯
載蜊V_SM腔Input, Output Chokeㄛ崝樓1褷1000UF腔DIP? ㄛ
肮婓DIMM鷂CPU眳嶲蕼隱1褷6.3腔嘐 ? 弇离ㄛ賤 V_SM Ripple綎湮腔?觳
4. 2010/01/22
痄 CT22,賤縐CPU 餫圮腔?觳
載蜊V_1P1_VTT High Side MOS Layout
C 賤 Q59弇离鷂髡夔 ?惿?緲荂補扡腔?觳 C
5. 2010/02/08
陔崝7褷MLCC 10UF 0805? For V_1P1_VTT賤腴 ?觳,載蜊1?V_AXG? 腔溫弇离
蔚RSM_RST_N Pull High? 4.7K 0402ㄜ>10K 0402
載蜊Board ID 11ㄜ>10
壺FAN_CTL1 Pull High?郯
Delete F7,use POWER_JUSB2 powered for USBKB1 Connector
載蜊V_1P05_PCH "REF0_8"腔煦 ?郯 K撰ㄛ苤悷船
6. 2010/03/01 (V6.1-->V6.2)
V6.2載蜊囀狟ㄩ
1. 党蜊CPU?埭INPUT傷腔?覜
2. 党蜊V_SM?埭OUTPUT傷腔?覜
B 3. Output傷 ?珨?C睿R For Colay FP6237 B
4. Update SIO PWRGD IN?繚
5. 刉壺珨虳0 0402腔啋璃,熬屾錨璃杅醴
7. 2010/05/12 (V0.62-->V6.3)
V6.3載蜊囀狟ㄩ
1.党蜊CPU PWM_EN腔萇揤Level 1.1V--->2.5V
2. H_VTTPWRGD蕞輪CPU PWM傷崝樓珨衡0.1UF萇
3.Audio Codec盄繚笢MIC2_L,MIC2_R揹諉萇蜊峈10UF
4.BOARD ID 01-->10
5.Update DFGT_VR_EN Control circuit
6.U6 FP6137E SOP8 VINㄛVOUT跪崝樓衡10UF萇 ,VIN揭崝樓珨衡1000UF萇 For ㄚ3V3_DUAL
7.蔚ME_Gpull High萇揤蚕ㄚ3V3_DUAL蜊峈ㄚ5V_DUAL
A 8.覃淕PCH PCIECLKREQ# Strap Pin腔諉楊ㄛ賤樵GIGALAN CLK迵PEX16 CLK衄奀羶衄腔恀枙 A

document will be subject to the REVISION HISTORY
IH55A-MHS 6.4
5it 3 2 1
5 4 3 2 1
CK_H_CPU_DP CK_PE_100M_MCP_DP
CK_H_CPU_DN CK_PE_100M_MCP_DN
CK_DP_120M_DN CPU1E CPU1C
CK_DP_120M_DP BIOSTAR_D V1_2 BIOSTAR_D V1_2
1
1
1
1
1
1
AA7 U40 H_VID0 C9 C7
14 CK_H_CPU_DP BCLK0 VID0/MSID0 H_VID0 32 20 EXP_A_RX_0_DP PEG_RX0 PEG_TX0 EXP_A_TX_0_DP 20
AA6 U39 H_VID1 D9 D7
14 CK_H_CPU_DN BCLK#0 VID1/MSID1 H_VID1 32 20 EXP_A_RX_0_DN PEG_RX#0 PEG_TX#0 EXP_A_TX_0_DN 20
AA3 U38 H_VID2 B8 E7
14 CK_PE_100M_MCP_DP PEG_CLK VID2/MSID3 H_VID3 H_VID2 32 20 EXP_A_RX_1_DP PEG_RX1 PEG_TX1 EXP_A_TX_1_DP 20
AA4 PEG_CLK# VID3/CSC0 U37 20 EXP_A_RX_1_DN C8 PEG_RX#1 PEG_TX#1 E6 EXP_A_TX_1_DN 20
14 CK_PE_100M_MCP_DN H_VID4 H_VID3 32
14 CK_DP_120M_DN Y8 BCLK#1 VID4/CSC1 U36 H_VID4 32 20 EXP_A_RX_2_DP A7 PEG_RX2 PEG_TX2 E5 EXP_A_TX_2_DP 20
AA8 U35 H_VID5 A6 F5
14 CK_DP_120M_DP BCLK1 VID5/CSC2 H_VID5 32 20 EXP_A_RX_2_DN PEG_RX#2 PEG_TX#2 EXP_A_TX_2_DN 20
U34 H_VID6 B6 F3
D FROM IOH
H_TDO_TDI_M AF37
VID6
VID7 U33
AG38
H_VID7 H_VID6
H_VID7
32
32
20
20
EXP_A_RX_3_DP
EXP_A_RX_3_DN C6
A5
PEG_RX3
PEG_RX#3
PEG_TX3
PEG_TX#3 F4
G6
EXP_A_TX_3_DP 20
EXP_A_TX_3_DN 20 D
TDI_M PSI# Asserted When I汨20A CPU_PSI# 32 20 EXP_A_RX_4_DP PEG_RX4 PEG_TX4 EXP_A_TX_4_DP 20
AF38 TDO_M 20 EXP_A_RX_4_DN B5 PEG_RX#4 PEG_TX#4 G5 EXP_A_TX_4_DN 20
GFX_VR_EN F12 20 EXP_A_RX_5_DP B4 PEG_RX5 PEG_TX5 H4 EXP_A_TX_5_DP 20
H_DFGT_VR_EN 34
Change @V0.62 GFX_IMON F6 20 EXP_A_RX_5_DN C4 PEG_RX#5 PEG_TX#5 H3 EXP_A_TX_5_DN 20
H_CPURST_N AF34 G10 C3 F7
H_PWROK_AH36 RSTIN# GFX_VID0 H_VID_DFGT0 33 20 EXP_A_RX_6_DP PEG_RX6 PEG_TX6 EXP_A_TX_6_DP 20
AH36 VCCPWRGOOD_1 GFX_VID1 B12 20 EXP_A_RX_6_DN D3 PEG_RX#6 PEG_TX#6 G7 EXP_A_TX_6_DN 20
12 H_PWRGD H_PWROK_AH35 H_VID_DFGT1 33
AH35 VCCPWRGOOD_0 GFX_VID2 E12 H_VID_DFGT2 33 20 EXP_A_RX_7_DP D2 PEG_RX7 PEG_TX7 J6 EXP_A_TX_7_DP 20
AG37 VTTPWRGOOD GFX_VID3 E11 20 EXP_A_RX_7_DN E2 PEG_RX#7 PEG_TX#7 J5 EXP_A_TX_7_DN 20
Indicate VCC,VCCPLL,VTT,VAXG, 34 H_VTTPWRGD_CPU H_VID_DFGT3 33
AH37 SM_DRAMPWROK GFX_VID4 C12 20 EXP_A_RX_8_DP E1 PEG_RX8 PEG_TX8 K3 EXP_A_TX_8_DP 20
12 H_DRAMPWRGD H_VID_DFGT4 33
BCLK is stable.Refer EDS P57 1 1 G11 F1 K4
GFX_VID5 H_VID_DFGT5 33 20 EXP_A_RX_8_DN PEG_RX#8 PEG_TX#8 EXP_A_TX_8_DN 20
H_VTTPWRGD_CPU H_DRAMPWRGD J11 G3 H8
GFX_VID6 H_VID_DFGT6 33 20 EXP_A_RX_9_DP PEG_RX9 PEG_TX9 EXP_A_TX_9_DP 20
H_PECI AG35 G2 J8
11,31 H_PECI PECI 20 EXP_A_RX_9_DN PEG_RX#9 PEG_TX#9 EXP_A_TX_9_DN 20
H_CATERR_N AG39 G1 L6
11 H_THERMTRIP_N
H_PROCHOT_N AH34
AF35
CATERR#
PROCHOT#
THERMTRIP#
MISC FC_AE38
VTT_SELECT
AE38
AF39 1 VTT_SELECT
20
20
20
EXP_A_RX_10_DP
EXP_A_RX_10_DN
EXP_A_RX_11_DP
H1
J3
PEG_RX10
PEG_RX#10
PEG_RX11
PEG_TX10
PEG_TX#10
PEG_TX11
L5
M4
EXP_A_TX_10_DP 20
EXP_A_TX_10_DN 20
EXP_A_TX_11_DP 20
AH39 PM_SYNC FC_AG40 AG40 20 EXP_A_RX_11_DN J2 PEG_RX#11 PEG_TX#11 M3 EXP_A_TX_11_DN 20
Privide C-State 11 H_PM_SYNC_0
20 EXP_A_RX_12_DP J1 PEG_RX12 PEG_TX12 K7 EXP_A_TX_12_DP 20
VCC_SENSE T35 20 EXP_A_RX_12_DN K1 PEG_RX#12 PEG_TX#12 L7 EXP_A_TX_12_DN 20
VCC_SENSE 32
V_1P1_VTT AB5 PE_EXT_TS#0 VSS_SENSE T34 20 EXP_A_RX_13_DP L2 PEG_RX13 PEG_TX13 N6 EXP_A_TX_13_DP 20
VSS_SENSE 32
AB4 PE_EXT_TS#1 VTT_SENSE AE35 VCCTT_SENSE 34 20 EXP_A_RX_13_DN L3 PEG_RX#13 PEG_TX#13 N5 EXP_A_TX_13_DN 20
R3 20 1% 0402 CPU_COMP2 B11 AE36 P3 M8
R4 COMP2 VSS_SENSE_VTT VSSTT_SENSE 34 20 EXP_A_RX_14_DP PEG_RX14 PEG_TX14 EXP_A_TX_14_DP 20
20 1% 0402 CPU_COMP3 C11 P4 N8
COMP3 20 EXP_A_RX_14_DN PEG_RX#14 PEG_TX#14 EXP_A_TX_14_DN 20
20 EXP_A_RX_15_DP T3 PEG_RX15 PEG_TX15 R5 EXP_A_TX_15_DP 20
VAXG_SENSE A13 20 EXP_A_RX_15_DN T4 PEG_RX#15 PEG_TX#15 R6 EXP_A_TX_15_DN 20
R5 100 1% 0402 CPU_DDR_COMP0 VCCAXG_SENSE 33
AG1 SM_RCOMP0 VSSAXG_SENSE B13 VSSAXG_SENSE 33
DDR Resistive Compensation R6 24.9 1% 0402 CPU_DDR_COMP1 AD1
8:15 汨1300mils (DG P67.) R7 130 1% 0402 CPU_DDR_COMP2 AE1
SM_RCOMP1
SM_RCOMP2
ISENSE T40
MCP_INSENSE_DP 32
PEG
Analog Input DMI_IT_MR_0_DP R1 L1 DMI_MT_IR_0_DP
C CPU Compensation Anolog Input
R8
R9
49.9 1% 0402 CPU_COMP1
49.9 1% 0402 CPU_COMP0
AF2
AF36
COMP1
AM38 H_TDO
10
10
10
DMI_IT_MR_0_DP
DMI_IT_MR_0_DN
DMI_IT_MR_1_DP
DMI_IT_MR_0_DN T1
DMI_IT_MR_1_DP U3
DMI_RX0
DMI_RX#0
DMI_TX0
DMI_TX#0 M1
N3
DMI_MT_IR_0_DN
DMI_MT_IR_1_DP
DMI_MT_IR_0_DP
DMI_MT_IR_0_DN
DMI_MT_IR_1_DP
10
10
10
C
COMP0 TDO H_TDI DMI_IT_MR_1_DN U2 DMI_RX1 DMI_TX1 DMI_MT_IR_1_DN
10:15 汨1000mils (DG P75.) AK38 AM37 10 DMI_IT_MR_1_DN N2 DMI_MT_IR_1_DN 10
11,12,37 H_SKTOCC_N SKTOCC# TDI H_TCK DMI_IT_MR_2_DP U1 DMI_RX#1 DMI_TX#1 DMI_MT_IR_2_DP
TCK AN37 10 DMI_IT_MR_2_DP DMI_RX2 DMI_TX2 N1 DMI_MT_IR_2_DP 10
AN40 H_TMS 10 DMI_IT_MR_2_DN DMI_IT_MR_2_DN V1 P1 DMI_MT_IR_2_DN DMI_MT_IR_2_DN 10
GFX_DPRSLPVR TMS H_TRST_N DMI_IT_MR_3_DP W3 DMI_RX#2 DMI_TX#2 DMI_MT_IR_3_DP
1 J10 GFX_DPRSLPVR TRST# AM39 10 DMI_IT_MR_3_DP DMI_RX3 DMI_TX3 R2 DMI_MT_IR_3_DP 10
10 DMI_IT_MR_3_DN DMI_IT_MR_3_DN W2 R3 DMI_MT_IR_3_DN DMI_MT_IR_3_DN 10
PRDY#
PREQ#
AJ38
AK37
H_PRDY_N
H_PREQ_N
DMI_RX#3
DMI DMI_TX#3
AL40 FP_RST_N D11 GRCOMP R10 49.9 1% 0402

DBR# FP_RST_N 12,30 PEG_ICOMPI
BCLK_ITP# AK40 PEG_ICOMPO C10
R11 1.5K 0402 /NI PEG_SEL0 E8 AK39 B10
R12 1.5K 0402 /NI PEG_SEL1 G8
CFG0
CFG1
BCLK_ITP
TAPPWRGOOG AK34 H_TAPPWRGOOD V_1P1_VTT PEG_RCOMPO
PEG_RBIAS A11 W/S=10/15 mils
CFG H L NOTE R13 1.5K 0402 /NI PEG_SEL2 E10 AL39 H_RSTOUT_N
0 H:1X16 , L:2X8 R14
R15
1.5K 0402 /NI PEG_REVERSAL F10
CFG2
CFG3
RESET_OBS# DS P93.
1 RSVD 1.5K 0402 /NI DP_PRESENCE H10 3/10 R16
R17 1.5K 0402 /NI CFG4 LGA 1156 SOCKET 750 1% 0402
2 RSVD H9 CFG5 BPM#0 AL33
3 NORM RSVD LANE REVERSAL R18 1.5K 0402 /NI E9 AL32
R20 1.5K 0402 /NI CFG6 BPM#1 H_CPURST_N R21 51 0402 /NI
4 DISABLE ENABLE DP PRESENCE F9 CFG7 BPM#2 AK33
5 RSVD G12 AK32 H_PM_SYNC_0 R22 51 0402 /NI
CFG8 BPM#3 H_PECI R23 51 0402 /NI
6 RSVD H12 CFG9 BPM#4 AM31
K10 AL30 H_PRDY_N R26 51 0402 /NI
CFG10 BPM#5 H_RSTOUT_N R27 51 0402 /NI
CFG 0-4 all internal PULL-UP K8 CFG11 BPM#6 AK30
J12 AK31 H_PREQ_N R28 51 0402 /NI
For PCIE2.0 Issue CFG12 BPM#7
L8 H_TAPPWRGOODR30 51 0402 /NI
CFG13
Refer To DG.Page430 For Details K9 CFG14
R29 1.5K 0402 /NI K12 CFG15
H7 CFG16
L11 CFG17 V_1P1_VTT
RN9 51 8P4R 0402
B LGA 1156 SOCKET
5/10 H_TMS
H_THERMTRIP_N 3
1 2
4
B
H_PROCHOT_N 5 6 R32 R33 R38 R39 R34 R35 R40 R36
H_CATERR_N 7 8 1K 0402 1K 0402 1K 0402 1K 0402 /NI 1K 0402 1K 0402 /NI
110:FOR ALL CPU SUPPORTED 1K 0402 /NI
1K 0402 /NI
H_TDI R24 51 0402 H_VID0
H_TDO R25 51 0402 H_VID1
H_TCK R31 51 0402 H_VID2
H_TRST_N R37 51 0402 H_VID3
H_VID4
R44 H_VID5
2K 1% 0402 H_CPURST_N H_VID6
12,25,26,31 PLTRST_N H_VID7
Change @V6.4
1
C1
0.1UF 16V Y5V 0402 * R45
1.1K 1% 0402 CPU1D
Breakout 4:4:7 500Mils Max
Microstrip 5:5:12 14Inch Max R46 R47 R48 R49 R50 R51 R52 R53
BIOSTAR_D V1_2 Refer To DG.Page100 For Details 1K 0402 1K 0402 1K 0402 1K 0402
2
U6 1K 0402 /NI 1K 0402 /NI 1K 0402 /NI 1K 0402 /NI

FDI_TX0 FDI_TX_0_DP 13
FDI_TX#0 U5
FDI_TX_0_DN 13
13 FDI_FSYNC_0
AC4 FDI_FSYNC0 FDI_TX1 V4 FDI_TX_1_DP 13
Place Close To Processor AD4 V3
13 FDI_LSYNC_0 FDI_LSYNC0 FDI_TX#1 FDI_TX_1_DN 13
FDI_TX2 U8 FDI_TX_2_DP 13
FDI_TX#2 U7
FDI_TX_2_DN 13
W/S=4/5 mils W8
DG P101. FDI FDI_TX3
FDI_TX#3 W7
FDI_TX_3_DP
FDI_TX_3_DN
13
13
13 FDI_FSYNC_1
AC3 FDI_FSYNC1 FDI_TX4 W5 FDI_TX_4_DP 13
AD3 FDI_LSYNC1 FDI_TX#4 W4
H_VTTPWRGD_CPU 13 FDI_LSYNC_1 FDI_TX_4_DN 13
A FDI_TX5
FDI_TX#5
R8
R7
FDI_TX_5_DP
FDI_TX_5_DN
13
13
A
FDI_TX6 Y4 ◇ BIOSTAR'S PROPRIETARY INFORMATION◆
1
FDI_TX_6_DP 13
C24
0.1UF 16V X7R 0402 * 13 FDI_INT
AC2 FDI_INT
FDI_TX#6
FDI_TX7
Y3
Y6
FDI_TX_6_DN
FDI_TX_7_DP
13
13
Y5 ◇ Any unauthorized use, reproduction,
2
FDI_TX#7 FDI_TX_7_DN 13
4/10 duplication, or disclosure of this Title
LGA 1156 SOCKET
document will be subject to the Intel 1156 CPU1:PE/MISC
Place Close To Processor
IH55A-MHS 6.4
5it 3 2 1
5 4 3 2 1
8 M_MAA_A[0..15] M_MAA_A[0..15] M_DATA_A[0..63] M_MAA_B[0..15] M_DATA_B[0..63]
CPU1A M_DATA_A[0..63] 8 9 M_MAA_B[0..15] CPU1B M_DATA_B[0..63] 9
BIOSTAR_D V1_2 BIOSTAR_D V1_2
M_MAA_A0 AW18 AK3 M_MAA_B0 AU20 AF4
SA_MA0 SA_DQS0 M_DQS_A_DP0 8 SB_MA0 SB_DQS0 M_DQS_B_DP0 9
M_MAA_A1 AY15 AJ3 M_DQS_A_DN0 8 M_MAA_B1 AU18 AE5 M_DQS_B_DN0 9
M_MAA_A2 SA_MA1 SA_DQS#0 M_MAA_B2 SB_MA1 SB_DQS#0
AV15 SA_MA2 SA_DM0 AJ2 M_DQM_A0 8 AV18 SB_MA2 SB_DM0 AE4 M_DQM_B0 9
M_MAA_A3 AU15 M_MAA_B3 AU17
M_MAA_A4 SA_MA3 M_DATA_A0 M_MAA_B4 SB_MA3 M_DATA_B0
AW14 SA_MA4 SA_DQ0 AH1 AY18 SB_MA4 SB_DQ0 AD7
M_MAA_A5 AY13 AJ4 M_DATA_A1 M_MAA_B5 AV17 AD6 M_DATA_B1
M_MAA_A6 SA_MA5 SA_DQ1 M_DATA_A2 M_MAA_B6 SB_MA5 SB_DQ1 M_DATA_B2
AV14 SA_MA6 SA_DQ2 AL2 AW17 SB_MA6 SB_DQ2 AH8
M_MAA_A7 AW13 AL1 M_DATA_A3 M_MAA_B7 AU16 AJ8 M_DATA_B3
D M_MAA_A8
M_MAA_A9
AU14
AW12
SA_MA7
SA_MA8
SA_DQ3
SA_DQ4 AG2
AH2
M_DATA_A4
M_DATA_A5
M_MAA_B8
M_MAA_B9
AT17
AY16
SB_MA7
SB_MA8
SB_DQ3
SB_DQ4 AC7
AC6
M_DATA_B4
M_DATA_B5
D
M_MAA_A10 SA_MA9 SA_DQ5 M_DATA_A6 M_MAA_B10 SB_MA9 SB_DQ5 M_DATA_B6
AT19 SA_MA10 SA_DQ6 AK1 AY25 SB_MA10 SB_DQ6 AF5
M_MAA_A11 AU13 AK2 M_DATA_A7 M_MAA_B11 AW16 AE6 M_DATA_B7
M_MAA_A12 SA_MA11 SA_DQ7 M_MAA_B12 SB_MA11 SB_DQ7
AW11 SA_MA12 AW15 SB_MA12
M_MAA_A13 AU24 AP2 M_DQS_A_DP1 8 M_MAA_B13 AW28 AH6 M_DQS_B_DP1 9
M_MAA_A14 SA_MA13 SA_DQS1 M_MAA_B14 SB_MA13 SB_DQS1
AT11 SA_MA14 SA_DQS#1 AP3 M_DQS_A_DN1 8 AY12 SB_MA14 SB_DQS#1 AJ5 M_DQS_B_DN1 9
M_MAA_A15 AR10 AN1 M_MAA_B15 AV11 AH4
SA_MA15 SA_DM1 M_DQM_A1 8 SB_MA15 SB_DM1 M_DQM_B1 9
AT22 AN3 M_DATA_A8 AU26 AG5 M_DATA_B8
8 M_WE_A_N SA_WE# SA_DQ8 9 M_WE_B_N SB_WE# SB_DQ8
AU22 AN2 M_DATA_A9 AW27 AH7 M_DATA_B9
8 M_CAS_A_N SA_CAS# SA_DQ9 9 M_CAS_B_N SB_CAS# SB_DQ9
AT20 AR3 M_DATA_A10 AW26 AK6 M_DATA_B10
8 M_RAS_A_N SA_RAS# SA_DQ10 9 M_RAS_B_N SB_RAS# SB_DQ10
AR2 M_DATA_A11 AL4 M_DATA_B11
SA_DQ11 M_DATA_A12 SB_DQ11 M_DATA_B12
8 M_SBS_A0 AV20 SA_BS0 SA_DQ12 AM3 9 M_SBS_B0 AU25 SB_BS0 SB_DQ12 AG6
AU19 AM2 M_DATA_A13 AW25 AG4 M_DATA_B13
8 M_SBS_A1 SA_BS1 SA_DQ13 9 M_SBS_B1 SB_BS1 SB_DQ13
AU12 AP1 M_DATA_A14 AV12 AJ7 M_DATA_B14
8 M_SBS_A2 SA_BS2 SA_DQ14 9 M_SBS_B2 SB_BS2 SB_DQ14
AR4 M_DATA_A15 AK7 M_DATA_B15
SA_DQ15 SB_DQ15
8 M_SCS_A_N0 AV21 SA_CS#0 9 M_SCS_B_N0 AY27 SB_CS#0
8 M_SCS_A_N1 AW24 SA_CS#1 SA_DQS2 AU4 M_DQS_A_DP2 8 9 M_SCS_B_N1 AW29 SB_CS#1 SB_DQS2 AN6 M_DQS_B_DP2 9
AU21 SA_CS#2 SA_DQS#2 AU3 M_DQS_A_DN2 8 AV26 SB_CS#2 SB_DQS#2 AM6 M_DQS_B_DN2 9
AU23 SA_CS#3 SA_DM2 AU1 M_DQM_A2 8 AV29 SB_CS#3 SB_DM2 AM7 M_DQM_B2 9
AU10 AT4 M_DATA_A16 AW8 AL6 M_DATA_B16
8 M_SCKE_A0 SA_CKE0 SA_DQ16 9 M_SCKE_B0 SB_CKE0 SB_DQ16
AW10 AU2 M_DATA_A17 AY9 AN5 M_DATA_B17
8 M_SCKE_A1 SA_CKE1 SA_DQ17 9 M_SCKE_B1 SB_CKE1 SB_DQ17
AV10 AW3 M_DATA_A18 AU9 AP6 M_DATA_B18
SA_CKE2 SA_DQ18 M_DATA_A19 SB_CKE2 SB_DQ18 M_DATA_B19
AY10 SA_CKE3 SA_DQ19 AW4 AV9 SB_CKE3 SB_DQ19 AR5
AT3 M_DATA_A20 AL5 M_DATA_B20
8 M_ODT_A0 AV23 SA_ODT0 SA_DQ21 AT1 9 M_ODT_B0 AU27 SB_ODT0 SB_DQ21 AM4
AV24 AV2 M_DATA_A22 AU29 AN7 M_DATA_B22
8 M_ODT_A1 SA_ODT1 SA_DQ22 M_DATA_A23 9 M_ODT_B1 SB_ODT1 SB_DQ22 M_DATA_B23
AW23 AV4 AV27 AP5
C AY24
SA_ODT2
SA_ODT3
SA_DQ23
AY6
AU28
SB_ODT2
SB_ODT3
SB_DQ23
AR8
C
SA_DQS3 M_DQS_A_DP3 8 SB_DQS3 M_DQS_B_DP3 9
SA_DQS#3 AW6 M_DQS_A_DN3 8 SB_DQS#3 AP8 M_DQS_B_DN3 9
SA_DM3 AV6 M_DQM_A3 8 SB_DM3 AT7 M_DQM_B3 9
8 CK_M_DDR0_A_DP AR22 SA_CK0 9 CK_M_DDR0_B_DP AR17 SB_CK0
AR21 AW5 M_DATA_A24 AR16 AT6 M_DATA_B24
8 CK_M_DDR0_A_DN SA_CK#0 SA_DQ24 9 CK_M_DDR0_B_DN SB_CK#0 SB_DQ24
AP18 AY5 M_DATA_A25 AT15 AR7 M_DATA_B25
8 CK_M_DDR1_A_DP SA_CK1 SA_DQ25 9 CK_M_DDR1_B_DP SB_CK1 SB_DQ25
AN18 AU8 M_DATA_A26 AR15 AR9 M_DATA_B26
8 CK_M_DDR1_A_DN SA_CK#1 SA_DQ26 9 CK_M_DDR1_B_DN SB_CK#1 SB_DQ26
AN21 AY8 M_DATA_A27 AN17 AM8 M_DATA_B27
SA_CK2 SA_DQ27 M_DATA_A28 SB_CK2 SB_DQ27 M_DATA_B28
AP21 SA_CK#2 SA_DQ28 AU5 AN16 SB_CK#2 SB_DQ28 AN8
AP19 AV5 M_DATA_A29 AR19 AR6 M_DATA_B29
SA_CK3 SA_DQ29 M_DATA_A30 SB_CK3 SB_DQ29 M_DATA_B30
AN19 SA_CK#3 SA_DQ30 AV7 AR18 SB_CK#3 SB_DQ30 AL8
AW7 M_DATA_A31 AT9 M_DATA_B31
SA_DQ31 SB_DQ31
8,9 DDR3_DRAMRST_N AV8 SM_DRAMRST#
SA_DQS4 AR28 M_DQS_A_DP4 8 SB_DQS4 AT25 M_DQS_B_DP4 9
AK22 SA_CS#4 SA_DQS#4 AT29 M_DQS_A_DN4 8 AM23 SB_CS#4 SB_DQS#4 AR24 M_DQS_B_DN4 9
AM22 SA_CS#5 SA_DM4 AN29 M_DQM_A4 8 AM24 SB_CS#5 SB_DM4 AN24 M_DQM_B4 9
AL23 SA_CS#6 AL24 SB_CS#6
AK23 AN27 M_DATA_A32 AK24 AN23 M_DATA_B32
SA_CS#7 SA_DQ32 M_DATA_A33 SB_CS#7 SB_DQ32 M_DATA_B33
SA_DQ33 AT28 SB_DQ33 AP23
AL10 AP28 M_DATA_A34 AR14 AR25 M_DATA_B34
SA_DQS8 SA_DQ34 M_DATA_A35 SB_DQS8 SB_DQ34 M_DATA_B35
AM10 SA_DQS#8 SA_DQ35 AP30 AR13 SB_DQS#8 SB_DQ35 AR26
AN26 M_DATA_A36 AT23 M_DATA_B36
AP10 SA_ECC_CB0 SA_DQ37 AR27 AR12 SB_ECC_CB0 SB_DQ37 AP22
AN10 AR29 M_DATA_A38 AT13 AP25 M_DATA_B38
SA_ECC_CB1 SA_DQ38 M_DATA_A39 SB_ECC_CB1 SB_DQ38 M_DATA_B39
AR11 SA_ECC_CB2 SA_DQ39 AN30 AN15 SB_ECC_CB2 SB_DQ39 AT26
AP11 SA_ECC_CB3 AP14 SB_ECC_CB3
AK9 SA_ECC_CB4 SA_DQS5 AV32 M_DQS_A_DP5 8 AM12 SB_ECC_CB4 SB_DQS5 AP32 M_DQS_B_DP5 9
AL9 SA_ECC_CB5 SA_DQS#5 AW32 M_DQS_A_DN5 8 AN12 SB_ECC_CB5 SB_DQS#5 AR32 M_DQS_B_DN5 9
B AK11
AM11
SA_ECC_CB6
SA_ECC_CB7
SA_DM5 AW31
AU30 M_DATA_A40
M_DQM_A5 8 AN14
AP13
SB_ECC_CB6
SB_ECC_CB7
SB_DM5 AN32
AT32 M_DATA_B40
M_DQM_B5 9
B
SA_DQ41 AU31 SB_DQ41 AP31
AV33 M_DATA_A42 AR33 M_DATA_B42
SA_DQ43 AU34 SB_DQ43 AM32
AV30 M_DATA_A44 AT31 M_DATA_B44
SA_DQ45 AW30 SB_DQ45 AR31
AU33 M_DATA_A46 AR34 M_DATA_B46
SA_DQ47 AW33 SB_DQ47 AT33
SA_DQS6 AW36 M_DQS_A_DP6 8 SB_DQS6 AR36 M_DQS_B_DP6 9

SA_DQS#6 AV35 M_DQS_A_DN6 8 SB_DQS#6 AR37 M_DQS_B_DN6 9
SA_DM6 AU35 M_DQM_A6 8 SB_DM6 AM33 M_DQM_B6 9
M_DQS_A_DN[0..7] M_DQS_B_DN[0..7]
M_DATA_A48 M_DQS_A_DN[0..7] 8 M_DATA_B48 M_DQS_B_DN[0..7] 9
SA_DQ48 AW35 SB_DQ48 AR35
AY35 M_DATA_A49 M_DQS_A_DP[0..7] AT36 M_DATA_B49 M_DQS_B_DP[0..7]
SA_DQ49 M_DATA_A50 M_DQS_A_DP[0..7] 8 SB_DQ49 M_DATA_B50 M_DQS_B_DP[0..7] 9
SA_DQ50 AV37 SB_DQ50 AN33
AU37 M_DATA_A51 M_DQM_A[0..7] AP36 M_DATA_B51 M_DQM_B[0..7]
SA_DQ51 M_DATA_A52 M_DQM_A[0..7] 8 SB_DQ51 M_DATA_B52 M_DQM_B[0..7] 9
SA_DQ52 AY34 SB_DQ52 AP34
AW34 M_DATA_A53 AT35 M_DATA_B53
SA_DQ54 AV36 SB_DQ54 AN34
AW37 M_DATA_A55 AP37 M_DATA_B55
SA_DQ55 SB_DQ55
SA_DQS7 AR39 M_DQS_A_DP7 8 SB_DQS7 AL37 M_DQS_B_DP7 9

SA_DQS#7 AR38 M_DQS_A_DN7 8 SB_DQS#7 AM36 M_DQS_B_DN7 9
SA_DM7 AT38 M_DQM_A7 8 SB_DM7 AK35 M_DQM_B7 9
AT39 M_DATA_A56 AL35 M_DATA_B56
SA_DQ57 AT40 SB_DQ57 AM35
M_DATA_A58 M_DATA_B58
A SA_DQ58 AN38
AN39 M_DATA_A59
DDR_B SB_DQ58 AJ36
AJ37 M_DATA_B59 A
DDR_A SA_DQ59
SA_DQ60
SA_DQ61
AU38
AU39
M_DATA_A60
M_DATA_A61
SB_DQ59
SB_DQ60
SB_DQ61
AN35
AM34
M_DATA_B60
M_DATA_B61
AP39 M_DATA_A62 AJ35 M_DATA_B62
SA_DQ62 M_DATA_A63 2/10 SB_DQ62 M_DATA_B63
SA_DQ63 AP40 SB_DQ63 AL36
1/10
LGA 1156 SOCKET LGA 1156 SOCKET Title
Size
Intel 1156 CPU2:MEMORY
Document Number Rev
Custom
IH55A-MHS 6.4
5it 3 2 1
5 4 3 2 1
CPU_VCCP CPU1F CPU_VCCP

BIOSTAR_D V1_2
A23 VCC VCC H26
A24 VCC VCC H28
A26 H29 V_1P1_VTT V_1P1_VTT V_AXG CPU1H V_SM
VCC VCC CPU1G BIOSTAR_D V1_2
A27 VCC VCC H31
A33 H32 BIOSTAR_D V1_2 A14 AJ11
VCC VCC VAXG VDDQ
A35 VCC VCC H34 AA38 VTT VTT T6 A15 VAXG VDDQ AJ13
A36 H35 AC38 T7 A17 AJ15
D VCC VCC VTT VTT VAXG VDDQ
D
1
A38
B23
VCC_NCTF
VCC
VCC
VCC
H37
H38
AC39
AC40
VTT
VTT
VTT
VTT
T8
V7
A18
B14
VAXG
VAXG
VDDQ
VDDQ
AT18
AT21
* C2
10UF 10V 0805 Y5V
B25 H40 AD38 V8 B15 AT10
2
VCC VCC VTT VTT VAXG VDDQ
B26 VCC VCC J18 AD39 VTT VTT AB7 B17 VAXG VDDQ AU11
B28 VCC VCC J19 AD40 VTT VTT AC5 B18 VAXG VDDQ AV13
B29 VCC VCC J21 AE39 VTT VTT AJ23 C14 VAXG VDDQ AV16
B31 VCC VCC J22 AE40 VTT VTT V6 C15 VAXG VDDQ AV19
B32 VCC VCC J24 V38 VTT VTT W1 C17 VAXG VDDQ AV22
B34 VCC VCC J25 V39 VTT VTT W6 C18 VAXG VDDQ AV25
B35 VCC VCC J27 V40 VTT VTT L10 C20 VAXG VDDQ AV28
B37 VCC VCC J28 Y38 VTT VTT M10 C21 VAXG VDDQ AW9
1
B38
C23
VCC
VCC
VCC
VCC
J30
J31
AA33
AA34
VTT
VTT
VTT
VTT
M11
M9
D14
D15
VAXG
VAXG
VDDQ
VDDQ
AY11
AY14
* C3
10UF 10V 0805 Y5V
C24 J33 AA35 N7 D17 AY17
2
VCC VCC VTT VTT VAXG VDDQ
C25 VCC VCC J34 AA36 VTT VTT P6 D18 VAXG VDDQ AY23
C27 VCC VCC J36 AA37 VTT VTT P7 D20 VAXG VDDQ AY26
C28 VCC VCC J37 AC33 VTT VTT P8 D21 VAXG
C30 VCC VCC J39 AC34 VTT VTT T2 E14 VAXG
C31 VCC VCC J40 AC35 VTT VTT V2 E15 VAXG
C33 VCC VCC K17 AC36 VTT E17 VAXG
C34 K18 AC37 V_1P8_SFR E18
C36
VCC
VCC
CPU VCC
VCC K20 AD33
VTT
VTT E20
VAXG
VAXG
C37 K21 AD34 F14
C39
VCC
VCC
POWER VCC
VCC K23 AD35
VTT
VTT VCCPLL AF7 1 VCCPLL F15
VAXG
VAXG
C40 VCC_NCTF VCC K24 AD36 VTT VCCPLL AF8 F17 VAXG
D23 VCC VCC K26 AD37 VTT VCCPLL AG8 F18 VAXG
D24 VCC VCC K27 AE33 VTT F19 VAXG
D26 VCC VCC K29 AE34 VTT G14 VAXG
1
D27
D29
VCC VCC K30
K32
AF33
AG33
VTT * C4
10UF 10V 0805 Y5V
G15
G17
VAXG
C D30
VCC VCC
K33 AJ31
VTT
G18
VAXG
C
2
VCC VCC VTT VAXG
D32 VCC VCC K35 AJ32 VTT H14 VAXG
D33 K36 V33 H15
D35
VCC VCC
K38 V34
VTT CPU H17
VAXG
D36
VCC VCC
K39 V35
VTT
J14
VAXG CPU
D38
VCC VCC
L17 V36
VTT POWER J15
VAXG
D39
VCC
VCC
VCC
VCC L19 V37
VTT
VTT J16
VAXG
VAXG
POWER
E22 VCC VCC L20 Y33 VTT K14 VAXG
E26 VCC VCC L25 Y36 VTT L14 VAXG
E28 VCC VCC L26 Y37 VTT L15 VAXG
E29 VCC VCC L28 AC8 VTT L16 VAXG
E31 VCC VCC L29 AE8 VTT M14 VAXG
E32 VCC VCC L31 AJ17 VTT M15 VAXG
E34 VCC VCC L32 AJ19 VTT M16 VAXG
E35 VCC VCC L34 AK19 VTT
E37 L35 AJ21 8/10
VCC VCC VTT
E38 VCC VCC L37 AJ25 VTT
E40 L38 AJ27 LGA 1156 SOCKET
VCC VCC VTT
F21 VCC VCC L40 AJ29 VTT
F22 VCC VCC M17 AK20 VTT
F24 VCC VCC M19 AK21 VTT
F25 VCC VCC M21 AL20 VTT
F27 VCC VCC M22 AL21 VTT
F28 VCC VCC M24
F30 M25 7/10
VCC VCC
F31 VCC VCC M27
F33 M28 LGA 1156 SOCKET
VCC VCC
B F34
F36
F37
VCC
VCC
VCC
VCC
M30
M33
M34
B
VCC VCC
F39 VCC VCC M36
F40 VCC VCC M37
G20 VCC VCC M39
G21 VCC VCC M40
G23 VCC VCC N33
G24 VCC VCC N35
G26 VCC VCC N36
G27 VCC VCC N38
G29 VCC VCC N39
G30 VCC VCC P33
G32 VCC VCC P34
G33 VCC VCC P35
G35 VCC VCC P36
G36 VCC VCC P37
G38 VCC VCC P38
G39 VCC VCC P39
H19 VCC VCC P40
H20 VCC VCC R33
H22 VCC VCC R34
H23 VCC VCC R35
H25 VCC VCC R36
VCC R37
VCC R38
VCC R39
VCC R40
6/10
A A
LGA 1156 SOCKET ◇ BIOSTAR'S PROPRIETARY INFORMATION◆

document will be subject to the Intel 1156 CPU3:POWER
IH55A-MHS 6.4
5it 3 2 1
5 4 3 2 1
CPU1I
BIOSTAR_D V1_2 CPU1J
A16 AP35 BIOSTAR_D V1_1
VSS VSS
A25 VSS VSS AP38 F8 VSS VSS W33
A28 VSS VSS AP4 G13 VSS VSS W34
AA5 VSS VSS AR1 G22 VSS VSS W37
AB3 VSS VSS AR20 G25 VSS CGC_TP_NCTF B39
AB33
AB34
VSS VSS AR23
AR30
G28
G31
VSS VSS W38
Y7
If Reserved,Only Support Q3 Version CPU
D AB35
AB36
VSS
VSS
VSS
VSS AR40
AT12
G34
G37
VSS
VSS
VSS
AF3 DIMM_DQ_VREF_A
D
VSS VSS VSS SA_DIMM_VREFDQ DIMM_DQ_VREF_B DIMM_DQ_VREF_A 8
AB37 VSS VSS AT14 G4 VSS SB_DIMM_VREFDQ AG3 DIMM_DQ_VREF_B 9
AB38 VSS VSS AT16 G40 VSS
AB39 VSS VSS AT2 G9 VSS
AB40 VSS VSS AT24 H11 VSS RSVD A12 4:10:20 汨5000mils
AB6 VSS VSS AT27 H13 VSS RSVD AD2 Change @V0.62
AB8 VSS VSS AT30 H16 VSS RSVD AE2 Analog Output
AC1 AT34 H18 AH40
AD5
VSS VSS
AT37 H2
VSS RSVD
AJ39
Refer DG P69,70 For Details
VSS VSS VSS RSVD
AD8 VSS VSS AT5 H21 VSS
AE3 VSS VSS AT8 H24 VSS
AE37 VSS VSS AU32 H27 VSS
AE7 VSS VSS AU36 H30 VSS RSVD AM14
AF1 VSS VSS AU6 H33 VSS RSVD AM13
AF40 VSS VSS AU7 H36 VSS RSVD AK15
AF6 VSS VSS AV3 H39 VSS RSVD AK16
AG34 VSS VSS AV31 H5 VSS
AG36 VSS VSS AV34 H6 VSS
AH5 VSS VSS AV38 J13 VSS
AG7 VSS VSS AY33 J17 VSS RSVD AM25
AH3 VSS VSS AY36 J20 VSS RSVD AL29
AH33 VSS VSS AY4 J23 VSS RSVD AM30
AH38 VSS VSS AY7 J26 VSS RSVD AK29
AJ1 VSS VSS B16 J29 VSS RSVD AK28
AJ12 VSS VSS B24 J32 VSS RSVD AM29
AJ14 VSS VSS B27 J35 VSS RSVD AM28
AJ16 VSS VSS B30 J38 VSS RSVD AL27
AJ18 VSS VSS B33 J4 VSS RSVD AK27
AJ20 B36 J7 AM26
C AJ22
AJ24
VSS
VSS GND VSS
VSS B7
B9
J9
K11
VSS
VSS
RSVD
RSVD AM27
AL26
C
VSS VSS VSS RSVD
AJ26 VSS VSS C13 K13 VSS RSVD AK26
AJ28 VSS VSS C16 K19 VSS
AJ30 VSS VSS C19 K2 VSS RSVD AK25
AJ33 VSS VSS C22 K22 VSS RSVD_TP AN11
AJ34 VSS VSS C26 K25 VSS RSVD L12
AJ40 VSS VSS C29 K28 VSS RSVD M12
AJ6 VSS VSS C32 K31 VSS
AJ9 VSS VSS C35 K34 VSS RSVD AM21
AK10 VSS VSS C38 K37 VSS RSVD AM20
AK17 VSS VSS C5 K40 VSS RSVD AM19
AK36 VSS VSS D10 K5 VSS RSVD AM18
AK4 VSS VSS D12 K6 VSS VSS T39
AK5 VSS VSS D13 L13 VSS
AK8 VSS VSS D16 L18 VSS RSVD AL18
AL11 VSS VSS D19 L21 VSS RSVD AK18
AL13 VSS VSS D22 L24 VSS
AL16 VSS VSS D25 L27 VSS RSVD AM15
AL22 VSS VSS D31 L33 VSS RSVD AL15
AL28 VSS VSS D37 L39 VSS
AL34 VSS VSS D5 M13 VSS RSVD AK14
AL38 VSS VSS D6 M18 VSS RSVD AK13
AL7 VSS VSS D8 M2 VSS RSVD AL12
AM1 VSS VSS E13 M20 VSS RSVD AK12
B AM40
AM5
AM9
VSS
VSS
VSS
VSS
E16
E19
E21
M23
M26
M29
VSS
VSS RSVD_NCTF AY3 B
VSS VSS VSS
AN13 VSS VSS E24 M32 VSS
AN20 VSS VSS E27 M35 VSS RSVD_NCTF C2
AN22 VSS VSS E3 M38 VSS RSVD_NCTF D1
AN25 VSS VSS E30 M5 VSS RSVD_NCTF AY37
AN28 VSS VSS E33 M6 VSS RSVD_NCTF AW38
AN31 VSS VSS E36 M7 VSS RSVD_NCTF AV1
AN36 VSS VSS E39 N34 VSS RSVD_NCTF AW2
AN4 VSS VSS E4 N37 VSS RSVD_NCTF AV39
AN9 VSS VSS F11 N4 VSS RSVD_NCTF AU40
AP12 VSS VSS F13 N40 VSS
AP15 VSS VSS F16 P2 VSS RSVD_NCTF A4
AP16 VSS VSS F2 P5 VSS RSVD_NCTF B3
AP17 VSS VSS F20 R4 VSS
AP20 VSS VSS F23 T33 VSS
AP29 F35 T5
AP33
VSS
VSS
VSS
VSS F38 U4
V5
VSS
VSS
VSS
GND
9/10
10/10
LGA 1156 SOCKET
LGA 1156 SOCKET
A A

Title
document will be subject to the Intel 1156 CPU4:GND
IH55A-MHS 6.4
5it 3 2 1
5 4 3 2 1
M_DATA_A[0..63]
5 M_DATA_A[0..63]
M_MAA_A[0..15] M_DQS_A_DN[0..7]
5 M_MAA_A[0..15] 5 M_DQS_A_DN[0..7]
M_DQM_A[0..7] M_DQS_A_DP[0..7]
5 M_DQM_A[0..7] 5 M_DQS_A_DP[0..7]
V_SM
D M_DQS_A_DN0 6
DDR3_A1A
234 M_DATA_A63 51
DDR3_A1B
2
V_SM D
M_DQS_A_DP0 DQS0- DQ63 M_DATA_A62 VDDQ1 (P) VSS1(P)
7 DQS0 DQ62 233 54 VDDQ2 (P) VSS2(P) 5
M_DQS_A_DN1 15 228 M_DATA_A61 57 8
M_DQS_A_DP1 DQS1- DQ61 M_DATA_A60 VDDQ3 (P) VSS3(P)
16 DQS1 DQ60 227 60 VDDQ4 (P) VSS4(P) 11
M_DQS_A_DN2 24 115 M_DATA_A59 62 14
DQS2- DQ59 VDDQ5 (P) VSS5(P)
1
M_DQS_A_DP2
M_DQS_A_DN3
25
33
DQS2
DQS3-
DQ58
DQ57
114
109
M_DATA_A58
M_DATA_A57
65
66
VDDQ6 (P)
VDDQ7 (P)
VSS6(P)
VSS7(P)
17
20
* C9 * C10 * C12 * C14 * C16 * C13
M_DQS_A_DP3 34 108 M_DATA_A56 69 23 1UF 10V Y5V 0402 1UF 10V Y5V 0402 1UF 10V Y5V 0402 10UF 10V 0805 Y5V 0.1UF 16V X7R 0402
2
M_DQS_A_DN4 DQS3 DQ56 M_DATA_A55 VDDQ8 (P) VSS8(P) 1UF 10V Y5V 0402
84 DQS4- DQ55 225 72 VDDQ9 (P) VSS9(P) 26
M_DQS_A_DP4 85 224 M_DATA_A54 75 29
M_DQS_A_DN5 DQS4 DQ54 M_DATA_A53 VDDQ10 (P) VSS10(P)
93 DQS5- DQ53 219 78 VDDQ11 (P) VSS11(P) 32
M_DQS_A_DP5 94 218 M_DATA_A52 170 35
M_DQS_A_DN6 DQS5 DQ52 M_DATA_A51 VDD1 (P) VSS12(P)
102 DQS6- DQ51 106 173 VDD2 (P) VSS13(P) 38
M_DQS_A_DP6 103 105 M_DATA_A50 176 41
M_DQS_A_DN7 DQS6 DQ50 M_DATA_A49 VDD3 (P) VSS60(P)
111 DQS7- DQ49 100 179 VDD4 (P) VSS14(P) 44
M_DQS_A_DP7 112 99 M_DATA_A48 182 47
DQS7 DQ48 M_DATA_A47 VDD5 (P) VSS15(P) V_SM_VTT
42 DQS8- DQ47 216 183 VDD6 (P) VSS16(P) 80
43 215 M_DATA_A46 186 83
M_DQM_A0 DQS8 DQ46 M_DATA_A45 VDD7(P) VSS17(P)
125 DQS9 DQ45 210 189 VDD8(P) VSS18(P) 86
126 209 M_DATA_A44 191 92
M_DQM_A1 DQS9- DQ44 M_DATA_A43 VDD9(P) VSS19(P)
134 DQS10 DQ43 97 194 VDD10(P) VSS20(P) 95
135 96 M_DATA_A42 197 98
DQS10- DQ42 VDD11(P) VSS21(P)
1
M_DQM_A2 143
144
DQS11
DQS11-
DQ41
DQ40
91
90
M_DATA_A41
M_DATA_A40
VCC3_3 236 VDDSPD(P) VSS22(P)
VSS23(P)
101
104
* C17 * C15
M_DQM_A3 152 207 M_DATA_A39 DIMM_CA_VREF_A 67 107 0.1UF 16V X7R 0402 /NI 10UF 10V 0805 Y5V
2
DQS12 DQ39 M_DATA_A38 DIMM_DQ_VREF_A VREFCA VSS24(P)
153 DQS12- DQ38 206 1 VREFDQ VSS25(P) 110
M_DQM_A4 203 201 M_DATA_A37 113
DQS13 DQ37 M_DATA_A36 VSS26(P)
204 DQS13- DQ36 200 117 SA0 VSS27(P) 116
M_DQM_A5 212 88 M_DATA_A35 237 119
C M_DQM_A6
213
221
DQS14
DQS14-
DQ35
DQ34 87
82
M_DATA_A34
M_DATA_A33
SA1 VSS28(P)
VSS29(P) 121
124
C
DQS15 DQ33 M_DATA_A32 VSS30(P)
222 DQS15- DQ32 81 5 M_SCKE_A0 50 CKE0 VSS31(P) 127
M_DQM_A7 230 156 M_DATA_A31 169 130
DQS16 DQ31 M_DATA_A30 5 M_SCKE_A1 CKE1 VSS32(P)
231 DQS16- DQ30 155 VSS33(P) 133
161 150 M_DATA_A29 71 136
DQS17 DQ29 5 M_SBS_A0 BA0 VSS34(P)
162 149 M_DATA_A28 190 139
DQS17- DQ28 5 M_SBS_A1 BA1 VSS35(P)
37 M_DATA_A27 142
DQ27 M_DATA_A26 VSS36(P)
39 CB0 DQ26 36 5,9 DDR3_DRAMRST_N 168 RESET VSS37(P) 145
40 31 M_DATA_A25 73 148
CB1 DQ25 5 M_WE_A_N WE- VSS38(P)
45 30 M_DATA_A24 192 151 V_SM
CB2 DQ24 5 M_RAS_A_N RAS- VSS39(P)
46 147 M_DATA_A23 74 154
CB3 DQ23 5 M_CAS_A_N CAS- VSS40(P)
158 146 M_DATA_A22 193 157
CB4 DQ22 5 M_SCS_A_N0 S-0 VSS41(P)
M_DATA_A21
159 CB5 DQ21 141
M_DATA_A20
5 M_SCS_A_N1 76 S-1 VSS42(P) 160
R57
12:12
164 CB6 DQ20 140 VSS43(P) 163
165 CB7 DQ19 28 M_DATA_A19
5 M_ODT_A0 195 ODT0 VSS44(P) 166 1K 1% 0402 Refer DG P71 For Details
27 M_DATA_A18 77 199
DQ18 5 M_ODT_A1 ODT1 VSS45(P)
79 22 M_DATA_A17 202 DIMM_DQ_VREF_A
RSVD DQ17 VSS46(P) DIMM_DQ_VREF_A 7
238 21 M_DATA_A16 205
9,12,17,20,21,22,26 SMB_DATA_MAIN SDA DQ16 VSS47(P)
118 138 M_DATA_A15 208
9,12,17,20,21,22,26 SMB_CLK_MAIN SCL DQ15 VSS48(P)
1
M_MAA_A0 188 A0
DQ14
DQ13
137
132
M_DATA_A14
M_DATA_A13 VSS49(P)
VSS50(P)
211
214
* C5
0.1UF 16V Y5V 0402 /NI
R58
1K 1% 0402 * C6
0.1UF 16V Y5V 0402
M_MAA_A1 181 131 M_DATA_A12 217
2
M_MAA_A2 A1 DQ12 M_DATA_A11 VSS51(P)
61 A2 DQ11 19 5 CK_M_DDR1_A_DN 64 CK-1 VSS52(P) 220
M_MAA_A3 180 18 M_DATA_A10 63 223
A3 DQ10 5 CK_M_DDR1_A_DP CK1 VSS53(P)
M_MAA_A4 59 13 M_DATA_A9 185 226
A4 DQ9 5 CK_M_DDR0_A_DN CK-0 VSS54(P)
M_MAA_A5 58 12 M_DATA_A8 184 229
A5 DQ8 5 CK_M_DDR0_A_DP CK0 VSS55(P)
M_MAA_A6 178 129 M_DATA_A7 232 V_SM
M_MAA_A7 A6 DQ7 M_DATA_A6 VSS56(P)
56 A7 DQ6 128 VSS57(P) 235
M_MAA_A8 M_DATA_A5
B M_MAA_A9
M_MAA_A10
177
175
70
A8
A9
DQ5
DQ4
123
122
10
M_DATA_A4
M_DATA_A3 48
VSS58(P)
VSS59(P)
239
89
R59
B
M_MAA_A11 A10 DQ3 M_DATA_A2 FREE1 1K 1% 0402
55 A11 DQ2 9 49 FREE2 VTT 120
M_MAA_A12 174 4 M_DATA_A1 187 240 V_SM_VTT
M_MAA_A13 A12 DQ1 M_DATA_A0 FREE3 VTT DIMM_CA_VREF_A
196 A13 DQ0 3 198 FREE4
M_MAA_A14 172 68
M_MAA_A15 A14 NC/PAR_IN DDR3-240 PIN-R
171 A15 NC/ERR_OUT 53
1
5 M_SBS_A2 52 A16/BA2 BLACK NC/TEST4 167 <PCB Footprint>
* C7
0.1UF 16V Y5V 0402
R60
1K 1% 0402 * C8
0.1UF 16V Y5V 0402 /NI
2
DDR3-240 PIN-R
<PCB Footprint>
A A

document will be subject to the
applicable civil and/or criminal Size Document Number
DDR2 DIMMA1/A2 Rev
Date: Tuesday, June 29, 2010

IH55A-MHS Sheet 8 of 38
6.4
5it 3 2 1
5 4 3 2 1
M_DATA_B[0..63] M_DQS_B_DN[0..7]
5 M_DATA_B[0..63] 5 M_DQS_B_DN[0..7]
M_MAA_B[0..15] M_DQS_B_DP[0..7]
5 M_MAA_B[0..15] 5 M_DQS_B_DP[0..7]
M_DQM_B[0..7]
5 M_DQM_B[0..7]
V_SM V_SM
DDR3_B1A DDR3_B1B
D M_DQS_B_DN0
M_DQS_B_DP0
6
7
DQS0- DQ63 234
233
M_DATA_B63
M_DATA_B62
51
54
VDDQ1 (P) VSS1(P) 2
5
D
M_DQS_B_DN1 DQS0 DQ62 M_DATA_B61 VDDQ2 (P) VSS2(P)
15 DQS1- DQ61 228 57 VDDQ3 (P) VSS3(P) 8
1
M_DQS_B_DP1
M_DQS_B_DN2
16
24
DQS1
DQS2-
DQ60
DQ59
227
115
M_DATA_B60
M_DATA_B59
60
62
VDDQ4 (P)
VDDQ5 (P)
VSS4(P)
VSS5(P)
11
14
* C23 * C25 * C27 * C18 * C29
M_DQS_B_DP2 25 114 M_DATA_B58 65 17 1UF 10V Y5V 0402 1UF 10V Y5V 0402 10UF 10V 0805 Y5V
2
M_DQS_B_DN3 DQS2 DQ58 M_DATA_B57 VDDQ6 (P) VSS6(P) 1UF 10V Y5V 0402 0.1UF 16V X7R 0402
33 DQS3- DQ57 109 66 VDDQ7 (P) VSS7(P) 20
M_DQS_B_DP3 34 108 M_DATA_B56 69 23
84 DQS4- DQ55 225 72 VDDQ9 (P) VSS9(P) 26
M_DQS_B_DP4 85 224 M_DATA_B54 75 29
93 DQS5- DQ53 219 78 VDDQ11 (P) VSS11(P) 32
M_DQS_B_DP5 94 218 M_DATA_B52 170 35
M_DQS_B_DN6 DQS5 DQ52 M_DATA_B51 VDD1 (P) VSS12(P)
102 DQS6- DQ51 106 173 VDD2 (P) VSS13(P) 38
M_DQS_B_DP6 103 105 M_DATA_B50 176 41
M_DQS_B_DN7 DQS6 DQ50 M_DATA_B49 VDD3 (P) VSS60(P)
111 DQS7- DQ49 100 179 VDD4 (P) VSS14(P) 44
M_DQS_B_DP7 112 99 M_DATA_B48 182 47 V_SM_VTT
DQS7 DQ48 M_DATA_B47 VDD5 (P) VSS15(P)
42 DQS8- DQ47 216 183 VDD6 (P) VSS16(P) 80
43 215 M_DATA_B46 186 83
M_DQM_B0 DQS8 DQ46 M_DATA_B45 VDD7(P) VSS17(P)
125 DQS9 DQ45 210 189 VDD8(P) VSS18(P) 86
126 209 M_DATA_B44 191 92
M_DQM_B1 DQS9- DQ44 M_DATA_B43 VDD9(P) VSS19(P)
134 DQS10 DQ43 97 194 VDD10(P) VSS20(P) 95
1
M_DQM_B2
135
143
DQS10-
DQS11
DQ42
DQ41
96
91
M_DATA_B42
M_DATA_B41 VCC3_3
197
236
VDD11(P)
VDDSPD(P)
VSS21(P)
VSS22(P)
98
101
* C33 * C31
144 90 M_DATA_B40 104 0.1UF 16V X7R 0402 /NI 4.7UF 16V Y5V 0805
2
M_DQM_B3 DQS11- DQ40 M_DATA_B39 DIMM_CA_VREF_B VSS23(P)
152 DQS12 DQ39 207 67 VREFCA VSS24(P) 107
153 206 M_DATA_B38 DIMM_DQ_VREF_B 1 110
M_DQM_B4 DQS12- DQ38 M_DATA_B37 VREFDQ VSS25(P)
203 DQS13 DQ37 201 VSS26(P) 113
204 200 M_DATA_B36 117 116
M_DQM_B5 DQS13- DQ36 M_DATA_B35 SA0 VSS27(P)
212 DQS14 DQ35 88 237 SA1 VSS28(P) 119
213 87 M_DATA_B34 121
C M_DQM_B6 221
222
DQS14-
DQS15
DQ34
DQ33 82
81
M_DATA_B33
M_DATA_B32 50
VSS29(P)
VSS30(P) 124
127
C
DQS15- DQ32 5 M_SCKE_B0 CKE0 VSS31(P)
M_DQM_B7 230 156 M_DATA_B31 169 130
DQS16 DQ31 5 M_SCKE_B1 CKE1 VSS32(P)
231 155 M_DATA_B30 133
DQS16- DQ30 M_DATA_B29 VSS33(P)
161 DQS17 DQ29 150 5 M_SBS_B0 71 BA0 VSS34(P) 136
162 149 M_DATA_B28 190 139
DQS17- DQ28 5 M_SBS_B1 BA1 VSS35(P)
37 M_DATA_B27 142
DQ27 M_DATA_B26 VSS36(P)
39 CB0 DQ26 36 5,8 DDR3_DRAMRST_N 168 RESET VSS37(P) 145 V_SM
40 31 M_DATA_B25 73 148
CB1 DQ25 5 M_WE_B_N WE- VSS38(P)
45 30 M_DATA_B24 192 151
CB2 DQ24 5 M_RAS_B_N RAS- VSS39(P)
M_DATA_B23
46 CB3 DQ23 147
M_DATA_B22
5 M_CAS_B_N 74 CAS- VSS40(P) 154 12:12
158 CB4 DQ22 146 5 M_SCS_B_N0 193 S-0 VSS41(P) 157 R63
159 CB5 DQ21 141 M_DATA_B21
5 M_SCS_B_N1 76 S-1 VSS42(P) 160 1K 1% 0402 Refer DG P71 For Details
164 140 M_DATA_B20 163
CB6 DQ20 M_DATA_B19 VSS43(P)
165 CB7 DQ19 28 5 M_ODT_B0 195 ODT0 VSS44(P) 166 DIMM_DQ_VREF_B
27 M_DATA_B18 77 199 DIMM_DQ_VREF_B 7
DQ18 5 M_ODT_B1 ODT1 VSS45(P)
79 22 M_DATA_B17 202
RSVD DQ17 VSS46(P)
1
M_DATA_B16
*
1
238 21 205 C19
8,12,17,20,21,22,26
8,12,17,20,21,22,26
SMB_DATA_MAIN
SMB_CLK_MAIN 118
SDA
SCL
DQ16
DQ15 138 M_DATA_B15
M_DATA_B14
VSS47(P)
VSS48(P) 208 * C20
0.1UF 16V Y5V 0402
R64
1K 1% 0402 0.1UF 16V Y5V 0402
137 211
2
DQ14 VSS49(P)
2
M_MAA_B0 188 132 M_DATA_B13 214
M_MAA_B1 A0 DQ13 M_DATA_B12 VSS50(P)
181 A1 DQ12 131 VSS51(P) 217
M_MAA_B2 61 19 M_DATA_B11 64 220
A2 DQ11 5 CK_M_DDR1_B_DN CK-1 VSS52(P)
M_MAA_B3 180 18 M_DATA_B10 63 223
A3 DQ10 5 CK_M_DDR1_B_DP CK1 VSS53(P)
M_MAA_B4 59 13 M_DATA_B9 185 226
A4 DQ9 5 CK_M_DDR0_B_DN CK-0 VSS54(P)
M_MAA_B5 58 12 M_DATA_B8 184 229
A5 DQ8 5 CK_M_DDR0_B_DP CK0 VSS55(P)
M_MAA_B6 178 129 M_DATA_B7 232
56 A7 DQ6 128 VSS57(P) 235
M_MAA_B8 177 123 M_DATA_B5 239
B M_MAA_B10
M_MAA_B11
175
70
55
A9
A10
DQ4
DQ3
122
10
9
M_DATA_B3
M_DATA_B2
48
49
FREE1
VSS59(P) 89
120
V_SM B
M_MAA_B12 A11 DQ2 M_DATA_B1 FREE2 VTT
174 A12 DQ1 4 187 FREE3 VTT 240 V_SM_VTT
M_MAA_B13 196 3 M_DATA_B0 198
M_MAA_B14 A13 DQ0 FREE4 R65
172 A14 NC/PAR_IN 68
M_MAA_B15 171 53 DDR3-240 PIN-R 1K 1% 0402
A15 NC/ERR_OUT <PCB Footprint>
5 M_SBS_B2 52 A16/BA2 NC/TEST4 167
BLACK DIMM_CA_VREF_B
DDR3-240 PIN-R
1
<PCB Footprint>
* C21
0.1UF 16V Y5V 0402 /NI
R66
1K 1% 0402 * C22
0.1UF 16V Y5V 0402
2
A A

document will be subject to the DDR2 DIMMB1/B2

IH55A-MHS Sheet 9 of 38
6.4
5it 3 2 1
5 4 3 2 1
PCH1-2
PCH1-1 P_AD[31..0] 22 BIOSTAR-D VER:1.0
CK_PCH_33M_FB
BIOSTAR-D VER:1.0 4 DMI_MT_IR_0_DN DMI_MT_IR_0_DN A19 AW25
DMI0RXN USBP0N USB_D0- 29
AP6 AT9 P_AD0 4 DMI_MT_IR_0_DP DMI_MT_IR_0_DP B18 AY25 USB_D0+ 29
1
22 P_PAR PAR AD0 DMI0RXP USBP0P
AT6 AP11 P_AD1 DMI_IT_MR_0_DN J22 BA23
D 14 CK_PCH_33M_FB
22 P_DEVSEL_N
AL11
AH10
DEVSEL#
CLKIN_PCILOOPBACK
AD1
AD2 AU6
AY10
P_AD2
P_AD3
4
4
4
DMI_IT_MR_0_DN
DMI_IT_MR_0_DP
DMI_MT_IR_1_DN
DMI_IT_MR_0_DP
DMI_MT_IR_1_DN
H22
B20
DMI0TXN
DMI0TXP
USBP1N
USBP1P AY24
AW23
USB_D1-
USB_D1+
29
29 D
31 P_PCIRST_PCH_N PCIRST# AD3 DMI1RXN USBP2N USB_D2- 29
AP7 AP9 P_AD4 4 DMI_MT_IR_1_DP DMI_MT_IR_1_DP C19 AY22 USB_D2+ 29
22 P_IRDY_N IRDY# AD4 P_AD5 DMI_IT_MR_1_DN DMI1RXP USBP2P
20,22 P_PME_N AH11 PME# AD5 AV8 4 DMI_IT_MR_1_DN G22 DMI1TXN USBP3N AR22 USB_D3- 29
AV6 AR9 P_AD6 4 DMI_IT_MR_1_DP DMI_IT_MR_1_DP F22 AP22 USB_D3+ 29
22 P_SERR_N SERR# AD6 DMI1TXP USBP3P
AN8 AV7 P_AD7 4 DMI_MT_IR_2_DN DMI_MT_IR_2_DN E20 AV21
22 P_STOP_N STOP# AD7 P_AD8 DMI_MT_IR_2_DP DMI2RXN USBP4N
22 P_PLOCK_N AK12 PLOCK# AD8 AW9 4 DMI_MT_IR_2_DP D20 DMI2RXP USBP4P AV22
AL6 AR3 P_AD9 4 DMI_IT_MR_2_DN DMI_IT_MR_2_DN H24 AY20
22 P_TRDY_N TRDY# AD9 DMI2TXN USBP5N
AT4 AW7 P_AD10 4 DMI_IT_MR_2_DP DMI_IT_MR_2_DP G24 AW21
22 P_PERR_N PERR# AD10 P_AD11 DMI_MT_IR_3_DN DMI2TXP USBP5P
22 P_FRAME_N AL7 FRAME# AD11 AR8
P_AD12
4 DMI_MT_IR_3_DN
DMI_MT_IR_3_DP
G18 DMI3RXN DMI USB USBP6N AK20 H55: USB PORT 6,7
AU3 4 DMI_MT_IR_3_DP H18 AL20
PCI AD12
AD13 AP2
AU1
P_AD13
P_AD14
4
4
DMI_IT_MR_3_DN
DMI_IT_MR_3_DP
DMI_IT_MR_3_DN
DMI_IT_MR_3_DP
L24
K24
DMI3RXP
DMI3TXN
USBP6P
USBP7N AV20
AW19
DISABLE
AD14 P_AD15 DMI3TXP USBP7P
AK11 GNT0# AD15 AN3 D21 DMI_IRCOMP USBP8N BA19 USB_D8- 29
22 P_GNT_N0 P_AD16 R67 49.9 1% 0402
22 P_GNT_N1 P_GNT_N2
AK6 GNT0#/GPIO51 AD16 AM2
P_AD17
W/S=4/8 mils, V_1P05_FILTER 100M_DMI_PCH_DN
C21 DMI_ZCOMP USBP8P AY18 USB_D8+ 29
BA9 GNT0#/GPIO53 AD17 AM11 USBP9N AM20 USB_D9- 29
P_GNT_N3 AM3 GNT0#/GPIO55 AD18 AM4 P_AD18 50 OHM 15% 17 100M_DMI_PCH_DN H20 CLKIN_DMI_N USBP9P AN20 USB_D9+ 29
AY8 P_AD19 TP /NI G20 AV17
AD19
AL10 P_AD20 length=0.5''max 17 100M_DMI_PCH_DP 100M_DMI_PCH_DP CLKIN_DMI_P USBP10N
AV18
USB_D10- 29
AD20 USBP10P USB_D10+ 29
AT5 P_AD21 D15 AR20
AD21 21 HSI1_DN PERN1 USBP11N USB_D11- 29
AP4 AL2 P_AD22 TP /NI C16 AT20
22 P_REQ_N0 REQ0# AD22 21 HSI1_DP PERP1 USBP11P USB_D11+ 29
AW5 AT2 P_AD23 PCI-E X1 Slot 21 HSO1_C_DN C35 0.1UF 16V X7R 0402 D18 AK18
22 P_REQ_N1 REQ1#/GPIO50 AD23 PETN1 USBP12N
P_REQ_N2 AY4 AL4 P_AD24 21 HSO1_C_DP C36 0.1UF 16V X7R 0402 D17 AL18
P_REQ_N3 REQ2#/GPIO52 AD24 P_AD25 PETP1 USBP12P
AH8 REQ3#/GPIO54 AD25 AV10 B17 PERN2 USBP13N AY17
AL9 P_AD26 A16 BA16
AD26 P_AD27 PERP2 USBP13P
AD27 AN7 H16 PETN2
AK7 P_AD28 G16 AT31 USB_OC0_R_N
AD28 P_AD29 PETP2 OC0#/GPIO59 USB_OC1_R_N
22 P_INTA_N AT8 PIRQA# AD29 AN6 B15 PERN3 OC1#/GPIO40 AT30
AR4 AH12 P_AD30 C14 AK28 USB_OC2_R_N
22 P_INTB_N PIRQB# AD30 P_AD31 PERP3 OC2#/GPIO41 USB_OC3_R_N
AT11 AN11 H14 AP30
C 22
22
P_INTC_N
P_INTD_N P_INTE_N
BA5
AU8
PIRQC#
PIRQD#
AD31
AV3 P_C/BE_N0
G14
D14
PETN3
PETP3
OC3#/GPIO42
OC4#/GPIO43 AP31
AL28
USB_OC4_R_N
USB_OC5_R_N
C
P_INTF_N PIRQE#/GPIO2 C/BE0# P_C/BE_N1 PERN4 OC5#/GPIO09 USB_OC6_R_N
AH7 PIRQF#/GPIO3 C/BE1# AY6 D13 PERP4 OC6#/GPIO10 AL30
P_INTG_N AP12 AP5 P_C/BE_N2 K14 AM30 USB_OC7_R_N
P_INTH_N AW4
PIRQG#/GPIO4
PIRQH#/GPIO5
C/BE2#
C/BE3# AW10 P_C/BE_N3 L14
PETN4
PETP4
PCIe OC7#/GPIO14
25 IDE_RXN C12 PERN5 USBRBIAS# AY15 USBRBIAS_PCH R68 22.6 1% 0402

25 IDE_RXP B13 PERP5 USBRBIAS AV15
1/10 VT6415 C43 0.1UF 16V X7R 0402 H12
IBEXPEAK-H55 25 IDE_TXN C44 0.1UF 16V X7R 0402 G12 PETN5
PETP5 CLKIN_DOT_96N AM22 CK_96M_DREF_DN 17
25 IDE_TXP
26 GBEA_RXN D8 PERN6 CLKIN_DOT_97P AL22 CK_96M_DREF_DP 17
P_C/BE_N[3..0] 22 26 GBEA_RXP C9 PERP6
RTL8111DL LC1 0.1UF 16V X7R 0402 G11
26 GBEA_TXN PETN6
1
LC2 0.1UF 16V X7R 0402 H11
26 GBEA_TXP PETP6
A12 PERN7
B11 CK_96M_DREF_DN CK_96M_DREF_DP
PERP7
D11 PETN7
H55: PCIE PORT 7,8 D10 PETP7 W/S=4/8 mils,length=0.5''max
C7 PERN8
DISABLE B8
K12
PERP8
PETN8
Refer To DG P.431
J12 PETP8
VCC3_3 2/10
VCC3_3
IBEXPEAK-H55
RN1 RN2 2.2K 8P4R 0402
P_INTC_N
P_INTA_N
*1 2
P_REQ_N3
P_REQ_N1
*1 2
P_INTD_N 3 4 P_REQ_N2 3 4
P_INTB_N 5 6 P_REQ_N0 5 6
7 8 7 8
B 8.2K 8P4R 0402 VCC3_3 B
P_INTF_N R70 8.2K 0402 RN4 2.2K 8P4R 0402
RN11
22 P_TRDY_N *1 2
+3V3_DUAL
22 P_DEVSEL_N 3 4
P_INTE_N
*1 2 22 P_FRAME_N 5 6 RN5
Over Current Pin Default Usage
11 HACH1 3 4 22 P_IRDY_N 7 8 Pin Default Port Mapping
P_INTG_N
P_INTH_N 5 6
USB_OC4_R_N
USB_OC0_R_N
*1 2
OC0# Port 0, Port 1
7 8 USB_OC6_R_N 3 4
8.2K 8P4R 0402 USB_OC3_R_N 5 6 OC1# Port 2, Port 3
7 8
OC2# Port 4, Port 5
RN12 8.2K 8P4R 0402
OC3# Port 6, Port 7
11 HACH0 *1 2 OC4# Port 8, Port 9
11 HACH3 3 4 RN6
11 HACH2 5 6 OC5# Port 10, Port 11
7 8
STRAP:Boot BIOSselect
USB_OC1_R_N
USB_OC7_R_N
*1 2 OC6# Port 12, Port 13
8.2K 8P4R 0402 USB_OC5_R_N 3 4
P_GNT_N0 USB_OC2_R_N 5 6 OC7# Not Used
R71 1K 0402 /NI
VCC3_3 P_GNT_N1 7 8
Change @V0.62 R73 1K 0402 /NI GNT1 GNT0
8.2K 8P4R 0402
RN3 0 0
22 P_SERR_N *1 2
P_GNT_N2
P_GNT_N3
R75
R76
1K 0402 /NI
4.7K 0402 /NI 0 1
22 P_PERR_N 3 4
22 P_PLOCK_N 5 6
22 P_STOP_N 7 8 Refer DG.Page448 1 0
2.2K 8P4R 0402 1 1
A A

document will be subject to the PCH PCI/USB/DMI/PCIE
IH55A-MHS 6.4
5it 3 2 1
5 4 3 2 1
BOARDID TABLE: CRB STYLE

D PCH1-3 W/S/S1=4.5/7.5/15 mils@90OHM D
BIOSTAR-D VER:1.0
W41 SATA_RXN0
SATA0RXN SATA_RXP0
AK35 TP18 SATA0RXP V40
AN36 U38 SATA_TXN0
TP19 SATA0TXN SATA_TXP0
AU39 TP20 SATA0TXP V38
Y38 SATA_RXN1
SATA1RXN SATA_RXP1
12,31,37 PWRGD_3V AL33 MEPWROK SATA1RXP Y37
AB36 SATA_TXN1
SATA1TXN SATA_TXP1
SATA1TXP AB35
AD36 SATA_RXN2
SATA2RXN SATA_RXP2
SATA2RXP AD35
BA12 AB31 SATA_TXN2
PWM0 SATA2TXN SATA_TXP2
AR12 PWM1 FAN SATA SATA2TXP AB32
SATA_RXN3
AW12 PWM2 SATA3RXN AC41
AY13 AC39 SATA_RXP3
PWM3 SATA3RXP SATA_TXN3
10 HACH0
AW11 TACH0/GPIO17 SATA3TXN AB37
SATA_TXP3
if use PCH PWM controller, 10 HACH1
AL14 TACH1/GPIO1 SATA3TXP AB38
AV11 TACH2/GPIO6 SATA4RXN AF41
10 HACH2
SST should connect to sensor(dual sensor) 10 HACH3
AY11 TACH3/GPIO7 SATA4RXP AE40
AD38
Refer To DG P.285 AN31
SATA4TXN
AE38
31 SST_CTL SST SATA4TXP
AF35 CK_SATA_CLK_DNCK_SATA_CLK_DP
SATA5RXN
SATA5RXP AF34
AD33 W/S=4/8 mils,length=0.5''max
1
SATA5TXN
SATA5TXP AD32
PCH_CONFIG AN41 Y34 CK_SATA_PCH_DN
VCC3_3 SCLOCK/GPIO22 CLKIN_SATA_N/CKSSCD* CK_SATA_CLK_DN 17
GP38_MFG_MODE_N AM38 Y35 CK_SATA_PCH_DP
SLOAD/GPIO38 CLKIN_SATA_P/CKSSCD_P CK_SATA_CLK_DP 17
BOARD_ID_GP39 AL39
C GPIO48 AG38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48 SATALED# AN39
T39
SATA_LED SATA_LED 30 VCC3_3
C
RN13 8.2K 8P4R 0402 SATAICOMPI
1 2 PCH_CONFIG T41 SATARBIAS_PCH R88 37.4 1% 0402 V_1P05_FILTER
GP38_MFG_MODE_N SATAICOMPO
3 4
5 6 AJ37 SATA0GP
SATA0GP/GPIO21 SATA1GP
7 8 AF15 NC_AF15 SATA1GP/GPIO19 AH38
Refer To DG P.413 For Details AK39 SATA2GP
SATA2GP/GPIO36 BOARD_ID_GP37
SATA3GP/GPIO37 AR38
AH39 H_SKTOCC_N R79 R80
SATA4GP/GPIO16 SATA5GP H_SKTOCC_N 4,12,37
Change @V0.62 SATA5GP/GPIO49 AG40 10K 0402 10K 0402 /NI
TP8 V34
BOARD_ID_GP37
AG37 A20GATE
A20GATE A20GATE 31
AR39 INIT3_3VB
INIT3_3V# KBRST_N BOARD_ID_GP39
RCIN# AM40
SER_IRQ KBRST_N 31
CPU SERIRQ AL40
H_THERMTRIP_N SER_IRQ 12,31
THRMTRIP# C38 H_THERMTRIP_N 4
HOST D36 H_PECI H_PECI 4,31
PECI H_PM_SYNC_0 R83 R84
PMSYNCH C37 H_PM_SYNC_0 4
10K 0402 /NI 10K 0402
3/10
IBEXPEAK-H55 [email protected] 20100419
B VCC3_3 B
GPIO48 R89 10K 0402
RN7 10K 8P4R 0402

SATA5GP
SATA1GP
*1 2
SATA1 SATA CONNECTOR-R SATA3 SATA0GP 3 4
0.01UF 25V X7R 0402 0.01UF 25V X7R 0402 SATA2GP 5 6
0.01UF 25V X7R 0402 0.01UF 25V X7R 0402 7 8
G3 7 G3 7
6 SSATA_RXP0 C52 1 2 SATA_RXP0 6 SSATA_RXP2 C56 1 2 SATA_RXP2
RX+ SSATA_RXN0 C54 SATA_RXN0 RX+ SSATA_RXN2C57 SATA_RXN2
H2 H2 RX- 5 1 2 H2 H2 RX- 5 1 2
G2 4 G2 4
H1 3 SSATA_TXN0 C58 1 2 SATA_TXN0 H1 3 SSATA_TXN2 C60 1 2 SATA_TXN2
H1 TX- SSATA_TXP0 C61 SATA_TXP0 H1 TX- SSATA_TXP2 C63 SATA_TXP2
TX+ 2 1 2 TX+ 2 1 2
1 0.01UF 25V X7R 0402 1 0.01UF 25V X7R 0402 INIT3_3VB R95 1K 0402 /NI
G1 0.01UF 25V X7R 0402 G1 0.01UF 25V X7R 0402
KEY KEY
SATA CONNECTOR-R
CONFIGURABLE CPU OUTPUT STRONGER IF LOW
SATA2 SATA CONNECTOR-R
0.01UF 25V X7R 0402 0.01UF 25V X7R 0402
7 0.01UF 25V X7R 0402 7 0.01UF 25V X7R 0402
G3 SSATA_RXP1C53 SATA_RXP1 G3 SSATA_RXP3C64 SATA_RXP3
RX+ 6 1 2 RX+ 6 1 2
SSATA_RXN1C55 SATA_RXN1 SSATA_RXN3C67 SATA_RXN3
A H2 H2 RX-
G2
5
4
1 2 H2 H2 RX-
G2
5
4
1 2
A
H1 H1 TX- 3 SSATA_TXN1 C59
SSATA_TXP1 C62
1 2 SATA_TXN1
SATA_TXP1
H1 H1 TX- 3 SSATA_TXN3 C70
SSATA_TXP3 C73
1 2 SATA_TXN3
SATA_TXP3
TX+ 2 1 2 TX+ 2 1 2
1 0.01UF 25V X7R 0402 1 0.01UF 25V X7R 0402
G1 G1
0.01UF 25V X7R 0402 0.01UF 25V X7R 0402 ◇ Any unauthorized use, reproduction,
KEY KEY
SATA4 SATA CONNECTOR-R
document will be subject to the PCH SATA/CPU HOST
IH55A-MHS 6.4
5it 3 2 1
5 4 3 2 1
VCC3_3 +3V3_DUAL
GPIO73 LOW TO ENABLE CLK REQUEST
R163 10K 0402 /NI IDE_CLK_RQ_PD R104 1K 0402 NAND VCCQ PWR WELL SEL
Internal P H. +3V3_DUAL +3V3_DUAL
R97 R168 10K 0402 /NI LAN_CLK_RQ_PD R107 1K 0402 POWERED BY CORE WHEN SAMPLED LOW
10K 0402 /NI
PCH1-4 R169 10K 0402 /NI PEX1_CLK_RQ_PD R109 1K 0402
EWP WHEN SAMPLED HIGH
BIOSTAR-D VER:1.0 AUD_LINK_SDO_RR99 1K 0402 /NI PULL UP FOR X4 PCIE
AP14 AK41 R98 R170 10K 0402 /NI PEX16_CLK_RQ_PD R115 1K 0402
AT12
LDRQ1#/GPIO23 BMBUSY#/GPIO0
AK30 GPIO8
CHIP_THERM_ 31
10K 0402 AUD_LINK_SYNC_R
R101 1K 0402 /NI UN-PULL UP FOR X1 PCIE
31 LAD0 FWH0/LAD0 GPIO8 GPIO8 30
AK16 BA35 SLP_LAN#
31 LAD1 FWH1/LAD1 SLP_LAN#/GPIO29 SUS_PWR_ACK
31 LAD2
AL16 FWH2/LAD2 LPC SUS_PWR_ACK/GPIO30 AT37
LAN_DISABLE_N R157 10K 0402 /NI
OD PLL VR SUPPLY SEL
AM16 AU34
31 LAD3 FWH3/LAD3 LAN_PHY_PWR_CTRL/GPIO12 IO_PME_N +3V3_DUAL 1.8V SUPPLY WHEN SAMPLED LOW
AL12
LDRQ0# GPIO13
AR16 IO_PME_N 31 Change @V6.3 20100512
31 L_DRQ_N PCH_GP15
AR14 AY36 1.5V SUPPLY WHEN SAMPLED HIGH
D 31 L_FRAME_N
AUD_LINK_BCLK_R
AUD_LINK_RST_R_N
AW14
FWH4/LFRAME#
HDA_BCLK
GPIO15
PCIECLKRQ1*/GPIO18
PCIECLKRQ2*/GPIO20
AM39
AP38
PCH_GP18_PU
LAN_CLK_RQ_PD
WAKE_N R102 1K 0402 PCH_GP15 R103 10K 0402 /NI
D
AV14
HDA_RST# MEM_LED/GPIO24
AR34
PCH_GP25_PU
GP15:TLS STRAP,DISABLE WHEN LOW
AV13 AP33
HDA_SDIN0 PCIECLKRQ3*/GPIO25 PCH_GP26_PH RN16 10K 8P4R 0402 GP15 DON'T PH (DG P449.)
AP18 AW37
AUD_LINK_SDI2 HDA_SDIN1 PCIECLKRQ4*/GPIO26 LED_DRIVE_GP27 LED_DRIVE_GP27
AU13 AP37 1 2
27 AUD_LINK_SDI2 HDA_SDIN2 GPIO27 PCH_PU_GP28 PCH_GP31_PU SUS_PWR_ACK R106 100K 0402
AN16 AV40 3 4
AUD_LINK_SDO_R HDA_SDIN3 GPIO28 PCH_GP31_PU
AP16 AP40 5 6
AUD_LINK_SYNC_R HDA_SDO ACPRESENT/GPIO31
AU15 AJ40 FP_AUD_DETECT 28 7 8
HDA_SYNC GPIO32 SOP_ENABLE_GP33
AT16
GPIO33 PCH_PU_GP34
AUDIO STP_PCI#/GPIO34
AT40
GPIO35 R131 10K 0402 SLP_LAN# R108 10K 0402 /NI
GP27:OD PLL VR ENABLE
AR41 VCC3_3
SATACLKREQ#/GPIO35 PCH_GP44_PU LOW TO DISABLE PLL VR.
AW38
PCIECLKRQ5*/GPIO44 PCH_GP45_PU SML0_DATA R121 2.2K 0402 R118 10K 0402 /NI GPIO8 R119 1K 0402 /NI
AV36
RN28 33 8P4R 0402 PCIECLKRQ6*/GPIO45 PCH_GP46_PU SML0_CLK R124 2.2K 0402
AP36
AUD_LINK_SDO_R PCIECLKRQ7*/GPIO46 PEX16_CLK_RQ_PD
27 AUD_LINK_SDO
1 2
AUD_LINK_BCLK_R PEG_A_CLKRQ#/GPIO47
AV39
PEX1_CLK_RQ_PD PCH_RI_PU
GPIO47 LOW TO ENABLE CLK REQUEST
3 4 AW35 1 2
27 AUD_LINK_BCLK
5 6 AUD_LINK_RST_R_N PEG_B_CLKRQ#/GPIO56
AL32 TPM_PHY_PRESENT GPIO72 3 4
Change in V0.61 INTEGRATED CLOCK CHIP ENABLE
27 AUD_LINK_RST_N AUD_LINK_SYNC_R GPIO57 IDE_CLK_RQ_PD SML1_ALERT#
7 8 PCIECLKRQ0*/GPIO73
AN35 5 6
27 AUD_LINK_SYNC H_PWRGD ENABLE WHEN SAMPLED LOW
B38 7 8 RN38
PROCPWRGD H_PWRGD 4 10K 8P4R 0402
1 H_PWRGD Change @V0.62
Change @V0.62 1 RN8
AH35 PCH_SYSPWROK SML0_ALERT# 1 2 10K 8P4R 0402 VCC3_3
SLP_DSW# PCH_SYSPWROK SML1CLK_PCH
AT38 PCH_SYSPWROK 17,32 3 4
SYS_PWROK SW_ON_N
AK36 SW_ON_N 31 5 6
PWRBTN# PCH_RI_PU SML1DATA_PCH
MISC RI#
AT33 ICH_RIJ 24 7 8
R125 10K 0402
DANBURY TECHOLOGY ENABLE
AK31 1 SUS_STAT_
SUS_STAT#/GPIO61 PCH_GP26_PH R142 10K 0402 13 NVR_ALE ENABLE WHEN SAMPLED HIGH
AH31 1 SUSCLK
SUSCLK/GPIO62 FP_RST_N
For Non Intel LAN SYS_RESET#
AL38
PLTRST_N
FP_RST_N 4,30
R127 10K 0402 /NI
Refer To DG P.442 For Details PLTRST#
AV34
WAKE_N PLTRST_N 4,25,26,31 RSM_RST_N R129 10K 0402 /NI 13 NVR_CLE DMI TERMINATION VOLTAGE
AR33 WAKE_N 20,21,26
WAKE# PCH_INTREDER_HDR_N R179 1M 0402 DC COUP:TX/RX TO VCC IS SAMPLED HIGH
AN24 VRTC
R128 LAN_RST_ INTRUDER# PWRGD_3V
AY31 AM24 PWRGD_3V 11,31,37
PCH_RTCX1 LAN_RST# PWROK RSM_RST_N
AW30 AL24 RSM_RST_N 31
8.2K 0402 PCH_RTCX2 RTCX1 RSMRST# PCH_INTVRMEN
BA30 AW31
RTCRST_PULLUP RTCX2 INTVRMEN SPKR
AK24 AJ38
R178 SRTCRSTE_PULLUP RTCRST# SPKR SPKR 30 VCC3_3
AP28
C VRTC
20K 1% 0402
SMB_ALERT_
SMB_CLK_MAIN
SMB_DATA_MAIN
AL31
AV32
SRTCRST#
SMBALERT#/GPIO11
SMBCLK
SLP_S3#
SLP_S4#
AV35
AP35
SLP_S3_N
SLP_S4_N SLP_S3_N
SLP_S4_N
31,34,35
17,31,35
RN14 10K 8P4R 0402 C
AM31 AU36 1 2
SML0_ALERT# SMBDATA SLP_S5#/GPIO63 S_SLP_M# 11,31 SER_IRQ
BA33 AT36 3 4
SML0_CLK SML0ALERT#/GPIO60 SLP_M# S_SLP_M# 35 TPM_PHY_PRESENT VRTC
AW33 5 6
SML0_DATA SML0CLK
AT34 1S_SLP_M_ R137 1.1K 1% 0402 V_SM 7 8
SML1_ALERT# SML0DATA GPIO72
AY32 AY34
SML1CLK_PCH SML1ALERT#/GPIO74 GPIO72 H_DRAMPWRGD
AV31 AW32 Change @V0.62
SML1DATA_PCH SML1CLK/GPIO58 DRAMPWROK H_DRAMPWRGD 4 +3V3_DUAL
AR31
SML1DATA/GPIO75 R141 3K 1% 0402 PCH_INTVRMEN R143 390K 1% 0402 INTEGRATED 1.05V SUS VRM ENABLE
SPI_MOSI T34
SPI_MOSI JTAG_RST#
AL35 PCH_TRST PCH_GP25_PU R152 10K 0402 SUS VRM ENABLED WHEN SAMPLED HIGH
SPI_MISO R201 SPI_MISO_R V30 AK33 PCH_JTAG_TCK_FILTER PCH_GP18_PU R150 10K 0402 R146
10 0402 SPI_CS0_N SPI_MISO JTAG_TCK PCH_JTAG_TDI
V32 AL36
SPI_CLK SPI_CS0# SPI JTAG_TDI PCH_JTAG_TDO SMB_ALERT_ R144 10K 0402
1K 0402 /NI
V31 AN34
SPI_CLK JTAG_TDO PCH_JTAG_TMS PCH_GP44_PU R147 10K 0402
T32 AL34
SPI_CS1# JTAG_TMS R145 PCH_GP45_PU R155 10K 0402
51 0402 PCH_GP46_PU R156 10K 0402
IBEXPEAK-H55 Change @V6.3 20100512
SML1CLK_PCH PCH_PU_GP28 R159 10K 0402 VCC3_3
31 SML1CLK_PCH
SML1DATA_PCH
31 SML1DATA_PCH
R148
SMB_CLK_MAIN 1K 0402 /NI
8,9,17,20,21,22,26 SMB_CLK_MAIN
SMB_DATA_MAIN
GP28 IS MUXED WITH SPI_CS2B IN B0 C76
8,9,17,20,21,22,26 SMB_DATA_MAIN
PCH_PU_GP34 R153 10K 0402 SPKR R149 10K 0402 1 2
*
V_3P3_EPW AUD_PC_BEEP 27
Y1
32.768KHZ 12.5PF 20PPM 0.1UF 16V X7R 0402
3
1
V_3P3_EPW
PCH_RTCX2 1 2 PCH_RTCX1
R154
100 0402
* C77
5 0.01UF 25V X7R 0402
2
4
C78
8
6
4
2
1UF 16V 0805 Y5V
B R161 10M 0402
RN29
1K 8P4R 0402 B
7
5
3
1
1
U1 +3V3_DUAL
C79 C80 8 1 SPI_CS0_N SPI_DIP_HOLD
SPI_DIP_HOLD VDD CE# SPI_MISO
15P 50V NPO 0402 15P 50V NPO 0402 7 2 Change @V0.62
2
SPI_CLK HOLD# SO ICH_WPJ

6 3
SPI_MOSI SCK WP#
5 4
SI Vss
SPI SOCKET 8PIN
C
Q1 B 10K 0402 R160 VCC3_3
2N3904 SOT23 SPI_WP_N 31 SOP_ENABLE_GP33
R164 10K 0402 /NI R165 1K 0402 /NI
E
+3V3_DUAL
Pull Down to diable ME

+3V3_DUAL +3V3_DUAL
R162
1K 0402
3VSB_EUP COMS CLR JUMPER
2
4
6
8
H_SKTOCC_N VRTC_DET VRTC

H_SKTOCC_N 4,11,37
RN34 R171 1-2 NORMAL
680 8P4R 0402 20K 0402
2-3 CLR CMOS
1
3
5
7
R166 BAT54C SOT23 BAT54C SOT23

10K 0402 /NI
K K
PCH_JTAG_TDO JCMOS1
KA KA R172 20K 1% 0402 1
PCH_JTAG_TDI 1 CLR_G
3
RTCRST_PULLUP 3
A A 2
PCH_JTAG_TMS 2 R173
1
Q2 Q3 HEADER 1X3 4.7K 0402
PCH_TRST C82
1UF 10V Y5V 0402
A A
2
1
R167 C81
2
4
6
8
RN35 R177 1K 1% 0402 1UF 10V Y5V 0402

2
10K 0402
330 8P4R 0402
1
3
5
7
BAT1
BATTERY HOLDER-1
Updated @V0.62 duplication, or disclosure of this Title
2

PCH AUDIO/SPI/MISC
penalties.◆ C
IH55A-MHS 6.4
w5 3 2 1
5 4 3 2 1
3.3V TOLERANT
Hot Plug Detect
PCH1-7 PCH1-6 NEAR PCH
D BIOSTAR-D VER:1.0
K30
19 DDSP_B_HPD
1 2 J1
BIOSTAR-D VER:1.0
AD4 R180 33 0402
D
FDI_RXN0 FDI_TX_0_DN 4 DDPB_HPD CRT_HSYNC VGA_HSYNC 18
J30 3 4 J3 AD3 R181 33 0402
FDI_RXP0 FDI_TX_0_DP 4 DDPC_HPD CRT_VSYNC VGA_VSYNC 18
FDI_RXN1 H30 FDI_TX_1_DN 4 5 6 H2 DDPD_HPD
FDI_RXP1 G30 FDI_TX_1_DP 4 7 8 CRT_RED AC1
VGA_RED 18
FDI_RXN2 D31
D32
FDI_TX_2_DN 4
RN41
M1
L2
DDPB_AUXP RGBCRT_GREEN AC3
AB2
VGA_GREEN 18
FDI_RXP2 FDI_TX_2_DP 4 DDPB_AUXN CRT_BLUE VGA_BLUE 18
F31 1K 8P4R 0402 L9
FDI_RXN3 FDI_TX_3_DN 4 DDPC_AUXP
FDI_RXP3 G31 FDI_TX_3_DP 4 Change @V0.62 L10 DDPC_AUXN CRT_IRTN AB4
FDI_RXN4 K31 FDI_TX_4_DN 4 K4 DDPD_AUXP
FDI_RXP4 J31
C30
FDI_TX_4_DP 4 PORTB:DVI L4 DDPD_AUXN
AG4
FDI_RXN5 FDI_TX_5_DN 4 CRT_DDC_DATA VGA_PCH_DDCSDA 18
FDI_RXP5 B31
A33
FDI_TX_5_DP 4 19 DDSP_B_TX_0_DP
K10
J8
DDPB_0PSDVO CRT_DDC_CLK AG2 VGA_PCH_DDCSCL 18
FDI_RXN6 FDI_TX_6_DN 4 19 DDSP_B_TX_0_DN DDPB_0N
B32 K11 AE2 VGA_DACREFSETR183 1K 1% 0402
FDI_RXP6 FDI_TX_6_DP 4 19 DDSP_B_TX_1_DP DDPB_1P DAC_IREF
FDI_RXN7 C33 FDI_TX_7_DN 4 19 DDSP_B_TX_1_DN
J11 DDPB_1N
FDI_RXP7 B34 FDI_TX_7_DP 4 19 DDSP_B_TX_2_DP
H6 DDPB_2P TP4 P12 L<500mils
19 DDSP_B_TX_2_DN
F6 DDPB_2N TP5 P13
G4 DDPB_3P TP6 T13
19 DDSP_B_TX_3_DP
H4 T12
FDI 19 DDSP_B_TX_3_DN
E3
DDPB_3N
DDPC_0P
TP7
FDI_FSYNC0 E34 F4 DDPC_0N

FDI_FSYNC_0 4
FDI_LSYNC0 C35 FDI_LSYNC_0 4
F2 DDPC_1P
FDI_FSYNC1 E36 G3 DDPC_1N
FDI_FSYNC_1 4
FDI_LSYNC1 D35 B4 DDPC_2P
FDI_LSYNC_1 4
C4 DDPC_2N
D3 DDPC_3P
FDI_INT B36 FDI_INT 4
D2 DDPC_3N
C5 DDPD_0P
B6
C IBEXPEAK-H55 D6
D7
DDPD_0N
DDPD_1P C
DDPD_1N
F8 DDPD_2P
G8 DDPD_2N
F9 VCC3_3
DDPD_3P
G9 DDPD_3N
M3 SDVO_INTP DDPC_CTRLCLK AB10 DDC Control Signal

N4 SDVO_INTN DDPC_CTRLDATA AB11 Enable /Disable
R275 R274
N2 AB7 2.2K 0402 2.2K 0402
Refer To DG 168
SDVO_STALLP DDPD_CTRLCLK
P3 SDVO_STALLN DDPD_CTRLDATA AB9
L6 AB13 DDPB_CTRL_CLK
SDVO_TVCLKINP SDVO_CTRLCLK DDPB_CTRL_DATA DDPB_CTRL_CLK 19
L7 SDVO_TVCLKINNSDVO_CTRLDATA AB12 DDPB_CTRL_DATA 19
IBEXPEAK-H55
PCH1-5
BIOSTAR-D VER:1.0
12 NVR_ALE J34 NV_ALE NV_DQ0/NV_IO0 T33
12 NVR_CLE L35 NV_CLE NV_DQ1/NV_IO1 P35
M32 NV_RB# NV_DQ2/NV_IO2 T31
J36 NV_WR#0_RE# NV_DQ3/NV_IO3 P33
J35 NV_WR#1_RE# NV_DQ4/NV_IO4 M35
M31 NV_WE#_CK0 NV_DQ5/NV_IO5 L33
F38 NV_WE#_CK1 NV_DQ6/NV_IO6 M36
NV_DQ7/NV_IO7 M34
B NV_DQ8/NV_IO8
NV_DQ9/NV_IO9
M30
F36
H33
B
NV_DQ10/NV_IO10
NV_DQ11/NV_IO11 F37
NV_DQ12/NV_IO12 E39
NV_DQ13/NV_IO13 G33
NV_DQ14/NV_IO14 D40
NV_DQ15/NV_IO15 F33
NV_CE#0 H36
NV_CE#1 H35
NV_CE#2 P32
NV_CE#3 E41
NVRAM NV_DQS0 P36
NV_DQS1 F40
L36 R184 33 1% 0402 /NI

NV_RCOMP
IBEXPEAK-H55
A A

document will be subject to the PCH VGA/FDI/DSP/NVRAM
IH55A-MHS 6.4
5it 3 2 1
5 4 3 2 1
D D
133M_CSI_PCH_IN_DN
133M_CSI_PCH_IN_DP Ibex Peak Differential CLK Output
RN30 PCH1-8 Don't Require Series Resistor
1
33 8P4R 0402
8 7 AF6
BIOSTAR-D VER:1.0
Y32
Refer To Design Guide P.106 /431.
10 CK_PCH_33M_FB CLKOUT_PCI0 CLKIN_BCLK_N 133M_CSI_PCH_IN_DN 17
6 5 CLKIN_BCLK_P Y31 133M_CSI_PCH_IN_DP 17
31 PCLK_IO
4 3 AD7 CLKOUT_PCI1
22 PCLK_2
22 PCLK_1
2 1 CLKOUT_BCLK0_N/CLKOUT_PCIE8N L38 CK_H_CPU_DN 4
AF9 CLKOUT_PCI2 CLKOUT_BCLK0_P/CLKOUT_PCIE8P K38
CK_H_CPU_DP 4 133MHZ TO CPU
AD9 T7 1 CLKOUT_PE7N
CLKOUT_PCI3 CLKOUT_PCIE7N CLKOUT_PE7P
Change @V0.62 CLKOUT_PCIE7P T6 1 Updated @V6.3 20100514
1 AD12 CLKOUT_PCI4
CLKOUT_PCI4 H40
CLKOUT_DMI_N CK_PE_100M_MCP_DN 4
CLKOUT_DMI_P J41 CK_PE_100M_MCP_DP 4 100MHZ TO CPU
R282 33 0402 /NI AD10 H37
CLKOUTFLEX0/GPIO64
CLKOUT_DP_N/CLKOUT_BCLK1_N CK_DP_120M_DN 4
AK1 CLKOUTFLEX1/GPIO65
CLKOUT_DP_P/CLKOUT_BCLK1_P H38 CK_DP_120M_DP 4 120MHZ TO CPU
AB6 CLKOUTFLEX2/GPIO66
AL3 CLKOUTFLEX3/GPIO67 FOR PCIE GEN1.1
CLKOUT_PCIE0N V2
100M_IDE_CLKN 25
CLKOUT_PCIE0P W1
100M_IDE_CLKP 25
V_1P05_PCH R187 90.9 1% 0402 AA3 T10 1 CLKOUT_PE0N

XCLK_RCOMP CLKOUT_PCIE1N CLKOUT_PE0P
CLKOUT_PCIE1P T9 1
17 CK_14M_PCH AF7 REFCLK14IN
M6
C CLKOUT_PCIE2N
CLKOUT_PCIE2P M7
GBEA_CLKN
GBEA_CLKP
26
26 C
M9 1 CLKOUT_PE3N
XTAL_25M_PCH_OUT CLKOUT_PCIE3N CLKOUT_PE3P
Y2 XTAL25_OUT CLKOUT_PCIE3P M10 1
XTAL_25M_PCH_IN Y4 P7 1 CLKOUT_PE4N
17 XTAL_25M_PCH_IN XTAL25_IN CLKOUT_PCIE4N
P6 1 CLKOUT_PE4P
CLKOUT_PCIE4P
Y8 1 CLKOUT_PE5N
CLKOUT_PCIE5N CLKOUT_PE5P
CLKOUT_PCIE5P Y9 1
U4 1 CLKOUT_PE6N
CLOCK CLKOUT_PCIE6N
CLKOUT_PCIE6P V4 1 CLKOUT_PE6P Updated @V6.3 20100514
CLKOUT_PEG_A_N Y6
CK_PE_100M_16A_DN 20
CLKOUT_PEG_A_P Y7 CK_PE_100M_16A_DP 20
CLKOUT_PEG_B_N V7 100M_PE_X1SLOT0_N 21
CLKOUT_PEG_B_P V8
100M_PE_X1SLOT0_P 21
IBEXPEAK-H55
FOR PCIE GEN2.0
B B
+3V3_DUAL +3V3_DUAL V_1P8_SFR V_1P1_VTT V_1P1_VTT V_1P05_FILTER V_1P05_FILTER V_1P05_FILTER
1
1
* C116
0.1UF 16V Y5V 0402 /NI * C117
0.1UF 16V Y5V 0402 * C118
1UF 16V 0805 Y5V * C133
0.1UF 16V Y5V 0402 * C134
0.1UF 16V Y5V 0402 * C121
1UF 16V 0805 Y5V * C122
10UF 10V 0805 Y5V * C124
0.1UF 16V Y5V 0402
2
2
XTAL_25M_PCH_OUT
R56 0 0402 /NI XTAL_25M_PCH_IN
VCC3_3 VCC3_3 VCC3_3 VCC3_3 V_1P05_PCH V_1P05_PCH V_1P05_PCH
R188 1M 0402 /NI

1
1
LY1 * C126
0.1UF 16V Y5V 0402 /NI * C127
0.1UF 16V Y5V 0402 * C128
*
0.1UF 16V Y5V 0402 /NI
C129
0.1UF 16V Y5V 0402 * C130
10UF 10V 0805 Y5V * C131
10UF 10V 0805 Y5V * C132
1UF 16V 0805 Y5V
25MHZ 20PF 30PPM /NI Ce=2*CL-(Cs+Ci)
2
2
12
Ci: PIN CAPACITANCE IS 3-6 pF
C11 C30 Cs: trace capacitance is 3 to 10
22P 50V NPO 0402 /NI 22P 50V NPO 0402 /NI
A A

Title
document will be subject to the PCH CLOCKS
IH55A-MHS 6.4
5it 3 2 1
A
B
C
D
BIOSTAR-D VER:1.0
P15 AE18
VCCIO VCCCORE
P16 AD18
VCCIO VCCCORE
N16 AF19
VCCIO VCCCORE
V_1P05_PCH
M16 AE19
V_1P05_FILTER
VCCIO VCCCORE
N18 AF20
VCCIO VCCCORE
M18 AE20
VCCIO VCCCORE
N20 AD20
VCCIO VCCCORE
2 1 M20 U20
*
VCCIO VCCCORE
M22 T20
VCCIO VCCCORE
M24 AF22
VCCIO VCCCORE
V_1P05_PCH
V_1P05_PCH
C109
D24 AE22
VCCIO VCCCORE
C24 U22
VCCIO VCCCORE
B24 T22
5
5it
VCCIO VCCCORE
* * * * D25 AF23
VCCIO VCCCORE
L6
L5
L3
L1
C25 AE23
VCCIO VCCCORE
B25 AD23
1
VCCIO VCCCORE
10UF 10V 0805 Y5V

M26 AA23
VCCIO VCCCORE
L26 Y23
VCCIO VCCCORE
K26 V23
VCCIO VCCCORE
J26 U23
VCCIO VCCCORE
2 1 2 1 H26 T23
*
*
VCCIO VCCCORE
G26 AF24
VCCIO VCCCORE
2 1 2 1 F26 AE24
*
*
INDUCTOR 10UH 0805

INDUCTOR 10UH 0805
VCCIO VCCCORE
C110
C101
N22 AB24
INDUCTOR 1UH 0805 /NI

VCCIO VCCCORE

N24 AA24
VCCIO VCCCORE
C97
C91
V_1P05_FILTER
N26 Y24
VCCIO VCCCORE
P18 V24
VCCIO VCCCORE
T19 T24
VCCIO VCCCORE
P19 AE26
VCCIO VCCCORE
10UF 10V 0805 Y5V

10UF 10V 0805 Y5V
AD26
VCCCORE
AB26
VCCCORE
10UF 10V 0805 Y5V

10UF 10V 0805 Y5V
V26
VCCCORE
U26
VCCCORE
2 1 A23 T26
*
VCCDMI VCCCORE
P26
VCCCORE
C23 E26
V_1P1_VTT
VSS VCCCORE
C98
B22 C26
VSS VCCCORE
P22 A26
VSS VCCCORE
P23 T27
VSS VCCCORE
P27
VCCCORE
Y29 E27
VCCIO VCCCORE
V29 D27
1UF 16V 0805 Y5V

VCCIO VCCCORE
T29 B27
VCCIO VCCCORE
T30 N28
VCCIO VCCCORE
2 1 2 1 Y36 M28
*
*
1
1
1
1
VCCIO VCCCORE
V36 L28
VCCIO VCCCORE
T36 K28
4
VCCIO VCCCORE
C102
C111
T37 J28
VCCIO VCCCORE
R37 H28
VCCIO VCCCORE
R38 G28
V_1P05_FILTER
VCCIO VCCCORE
P38 F28
VCCIO VCCCORE
P39 D28
VCCIO VCCCORE
R40 C28
1UF 16V 0805 Y5V

1UF 16V 0805 Y5V
VCCIO VCCCORE
VCCA_DPLLB
VCCA_DPLLA
VCCA_DPLLB
VCCA_DPLLA
AA27 A28
VCCIO VCCCORE
P29
VCCCLK_PLL_PCH
VCCIPL_PLL_PCH
VCCCORE
VCCIPL_PLL_PCH
VCCCLK_PLL_PCH
P41 E29
VCCSATAPLL VCCCORE
D29
Display PLL analog power

VCCCORE
AT28 B29
VCCIO VCCCORE
A21
VCCAPLLEXP
AE16
VCCME
V_1P05_ME
A37 AF16
VCCFDIPLL VCCME
AB16
V_1P05_ME
VCCME
AA1 AD16
1
VCCACLK VCCME
AN1 Y26
V5REF VCCIO
V15
VCCIO
AW16 U15
V5REF_SUS VCCIO
T15
V_1P05_PCH
V_1P05_PCH
VCCIO
AJ18 AH20
VCCSUSHDA VCCIO
AJ22
VCCIO
AH16 AH22
V_REF5V
VCC3_3 VCCIO
VCC3_3
AH23
VCCIO
VCC3_3
AH18 U19
V_1P05_FILTER
V_REF5V_SUS
VCC3_3 VCCIO
P24
VCCIO
VCCIPL_PLL_PCH
2 1 N38 AA26
*
VCCCLK_PLL_PCH
VCCDMI_PLL_PCH
VCCME3_3 VCCIO
VCCSATA_PLL_PCH
V_1P8_SFR
N40
*
VCCME3_3
FB1
* *
L4
L2
+3V3_DUAL
C333
C2
1
VCCVRM
AH1 C3
VCCME VCCVRM
V_3P3_EPW
AJ2 L40
3
3
VCCME VCCVRM
AH3 L39
BEAD 60 0603 VCCME VCCVRM
AJ4
VCCME
AH4 P30
VCCME VCCPNAND
10UF 10V 0805 Y5V
2 1 2 1 AJ5 M39
*
*
V_1P8_SFR
VCCME VCCPNAND
2 1 AG5 M41
*
VCCME VCCPNAND
AH6
Change @V0.62
C96
C92
VCCME
Reserve for VGA funtion exist

AF8 AE27
VCCME VCC3_3
C106
AF10 AD27
V_1P05_ME
VCCME VCC3_3
AH13 AW1
VCCME VCC3_3_NCTF
AF13 BA3
VCCME VCC3_3_NCTF
2 1 AD13 AV2
*
VCCME VCC3_3
AE15 AY3
VCCME VCC3_3
10UF 10V 0805 Y5V
10UF 10V 0805 Y5V
AD15 AK14
C87
VCCME VCC3_3
VCC3_3
10UF 10V 0805 Y5V
AJ14
VCC3_3
2 1 AF1 AJ16
*
1
VCCADAC VCC3_3
2 1 A9
*
1
VCC3_3
2 1 R2 U40
*
1
VCCADPLLA VCC3_3
C94
C100
T1 AB15
VCCADPLLB VCCME
C107
AA15
VCCME
Y15
VCCME
10UF 10V 0805 Y5V
AA16
VCCME
Y16
1UF 16V 0805 Y5V
VCCME
AA18
VCCME
Y18
0.1UF 16V X7R 0402
1UF 16V 0805 Y5V

V_1P05_ME
VCCME
VCCA_DPLLA
VCCA_DPLLB
Y19
VCCME
VCCSATA_PLL_PCH
VCCDMI_PLL_PCH
V_3P3_DAC_FB_R
VCCDMI_PLL_PCH
penalties.◆
V_3P3_DAC_FB_R
VCCSATA_PLL_PCH
V_3P3_DAC_FB_R
2 1 Y20
*
VCCLAN
Y22
VCCLAN
V20
40 MILS NEAR PCH EDGE
TP11
C108
AV29
VCCSUS3_3
AV25
VCCSUS3_3
2
2
BA26
VCCSUS3_3
K K AW26
VCCSUS3_3
AU26
VCCSUS3_3
KA KA AT26
0.1UF 16V X7R 0402
VCCSUS3_3
AR26
VCCSUS3_3
A A AP26
VCCSUS3_3
AN26
VCC3_3
VCCSUS3_3
AM26
+3V3_DUAL
VCCSUS3_3
Q4
AL26
Q5
+3V3_DUAL
VCCSUS3_3
2 1 AK26
*
VCCSUS3_3
2 1 2 1 AY27
*
*
VCC5
VCCSUS3_3
AV27
VCCSUS3_3
C93
R198
AU27
+5V_DUAL
BAT54C SOT23
C99
VCCSUS3_3
C112
R206
AW39
10 0402
BAT54C SOT23
VCCSUS3_3
AW40
10 0402
VCCSUS3_3
BA40
V_REF5V
Size
VCCSUS3_3_NCTF
Date:
AY40
VCCSUS3_3_NCTF
V_1P1_VTT
V_REF5V_SUS
1UF 16V 0805 Y5V
Custom
B39
V_1P1_VTT
V_CPU_IO
VCCVRM PULL HIGH 1.8V INTERNAL VCCVRM
A39
1
0.1UF 16V X7R 0402

0.1UF 16V X7R 0402
V_CPU_IO_NCTF
VCCVRM PULL HIGH 1.05V DISABLE INTERNAL
AY29
VCCRTC
AY38
VRTC
DCPRTC
BA39
VCCRTC_NCTF
Document Number
AF30 2 1
*
DCPSUS
AF27
DCPSUSBYP
Tuesday, June 29, 2010
AH33
C83
DCPSST
V_1P8_SFR
C88
C95
C90
C89
V_1P1_VTT
2 1
PCH1-9
*
C105 1
C104 1
1
1
1
1
FOR FDI
PCH VCC
* *
1
1
0.1UF 16V X7R 0402
C84
* * * *
IBEXPEAK-H55
Sheet
2 1
*
C85
IH55A-MHS
0.1UF 16V X7R 0402
0.1UF 16V X7R 0402
0.1UF 16V X7R 0402
15
2 1
*
of
FOR PLL,near PCH
C86
2 4.7UF 16V Y5V 0805
2 0.1UF 16V X7R 0402

2 1UF 10V Y5V 0402
2 10UF 10V 0805 Y5V
2 0.1UF 16V X7R 0402

2 0.1UF 16V X7R 0402
38
Rev
6.4
A
B
C
D
A
B
C
D
BIOSTAR-D VER:1.0
AU19 AR1
VSS VSS
AH19 P1
VSS VSS
AD19 G1
VSS VSS
AB19 AD2
VSS VSS
AA19 U2
VSS VSS
V19 K2
VSS VSS
E19 AW3
VSS VSS
AU20 AK3
VSS VSS
AP20 AE3
VSS VSS
AJ20 W3
VSS VSS
AB20 V3
VSS VSS
AA20 U3
VSS VSS
P20 T3
VSS VSS
L20 L3
VSS VSS
K20 K3
5
5it
VSS VSS
F20 AE4
VSS VSS
BA21 AA4
VSS VSS
AU22 R4
VSS VSS
AT22 P4
VSS VSS
AN22 E4
VSS VSS
AK22 AV5
VSS VSS
AD22 AU5
VSS VSS
AB22 AN5
VSS VSS
AA22 AK5
VSS VSS
V22 AF5
VSS VSS
L22 AC5
VSS VSS
K22 AB5
VSS VSS
E22 Y5
VSS VSS
D22 W5
VSS VSS
AU23 T5
VSS VSS
AB23 R5
VSS VSS
E23 N5
VSS VSS
AW24 M5
VSS VSS
AV24 J5
VSS VSS
AP24 H5
VSS VSS
AJ24 F5
VSS VSS
AH24 E5
VSS VSS
AD24 AD6
VSS VSS
U24 V6
VSS VSS
J24 J6
VSS VSS
F24 E6
VSS VSS
AJ26 BA7
VSS VSS
AH26 J7
VSS VSS
AF26 H7
VSS VSS
AH27 A7
VSS VSS
AB27 AL8
VSS VSS
Y27 AK8
VSS VSS
V27 AD8
VSS VSS
U27 AB8
4
VSS VSS
BA28 T8
VSS VSS
AW28 P8
VSS VSS
AR28 M8
VSS VSS
AN28 L8
VSS VSS
AM28 E8
VSS VSS
AJ28 AU9
VSS VSS
AU29 AK9
VSS VSS
AF29 AH9
VSS VSS
AD29 V9
VSS VSS
AB29 H9
VSS VSS
AU30 E9
VSS VSS
AR30 AM10
VSS VSS
AN30 AK10
VSS VSS
AD30 Y10
VSS VSS
AB30 C10
VSS VSS
Y30 AR11
VSS VSS
L30 AF11
VSS VSS
F30 AD11
VSS VSS
E30 P11
VSS VSS
A30 T11
VSS VSS
AF31 M11
VSS VSS
AD31 L11
VSS VSS
P31 F11
VSS VSS
L31 C11
VSS VSS
H31 AU12
VSS VSS
C31 AN12
VSS VSS
AM32 AM12
VSS VSS
AK32 AF12
VSS VSS
AH32 V12
VSS VSS
AF32 M12
VSS VSS
L32 L12
VSS VSS
K32 F12
VSS VSS
C32 E12
VSS VSS
AU33 Y13
3
3
VSS VSS
AF33 V13
VSS VSS
AB33 E13
VSS VSS
Y33 BA14
VSS VSS
V33 AT14
VSS VSS
M33 AN14
VSS VSS
E33 AM14
VSS VSS
T16 N14
VSS VSS
L16 M14
VSS VSS
K16 J14
VSS VSS
J16 F14
VSS VSS
F16 A14
VSS VSS
E16 AH15
VSS VSS
AW17 E15
VSS VSS
C17 AU16
VSS VSS
AW18 V16
VSS VSS
AT18 U16
VSS VSS
AR18 V18
VSS VSS
AN18 U18
VSS VSS
AM18 T18
VSS VSS
AF18 J18
VSS VSS
AB18 F18
VSS VSS
AK34 C18
VSS VSS
AH34 AA38
VSS VSS
AD34 G38
VSS VSS
AB34 AF39
VSS VSS
P34 AE39
VSS VSS
L34 AD39
VSS VSS
penalties.◆
G34 AA39
VSS VSS
F34 W39
VSS VSS
D34 V39
VSS VSS
V35 K39
VSS VSS
T35 J39
VSS VSS
A35 G39
VSS VSS
2
2
AH36 D39
VSS VSS
AF36 C39
VSS VSS
BA37 AD40
VSS VSS
AU37 AB40
VSS VSS
AN37 Y40
VSS VSS
K40
VSS
AU41
VSS
AH41
VSS
AK37
VSS
AF37
VSS
AC37
VSS
W37 L18
VSS TP1
N37 K18
VSS TP2
M37 AT24
VSS TP9
J37 AR24
VSS TP10
E37 P10
Title
Size
VSS TP12
Date:
D37 P9
VSS TP13
AU38 J20
VSS TP3
Custom
AA41
VSS
G41
VSS
AY1
TP22_NCTF
BA1 A3
VSS_NCTF TP22_NCTF
E1 BA41
VSS_NCTF TP22_NCTF
C1 A41
VSS_NCTF TP22_NCTF
Document Number
BA2
VSS_NCTF
AY2
VSS_NCTF
B2
VSS_NCTF
A5 AH30
VSS_NCTF TP21
B40
VSS_NCTF
A40
VSS_NCTF
AY41
VSS_NCTF
AW41
VSS_NCTF
C41
VSS_NCTF
1
1
B41
VSS_NCTF
PCH GND
Sheet
AH29
VSS_PCHDET
B10
VSS
U39
VSS
IH55A-MHS
AV28
VSS
16
AF3
VSS
Y11
NC
V10
of
NC
Y12
NC
PCH1-10
V11
NC
38
IBEXPEAK-H55
Rev
6.4
A
B
C
D
5 4 3 2 1
CLKPWR CLKVCC3 Breakout 500 mils max

D 1
FB8
2 CLKVCC3 W/S/S1:4/10/18 D
C147
C148
C149
C150
C151
C152
C153
C154
C155
1 CLKVCC3 U4
1
0 0805
1 23 PCH_IN_P R225 33 0402

0.1UF 16V X7R 0402
0.1UF 16V X7R 0402
0.1UF 16V X7R 0402
0.1UF 16V X7R 0402
0.1UF 16V X7R 0402
0.1UF 16V X7R 0402
0.1UF 16V X7R 0402
0.1UF 16V X7R 0402

10UF 10V 0805 Y5V
2
2
VDD CPUCLKT0 PCH_IN_N 133M_CSI_PCH_IN_DP 14
7 22 R227 33 0402
VDD CPUCLKC0 133M_CSI_PCH_IN_DN 14
10 VDD
13 VDD
15 VDD PCIeT1 11
100M_DMI_PCH_DP 10 Refer To DG P.394
17 VDD PCIeC1 12 100M_DMI_PCH_DN 10
21 VDD
For Details
27 VDD
DOT96T/PCIeT0 3
CK_96M_DREF_DP 10
DOT96C/PCIeC0 4
CK_96M_DREF_DN 10
9 GND
14 GND
24 GND SATACLKT 5 CK_SATA_CLK_DP 11
33 GND SATACLKC 6
CK_SATA_CLK_DN 11
2 FSA R268 33 0402

**FSA/USB48M IO_48MHZ 31
25 30 GSEL R253 33 0402
8,9,12,20,21,22,26 SMB_CLK_MAIN SMBCLK *GSEL/REF CK_14M_PCH 14
8,9,12,20,21,22,26 SMB_DATA_MAIN 26 SMBDAT
16 CRYSTAL_SEL R254 33 0402
25MHZ XTAL_25M_PCH_IN 14
12,32 VR_READY 24.576MHZ 18
C CLKVCC3 R248 10K 0402 /NI VR_READY 8 Vtt_PwrGD/PD#/WOL_STOP# C

Y2
R249 1K 1% 0402 /NI RLATCH 19 14.318MHZ 16PF 20PPM
12,31,35 SLP_S4_N **RLATCH X1 X2
20 RESET_IN#/RESET# X1 29 1 2
R240 10K 0402 31 28 X2
CLKVCC3 **TURBO-0 X2
32 **TURBO-1
1
C160 C159
CLKVCC3 R242 10K 0402 /NI RESET_IN# 22P 50V NPO 0402 22P 50V NPO 0402
2
RTM885N-932 QFN32
R244 22 0402
30 WATCH_DOG
CLKVCC3 1 2 RN42
3 4
5 6 4.7K 8P4R 0402
7 8
Change @V0.62
R251 4.7K 0402 /NI
R257 4.7K 0402 /NI
CLKVCC3 CLKVCC3
R284 R286
VCC3_3 VCC3_3 10K 0402 47K 0402
B GSEL FSA
B
1
C162 C163
0.1UF 16V X7R 0402 /NI 0.1UF 16V X7R 0402 GSEL = 1 (96M) , = 0 (100M) R285 R287
2
10K 0402 /NI 33K 0402 /NI

FSA = 1 (133MHZ) Default
= 0 (266MHZ)
+3V3_DUAL
BSEL BIASING RES
CLKVCC3
S
Q59
SI2301BDS SOT23
G CLKPWR VCC3_3 R250

35 ME_G
4.7K 0402 /NI
D
FB11
1 2 CRYSTAL_SEL
BEAD 60 0805 1A /NI
R252
A FOR VersionB
4.7K 0402 /NI
A
25M/14.318M SELECT
Title
applicable civil and/or criminal CLK GEN RTM885N-932
IH55A-MHS 6.4
5it 3 2 1
5 4 3 2 1
VCC5
2 1 VGA_P5V
Q63 Q64
C_VGA_RED 1 6C_VGA_BLUE VGA_5VDDCLK 1 6 HSYNC_C F1
B1
B1
A2 + A1
A2 + A1
POLY FUSE 1.1A
CM1293
CM1293
2
2 5 VCC3_3 2 5 VCC5
2
B2 -
B2 -
C247
D D
C_VGA_GREEN
3 4 VGA_5VDDA 3 4 VSYNC_C C246 0.1UF 16V Y5V 0402
1
1
1UF 10V Y5V 0402
CM1293 SOT23-6 /NI CM1293 SOT23-6 /NI
Close To GMCH
VGA1
4mils G2
12mils 7mils 4mils
6
1 2 VGA_RED_D 1 2 C_VGA_RED 1 11
13 VGA_RED
FB6 BEAD 60 0603 FB10 BEAD 60 0603 7
1 2 VGA_GREEN_D 1 2 C_VGA_GREEN2 12 VGA_5VDDA R226 100 0402 VGA_5VDDATA
13 VGA_GREEN
FB7 BEAD 60 0603 FB19 BEAD 60 0603 8
1 2 VGA_BLUE_D 1 2 C_VGA_BLUE 3 13 HSYNC_C
13 VGA_BLUE
FB9 BEAD 60 0603 FB20 BEAD 60 0603 9
1C248
1C249
1C250
4 14 VSYNC_C
10
C251
C252
C253
R228 R229 R230 R231 R232 R233 5 15 VGA_5VDDCLK R235 100 0402 VGA_5VDCLK
150 1% 0402 150 1% 0402 150 1% 0402 150 1% 0402
C254
C255
C256
C328
150 1% 0402 150 1% 0402 G1
10P 50V NPO 0402 2
10P 50V NPO 0402 2
10P 50V NPO 0402 2
2
VGA CONN PC99 SHORT
10P 50V NPO 0402
10P 50V NPO 0402
100P 50V NPO 0402
100P 50V NPO 0402

1
1
22P 50V NPO 0402
22P 50V NPO 0402
22P 50V NPO 0402

C IO_GND C
RGB TRACE mismatch 200 mils

R close GMCH chipset breakout 12mils to first R less 500mils , 1R to 2R route 7 mils, after
less 300mils 2R all 4 mils [email protected] 20100526
Change @V0.62
VGA_5VDCLK
D
VCC5
Q62
2N7002 SOT23 VCC5 VCC3_3
VCC3_3
B B
U12D
S
SN74ACT08
14
RN33
12 2 1
1 2 11 HSYNC_C 4 3
FB13 SHORT 0805 /NI 14 13 6 5
13 VGA_HSYNC
13 VGA_PCH_DDCSCL 8 7
9
7
13 VGA_VSYNC
1 2 8 VSYNC_C
FB14 SHORT 0805 /NI VGA_5VDDATA 2.2K 8P4R 0402
10
Change @V6.3 U12C

7
SN74ACT08
D
IO_GND Q61
2N7002 SOT23
VCC3_3
S
VGA_PCH_DDCSDA
VGA_PCH_DDCSDA 13
A A

Title
document will be subject to the VGA CONNETOR
IH55A-MHS 6.4

5 4 3 2 1
5 4 3 2 1
VCC5
HDMI_DVI_P5V
OE#: High: In/OutD[1:4] High Impedance
49
Low: In=50 OHM,Out Active U3 DVI1
IO_GND
25
GND
25 F2 POLY FUSE 1.1A
OE_N
2 1
22 DVI_TDC2+ DVI_TDC0- 17 1 DVI_TDC2-
OUT_D1+ DVI_TDC1-
9
C166 1 2 0.1UF 16V X7R 0402 39 23 DVI_TDC2- DVI_TDC0+ 18 2 DVI_TDC2+
D 13 DDSP_B_TX_0_DP IN_D1+ OUT_D1-
D
**
10 DVI_TDC1+
2
13 DDSP_B_TX_0_DN
C168 1 2 0.1UF 16V X7R 0402 38 IN_D1- 19 3 R505 R532 C263
11 2.2K 0402 2.2K 0402
19 DVI_TDC1+ 20 4 1UF 10V Y5V 0402
1
OUT_D2+
12
13 DDSP_B_TX_1_DP
C167 1 2 0.1UF 16V X7R 0402 42 20 DVI_TDC1- 21 5
**
IN_D2+ OUT_D2-
13
13 DDSP_B_TX_1_DN
C165 1 2 0.1UF 16V X7R 0402 41 IN_D2- 22 6 DVI_SCL
14 DVI_P5V
16 DVI_TDC0+ DVI_TLC+ 23 7 DVI_SDA
OUT_D3+
15
13 DDSP_B_TX_2_DP
C169 1 2 0.1UF 16V X7R 0402 45 IN_D3+ OUT_D3- 17 DVI_TDC0- DVI_TLC- 24 8
13 DDSP_B_TX_2_DN
C170 1 ** 2 0.1UF 16V X7R 0402 44 IN_D3- C3
16
C1
HPDET_DVI_C C28
0.1UF 16V Y5V 0402
C5A C5
13 DVI_TLC+ C4 C2
OUT_D4+
13 DDSP_B_TX_3_DP
C172 1 2 0.1UF 16V X7R 0402 48 14 DVI_TLC-
**
IN_D4+ OUT_D4- DVI-I
26
13 DDSP_B_TX_3_DN
C173 1 2 0.1UF 16V X7R 0402 47 IN_D4-
Enable Bias Viltage To DDC Gate

VCC3_3 R261 2.2K 0402 32 30 HPDET_DVI_C IO_GND
DDC_EN HPD_SINK
29 DVI_SDA
VCC3_3 R263 3.3K 1% 0402 SDA_SINK
6 REXT
28 DVI_SCL
R264 0 0402 /NI HPD_DVI_N SCL_SINK VCC3_3
7 HPD_SOURCE_N
13 DDSP_B_HPD
C 13 DDPB_CTRL_DATA
DDPB_CTRL_DATA 8 SDA_SOURCE_ VDD 2
11
VCC3_3 C
R266 R265 DDPB_CTRL_CLK VDD
9 15 Total Curren For VDD
D
2.2K 0402 /NI 2.2K 0402 /NI 13 DDPB_CTRL_CLK SCL_SOURCE_ VDD
21
VDD
VDD 26 100mA Max Q11 High active
3 33 HPDET_DVI_C R276 10K 0402 G APM2300AAC SOT23
R267 2.2K 0402 /NI CG_0 VDD
4 40
S
CG_1 VDD R278 33 0402
10 CG_2 VDD 46 DDSP_B_HPD 13
34 EQ_0
TMDS Output Signal Integrity Strapping 35
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
EQ_1 R279
Defalt R277 1K 0402
ASM1442T QFN48 200K 0402 /NI
1
5
12
18
24
27
31
36
37
43
0 0 0: SWING 450mV R272 R273

100 0402 /NI 100 0402 /NI
TMDS Input Signal Equalization Strapping CLOSE TO DVI CONNECTOR

Defalt
1 1: 3dB
HDMI DIP HDMI CONN
DVI_TDC2+ 1 G1
DVI_TDC0- 1 GND#G1
2 2 GND#G2 G2
DVI_TDC2- 3 G3
R214 R219 DVI_TDC1+ 3 GND#G3
4 4 GND#G4 G4
100 1% 0402 100 1% 0402 5 5
DVI_TDC0+ DVI_TDC1-
B DVI_TDC0+
6
7
8
6
7 IO_GND
B
DVI_TDC1- DVI_TDC0- 8
FOR DVI DVI_TLC+
9 9
10 10
R215 R220 11
VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 DVI_TLC- 11
100 1% 0402 100 1% 0402 12 12
DVI_TDC1+ HDMI_DVI_P5V 13 13
14 14
1
* C188
0.1UF 16V Y5V 0402 * C189
0.1UF 16V Y5V 0402 * C190
0.1UF 16V Y5V 0402 * C191
0.1UF 16V Y5V 0402 * C184
10UF 10V 0805 Y5V DVI_TDC2-
DVI_SCL
DVI_SDA
15
16
15
16
17
2
R216 R221 17
18 18
100 1% 0402 100 1% 0402 HPDET_DVI_C 19
DVI_TDC2+ 19
1
DVI_TLC- * C182
* C183
0.1UF 16V Y5V 0402
HDMI1
1UF 10V Y5V 0402
2
R217 R222
FOR HDMI DVI_TLC+
100 1% 0402 100 1% 0402
VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3

1
* C192
0.1UF 16V Y5V 0402 * C193
0.1UF 16V Y5V 0402 * C194
0.1UF 16V Y5V 0402 * C195
0.1UF 16V Y5V 0402 * C185
10UF 10V 0805 Y5V
2
R259 SHORT 0805 /NI
A A
IO_GND

Title
document will be subject to the DVI INTERFACE
IH55A-MHS 6.4
5it 3 2 1
5 4 3 2 1
+3V3_DUAL VCC12 PEX16_1 VCC12
VCC3_3 B1 A1
+12V PRSNT1*
B2 +12V +12V A2
B3 +12V +12V A3
B4 GND GND A4
B5 A5 VCC3_3
8,9,12,17,21,22,26 SMB_CLK_MAIN SMCLK JTAG2
8,9,12,17,21,22,26 SMB_DATA_MAIN B6 SMDAT JTAG3 A6
D
B7 GND JTAG4 A7 D
B8 +3.3V JTAG5 A8
B9 JTAG1 +3.3V A9
B10 +3.3VAUX +3.3V A10
B11 A11 R302 0 0402 /NI
12,21,26 WAKE_N WAKE* PWRGD PLTRST_PCIE_SLOTS_N 21,31 12,21,26 WAKE_N P_PME_N 10,22
4 EXP_A_TX_0_DP EXP_A_TXP_0 C198 1 2 0.1UF 16V X7R 0402 EEXP_A_TXP_0 KEY

B12 RSVD GND A12
4 EXP_A_TX_0_DN EXP_A_TXN_0 C199 1 2 0.1UF 16V X7R 0402 EEXP_A_TXN_0 B13 A13
EEXP_A_TXP_0 GND REFCLK+ CK_PE_100M_16A_DP 14
B14 HSOP0 REFCLK- A14
EXP_A_TXP_1 C200 1 EEXP_A_TXP_1 EEXP_A_TXN_0 CK_PE_100M_16A_DN 14
4 EXP_A_TX_1_DP 2 0.1UF 16V X7R 0402 B15 HSON0 GND A15
B16 GND HSIP0 A16 EXP_A_RX_0_DP 4
4 EXP_A_TX_1_DN EXP_A_TXN_1 C201 1 2 0.1UF 16V X7R 0402 EEXP_A_TXN_1 B17 A17 EXP_A_RX_0_DN 4
PRSNT2* HSIN0
B18 GND GND A18
4 EXP_A_TX_2_DP EXP_A_TXP_2 C202 1 2 0.1UF 16V X7R 0402 EEXP_A_TXP_2
EEXP_A_TXP_1 B19 A19
EXP_A_TXN_2 C203 1 EEXP_A_TXN_2 EEXP_A_TXN_1 HSOP1 RSVD
4 EXP_A_TX_2_DN 2 0.1UF 16V X7R 0402 B20 HSON1 GND A20
4 EXP_A_TX_3_DP EXP_A_TXP_3 C204 1 2 0.1UF 16V X7R 0402 EEXP_A_TXP_3 B22 A22 EXP_A_RX_1_DN 4
EEXP_A_TXP_2 GND HSIN1
B23 HSOP2 GND A23
4 EXP_A_TX_3_DN EXP_A_TXN_3 C205 1 2 0.1UF 16V X7R 0402 EEXP_A_TXN_3 EEXP_A_TXN_2 B24 A24
HSON2 GND VCC3_3 VCC5
4 EXP_A_TX_4_DP EXP_A_TXP_4 C206 1 2 0.1UF 16V X7R 0402 EEXP_A_TXP_4 B26 A26 EXP_A_RX_2_DN 4
B27 HSOP3 GND A27
4 EXP_A_TX_4_DN EXP_A_TXN_4 C207 1 2 0.1UF 16V X7R 0402 EEXP_A_TXN_4 EEXP_A_TXN_3 B28 A28
HSON3 GND
B29 GND HSIP3 A29 EXP_A_RX_3_DP 4 + +
4 EXP_A_TX_5_DP EXP_A_TXP_5 C208 1 2 0.1UF 16V X7R 0402 EEXP_A_TXP_5 B30 A30 EXP_A_RX_3_DN 4 CT1 CT2
RSVD HSIN3 1000UF 6.3V 8X12 1000UF 6.3V 8X12
B31 PRSNT2* GND A31
4 EXP_A_TX_5_DN EXP_A_TXN_5 C209 1 2 0.1UF 16V X7R 0402 EEXP_A_TXN_5 B32 A32
C
GND RSVD C
4 EXP_A_TX_6_DP EXP_A_TXP_6 C210 1 2 0.1UF 16V X7R 0402 EEXP_A_TXP_6 EEXP_A_TXP_4 B33 A33
EEXP_A_TXN_4 HSOP4 RSVD
B34 HSON4 GND A34
4 EXP_A_TX_6_DN EXP_A_TXN_6 C211 1 2 0.1UF 16V X7R 0402 EEXP_A_TXN_6 B35 A35 EXP_A_RX_4_DP 4
GND HSIP4
B36 GND HSIN4 A36 EXP_A_RX_4_DN 4
4 EXP_A_TX_7_DP EXP_A_TXP_7 C212 1 2 0.1UF 16V X7R 0402 EEXP_A_TXP_7 EEXP_A_TXP_5 B37 A37
EEXP_A_TXN_5 HSOP5 GND
B38 HSON5 GND A38
4 EXP_A_TX_7_DN EXP_A_TXN_7 C213 1 2 0.1UF 16V X7R 0402 EEXP_A_TXN_7 B39 A39 EXP_A_RX_5_DP 4
GND HSIP5
B40 GND HSIN5 A40 EXP_A_RX_5_DN 4
EEXP_A_TXP_6 B41 A41
EEXP_A_TXN_6 HSOP6 GND
B42 HSON6 GND A42
4 EXP_A_TX_8_DP C214 1 2 0.1UF 16V X7R 0402 EEXP_A_TXP_8 B44 A44 EXP_A_RX_6_DN 4
B45 HSOP7 GND A45
4 EXP_A_TX_8_DN C215 1 2 0.1UF 16V X7R 0402 EEXP_A_TXN_8 EEXP_A_TXN_7 B46 A46
HSON7 GND
C216 1 2 0.1UF 16V X7R 0402 EEXP_A_TXP_9 VCC12 CT5
+
4 EXP_A_TX_9_DP B48 A48 EXP_A_RX_7_DN 4 470UF 16V 8X11.5
PRSNT2* HSIN7
B49 GND GND A49
4 EXP_A_TX_9_DN C217 1 2 0.1UF 16V X7R 0402 EEXP_A_TXN_9
EEXP_A_TXP_8 B50 A50 VCC12 C233 0.1UF 16V Y5V 0402
C218 1 EEXP_A_TXP_10 EEXP_A_TXN_8 HSOP8 RSVD
4 EXP_A_TX_10_DP 2 0.1UF 16V X7R 0402 B51 HSON8 GND A51
4 EXP_A_TX_10_DN C219 1 2 0.1UF 16V X7R 0402 EEXP_A_TXN_10 B53 A53 EXP_A_RX_8_DN 4
B54 HSOP9 GND A54
4 EXP_A_TX_11_DP C220 1 2 0.1UF 16V X7R 0402 EEXP_A_TXP_11 EEXP_A_TXN_9 B55 A55
HSON9 GND
EEXP_A_TXP_10 GND HSIN9 C228 0.1UF 16V Y5V 0402 /NI
B58 HSOP10 GND A58
HSON10 GND C230 0.1UF 16V Y5V 0402
B
B60 GND HSIP10 A60 EXP_A_RX_10_DP 4 B
4 EXP_A_TX_12_DN C223 1 2 0.1UF 16V X7R 0402 EEXP_A_TXN_12 B61 A61 EXP_A_RX_10_DN 4 VCC5 C232 0.1UF 16V Y5V 0402
B62 HSOP11 GND A62
HSON11 GND
B66 HSOP12 GND A66
HSON12 GND
B70 HSOP13 GND A70
HSON13 GND
EEXP_A_TXP_14 GND HSIN13 PEX16 SLOT CURRENT
B74 HSOP14 GND A74
EEXP_A_TXN_14 B75 A75
B76
HSON14 GND
A76 EXP_A_RX_14_DP 4
VCC12---->5A
GND HSIP14
EEXP_A_TXP_15
B77 GND HSIN14 A77 EXP_A_RX_14_DN 4 VCC3_3---->3A
B78 HSOP15 GND A78
EEXP_A_TXN_15 B79 HSON15 GND A79 +3V3_DUAL---->0.375A(S0)
B80 A80 EXP_A_RX_15_DP 4
B81
GND HSIP15
A81 EXP_A_RX_15_DN 4
0.02A(S3)
PRSNT2* HSIN15
B82 RSVD GND A82
PCIEX16-164 PIN LR-B
A A
Title
PCI-E 16 SLOT
Custom IH55A-MHS 6.4

5 4 3 2 1
5 4 3 2 1
D D
+3V3_DUAL
VCC3_3 VCC3_3
VCC12 VCC12
PEX1_1
B1 +12V PRSNT1* A1
B2 +12V +12V A2
B3 +12V +12V A3
B4 GND GND A4
8,9,12,17,20,22,26 SMB_CLK_MAIN B5 SMCLK JTAG2 A5
B6 A6
C 8,9,12,17,20,22,26 SMB_DATA_MAIN
B7
B8
SMDAT
GND
JTAG3
JTAG4 A7
A8
C
+3.3V JTAG5
B9 JTAG1 +3.3V A9
B10 +3.3VAUX +3.3V A10
12,20,26 WAKE_N B11 WAKE* PWRGD A11
PLTRST_PCIE_SLOTS_N 20,31
KEY
B12 RSVD GND A12
B13 GND REFCLK+ A13 100M_PE_X1SLOT0_P 14
10 HSO1_C_DP B14 HSOP0 REFCLK- A14 100M_PE_X1SLOT0_N 14
10 HSO1_C_DN B15 HSON0 GND A15
B16 GND HSIP0 A16 HSI1_DP 10
B17 PRSNT2* HSIN0 A17
HSI1_DN 10
B18 GND GND A18
PCIEX1-36 PIN-R
B B
A A

document will be subject to the PCIEx1 SLOT
penalties.◆ Custom IH55A-MHS 6.4
5it 3 2 1
5 4 3 2 1
+3V3_DUAL IDSEL:AD22 , INT:BCDA , REQ1 & GNT1 , PCI_CLK2

IDSEL:AD21 , INT:ABCD , REQ0 & GNT0 , PCI_CLK1
R303
4.7K 0402 /NI
VCC3_3 VCC3_3
VCC3_3 VCC3_3
P_PME_N 10,20
D D
VCC5 VCC5 +3V3_DUAL
VCC5 VCC5 +3V3_DUAL
VCC12- PCI_SLOT 2 VCC12

VCC12- PCI_SLOT 1 VCC12
PCI2
PCI1 B1 A1
-12V TRST#
B1 -12V TRST# A1 B2 TCK +12V A2
B2 TCK +12V A2 B3 GND#B3 TMS A3
B3 GND#B3 TMS A3 B4 TDO TDI A4
B4 TDO TDI A4 B5 +5V#B5 +5V#A5 A5
B5 +5V#B5 +5V#A5 A5 B6 +5V#B6 INTA# A6 P_INTB_N 10
B6 +5V#B6 INTA# A6 P_INTA_N 10 10 P_INTC_N B7 INTB# INTC# A7 P_INTD_N 10
10 P_INTB_N B7 INTB# INTC# A7 P_INTC_N 10 10 P_INTA_N B8 INTD# +5V#A8 A8
10 P_INTD_N B8 INTD# +5V#A8 A8 B9 PRSNT1# RESERVED#A9 A9
B9 PRSNT1# RESERVED#A9 A9 B10 RESERVED#B10 +5Vi/o#A10 A10
B10 RESERVED#B10 +5Vi/o#A10 A10 B11 PRSNT2# RESERVED#A11 A11
B11 PRSNT2# RESERVED#A11 A11 B12 GND#B12 GND#A12 A12
B12 GND#B12 GND#A12 A12 B13 GND#B13 GND#A13 A13
B13 GND#B13 GND#A13 A13 B14 RESERVED#B14 3.3Vaux A14
B14 RESERVED#B14 3.3Vaux A14 B15 GND#B15 RESET# A15 P_PCIRST_N 31
B15 GND#B15 RESET# A15 P_PCIRST_N 31 14 PCLK_2 B16 CLK +5Vi/o#A16 A16
14 PCLK_1 B16 CLK +5Vi/o#A16 A16 B17 GND#B17 GNT# A17 P_GNT_N1 10
B17 GND#B17 GNT# A17 P_GNT_N0 10 10 P_REQ_N1 B18 REQ# GND#A18 A18
10 P_REQ_N0 B18 REQ# GND#A18 A18 B19 +5Vi/o#B19 PME# A19 P_PME_N 10,20
B19 A19 P_AD31 B20 A20 P_AD30
+5Vi/o#B19 PME# P_PME_N 10,20 AD31 AD30
P_AD31 B20 A20 P_AD30 P_AD29 B21 A21
P_AD29 AD31 AD30 AD29 +3.3V#A21 P_AD28
B21 AD29 +3.3V#A21 A21 B22 GND#B22 AD28 A22
B22 A22 P_AD28 P_AD27 B23 A23 P_AD26
P_AD27 GND#B22 AD28 P_AD26 P_AD25 AD27 AD26
C B23 AD27 AD26 A23 B24 AD25 GND#A24 A24 C
P_AD25 B24 A24 B25 A25 P_AD24
AD25 GND#A24 P_AD24 P_C/BE_N3 +3.3V#B25 AD24 P_AD22
B25 +3.3V#B25 AD24 A25 B26 C/BE#3 IDSEL A26
P_C/BE_N3 B26 A26 P_AD21 P_AD23 B27 A27
P_AD23 C/BE#3 IDSEL AD23 +3.3V#A27 P_AD22
B27 AD23 +3.3V#A27 A27 B28 GND#B28 AD22 A28
B28 A28 P_AD22 P_AD21 B29 A29 P_AD20
P_AD21 GND#B28 AD22 P_AD20 P_AD19 AD21 AD20
B29 AD21 AD20 A29 B30 AD19 GND#A30 A30
P_AD19 B30 A30 B31 A31 P_AD18
AD19 GND#A30 P_AD18 P_AD17 +3.3V#B31 AD18 P_AD16
B31 +3.3V#B31 AD18 A31 B32 AD17 AD16 A32
P_AD17 B32 A32 P_AD16 P_C/BE_N2 B33 A33
P_C/BE_N2 AD17 AD16 C/BE#2 +3.3V#A33
B33 C/BE#2 +3.3V#A33 A33 B34 GND#B34 FRAME# A34 P_FRAME_N 10
B34 GND#B34 FRAME# A34 P_FRAME_N 10 10 P_IRDY_N B35 IRDY# GND#A35 A35
10 P_IRDY_N B35 IRDY# GND#A35 A35 B36 +3.3V#B36 TRDY# A36 P_TRDY_N 10
B36 +3.3V#B36 TRDY# A36 P_TRDY_N 10 10 P_DEVSEL_N B37 DEVSEL# GND#A37 A37
10 P_DEVSEL_N B37 DEVSEL# GND#A37 A37 B38 GND#B38 STOP# A38 P_STOP_N 10
B38 GND#B38 STOP# A38 P_STOP_N 10 10 P_PLOCK_N B39 LOCK# +3.3V#A39 A39
10 P_PLOCK_N B39 LOCK# +3.3V#A39 A39 10 P_PERR_N B40 PERR# RESERVED#A40 A40 SMB_CLK_MAIN 8,9,12,17,20,21,26
10 P_PERR_N B40 PERR# RESERVED#A40 A40 SMB_CLK_MAIN 8,9,12,17,20,21,26 B41 +3.3V#B41 RESERVED A41 SMB_DATA_MAIN 8,9,12,17,20,21,26
B41 +3.3V#B41 RESERVED A41 SMB_DATA_MAIN 8,9,12,17,20,21,26 10 P_SERR_N B42 SERR# GND#A42 A42
10 P_SERR_N B42 SERR# GND#A42 A42 B43 +3.3V#B43 PAR A43 P_PAR 10
B43 A43 P_C/BE_N1 B44 A44 P_AD15
P_C/BE_N1 +3.3V#B43 PAR P_AD15 P_PAR 10 P_AD14 C/BE#1 AD15
B44 C/BE#1 AD15 A44 B45 AD14 +3.3V#A45 A45
P_AD14 B45 A45 B46 A46 P_AD13
AD14 +3.3V#A45 P_AD13 P_AD12 GND#B46 AD13 P_AD11
B46 GND#B46 AD13 A46 B47 AD12 AD11 A47
P_AD12 B47 A47 P_AD11 P_AD10 B48 A48
P_AD10 AD12 AD11 AD10 GND#A48 P_AD9
B48 AD10 GND#A48 A48 B49 GND#B49 AD9 A49
B49 A49 P_AD9
GND#B49 AD9
P_AD8 B52 A52 P_C/BE_N0
P_AD8 P_C/BE_N0 P_AD7 AD8 C/BE#0
B
B52 AD8 C/BE#0 A52 B53 AD7 +3.3V A53 B
P_AD7 B53 A53 B54 A54 P_AD6
AD7 +3.3V P_AD6 P_AD5 +3.3V#B54 AD6 P_AD4
B54 +3.3V#B54 AD6 A54 B55 AD5 AD4 A55
P_AD5 B55 A55 P_AD4 P_AD3 B56 A56
P_AD3 AD5 AD4 AD3 GND P_AD2
B56 AD3 GND A56 B57 GND#B57 AD2 A57
B57 A57 P_AD2 P_AD1 B58 A58 P_AD0
P_AD1 GND#B57 AD2 P_AD0 AD1 AD0
B58 AD1 AD0 A58 B59 +5Vi/o#B59 +5Vi/o A59
B59 A59 ACK64_N1 B60 A60 REQ64B_N1
ACK64_N +5Vi/o#B59 +5Vi/o REQ64B_N ACK64# REQ64#
B60 ACK64# REQ64# A60 B61 +5V#B61 +5V#A61 A61
B61 +5V#B61 +5V#A61 A61 B62 +5V#B62 +5V A62
B62 +5V#B62 +5V A62
PCI-120 PIN-R
PCI-120 PIN-R
P_C/BE_N[3..0] 10
P_C/BE_N[3..0] 10
P_AD[31..0] 10 VCC5
P_AD[31..0] 10
RN32
4.7K 8P4R 0402
ACK64_N 8 7
REQ64B_N 6 5
ACK64_N1 4 3
REQ64B_N1 2 1
Change @V0.62
A A
PCI SLOTS CURRENT
VCC5---->5A ◇ BIOSTAR'S PROPRIETARY INFORMATION◆
VCC3_3---->7.6A
+3V3_DUAL---->0.375A(S0)/0.02A(S3)
VCC12---->0.5A document will be subject to the
Title
-VCC12---->0.1A applicable civil and/or criminal PCI SLOT *2

IH55A-MHS 6.4

5 4 3 2 1
5 4 3 2 1
MH1 MH9
PAD200-8 /NI PAD200-8 /NI
1 5 1 5
2 6 2 6
3 (NPTH) 7 3 (NPTH) 7
4 8 4 8
D D
9
24 PIN POWER CONNECTOR MH5
PAD200-8 /NI
MH8
PAD200-8 /NI
1 5 1 5
2 6 2 6
3 (NPTH) 7 3 (NPTH) 7
+5V_STBY VCC12-VCC5 VCC3_3 VCC3_3 VCC5 +5V_STBY VCC5 4 8 4 8
ATXPWR1
13 3.3V 3.3V 1
9
MH6
FROM SIO R326
14 -12V 3.3V 2
PAD200-8 /NI
4.7K 0402 15 GND GND 3
R327 FOR 8720 1
2
5
6
31 PS_ON_N 16 PSON 5V 4 2.2K 0402 3 (NPTH) 7
4 8
1
* C318
470P 50V X7R 0402
17 GND GND 5 R200 0 0402 /NI
POWERGD_50mS 31,35,37
18 6
2
9
GND 5V
19 GND GND 7
MH4
20 8 PAD200-8 /NI
NC POK PG_PWR_OUT 31,35
1 5
21 5V 5VSB 9 2 6
3 7
C 22 5V 12V 10 VCC12 4
(NPTH)
8 C
23 5V 12V 11
9
24 GND DET 12
POWER CONN ATX 24P

GND_AUD GND_AUD
Impedance Testing Coupon

V_1P8_SFR
TUNE1
NC1 1 CP1
+3V3_DUAL 2 CP2
HEADER 1X2 D 150 /NI
+5V_DUAL +3V3_DUAL VCC3_3
B D1 1
TUNE2
CP1
B
NC2 2 CP2
K A HEADER 1X2 D 150 /NI
SS12/5817 SMA
1
R300 R1
C197 221 1% 0402 + +
10UF 10V 0805 Y5V CT4 CT3
2
1000UF 6.3V 8X12 1000UF 6.3V 8X12

1117_ADJ
R2
O
A
I
R301
Q6 383 1% 0402
AZ1117H-ADJ SOT-223
Vout=Vref (1.25V) X ( 1+R2/R1 )

=3.416V
A ◇ BIOSTAR'S PROPRIETARY INFORMATION◆ A
Title
document will be subject to the ATX POWER CON & MH
IH55A-MHS 6.4
5 4 3 2 1
5 4 3 2 1
POWER_JUSB2
Q26
L_KDAT 1 6
B1
A2 + A1
CM1293
2 5
B2 -
L_KCLK 3 C286
D
4 D
1
CM1293 SOT23-6
0.1UF 16V Y5V 0402
2
POWER_JUSB2
COM HEADER K/B PORT
2
4
6
8
RN31
2.2K 8P4R 0402
1
3
5
7
VCC5 VCC12- VCC12
C287 Change @V0.62 FB15 USBKB1B
U8 0.1UF 16V Y5V 0402 BEAD 60 0603
L_KDAT
20 VCC VCC12 1 1 2 31 KDAT * 10
11
DCDJ0 19 2 DCDJ0_C FB16 9
31 DCDJ0 RY0 RA0 BEAD 60 0603 12
RIJ0 RIJ0_C L_KCLK
31 RIJ0 18 RY1 RA1 3
31 KCLK * 13
14
CTSJ0 17 4 CTSJ0_C
31 CTSJ0 RY2 RA2
G3
G4
DTRJ0 16 5 DTRJ0_C USB_KB
31 DTRJ0 DA0 DY0
1 C284
1 C285
RTSJ0 15 6 RTSJ0_C
31 RTSJ0 DA1 DY1
47P 50V NPO 0402
47P 50V NPO 0402

DSRJ0 14 7 DSRJ0_C
31 DSRJ0 RY3 RA3
1
C C281 IO_GND C
TXD0 13 8 TXDJ0_C
31 TXD0 DA2 DY2
0.1UF 16V Y5V 0402 /NI
2
RXDJ0 12 9 RXDJ0_C
31 RXDJ0 RY4 RA4
11 GND VCC-12 10
FOR EMI
ST75185CTR TSSOP
R410 SHORT 0805 /NI
IO_GND Change @V6.3

J_COM1
DCDJ0_C 1 2 RXDJ0_C
12 ICH_RIJ TXDJ0_C DTRJ0_C
3 4
5 6 DSRJ0_C
C
RTSJ0_C 7 8 CTSJ0_C
Q27 B ICHRIJ_C 1 2 RIJ0_C 9 10
2N3904 SOT23 3 4
5 6 HEADER 2X5 N10 G PRINT HEADER
E
7 8 VCC5
D5
RN43 SS12/5817 SMA
4.7K 8P4R 0402 RN21 RN25 RN22 RN23
A K
Change @V0.62
2
4
6
8
2
4
6
8
2
4
6
8
2
4
6
8
B B
2.2K 8P4R 0402
RN24 R411 2.2K 8P4R 0402
22 8P4R 0402 2.2K 8P4R 0402
STROBEJ 1 2 -STB 2.2K 0402 2.2K 8P4R 0402
31 STROBEJ
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
PDR1 3 4 P_PRD1
31 PDR1
ALFJ 5 6 AFD
31 ALFJ
PDR0 7 8 P_PRD0
31 PDR0
J_PRINT1
RN26 -STB -STB 1 2 AFD
22 8P4R 0402 AFD P_PRD0 3 4 ERRORJ
PDR2 1 2 P_PRD2 P_PRD0 P_PRD1 5 6 -INIT
31 PDR2 PARINITJ -INIT ERRORJ P_PRD2 -SLIN
31 PARINITJ 3 4 31 ERRORJ 7 8
SLCTINJ 5 6 -SLIN P_PRD3 P_PRD3 9 10
31 SLCTINJ PDR3 P_PRD3 -INIT P_PRD4
31 PDR3 7 8 11 12
-SLIN P_PRD5 13 14
RN27 P_PRD2 P_PRD6 15 16
22 8P4R 0402 P_PRD1 P_PRD7 17 18
PDR6 7 8 P_PRD6 P_PRD4 ACKJ 19 20
31 PDR6
PDR5 5 6 P_PRD5 P_PRD5 BUSY 21 22
31 PDR5
PDR4 3 4 P_PRD4 P_PRD6 PE 23 24
31 PDR4
PDR7 1 2 P_PRD7 P_PRD7 SLCTJ 25 26
31 PDR7
ACKJ
31 ACKJ
BUSY HEADER 2X13 N26
31 BUSY
PE
31 PE
SLCTJ
31 SLCTJ
A A

Title
applicable civil and/or criminal K/B,COM,PRINT HEADER
IH55A-MHS 6.4

5 4 3 2 1
5 4 3 2 1
-IDEDACK
IDEIORDY
IDEDREQ
D D
IDEDD13
IDEDD14
IDEDD15
-IDEIOW
IDEDD2
IDEDD1
IDEDD0
-IDEIOR
PRIMARY IDE
VCC3_3
IDE1
IDE_RST_C
36
35
34
33
32
31
30
29
28
27
26
25
IU1
1 2
VDD12 VCC3_3 VCC3_3 IDEDD7 3 4 IDEDD8
IDEDD6 5 6 IDEDD9
IDEDREQ
IDEDACK_
IDEIOW_
IDEIOR_
IDEDD2
IDEDD13
IDEDD1
IDEDD14
IDEDD0
IDEDD15
IDEIORDY
VCC33_3
VDD12 IDEDD5 7 8 IDEDD10
IDEDD4 9 10 IDEDD11
IDEDD3 11 12 IDEDD12
IDEDD12 37 24 IDEDD2 13 14 IDEDD13
IDEDD3 IDEDD12 REG_EN_ IDEDA1 IDEDD1 IDEDD14
38 IDEDD3 IDEDA1/SPIMISO 23 15 16
VDD12 VCCA 39 22 IDEDA0 IDEDD0 17 18 IDEDD15
VDD12_2 IDEDA0/SPIMOSI IDEDA2
40 VCC33_2 IDEDA2/SPICLK 21 19
IDEDD11 41 20 IDEDREQ 21 22
IDEDD4 IDEDD11 VDD12_1 -IDEIOW
42 IDEDD4 VCC33_1 19 23 24
IR10 BEAD 60 0603 IDEDD10 43 18 IDEINTRQ -IDEIOR 25 26
IDEDD5 IDEDD10 VT6415 QFN48 IDEINTRQ -IDECS0 IDEIORDY
44 IDEDD5 IDECS0_ 17 27 28
IDEDD9 45 16 -IDECS1 -IDEDACK 29 30
GCT4 IC4 IC5 IC6 IDEDD6 IDEDD9 IDECS1_ -IDECBLID IDEINTRQ
46 IDEDD6 IDECBLID_ 15 31 32
100UF 16V 5X11 2mm LR 0.1UF 16V Y5V 0402 IDEDD8 47 14 IDEDA1 33 34 -IDECBLID
VCCAH_MAIN
0.1UF 16V Y5V 0402 1UF 10V Y5V 0402 IDEDD7 IDEDD8 SPICS_ PLTRST_N IDEDA0 IDEDA2
48 13 35 36
VCCAH_RX
IDEDD7 PERST_
PEX_REXT
-IDECS0 -IDECS1
VCCA_RX
37 38
VCCA_TX
REFCLK+
REFCLK-
HD_LED 39 40
30 HD_LED
PERp
PERn
IR3
TEST
PETp
PETn
49 EP_GND
C BOX 2X20 N20-R 10K 0402 /NI C
1
2
3
4
5
6
7
8
9
10
11
12
VDD12 VCCAH VCCA
100M_IDE_N
100M_IDE_P
IR17 5.62K 1% 0402
PCIE_TXN
PCIE_TXP
IDE_TXN
IDE_TXP
REXT
IC9 IC10 IC11
0.1UF 16V Y5V 0402 1UF 10V Y5V 0402
0.1UF 16V Y5V 0402 CLOSE TO IU1
10 IDE_RXP
IC1 0.1UF 16V X7R 0402 IR5 for single-slave-CF
card compatibility
IC2 0.1UF 16V X7R 0402
10 IDE_RXN
VCC3_3 VCCAH IDEDD7 IR5 10K 0402
10 IDE_TXP
10 IDE_TXN
IDEINTRQ IR7 10K 0402
IR12 BEAD 60 0603
100M_IDE_CLKP 100M_IDE_CLKN
IDEDREQ IR9 5.6K 0402
1
IC7 IC3 LC4
14 100M_IDE_CLKP
Near IDE
1UF 10V Y5V 0402
0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 Connector
B B
14 100M_IDE_CLKN
VCC3_3
IDEIORDY R91 4.7K 0402
Near Chip
VCC3_3
VCC3_3
8
6
4
2
RN36 VCC5
4.7K 8P4R 0402
Change @V6.4
7
5
3
1
IC8 IC13 IC12 IC14

0.1UF 16V Y5V 04020.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 10UF 10V 0805 Y5V
B
C IDE_RST_C
A PLTRST_N E A
4,12,26,31 PLTRST_N
IQ2
2N3904 SOT23

Title
applicable civil and/or criminal IDE-VT6415
IH55A-MHS 6.4

5 4 3 2 1
A B
Remove R1 & R2 C D E
in RTL8102EL
R1 application. +3V3_DUAL VDD33
LR17 0 0805 EVDD12
LR19 0 0805 VDD33

R2
*
CTRL12A LL1 CTRL12A_PWR LR18 0 0805 DVDD12
1
LC5 LC6 LC7 LC8
INDUCTOR 4.7UH 1.3A DIP LC23 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402
10UF 10V 0805 Y5V
2
LC10 LC28 LC9 LC11 LC12 LC13 LC14 LC15 LC16
10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V
4 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402
4
0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402
VDD33
LED-LINK-A LR1 330 0402 LED-LINK-A-C
VDD33
R3 value should be 2.49K (1%) LR6 330 0402 RJ45USB1B
330 0402 /NI

330 0402 /NI
for RTL8102EL and RTL8111DL
LR2
LR3
LR4
LR5
330 0402
330 0402
CTRL12/VDD
application Remove R4 and R5 in RTL8102EL MDI0+ 2 TX+
GLED- 11
LC17 +
LCT2
R3
LR7
R5
LR8
application. MDI0- 3 TX-
12
0.1UF 16V Y5V 0402 100UF 16V 5X11 2mm LR 2.49K 1% 0402 0 0402 MDI1+ GLED+ LR23 680 0402
4 RX+
R4 13 LED-100-A LR24 680 0402 EESK-100
LR9 0 0402 /NI MDI1- YLED-
5 N/C1
14 LED-1000-A LR25 680 0402 EEDO-1000
MDI2+ YLED+ LR26 680 0402
6
CTRL15/VDD33
N/C2
CTRL12/VDD
CTRL12/VDD
LED-LINK-A
MDI2- 7 RX-
CTRL12A
DVDD12
G1
For RTL8102EL, use this block. GND1
VDD33
VDD33
XTAL2
XTAL1
MDI3+ 8 G2
RSET
N/C3 GND2
GND3 G7
DVDD12 LR11 0 0805 /NI CTRL12/VDD MDI3- 9 G8
3 LU1
VDD33 1
N/C4
V_DAC
GND4
3
44
40
38
37
48
47
46
45
43
42
41
39
10 GNDP IO_GND
For RTL8111DL, use this block
NC/ENSWREG
CKTAL2
CKTAL1
RSET
VCTRL12A/SROUT12
VCTR12DVDDSR
NC/AVDD33
LED0
VDD33
GND
NC/LV_PLL
NC/VDDSR
LR10 LC18 LANUSB_GBMA
VDD33 LR13 0 0805 CTRL12/VDD 3.6K 0402 0.01UF 25V X7R 0402
VCC3_3
LC20 VDD33 1 36 DVDD12
LC29 MDI0+ AVDD33 DVDD12 EESK-100
2 MDIP0 LED1/EESK 35
MDI0- 3 34 EEDI
DVDD12 MDIN0 LED2/EEDI EEDO-1000 LR14
4 NC/FB12 LED3/EEDO 33
10UF 10V 0805 Y5V MDI1+ 5 32 EECS 1K 0402
10UF 10V 0805 Y5V MDI1- MDIP1 EECS
6 MDIN1 GND 31
7 30 DVDD12
MDI2+ GND DVDD12 VDD33 +3V3_DUAL +3V3_DUAL
8 NC/MDIP2 VDD33 29
MDI2- 9 28 ISOLATEB
DVDD12 NC/MDIN2 ISOLATEB PLTRST_N
10 DVDD12/AVDD12 PERSTB 27 LQ1 LQ2
MDI3+ 11 26 WAKE_N
MDI3- NC/MDIP3 LANWAKEB LR15 0 0402 /NI MDI1- MDI1+ MDI3- MDI3+
12 25 1 6 1 6
B1
B1
A2 + A1
A2 + A1
NC/MDIN3 CLKREQB LR12 LR16
NC/SMDATA
CM1293
CM1293
REFCLK_N
REFCLK_P
NC/SMCLK
1K 0402 /NI 15K 0402 2 5 2 5
B2 -
B2 -
DVDD12
EVDD12
HSON
EGND
HSOP
MDI0- 3 4 MDI0+ MDI2- 3 4 MDI2+

HSIN
HSIP
GND
CM1293 SOT23-6 CM1293 SOT23-6

RTL8111DL-GR LQFP48 LR12 is only required by RTL8102EL
SMB_DATA_MAIN
13
14
15
16
17
18
19
GBE_RXPP 20
GBE_RXNN 21
22
23
24
SMB_CLK_MAIN
and RTL8103EL.
GBEA_CLKN
GBEA_CLKP
GBEA_TXN
GBEA_TXP
2 2
DVDD12
XTAL1
LY2
25MHZ 20PF 30PPM
XTAL2
LC26 LC27
EVDD12 33P 50V NPO 0402 33P 50V NPO 0402
GBEA_CLKN GBEA_CLKP
LC21 LC22
0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402
1
14 GBEA_CLKN
14 GBEA_CLKP
LC24 0.1UF 16V X7R 0402 GBE_RXPP

10 GBEA_RXP
LC25 0.1UF 16V X7R 0402 GBE_RXNN
10 GBEA_RXN +3V3_DUAL
RN40
10 GBEA_TXP 1K 8P4R 0402
10 GBEA_TXN
1 2
3 4
1 8,9,12,17,20,21,22 SMB_CLK_MAIN
SMB_CLK_MAIN
SMB_DATA_MAIN
5
7
6
8 ◇ BIOSTAR'S PROPRIETARY INFORMATION◆
1
8,9,12,17,20,21,22 SMB_DATA_MAIN
WAKE_N
12,20,21 WAKE_N PLTRST_N Change @V0.62
4,12,25,31 PLTRST_N duplication, or disclosure of this
Title
applicable civil and/or criminal Size Document Number
RTL8111DL/RTL8102EL Rev
IH55A-MHS 6.4
C D E
5 4 3 2 1
100UF 16V 6.3X5 2.5mm LINEOUT_LEFT
+
ACT1 AR33 75 0402
12 AUD_LINK_RST_N LINEOUT_L 28
12 AUD_LINK_SYNC ACT2 100UF 16V 6.3X5 2.5mm LINEOUT_RIGHT
+
AR34 75 0402
12 AUD_LINK_SDO LINEOUT_R 28
AR2 33 0402
12 AUD_LINK_SDI2 AC1 10UF 10V 0805 Y5V LINE1_LEFT AR31 75 0402
12 AUD_LINK_BCLK LINE1_L 28
D D
+
AR3 75 0402 LINE2_LL ACT3 100UF 16V 6.3X5 2.5mm AC3 10UF 10V 0805 Y5V LINE1_RIGHT AR32 75 0402
28 LINE2_L LINE1_R 28
+
AC2 AR4 75 0402 LINE2_RR ACT4 100UF 16V 6.3X5 2.5mm AU1 AC4 10UF 10V 0805 Y5V MIC1_LEFT AR35 75 0402
28 LINE2_R MIC1_L 28
10P 50V NPO 0402 11 35 PORT-D-L
RESET# (I) FRONT_OUT_L (B) PORT-D-R AC5 10UF 10V 0805 Y5V MIC1_RIGHT AR36 75 0402
10 SYNC (I) FRONT_OUT_R (B) 36 MIC1_R 28
5 23 PORT-C-L
SDOUT (I) LINE_IN1_L (B) PORT-C-R
8 SDIN (O) LINE_IN1_R (B) 24 [email protected]
6 21 PORT-B-L
PORT-E-L BITCLK (I) MIC1_L (B) PORT-B-R
14 LINE_IN2_L (B) MIC1_R (B) 22
PORT-E-R 15 43
LINE_IN2_R (B) CENTER_OUT (O)
18 CD_L (I) LFE_OUT (O) 44
AR23 75 0402 MIC2_LL ACT6 10UF 10V 0805 Y5V 19 39
28 MIC2_L CD_GND (I) SURR_L (B)
20 CD_R (I) SURR_R (B) 41
PORT-F-L 16 34 SENSE_B AR30 47 0402
MIC2_L (B) SENSE_B (I) FRONT_IO_SENSE 28
AR24 75 0402 MIC2_RR ACT7 10UF 10V 0805 Y5V PORT-F-R 17 33 EXT_VOL_CTRL
28 MIC2_R MIC2_R (B) DCVOL (I)
13 40 JDREF
SENSE_A (I) JDREF SPDIFO
37 LINE1_VREFO_R (O) SPDIFO (O) 48 SPDIFO 28
AR5 5.1K 1% 0402 SENSE_A 45 47
28 FRONT_JD SIDESURR_L (O) SPDIFI/EAPD (B)
AR6 20K 1% 0402 46 27 VREF_AUD
28 MIC1_JD SIDESURR_R (O) VREF (O)
AR7 10K 1% 0402 Change @V6.3 12 28 MIC1_VREFO
28 LINE1_JD PC_BEEP (I) MIC1_VREFO_L (O) MIC1_VREFO 28
2 GPIO0 (B) LINE1_VREFO-L (O) 29
3 30 MIC2_VREFO
GPIO1 (B) MIC2_VREFO (O) LINE2_VREFO
4 GND1 (P) LINE2_VREFO (O) 31
7 GND2 (P) MIC1_VREFO_R (O) 32
1 VCC3_L AL2 10 0805
VCC3_1 (P) VCC3_3
VCC3_2 (P) 9
26 AGND1 (P) AVCC_1 (P) 25
12 AUD_PC_BEEP 42 AGND2 (P) AVCC_2 (P) 38 +
AC9 AC10 ACT15
C ALC662 LQFP48 1UF 10V Y5V 0402 10UF 10V 0805 Y5V C
LQFP48-0_5 VCC5_AUD
GND_AUD AC11 1UF 10V Y5V 0402

1UF 10V Y5V 0402
AC12
1UF 10V Y5V 0402
GND_AUD
VCC5_AUD
AR12
10K 0402 /NI
R0603
AQ1
BAT54A SOT23 EXT_VOL_CTRL
A AR8 4.7K 0402 LINE2-L LINE2_L 28
LINE2_VREFO KA
K AR9 4.7K 0402 LINE2-R LINE2_R 28 JDREF
K AR10 4.7K 0402 MIC2_R AR13

MIC2_R 28 20K 1% 0402
MIC2_VREFO KA
B B
A AR11 4.7K 0402 MIC2_L GND_AUD
MIC2_L 28
PLACE CLOSE TO CODEC
AQ2
BAT54A SOT23
Change @V6.4
VREF_AUD
AR14 0 0805
AC8 AC13
10UF 10V 0805 Y5V 0.1UF 16V Y5V 0402
GND_AUD
GND_AUD
A A

Title
applicable civil and/or criminal AUDIO CODEC ALC662
IH55A-MHS 6.4
5 4 3 2 1
5 4 3 2 1
VCC3_3
0: INTEL HD AUDIO DONGLE CONNECTED
1: INTEL HD AUDIO DONGLE UNCONNECTED
AR16
10K 0402 CONNECT TO SB
F_AUDIO1
Rear Panel Onboard Analog I/O 27 MIC2_L
MIC2_L 1 2
MIC2_R 3 4
27 MIC2_R FP_AUD_DETECT 12
LINE2_R 5 6 AR17 20K 1% 0402
27 LINE2_R
27 FRONT_IO_SENSE 7
32 AUDIO1D 27 LINE2_L
LINE2_L 9 10 AR18 39.2K 1% 0402
D
33 D
LINE1_JD 34 AC19 HEADER 2X5 N8 R
27 LINE1_JD
35 AR22 AR25
1 22K 0402 0 0402 /NI
AUDIO JACK 3HD AR27 1000P 50V X7R 0402 GND_AUD
22K 0402
AR28
LINE1_L AFB1 BEAD 60 0603 LINE1_L_C 22K 0402
27 LINE1_L
AR29 Change @V6.4
22K 0402
LINE1_R AFB2 BEAD 60 0603 LINE1_R_C GND_AUD GND_AUD
27 LINE1_R
AR37 AR38
22K 0402 22K 0402
AC17 AC18
100P 50V NPO 0402 100P 50V NPO 0402
AUDIO ANALOG POWER
GND_AUD
VCC12
VCC5_AUD
O
A
22 AUDIO1C
I
C C
23 AR19
FRONT_JD 24 110 1% 0402
27 FRONT_JD
25
1 ACT5 +
AUDIO JACK 3HD AQ3
LINEOUT_L AFB3 BEAD 60 0603 LINEOUT_L_C AZ1117H-ADJ SOT-223 100UF 16V 6.3X5 2.5mm
27 LINEOUT_L
LINEOUT_R AFB4 BEAD 60 0603 LINEOUT_R_C AR20

27 LINEOUT_R
330 1% 0402
AR40 AR39
22K 0402 22K 0402
AC23 AC24
100P 50V NPO 0402 100P 50V NPO 0402 VCC5 AFB7 JSPDIFOUT1
BEAD 60 0805 1A WAFER 1X3 BLACK GND_AUD
2 1 1
2 SPDIFO 27
GND_AUD 3
AC32
1UF 16V 0805 Y5V
27 MIC1_VREFO
KA
AQ4
B BAT54A SOT23 B
2 AUDIO1B
A
3 AUDIO1A
MIC1_JD 4 AR15 0 0805 /NI
27 MIC1_JD
5 G3 G1
G5
G1
AR26 AR21 1
2.2K 0402 2.2K 0402 AUDIO JACK 3HD
IO_GND Change @V6.3 GND_AUD
MIC1_L AFB5 BEAD 60 0603 MIC1_L_C
27 MIC1_L
G4 G2
G4
G3
G2
MIC1_R AFB6 BEAD 60 0603 MIC1_R_C
27 MIC1_R
AUDIO JACK 3HD
H1
AR41 AR42
22K 0402 22K 0402
AC30 AC31
100P 50V NPO 0402 100P 50V NPO 0402
IO_GND
GND_AUD
A A

Title
applicable civil and/or criminal AUDIO CONNECTOR
IH55A-MHS 6.4
Date: Sheet 28 of 38
5 4 3 2 1
5 4 3 2 1
POWER_JUSB2 POWER_JUSB2
POWER_JUSB2 RJ45USB1A
D SQ2 D
USBKB1A B1
USB_D8- 1 USB_D9- VCC0
6
B1
A2 + A1
B2
CM1293
DATA0-
4 8 2 5 +
B2 -
USB_D8- 3 7 USB_D9- CT8 B3
USB_D8+ USB_D9+ USB_D8+ 3 USB_D9+ 100UF 16V 5X11 2mm LR DATA0+
2 6 4
1 5 B4 GND0
C244
CM1293 SOT23-6 /NI 0.1UF 16V Y5V 0402
10 USB_D10- GND2 G3
G1
G2
10 USB_D10+
USB_KB G4
REAR PANEL USB 10
10
USB_D11-
USB_D11+ A1
GND3
VCC1
GND4 G5
A2 DATA1-
GND5 G6
IO_GND A3 DATA1+
10 USB_D8- A4 GND1
10 USB_D8+
LANUSB_GBMA IO_GND
10 USB_D9-
10 USB_D9+
POWER_JUSB2
SQ1
USB_D11+ 1 6 USB_D11-
B1
A2 + A1
CM1293
2 5
DEFAULT : 1-2 1_2ㄩSYSTEM VOLTAGE
B2 -
USB_D10- 3 USB_D10+
4
CLOSE 2_3ㄩDUAL VOLTAGE
C C
CM1293 SOT23-6 /NI +5V_DUAL JUSBV1 VCC5
HEADER 1X3 POWER_JUSB2
3 1
REAR PANEL USB
2
F5
*
POLY FUSE 2.0A
+
CT9
1000UF 6.3V 8X12
REAR USB PORT

POWER_JUSB1
FRONT USB PORT
B B
C288
1UF 16V 0805 Y5V DEFAULT : 2-3 CLOSE
+5V_DUAL JUSBV2 VCC5
Q16 POWER_JUSB1 POWER_JUSB1
HEADER 1X3
USB_D3- 1 6 USB_D2- 3 1
B1
F_USB1 A2 + A1
CM1293
1 2 2 5
2
B2 -
10 USB_D3- 3 4 USB_D2- 10
5 6 USB_D3+ 3 4 USB_D2+
10 USB_D3+ USB_D2+ 10
7 8
10 F6
CM1293 SOT23-6
*
POLY FUSE 2.0A
HEADER 2X5 N9 R-USB FRONT PANEL USB
CT10
1000UF 6.3V 8X12
POWER_JUSB1
Q17 POWER_JUSB1
C317 USB_D1- 1 6 USB_D0-
B1
A2 + A1
1UF 16V 0805 Y5V

CM1293
2 5
B2 -
A A
USB_D1+ 3 4 USB_D0+
F_USB2
CM1293 SOT23-6
1 2
3 4
10 USB_D1-
5 6
USB_D0- 10 ◇ Any unauthorized use, reproduction,
10 USB_D1+
7 8
USB_D0+ 10 FRONT PANEL USB duplication, or disclosure of this
10 Title
document will be subject to the USB CONN
HEADER 2X5 N9 R-USB penalties.◆ Custom
IH55A-MHS 6.4

5 4 3 2 1
5 4 3 2 1
CPU FAN/SYSTEM FAN1

VCC12
VCC12
CPU_FAN1 VCC5
1
A
D 2 R331
D
3
1
* C259
0.01UF 25V X7R 0402 4 3.3K 1% 0402
D2
VCC3_3 WAFER 1X4 2.54MM BAV99 SOT23 /NI
KA
R332 15K 0402
FAN1_TACH 31
R333 CPU
1
2.2K 0402 /NI
* C260
47NF 16V Y5V 0402
R334
6.19K 1% 0402
2
R335 100 0402
31 FAN_CTL1
VCC12
VCC12
SYS_FAN1 VCC5
1
A
2 R336
3
1
CT12
+
* C261
0.01UF 25V X7R 0402
3.3K 1% 0402
D3
C 100UF 16V 5X11 2mm LR WAFER 1X3 BAV99 SOT23 /NI C
KA
R337 15K 0402
FAN2_TACH 31
SYSTEM1
1
* C262
47NF 16V Y5V 0402
R338
6.19K 1% 0402
2
FRONT PANEL HEADER
VCC5
FPQ1
B B
2N3904 SOT23
For After Clear CMOS LED Glitter Issue
C
1
3
5
7
B FPRN1
100 8P4R 0402 PANEL1
HEADER 2X8 N_P11 +3V3_DUAL
2
4
6
8
E
12 SPKR
7 8 SPK_VCC 1 9 GPIO8 12
FPRN2 5 6 2 10 R342 470 0402 Q19
4.7K 8P4R 0402 3 4 VCC3_3 3 2N3906 SOT23
1 2 SPK_DAT 4 12 POWER_LED+ R343 470 0402 LED_R
CRNT_LMT_HDDLED1 5 13 C E
FPD1 HDD_LED- 6 14 POWER_LED-
25 HD_LED 2.2K 8P4R 0402
7 15
B
8 16 BASE_PNP_TR 7 8
BAT54A SOT23 ACPI_LED 31
5 6
11 SATA_LED BASE_NPN_TR 3 4 V_SM
C
FPR2 3VSB_EUP
FPR1 1K 0402 51 0402 EUP Q20 B
1 2
+3V3_DUAL RN15
2N3904 SOT23
FPR3 33 0402 WATCH_DOG
E
4,12 FP_RST_N FPR4
17 WATCH_DOG 22K 0402
PWRBTN_H FPR5 33 0402

PWRBTN_ 31
FPC1 FPC2
0.1UF 16V Y5V 0402 1UF 10V Y5V 0402
A A
Updated @V6.1 ◇ BIOSTAR'S PROPRIETARY INFORMATION◆

Title
applicable civil and/or criminal FAN&POWER CONN&FP
IH55A-MHS 6.4

5 4 3 2 1
5 4 3 2 1
36 OVCPU_CORE1 PDR7 24
36 OVCPU_CORE0 PDR6 24
PDR5 24
PDR4 24
RN20 PDR3 24 System tempreture
2.2K 8P4R 0402 PDR2 24
JP2 JP2 PDR1 24 SQ3
VCC3_3 8 7 24 RTSJ0
JP3 PDR0 24 TMPIN3 2N3906 SOT23
6 5 24 DSRJ0
JP4 JP3 STROBEJ 24
4 3 24 TXD0 E
RIJ0 ALFJ 24
2 1 3VSB_EUP 24 RXDJ0 C
JP4 GP67 ERRORJ 24 SC18
24 DTRJ0 B
PARINITJ 24 2200P 50V X7R 0402
24 DCDJ0 SLCTINJ 24 TS_D-
24 RIJ0
1
ACKJ 24
Updated @V6.2 20100318 For EUP Wake Up 24 CTSJ0 BUSY 24
PE 24
D SLCTJ 24 D
U7
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
IT8721FBX U7
VCC3_3 VCC3_3
SLIN#/GP84/SMBD_R
GP66/VLDT_EN
PD7/GP77/BUSSO2
PD6/GP76/BUSSO1
PD5/GP75/BUSSO0
PD4/GP74/BUSSI2
PD3/GP73/BUSSI1
PD2/GP72/BUSSI0
PD1/GP71
PD0/GP70
AFD#/GP86/SMBC_R
ACK#/GP83
RI1#
DTR1#/JP4
RTS1#
GP65/VDDA_EN
DCD1#
SIN1
SOUT1/JP3
DSR1#
ERR#
FAN_CTL4/VID_TURBO
GP67/CPU_PG
GNDD
STB#/GP87/SMBC_M
INIT#/GP85/SMBD_M
*
3VSB_EUP R348
4.7K 0402 FB12
EUP 1 102
BEAD 60 0603
CTS1# BUSY/GP82
2 101
FAN_CTL5/CIRRX2/GP16 PE/GP81
10 P_PCIRST_PCH_N 3 100
PCIRSTIN#/CIRTX2/GP15 SLCT/GP80
*
C265 1UF 10V Y5V 0402 4 99 AVCC3
3VSB AVCC3 VIN0
5 98 VIN0 36
1
36 OV_AXG0 VCORE_EN/GP64 VIN0
6 97 VIN1
* C266
* C267
D
36 OV_VTT0 VCORE_GOOD/GP63 VIN1 VIN1 36
7 96 VIN2 1UF 16V 0805 Y5V 10UF 10V 0805 Y5V
30 FAN1_TACH FAN_TAC1 VIN2 VIN2 36
8 95 VIN3 Q21
30 FAN_CTL1
2
FAN_CTL1 VIN3/ATXPG VIN4 PS_ON_N
30 FAN2_TACH 9 94 VIN4 36 2N7002 SOT23 G
GP52 FAN_TAC2/GP52 VIN4/VLDT_12 VIN5
1 10 93 VIN5 36
S
FAN_CTL2/GP51 VIN5/VDDA_25 VIN6
11 92 VIN6 36
36 OV_AXG1 GP36 FAN_TAC3/GP37 VIN6/VDIMM_STR VREF R351
1 12 91 1 2
*
FAN_CTL3/GP36 VREF C268
13 90 330 0402
36 VDIMM2 GP35 TMPIN1 1UF 10V Y5V 0402
GP10,20~27,40~44,53~57 14 89
36 VDIMM1 R370 4.7K 0402 GP34 TMPIN2 TMPIN3
15 88
60~61,Powered by VCCH
3VSB_EUP
35 5VSB_CTRL POWERGD_50mS
16
GNDD
5VSB_CTRL
IT8721F/BX TMPIN3
TS_D-
87 TS_D- FB22
* BEAD 60 0603 /NI
A
1 5VSB_CTRL
1 17 86 GNDA
POWERGD_50mS 5VAUX_SW GNDA RSM_RST_N VCC3_3
18 85
EUP 23,35,37 POWERGD_50mS
19
PWRGD2_50ms RSMRST#/CIRRX1/GP55
84 CIRRX
12 SPI_WP_N GP30 PCIRST3#/GP10/VDIMM_STR_EN VCC3_3
20 83 MCLK
SIN2/GP27 MCLK/GP56 MDAT R355
21 82
36 VDIMM0 SOUT2/GP26 MDAT/GP57
GP25 1 22 81 KCLK 24 1K 0402 SIO PWRGD IN
GP24 FAN_TAC4/DSR2#/GP25 KCLK/GP60 PWRGD_3V
1 23 80 KDAT 24 1
FAN_TAC5/RTS2#/GP24 KDAT/GP61 SLP_S4_N R357
24 79 1
GP23/SI 3VSBSW#/GP40 PWRGD_3V ACPI_LED 30
25 78 2.2K 0402
GP22/SCK PWRGD3_150ms PWRGD_3V 11,12,37
C 26 77 C
DCD2#/GP21 SUSC#/GP53 SLP_S4_N 12,17,35
27 76
CTS2#/GP20 PSON#/GP42 PS_ON_N 23 VIN3
28 75 PWRBTN_ 30
RI2#/GP17 PANSHW#/GP43
29 74 1 PWRBTN_ 1 PS_ON_N
CIRTX DTR2# GNDD +5V_DUAL
30 73 IO_PME_N 12 1
CE_N//CIRTX PME#/GP54 SLP_S3_N
SST/AMDTSI_D/PECI_AVA/MTRB#
31 72 R360
35 PECI_RQT PECI_RQT/GP14 PWRON#/GP44 SW_ON_N 12
POWERGD_30mS 32 71 0 0402 /NI
35 POWERGD_30mS PWRGD1_30ms SUSB# SLP_S3_N 12,34,35
33 70 R387 100 0402 +3V3_DUAL
20,21 PLTRST_PCIE_SLOTS_N PCIRST1#/GP12 SYS_3VSB
34 69 VRTC_DET R359 ATXPWRGD
22 P_PCIRST_N PCIRST2#/GP11 VBAT
1
3VSB_EUP 35 68 R366 1K 0402
* C269 10K 0402 /NI
C
3VSB COPEN# PG_PWR_OUT
PECI/SBTSI_C/DRVB#
36 67 1UF 16V 0805 Y5V
VCORE 3VSB
SMBD_M2/WGATE#
37 66 B Q22
SMBD_R2/HDSEL#
2
4,12,25,26 PLTRST_N LRESET# GP47
SMBC_M2/STEP#
38 65 2N3904 SOT23 /NI
EUP
C
1
12 L_DRQ_N LDRQ# DSKCHG#
SMBC_R2/DIR#
E
1
KRST#/GP62
* C270 +3V3_DUAL R372 10K 0402 /NI 3VSB_EUP 23,35 PG_PWR_OUT
R367 10K 0402 /NI B Q23
2N3904 SOT23 /NI
LFRAME#
GA20/JP5
DENSEL#
SO/GP50
WDATA#
RDATA#
SERIRQ
0.1UF 16V Y5V 0402
INDEX#
PCICLK
EUP
MTRA#
DRVA#
2
TRK0#
E
1
1
CLKIN
GNDD
WPT#
C271
* * * C272 R373
LAD0
LAD1
LAD2
LAD3
0.01UF 25V X7R 0402 10UF 10V 0805 Y5V 5.6K 0402 /NI
C273
2
2
0.01UF 25V X7R 0402
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
R375 10K 0402 VCC3_3
VCC3_3 VIN1 R368 0 0402 /NI ATXPWRGD
CHIP_THERM_ 12 36 VIN1
R378 1K 0402 POWERGD_30mS +3V3_DUAL

For Control PCH PECI
8 7 POWERGD_50mS 11,12 SER_IRQ
6 5 PLTRST_PCIE_SLOTS_N 12 L_FRAME_N R390 0 0402 /NI R353
12 LAD0 H_PECI 4,11
4 3 P_PCIRST_N 10K 0402
2 1 12 LAD1 R391 0 0402 /NI
12 LAD2 SST_CTL 11
RN19
1K 8P4R 0402 12 LAD3
11 KBRST_N JP5 RSM_RST_N
B SML1CLK_PCH 12 RSM_RST_N 12 B
KBRST_N 11 A20GATE
8 7 14 PCLK_IO
6 5 A20GATE
17 IO_48MHZ SML1DATA_PCH 12
4 3 PLTRST_N SW_ON_N R379 4.7K 0402 +3V3_DUAL
2 1
RN17 R386 10K 0402 /NI GP47: To generate an
VCC3_3
1K 8P4R 0402
event for the function
36 OV_VTT1
R394 L_FRAME_N
2ch:1 +5V_DUAL
10K 0402 /NI
8 7 LAD0 AVCC
6 5 LAD1 VIN0 PWRGD1_150ms
4
2
3
1
LAD2
LAD3
VIN1
VIN3/ATXPWRGD & PWRGD1_50ms 3VSB
RN18 SUSB# PWRGD1_30ms Energy-Using Product(EUP)
10K 8P4R 0402
R196 R197
2.2K 0402 2.2K 0402
+5V_STBY 3VSB_EUP
+3V3_DUAL MDAT
MCLK
R354 0 0805 /NI
VCC3_3 +5V_DUAL +5V_DUAL

+
CT6 R328 R1
1000UF 6.3V 8X12 200 1% 0402
1
A R134 R77 * C301

10UF 10V 0805 Y5V A
10K 0402
2
10K 0402 /NI

R2
O
A
CIR1
I
SQ4 R347
CIRRX 1 2
1 2
AZ1117H-ADJ SOT-223 330 1% 0402 ◇ BIOSTAR'S PROPRIETARY INFORMATION◆
3
3 NC
CIRTX 5
5 6
6 ◇ Any unauthorized use, reproduction,
HEADER 2X3 N4 R
Vout=Vref (1.25V) X ( 1+R2/R1 )
=3.39V document will be subject to the SUPER I/O ITE IT8721F/BX
IH55A-MHS 6.4

5 4 3 2 1
5 4 3 2 1
UP6219 FOR Intel P4 VRD11.1 POWER CKT - 3PHASE

VCC12
A
PD1 PD2 PD3
V_1P1_VTT VCC3_3
VIN
VCC5 VCC12 VCC12
BAT54C SOT23 BAT54C SOT23 BAT54C SOT23
KA
KA
KA
BOOT3 VIN
2
4
6
8
BOOT2 PC22
PRN1 BOOT1 4.7UF 16V Y5V 0805
1K 8P4R 0402 D/源倛 CHOKE 0.6uH/40A/DCR0.8m
D
PR9 PR14 PR25 PQ1
1
3
5
7
D
4 CPU_PSI# Change @V0.62
2.7 0805
2.7 0805 2.7 0805
UG1 PR6 1 0805 G P0903BDG TO252 /ELDA-1312-R60M-P/謠醱..薯 D
PL3
S
VCC5 VCC12_1 VCC12_2 PR7 10K 0402 INDUCTOR 0.6UH 40A 13X12 YF
12,17 PCH_SYSPWROK PHASE1 1 2
PC21 34 PWM_EN PC29 PC34 PC38

0.1UF 16V Y5V 0402 PC25 1UF 16V 0805 Y5V 4.7UF 16V Y5V 0805 220P 50V X7R 0402 /NI PQ2 PQ7 PR8 CPU_VCCP
2.7 0805 PR12 PR11
PR2 1UF 10V Y5V 0402 LG1 PR10 0 0805 ISEN_SHORT /NI ISEN_SHORT /NI
680 0402 P75N02LDG TO252 P75N02LDG TO252
PC24
18
3
PU1 UP6219 QFP48 1000P 50V X7R 0402
47
VCC5
EN
VRSEL
12,17 VR_READY 48 33
VR_RDY VCC12_1 BOOT1 PC23 0.1UF 16V X7R 0402
4 H_VID7 38 37
CPU_VCCP VID7 BOOT1 PR16 28K 1% 0402
4 H_VID6 39 + + +
VID6 UG1 PCT5 PCT6 PCT7
4 H_VID5 40 36
VID5 UG1 820UF-S 2.5V 6.3X8 ELITE
4 H_VID4 41
VID4 PHASE1 VIN 820UF-S 2.5V 6.3X8 ELITE
4 H_VID3 42 35
VID3 PH1 820UF-S 2.5V 6.3X8 ELITE
4 H_VID2 43
PR39 VID2 LG1
4 H_VID1 44 34
VID1 LG1 ISEN1 PR15 20K 1% 0402 VIN
100 0402 4 H_VID0 45 16
VID0 ISEN1 PC31
4.7UF 16V Y5V 0805
36 OV_CPU
PR48 1K 0402 /NI PC33 4700P 50V X7R 0402 /NI
TYPE3
D
6 28 VCC12_2 PQ3
PR33 100 0402 OV_CPU PR44 1K 1% 0402 FB VCC12_2 BOOT2 PC30 0.1UF 16V X7R 0402
4 VCC_SENSE 32
BOOT2 UG2 PR18 1 0805 P0903BDG TO252
7 G
PC43 PC26 4700P 50V X7R 0402 COMP UG2 PL2
31
S
PR13 10K 1% 0402 UG2 PR19 10K 0402 INDUCTOR 0.6UH 40A 13X12 YF
4700P 50V X7R 0402 /NI TYPE2 PH2
30 PHASE2 PHASE2 1 2
PR37 0 0402 PC28 33P 50V NPO 0402 20
4 VSS_SENSE VOUT LG2
19 29 PC44
TB LG2 ISEN2 PR28 20K 1% 0402 220P 50V X7R 0402 /NI PQ4 PQ8 PR20
15
PR42 PC36 FBRTN ISEN2 2.7 0805 PR26 PR24
46 + + +
PR30 4.7K 0402 FBRTN LG2 PR21 0 0805 ISEN_SHORT /NI ISEN_SHORT /NI PCT8 PCT9 PCT10
100 0402
100P 50V NPO 0402 P75N02LDG TO252 P75N02LDG TO252 820UF-S 2.5V 6.3X8 ELITE
C 24 BOOT3 PC35 0.1UF 16V X7R 0402 PC32 820UF-S 2.5V 6.3X8 ELITE C
CSP BOOT3 1000P 50V X7R 0402 820UF-S 2.5V 6.3X8 ELITE
8
CSN CSP UG3
9 25
CSN UG3
12 26 PHASE3
PS1 PH3 PR29 28K 1% 0402
PC72 1
PS2 LG3
27
0.1UF 16V Y5V 0402 /NI LG3 ISEN3 PR40 20K 1% 0402 VIN
4 14
PR17 DAC ISEN3
5
PR63 0 0402 1.27K 1% 0402 EAP VIN
4 MCP_INSENSE_DP VCC5
36 IMON_SIO IMON_SIO
Vimon=Rimon*Iavg PR46 10K 1% 0402 10 PC37
IOUT 4.7UF 16V Y5V 0805
23
D
=Rimon*DCR*Iout/Rcsn VCC5 PWM4 PQ5
PC42 100P 50V NPO 0402 13
=9.6*Iout (mv) OFS 11
ISEN4 UG3 PR31 1 0805 G P0903BDG TO252
OFS PL4
S
2 PR32 10K 0402 INDUCTOR 0.6UH 40A 13X12 YF
PR45 SS PHASE3
22 1 2
GND
VR_HOT
1.1K 1% 0402 /NI 17 21
RT TM PC45 PR35
220P 50V X7R 0402 /NI PQ9 PQ6 2.7 0805
49
PR36 PR38
1.Posi Vofs=0.4/Rofs*Rfb PC27 LG3 PR34 0 0805 ISEN_SHORT /NI ISEN_SHORT /NI
PR3 P75N02LDG TO252 P75N02LDG TO252 PC39
2.Nega Vofs=1.6/Rofs*Rfb PR47 2200P 50V X7R 0402 51K 0402 1000P 50V X7R 0402
1.1K 1% 0402 /NI
3.FS=10000/Rrt BOTTOM PAD
4.OCP Iavg=Iout*DCR/Rcsn CONNECT TO GND
Through 8 VIAs PR41 28K 1% 0402
OCP 60uA=Iout*DCR/Rcsn
5.P*L/DCR=RCSP*Ccs
CSP
PC40
B
0.1UF 16V X7R 0402 B
CSN PR43 931 1% 0402
PC41
0.1UF 16V X7R 0402
[email protected]
VCC12QQ VIN
ATXPWR2 CPU_VCCP CPU_VCCP CPU_VCCP CPU_VCCP CPU_VCCP CPU_VCCP CPU_VCCP CPU_VCCP
4 1 PL1
4 1
3 2 1 2 1.2UH 30A 11X10.5 CARVE
3 2 BPC17 PC50 PC54 PC53 PC46 PC55 BPC20 BPC24
10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V
1
POWER CONN ATX12V 2X2 + + +

PCT2 PCT3 PCT4
270UF-S 16V 8X11 ELITE
3
270UF-S 16V 8X11 ELITE

270UF-S 16V 8X11 ELITE CPU_VCCP CPU_VCCP CPU_VCCP CPU_VCCP CPU_VCCP CPU_VCCP CPU_VCCP CPU_VCCP
BPC19 BPC18 BPC22 PC48 PC49 BPC21 PC51 PC47

10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V
PCT[2,3,4]
Netin: "1500UF 16V 10X20X5 LR O 8X11" CPU_VCCP
A A
"270UF-S 16V 8X11 ELITE 10X20"
BOM: BPC23
Solid Cap:"270UF-S 16V 8X11 ELITE"(Default) 10UF 10V 0805 Y5V
"270UF-S 16V 8X11.5" ◇ BIOSTAR'S PROPRIETARY INFORMATION ◆

Normal: "1500UF 16V 10X20X5 LR O " CPU_VCCP
BPC28 document will be subject to the
10UF 10V 0805 Y5V
VCC_CORE DC-DC Converter
IH55A-MHS 6.4
Date: Sheet 32 of 38
5 4 3 2 1
5 4 3 2 1
VCC5
V_6117
VCC5
GD1
GR1 BAT54C SOT23
1
V_1P1_VTT 2.7 0805 * GC1
1
1UF 16V 0805 Y5V *
2
GC2
GR3 1UF 16V 0805 Y5V Netin:"1500UF 16V 10X20X5 LR O 8X11"
2
GU1
23
1K 0402
UP6117 VQFN28 VIN
BOM:
5 POK 18
VCC
DEM# Solid Cap:"270UF-S 16V 8X11 ELITE"(Default)
34 DFGT_VR_EN 24 EN
H_VID_DFGT7_R 4 VID7 "270UF-S 16V 8X11.5"
D D
H_VID_DFGT6_R 3 VID6 22 Normal: "1500UF 16V 10X20X5 LR O "
H_VID_DFGT5_R VIN
2 VID5
H_VID_DFGT4_R 1 VID4
2
H_VID_DFGT3_R
H_VID_DFGT2_R
28 VID3
27 VID2 GC5 0.1UF 16V X7R 0402 * GC3 +
H_VID_DFGT1_R 26 VID1 21 1 2 4.7UF 16V Y5V 0805 GCT1 270UF-S 16V 8X11 ELITE
2
BOOT
*
H_VID_DFGT0_R 25 VID0
3
GQ1 V_AXG
20 AXG_UG1 GR6 1 0805 G
UGATE P0903BDG TO252 20A Max
S
GR27 20K 0402 TL1
INDUCTOR 0.6UH 40A 13X12 YF
19 AXG_PH1 D/源倛 CHOKE 0.6uH/40A/DCR0.8m
PHASE
/ELDA-1312-R60M-P/謠醱..薯
*
2 1 GC4
36 OV_AXG
GC6 100P 50V NPO 0402 220P 50V X7R 0402 /NI GQ2 GQ3 GR7
LGATE 17 2.7 0805
V_AXG GR25 GR9 36K 1% 040212 AXG_LG1 GR8 0 0805 GP1 GP2
39.2K 1% 0402 IMAX P75N02LDG TO252 ISEN_SHORT /NI ISEN_SHORT /NI
1
GR10 30K 1% 040216
RT
P75N02LDG TO252
* GC7
V_AXG V_AXG
GR11 1000P 50V X7R 0402
2
*
100 0402 GR12 0 0402 GCT3 GCT5
GC8 1000P 50V X7R 0402 Ccs Rcsp
GR13 100 0402 GR14 1K 0402 10 FB 14 GR15 12.1K 1% 0402 820UF-S 2.5V 6.3X8 ELITE 820UF-S 2.5V 6.3X8 ELITE
4 VCCAXG_SENSE CSP
1
4 VSSAXG_SENSE
GR16 0 0402 6 FBRTN
Rcsn * GC9
15 GR17 1K 1% 0402 0.1UF 16V X7R 0402
2
GR18 10K 0402 /NI CSN
V_6117
1
C GR19
100 0402 GR21 9 OFS TB 13 GR22 2.2K 0402 /NI GR20 Rtb * GC10
C
10K 0402 /NI 8.2K 1% 0402 /NI 0.1UF 16V Y5V 0402 /NI
2
7 V_AXG V_AXG
SS GC11
11 1 2 33P 50V NPO 0402
*
GR23 11K 1% 0402 COMP
8 EAP
GND
1
1
* Rdroop * GR24 51K 0402 GC13
1 2
* *
*
GC12 GC14 GC16 GC17
1
2200P 50V X7R 0402 0.01UF 25V X7R 0402 /NI * 0.01UF 25V X7R 0402 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V
2
29
2
GC15
470P 50V X7R 0402 /NI
2 Vimax=Rimax*Isen/2<1.2V
L/Rdc=Rcsp*Ccs
V_AXG V_AXG
Isen=IL*Rdc/Rcsn=16uA
1
Vout=Vss-Rdroop*Isen/2 * GC18 * GC19
10UF 10V 0805 Y5V 10UF 10V 0805 Y5V
Default VID Setting=1.0V
2
Vout-Vtb=10uA*Rtb
ChangeTo [email protected]
B B
V_AXG
V_1P1_VTT
GC20
10UF 10V 0805 Y5V
GR36 GR37 GR38

1K 0402 1K 0402 1K 0402
V_AXG V_AXG
H_VID_DFGT7_R
4 H_VID_DFGT6
H_VID_DFGT6_R
4 H_VID_DFGT5
BPC26 BPC27
H_VID_DFGT5_R 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V
4 H_VID_DFGT4
H_VID_DFGT4_R
4 H_VID_DFGT3
H_VID_DFGT3_R
4 H_VID_DFGT2
H_VID_DFGT2_R
4 H_VID_DFGT1
H_VID_DFGT1_R
4 H_VID_DFGT0
A H_VID_DFGT0_R A

GR35 GR34 GR33 GR32 GR28
1K 0402 1K 0402 1K 0402 1K 0402 1K 0402 ◇ Any unauthorized use, reproduction,
Title
applicable civil and/or criminal VAXG DC-DC CONVER
IH55A-MHS 6.4

5 4 3 2 1
5 4 3 2 1
VCC12 FP6321A uP6101B

VIN Netin:"1500UF 16V 10X20X5 LR O 8X11"
NI 13.7K 1% 0402
R283 R1
10 0805
BOM:
D8 SS12/5817 SMA Solid Cap:"270UF-S 16V 8X11 ELITE"(Default)
A K "270UF-S 16V 8X11.5" R2 NI 26.1K 1% 0402
Normal: "1500UF 16V 10X20X5 LR O "
R269
10 0805 R3 30K 1% 0402 NI
2
CT31
1
D * C26
+ 270UF-S 16V 8X11 ELITE
R4 NI 0 0402
D
1UF 16V 0805 Y5V
3
C316
1UF 16V 0805 Y5V VTT_BOOT R5 NI NI
30A Imax
R270 V_1P1_VTT V_1P1_VTT C1 NI 5P 50V NPO 0402
10K 1% 0402
5
R341 C264 C2 NI 4700P 50V X7R 0402
EN_VTT 7 1 1 0805 Q73 0.1UF 16V X7R 0402
VCC
COMP BOOT VTT_HG1 P0903BDG TO252
UGATE 2
8 VTT_PH1 L12 INDUCTOR 0.6UH 40A 13X12 YF
0.1UF 16V X7R 0402 /NI
R151 PHASE RVTT1

R1
10K 1% 0402 /NI C1 R340 R339 100 0402
Vout = 0.8V*[(1+R1/R2]=1.2V
GND
C335 6 4 VTT_LG1 C32 2.7 0805
FB LGATE Q74 220P 50V X7R 0402 /NI C119 CT11 + CT30 + CT32 +
C113 0 0805 P0903BDG TO252 0.01UF 50V X7R 0402 /NI
3
C2 5P 50V NPO 0402 /NI U5 R2 C336 820UF-S 2.5V 6.3X8 ELITE
820UF-S 2.5V 6.3X8820UF-S
ELITE 2.5V 6.3X8 ELITE
C103 UP6109 SOP8 R324 VCCTT_SENSE 4
20K 1% 0402 /NI Q75 1000P 50V X7R 0402 R186
4700P 50V X7R 0402 /NI P0903BDG TO252 1K 1% 0402 /NI R1 R345
1K 1% 0402 V_1P1_VTT
R4
R210 0 0402 /NI [email protected] 20100419 OV_VTT 36
BTPC2
R3 Connect FB Trace To Real Loading Location 10UF 10V 0805 Y5V
R296 20K 1% 0402 /NI R297
C 2K 1% 0402 C
V_1P1_VTT R2
R205 R5 (40uA*Roc-0.4V)/Rds(on)=Ioc(130A)
0 0402 /NI VSSTT_SENSE 4
R468
1K 0402
RVTT2
100 0402 V_1P1_VTT V_1P1_VTT V_1P1_VTT
H_VTTPWRGD_CPU 4
SLP_S3_N H_VTTPWRGD H_VTTPWRGD
C
R126 10K 0402 B Q41
0 0 0 2N3904 SOT23 C282 TPC4 TPC5 TPC6
1000P 50V X7R 0402 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V
E
0 1 0 VCC3_3
1 0 0
1 1 1
H_DFGT_VR_EN 4 VCC5 V_1P1_VTT V_1P1_VTT V_1P1_VTT
2
4
6
8
+3V3_DUAL RN46
1K 8P4R 0402 R492 TPC7 TPC8 TPC9
1K 0402 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V
1
3
5
7
+3V3_DUAL
DFGT_VR_EN
PWM_EN 32
B B
C
R441 PWM_CTRL_R PWM_CTRL_R R133 10K 0402 B Q46 R503 PC1
V_1P1_VTT 1K 0402 2N3904 SOT23 1K 0402 0.1UF 16V X7R 0402
V_1P1_VTT V_1P1_VTT V_1P1_VTT
E
R203
C
15K 0402 /NI

RN47 PWM_CTRL_L B Q34 PC2
R443 10K 8P4R 0402 2N3904 SOT23 0.1UF 16V X7R 0402 BTPC8 BTPC1 BTPC7
C
3.3K 0402 7 8 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V
E
5 6 B Q31
3 4 2N3904 SOT23
C
1 2 V_1P1_VTT
E
B Q32
2N3904 SOT23
1
*
E
C289 R440
1UF 16V 0805 Y5V Q33.B 8.2K 0402
2
V_1P1_VTT V_1P1_VTT V_1P1_VTT

DFGT_VR_EN
DFGT_VR_EN 33
For delay 100ns min,50ms max
C
BTPC3 BTPC4 TPC13

Q33.B B Q33 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V /NI
C
2N3904 SOT23 [email protected] 20100423

B Q35
E
2N3904 SOT23
E
A A
[email protected]
C
R447 4.7K 0402 B Q36 V_1P1_VTT V_1P1_VTT V_1P1_VTT V_1P1_VTT V_1P1_VTT V_1P1_VTT V_1P1_VTT V_1P1_VTT V_1P1_VTT
12,31,35 SLP_S3_N 2N3904 SOT23
E
TPC2 BTPC5 TPC10 TPC11 BTPC11 TPC12 BTPC12 BTPC9 BTPC10

10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V10UF 10V 0805 Y5V
10UF 10V 0805 Y5V 10UF 10V 0805Title
Y5V
VTT DC-DC Conver

For H_VTTPWRGD fall down fasterly than VTT when power off Size Document Number Rev
Custom
IH55A-MHS 6.4

5 4 3 2 1
5
+5V_STBY VCC12 +5V_DUAL 4 3 2 VCC5 1
K
+5V_DUAL
Q37
BAT54C SOT23
* Change @V6.0 NETIN:"560UF-S 6.3V 6.3X8 8X8" +5V_STBY +5V_DUAL VCC12
+
L7 CT20 Q38
BOM:
RH TYPE BEAD 1000UF 6.3V 8X12 P0903BDG TO252
Solid Cap:"270UF-S 16V 8X11 ELITE" R453 R493 R450
"270UF-S 16V 8X11.5" 10K 0402 10K 0402 /NI 10K 0402 S
"560UF-S 6.3V 6.3X8" D
D
KA
R465 10 0805 VSM_5VDUAL Normal: "1000UF 10V 8X14X3.5 LR O"(Default) 5V_DUAL_CTL G
G
D6 +
K A
D
R448 SS12/5817 SMA Q42 CT18
C290
3
2N7002 SOT23 1000UF 6.3V 8X12
10 0805
*
*
2 1 VSM_BOOT C291 + CT28 G
1000UF 10V 8X14X3.5 LR O +5V_STBY R467
D D
S
2
1UF 16V 0805 Y5V R449 10UF 10V 0805 Y5V 0 0805 /NI
C
2
10K 1% 0402
1
C292 R457 10K 0402B Q43
* 31 POWERGD_30mS
5
U9 R451 0.1UF 16V X7R 0402 V_SM +5V_DUAL V_SM V_SM_VTT 2N3904 SOT23 D9 +5V_STBY-P7V
EN_VSM 1 0805 Q39 A K
7 1 Change @V6.2
VCC
E
2
COMP BOOT VSM_HG1 P0903BDG TO252 U10 SS12/5817 SMA
2
UGATE VSM_PH1 L8 1.2UH 30A 11X10.5 CARVE R459 10K 0402 /NI R158
8 23,31 PG_PWR_OUT
PHASE FP6137E SOP8 200 0402 /NI
S
R211 C34 Q44
GND
10K 1% 0402 /NI 6 4 VSM_LG1 Q40 R454 C295 R1 8 1 C37 SI2301BDS SOT23 Q45
3
FB LGATE VCTL4 Vin
GND_PAD
C115 R452 P75N02LDG TO252 2.7 0805 7 2 R463 10UF 10V 0805 Y5V SI2301BDS SOT23
5P 50V NPO 0402 /NI FP6321A SOP8 0 0805 220P 50V X7R 0402 /NI 0.1UF 16V Y5V 0402 /NI R456 CT33 VCTL3 GND 1K 1% 0402
+ + + G G
3
R455 360 1% 0402 CT13 CT29 6 3
1
42.2K 1% 0402 /NI C294 VCTL2 Ref
* 5 4
Energy-Using Product(EUP)
D
C114 1000UF 6.3V 8X12 1000UF 6.3V 8X12 VCTL1 VOUT
4700P 50V X7R 0402 /NI 1000P 50V X7R 0402 R199 1000UF 6.3V 8X12
9
1K 1% 0402 /NI R462 R202 0 0402 2301_GATE#
1
R212
0 0402 /NI
MEM_OV 36 * C293
1K 1% 0402
* D4
1UF 16V 0805 Y5V CT19 K
2
Change @V6.2 R2 R461 1000UF 6.3V 8X12
R460 30K 1% 0402 715 1% 0402 NETIN:560UF-S 6.3V 6.3X8 8X8 +5V_STBY KA
A
(40uA*Roc-0.4V)/Rds(on)=Ioc(133A) BOM:1000UF 6.3V 8X12(Default)
1
* R213 560UF-S 6.3V 6.3X8

0 0402 /NI BAT54C SOT23 /NI
2
+5V_DUAL R479 +5V_STBY

10K 0402
C296 0.1UF 16V X7R 0402 /NI
EN_VSM
20A TDC V_SM V_SM V_SM V_SM
Vout=0.8V X(1+R1/R2)=1.2V (Default=1.6V) 5VSB_CTRL_L 5VSB_GATE#
R464
10K 0402 Q68
C
* +5V_STBY
C
1
CT21 BPC29 BPC30 BPC31 R476 10K 0402
31 5VSB_CTRL B
*
1
Q47 C315 C312
B
2N3904 SOT23 560UF-S 6.3V 6.3X8 /NI 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V 10UF 10V 0805 Y5V * R498
C C
2
2N3904 SOT23 10UF 10V 0805 Y5V /NI 10K 0402
C
2
R466 10K 0402 S4_GATE B Q49
12,17,31 SLP_S4_N 2N3904 SOT23
E
1
1
C299 Q70 C313
* *
E
1UF 10V Y5V 0402 5VSB_GATE_L R209 10K 0402 B

2N3906 SOT23 10UF 10V 0805 Y5V
2
2
D
C
Q69
2N7002 SOT23 5VSB_GATE#
G
R499
S
4.7K 0402
PCH CORE VOLTAGE STEP BY 10uA*1K(R479)=0.01V 5VSB_CTRL LOW(S5): +5V_DUAL=0V

5VSB_CTRL HIGH/ATX_PWRGD LOW: +5V_DUAL FORM +5V_STBY
5VSB_CTRL HIGH/ATX_PWRGD HIGH: +5V_DUAL FORM VCC5
V_SM
2V5_REF
D + CT22
R469
VCC12
Q50
P0903BDG TO252 D
1000UF 6.3V 8X12
VCC5 2V5_REF
V_SFR VOLTAGE VCC3_3
+5V_DUAL 4.02K 1% 0402 G V_1P05_PCH V_1P05_ME

S
U11A R471 0 0805 /NI

4
LM324 SO14 R472 0 0805 /NI

R470 V1P05PCH_EN REF0_8 3 PWR R481 + CT15
10K 0402 + 110 1% 0402 100UF 16V 5X11 2mm LR
V1 1
COLAY NEAR PCH
D
G
2
B 6.5A Imax B
C
-
C302 R473 GND R478 Q52
B Q51 1.87K 1% 0402 1.33K 1% 0402 VCC12 P0903BDG TO252 D
Test: 2.15A
11
2N3904 SOT23 R475

1K 0402 V_1P05_PCH V_1P05_FILTER G
C
S
R474 10K 0402B Q53 1UF 10V Y5V 0402 R1 U11B
1.5A TDC
C
12,31,34 SLP_S3_N
4
2N3904 SOT23 R477 1.27K 1% 0402 LM324 SO14
1
C303 Q55 V_1P8_SFR_ADJ PWR

* 5
E
1UF 10V Y5V 0402 +

LM431 SOT23 7
Test: 0.68A
S
6
2
1
-
C304 C306
R2 R480 Vout=V1X(1+R1/R2)=1.107V
* 10UF 10V 0805 Y5V + CT24 R482 * 1UF 10V Y5V 0402
GND
11
3.3K 1% 0402 820UF-S 2.5V 6.3X8 ELITE 3.48K 1% 0402 R484 V_1P8_SFR
2
2
1K 0402
A
2
C
R483 B Q54 R486 20 1% 0402

23,31,37 POWERGD_50mS 2N3904 SOT23 /NI
10K 0402 /NI
NETIN:560UF-S 6.3V 6.3X8 8X8
E
1
* C307 BOM:1000UF 6.3V 8X12
1
1UF 10V Y5V 0402 /NI CT25 C308
820UF-S 2.5V 6.3X8 ELITE (Default) +5V_DUAL 1000UF 6.3V 8X12
+
* 10UF 10V 0805 Y5V
2
2
12 S_SLP_M#
C300
+5V_DUAL +3V3_DUAL +3V3_DUAL 10UF 10V 0805 Y5V
31 PECI_RQT
8
U6
2.5A Imax
NC2
NC1
VCTNL
NC
Change @V6.3 20100427 R488
S
10K 0402 Q56 FP6137E SOP8

SI2301BDS SOT23 +3V3_DUAL
Test: 0.34A
1
3
5
7
9
ME_G RN39 GND2
G
VCC3_3 10K 8P4R 0402 REFEN
GND1
VOUT
V_3P3_EPW VCC3_3
A A
C
2
4
6
8
D
1
VIN
C310 V_1P05_ME_EN V_1P05_ME

R490 10K 0402B Q57 * 4.7UF 16V Y5V 0805 /NI
C
12 S_SLP_M#
1
2N3904 SOT23 R491 0 0402 /NI C309 C274

*
2
4
1
C311 Q65 1UF 10V Y5V 0402 +3V3_DUAL

* B
E
1UF 10V Y5V 0402 2N3904 SOT23 10UF 10V 0805 Y5V
2
C
E
2
B Q67
1
ME_G 17 2N3904 SOT23 Change @V6.3 20100427
R1 R2
* C257
* C258
* C314 * CT26
1000UF 6.3V 8X12
E
R458 R485 10UF 10V 0805 Y5V 1UF 10V Y5V 0402 1UF 10V Y5V 0402
2
2
2K 1% 0402 1K 1% 0402 Title
Miscellaneous DC-DC 1
Refer To DG Page313 Vout=Vref (3.3V) X ( R2/R1+R2 )
Place Close To U6 PIN1 Size Document Number Rev
=1.1V Custom
IH55A-MHS 6.4
5 4 3 2 1
5 4 3 2 1
Note: VIN0,VIN1 Must be around 2.8V(>=2.9V) Hardware monitor

32 IMON_SIO
R405 1K 1% 0402 /NI

VCC12 VCC5 CPU_VCCP V_AXG V_SM V_1P1_VTT
D R398
30.1K 1% 0402
R399
7.5K 1% 0402
R400
R402 R403 R404
D
1K 1% 0402 1K 1% 0402 1K 1% 0402 1K 1% 0402
VIN0
31 VIN0
VIN1
31 VIN1
VIN2
31 VIN2
VIN4
OV_AXG0 OV_AXG1 CPU_VCCP
31 VIN4
VIN5 R105 2K 1% 0402 1 1 Default
31 VIN5 31 OV_AXG0 OV_AXG 33
VIN6
31 VIN6
0 1 +5%
1
1
R496
9.1K 1% 0402 * C275
R497 * C276
* C277
* C278
* C279
* C280 31 OV_AXG1 R96 1K 1% 0402 1 0 +10%
0 0 +15%
2
2
10.7K 1% 0402 GNDA
0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402 0.1UF 16V Y5V 0402
CPU_CORE0 CPU_CORE1 CPU_VCCP

R207 2.94K 1% 0402 31 OVCPU_CORE0 R61 2K 1% 0402
31 VDIMM0 MEM_OV 35 OV_CPU 32
1 1 Default
C 0 1 +5%
C
31 OVCPU_CORE1 R62 1K 1% 0402
V_SM VDIMM0 VDIMM1 VDIMM2 1 0 +10%
31 VDIMM1
R208 1.47K 1% 0402 0 0 +15%
1.2V HR HR 0
1.3V 0 HR 0
+5V_DUAL 1.4V HR 0 0
R218 715 1% 0402 1.5V 0 0 0
1.6V(Default) HR HR HR
R487
10K 0402 1.7V 0 HR HR
C
1.8V HR 0 HR
B Q60
31 VDIMM2 2N3904 SOT23 1.9V 0 0 HR
E
OV_VTT0 OV_VTT1 V_1P1_VTT

31 OV_VTT0
R501 16K 1% 0402
OV_VTT 34 1 1 1.2V
0 1 1.25V
31 OV_VTT1
R502 8.2K 1% 0402 1 0 1.3V
B 0 0 1.35V B
A ◇ BIOSTAR'S PROPRIETARY INFORMATION◆

A
Title
document will be subject to the OVER VOLTAGE

IH55A-MHS
Sheet 36 of 38
6.4
5it 3 2 1
5 4 3 2 1
FALL TIME:40mv/us
FALL TIME:40mv/us
PWRGD_3V 11,12,31
1
D * C325
100P 50V NPO 0402
D
2
R529 0 0402 /NI
POWERGD_50mS 23,31,35
C
R514 10K 0402 B Q66
4,11,12 H_SKTOCC_N 2N3904 SOT23
E
C C
POWER ON SEQUENCE FOR 8720/8721 COLAY MAP

PWRGD_3V
BUFFER
POWER VCC3_3 ITE8720 PIN78 ATX_PWRGD POWER

SOLUTION1 SUPPLY 400ms DELAY (PG_PWR_OUT) CONTROL
ATX_PWRGD POWER
CONTROL
POWER Up 250ms
SOLUTION2 SUPPLY
ATX_PWRGD ITE8720 PIN78 PWRGD_3V
(ATX_PWRGD =PG_PWR_OUT) 400ms DELAY
ITE8721 PIN18 ATX_PWRGD POWER

50ms DELAY (PG_PWR_OUT) CONTROL
POWER Up 250ms
B SOLUTION3 SUPPLY B
DEFAULT PG_PWR_OUT ITE8721 PIN78 PWRGD_3V

150ms DELAY
A A

Title
document will be subject to the RESET BUFFER AND SEQUENCE
IH55A-MHS 6.4

5 4 3 2 1
5 4 3 2 1
JUSBV1(1_2)
JUMPER 2P R
D (BAT1)
D
PCB (PCB)
電池
PCB 泡棉
3V BATTERY SONY
JUSBV2(1_2)
JUMPER 2P R POLON 245x200
IH55A-MHS VER:6.4
(U1)
15-N09-164000R11 ... IH55A-MHS VER:6.4 箌 OSP+窪 (200.03*244.00*1.5)mm 4L

JCMOS1(1_2) FLASH ROM
JUMPER 2P B
?
SPI MX25L1605 DIP
86-IH55AMHS-R05P-64
96-IH55AMHS-R05P-64
C C
(Y1)
X'TAL WIRE
(CPU1)
(PCH1)
PCH
New PANEL1 2*8 HEAT SINK
B B
SBLS-T
LGA 1156 FRAME
A ◇ BIOSTAR'S PROPRIETARY INFORMATION◆

A
Title
document will be subject to the BOM
IH55A-MHS 6.4
5it 3 2 1

Biostar H55 HD Rev. 6.4 (Ih55a-Mhs)

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5 4 3 2 1

TITLE SHEET Model Name : IH55A-MHS

VAXG DC-DC CONVER 33

VTT DC-DC CONVER 34 PCI Express x16 Slot * 1

PCB SIZE : ◇BIOSTAR'S PROPRIETARY INFORMATION◆

200.03*244.00mm ◇Any unauthorized use, reproduction,

Date: Tuesday, June 29, 2010 Sheet 1 of 38

Serial ATA Interface SATA 1/2/3/4

Floopy Keyboard COM Header Parallel Header

◇ Any unauthorized use, reproduction,

Date: Tuesday, June 29, 2010 Sheet 2 of 38

◇ Any unauthorized use, reproduction,

Date: Tuesday, June 29, 2010 Sheet 3 of 38

AL40 FP_RST_N D11 GRCOMP R10 49.9 1% 0402

U6 1K 0402 /NI 1K 0402 /NI 1K 0402 /NI 1K 0402 /NI

Date: Tuesday, June 29, 2010 Sheet 4 of 38

SA_DQS6 AW36 M_DQS_A_DP6 8 SB_DQS6 AR36 M_DQS_B_DP6 9

SA_DQS7 AR39 M_DQS_A_DP7 8 SB_DQS7 AL37 M_DQS_B_DP7 9

LGA 1156 SOCKET LGA 1156 SOCKET Title

Date: Tuesday, June 29, 2010 Sheet 5 of 38

CPU_VCCP CPU1F CPU_VCCP

◇ Any unauthorized use, reproduction,

Date: Tuesday, June 29, 2010 Sheet 6 of 38

◇ Any unauthorized use, reproduction,

Date: Tuesday, June 29, 2010 Sheet 7 of 38

◇ Any unauthorized use, reproduction,

Date: Tuesday, June 29, 2010

◇ Any unauthorized use, reproduction,

Date: Tuesday, June 29, 2010

25 IDE_RXN C12 PERN5 USBRBIAS# AY15 USBRBIAS_PCH R68 22.6 1% 0402

◇ Any unauthorized use, reproduction,

Date: Tuesday, June 29, 2010 Sheet 10 of 38

BOARDID TABLE: CRB STYLE

GPIO48 R89 10K 0402

RN7 10K 8P4R 0402

Date: Tuesday, June 29, 2010 Sheet 11 of 38

SPI_CLK HOLD# SO ICH_WPJ

Pull Down to diable ME

H_SKTOCC_N VRTC_DET VRTC

R166 BAT54C SOT23 BAT54C SOT23

RN35 R177 1K 1% 0402 1UF 10V Y5V 0402

document will be subject to the

Date: Tuesday, June 29, 2010 Sheet 12 of 38

FDI_FSYNC0 E34 F4 DDPC_0N

M3 SDVO_INTP DDPC_CTRLCLK AB10 DDC Control Signal

L36 R184 33 1% 0402 /NI

◇ Any unauthorized use, reproduction,

Date: Tuesday, June 29, 2010 Sheet 13 of 38

V_1P05_PCH R187 90.9 1% 0402 AA3 T10 1 CLKOUT_PE0N

R56 0 0402 /NI XTAL_25M_PCH_IN

VCC3_3 VCC3_3 VCC3_3 VCC3_3 V_1P05_PCH V_1P05_PCH V_1P05_PCH

R188 1M 0402 /NI

◇ Any unauthorized use, reproduction,

Date: Tuesday, June 29, 2010 Sheet 14 of 38

10UF 10V 0805 Y5V

INDUCTOR 10UH 0805

INDUCTOR 1UH 0805 /NI

INDUCTOR 10UH 0805 /NI

10UF 10V 0805 Y5V

10UF 10V 0805 Y5V

1UF 16V 0805 Y5V

1UF 16V 0805 Y5V