Lec 1

Reconfigurable Computing
CS G553
Dr. A. Amalin Prince

BITS - Pilani K K Birla Goa Campus
Department of Electrical and Electronics Engineering
‹#›
Lecture - Introduction
Organization of the Course : Lecture, Lab, Evaluation, etc…
CS G553 2
Organization
 Schedule:
o Mon, Wed, Fri 12:00 - 12:50 am (C-404)
o Lab: Reconfigurable Computing Lab
 Lecturer:
A Amalin Prince,
Department of EEE
A-206/2,
 +91-832-2580-155,
Email: [email protected]
 HD TAs
CS G553 3
Scope and Objective
 Scope
o Reconfigurable (adaptive) computing is a novel yet important
research field
• investigating the capability of hardware to adapt to changing
computational requirements such as
– emerging standards,
– late design changes,
– even to changing processing requirements arising at run-time
 Objective
o The purpose is to instruct students about
• the possibilities and rapidly growing interest in
– adaptive hardware and corresponding design techniques
• necessary knowledge for understanding and designing reconfigurable
hardware systems
– studying applications benefiting from dynamic hardware reconfiguration.
Algorithm?
CS G553 4
Contents
 The course covers the following subjects:

o Reconfigurable computing systems (Fine and coarse grained
architectures and technology)
o Design and implementation (Algorithms and steps to implement
algorithms to FPGAs)
o Temporal partitioning (Techniques to reconfigure systems over time)
o Temporal placement (Techniques and algorithms to exploit the
possibility of partial and dynamic hardware reconfiguration)
o On-line communication (State-of-the-art techniques about how
modules can communicate data at run-time)
o Applications (applications benefiting from dynamic hardware
reconfiguration and verification using Xilinx System Design tool and
Boards).
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Background
 Basic knowledge in the following areas:

o Digital design
o Optimization algorithms
o Computer architecture
CS G553 6
Materials
 Course material (will be progressively provided during the

semester)-Refer course website
 Text Book
o C Bobda, Introduction to Reconfigurable Computing: Architectures,
Algorithms, and Applications, Springer, 2007.
o Wolf Wayne, FPGA Based System Design, Pearson Edu, 2004.
 Reference Book
o Scott Hauck, André DeHon, Reconfigurable Computing - The
Theory and Practice of FPGA Based Computation, The Morgan
Kaufmann Series in Systems on Silicon, 2007.
o R Vaidyanathan, Trahan Jerry, Dynamic Reconfiguration:
Architectures and Algorithms, L, Kluwer Academic, 2003.
o Uwe Meyer-Baese, DSP with FPGAs, Springer-Verlag, 2003.
o Journal papers and Conference publications (important will be given
through course website)
CS G553 7
Course Coverage
 Introduction
o The Von-Neumann computation paradigm
o Application specific processors
o Reconfigurable computing
 Reconfigurable Architectures
o Early work
o Programmable Logic
• PAL, PLAs, CPLDs
• FPGAs, Hybrid FPGAs
o Coarse grained reconfigurable devices
CS G553 8
Course Coverage
 VLSI Technology (self study assignment)

o Wires and vias
o Gate delay vs. wire delay
o Registers and RAM
 Hardware Description Languages (self study assignment)
o Modeling with HDLs
o Verilog
CS G553 9
Course Coverage
 Design and Implementation

o In-System integration
o Design Flow
o Logic synthesis
o Technology Mapping
o (Re)configuration
 High-Level Synthesis for RC

o Temporal partitioning
o List-scheduling approach
o Integer Linear Programming
o Network Flow
o Spectral methods
o Iterative improvements
CS G553 10
Course Coverage
 Temporal Placement
o Operating system concepts,The temporal placement problem
o Off-line approaches,On-line approaches
 Designing for partial reconfiguration

o Partial reconfiguration design on the Xilinx platform
 Security in Modern Reconfigurable Devices

o Protecting the FPGA design, Design security concerns, Secure
architecture in FPGAs and SoC FPGAs.
 Applications and existing platforms

o Image processing, Signal processing
o Pattern matching, Etc..
CS G553 11
Course Plan
 Refer Handout
5 unit course
CS G553 12
Course Coverage
 Project proposal
o New ideas are welcome
 Design Tool
o Xilinx Vivado System Edition 2020.1
o Xilinx Partial Reconfiguration Tool
 Implementation Platforms
o ZedBoard
o KC705
o VC707
o Nexys 4
o Basys 3
o ZCU104
 Descreption Language
o Verilog (Preferred/exam)
o VHDL
CS G553 13
Laboratory
 This course has lab components using

o Xilinx Vivado System Edition
o Xilinx partial reconfiguration tools.
 For better understanding of concepts, this course has
project component.
o Final design should be implemented in
• Zynq 7000 ZedBoard
• ZC 706
• Nexys 4 Artix-7 board/Basys 3 Artix-7 board
• VC707 Virtex-7 board
• KC 705 Kintex-7 FPGA DSP Kit/UltraScale+ ZCU 104
– ADC, DAC, Microphone, Gyros, Accelerometers etc.
– FMC based High Frequency ADC/DAC
– Video Camera with 210 Frames per Seconds
– 7 inch Touch screen display, relays, communication modules
– Motor Drives, Keyboard etc. CS G553 14
Evaluation Scheme
EC Evaluation Duration Weightage Date & Time Nature of

No. Component (min) (%) Component
MID SEM Will be

1. 25 05/11/22 Saturday Closed Book
EXAMINATION announced
Lab Assignment/ Lab

2. --------- 10+20+10 Will be announced Open Book
test/Project and Viva
Will be
3. Comprehensive 35 29/12/22 (FN) Closed Book
announced
CS G553 15
General Information
 Chamber Consultation Hours

o Will be announced in the class, Wednesday 6th Hr
 Notices
o Will be put up on the course website (Google classroom)
 Makeup
o Make-up will be given on genuine grounds only. Prior application
should be made for seeking the make-up examination.
Self Study Assignment-1
CS G553 16
The End
 Questions ?
 Thank you for your attention
CS G553 17

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Reconfigurable Computing

Dr. A. Amalin Prince

 The course covers the following subjects:

 Basic knowledge in the following areas:

 Course material (will be progressively provided during the

 VLSI Technology (self study assignment)

 Design and Implementation

 High-Level Synthesis for RC

 Designing for partial reconfiguration

 Security in Modern Reconfigurable Devices

 Applications and existing platforms

 This course has lab components using

EC Evaluation Duration Weightage Date & Time Nature of

MID SEM Will be

Lab Assignment/ Lab

 Chamber Consultation Hours

Self Study Assignment-1

 Thank you for your attention

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