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16/05/2018 Basics of software-deﬁned radios and practical applications - - Unit 3 - Week 2
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Unit 3 - Week 2
Course outline Assignment 2

How to access the portal The due date for submitting this assignment has passed. Due on 2018-02-21, 23:59 IST.
Week 1
Submitted assignment
1) This is not a benefit of oversampling: 1 point

Week 2
Improved bit-resolution of ADC
Software defined radio
architectures Part IV Increase in SNR
Avoid aliasing
Distortion Parameters-
Part I Decrease in I/Q imbalance signal power
Distortion Parameters- No, the answer is incorrect.

Part II Score: 0
Distortion Parameters: Accepted Answers:
Nonlinear Distortion Decrease in I/Q imbalance signal power
Distortion Parameters: 2) Flicker Noise is more detrimental for which of the following architecture 1 point
Nonlinearity
Specifications
Superheterodyne architecture
Quiz : Assignment 2 Homodyne architecture
Feedback for Week 2 Digital-IF based Homodyne architecture
Dual-conversion superheterodyne architecture
Assignment_Solutions
No, the answer is incorrect.
Week 3 Score: 0
Week 4 Accepted Answers:

Homodyne architecture
DOWNLOAD VIDEOS 3) What is the noise factor of the following system 1 point
13.43
1.42
3.04
6.26

Score: 0
Accepted Answers:
3.04
4) What is the noise figure of the system shown above? 1 point
11.28 dB
1.5223 dB
4.82 dB
7.9657

Score: 0
Accepted Answers:
4.82 dB
5) What is the effective SNR for 10 MHz sampling clock with 0.2 ps rms jitter? 1 point
98 dB
https://onlinecourses.nptel.ac.in/noc18_ec01/unit?unit=12&assessment=35 1/3
50 dB
61 dB
74 dB

Score: 0
Accepted Answers:
98 dB
6) What is the effective bits for 10 MHz sampling clock with 0.2 ps rms jitter? 1 point
16-bit
8-bit
10-bit
12-bit

Score: 0
Accepted Answers:
16-bit
7) Among following, what would be the rms phase jitter allowed for 40 MHz sampling clock to be able to use 12-bit 1 point
converter?
0.4 ps
0.6 ps
0.8 ps
1 ps

Score: 0
Accepted Answers:
0.8 ps
8) Phase jitter would be more prominent in: 1 point
High speed ADC

Low speed ADC

Score: 0
Accepted Answers:
High speed ADC
9) Phase noise would be more prominent in 1 point
Oscillator
ADC

Score: 0
Accepted Answers:
Oscillator
10) Phase jitter can be calculated by measuring 1 point
Phase noise
Max. Slew rate
Rms value of Jitter in time domain
All of above

Score: 0
Accepted Answers:
All of above
11) Which of the following device is main cause of nonlinearity in Transmitter? 1 point
Digital to Analog Converters

Power Amplifiers
Analog to Digital Converters
Oscillators

Score: 0
Accepted Answers:
Power Amplifiers
12) Near saturation region of the power amplifier: 1 point
Efficiency is low
Linearity is high
Signal experiences high level of distortion
DC power to RF power conversion rate is low

Score: 0
Accepted Answers:
Signal experiences high level of distortion
13) For a two-tone signal with frequency f1 and f2 which of the following pair represent the output second, third IMD 1 point
terms respectively:
f1 + f2 and 2f1 - f2
3 f1 and 2f1 + f2
2f1 + f2 and 3f2
2f1 - f2 and 2f2

Score: 0
Accepted Answers:
f1 + f2 and 2f1 - f2
14) In above question, if both the frequencies are equal (f), then the output second, third IMD terms respectively can be: 1 point
3f and 2f
f and 2f
2f and 3f
0 and 0

Score: 0
Accepted Answers:
2f and 3f
15) If a PA has output powers as 40 dBm, 0 dBm and 10 dBm for output power, second order IMD and third order IMD components 1 point
respectively by applying input signal power of 10 dBm. What will be output signal power levels for 11 dBm input signal power:
51 dBm, 11 dBm and 21 dBm

39 dBm, 0 dBm, 11 dBm
49 dBm, 9 dBm, 18 dBm
Score: 0
Accepted Answers:
16) If a SSPA has input IP3 point at 30 dBm, when 20 dBm input signal power is applied, what would be the IMD3 1 point
component power:
15 dBm
10 dBm
0 dBm
5 dBm

Score: 0
Accepted Answers:
0 dBm
17) For any given PA, if the signal PAPR is increased: 1 point
The PA can be driven at previous average power without any detrimental effect on output signal
PA should be driven at back-off to avoid the clipping of output signal
B and D both
The PA exhibits lower efficiency if we try to maintain linearity.

Score: 0
Accepted Answers:
B and D both
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16/05/2018 Basics of software-deﬁned radios and practical applications - - Unit 3 - Week 2

Course outline Assignment 2

1) This is not a benefit of oversampling: 1 point

Distortion Parameters- No, the answer is incorrect.

Week 4 Accepted Answers:

No, the answer is incorrect.

4) What is the noise figure of the system shown above? 1 point

No, the answer is incorrect.

No, the answer is incorrect.

No, the answer is incorrect.

No, the answer is incorrect.

8) Phase jitter would be more prominent in: 1 point

High speed ADC

No, the answer is incorrect.

9) Phase noise would be more prominent in 1 point

No, the answer is incorrect.

10) Phase jitter can be calculated by measuring 1 point

No, the answer is incorrect.

Digital to Analog Converters

No, the answer is incorrect.

12) Near saturation region of the power amplifier: 1 point

No, the answer is incorrect.

No, the answer is incorrect.

No, the answer is incorrect.

51 dBm, 11 dBm and 21 dBm

No, the answer is incorrect.

No, the answer is incorrect.

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© 2014 NPTEL - Privacy & Terms - Honor Code - FAQs -

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