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Unit 5 - Week 4:
Addressing Modes, Instruction Set and Instruction
Execution Flow
Register for
Certification exam Assignment for Week 4
The due date for submitting this assignment has passed.
Course As per our records you have not submitted this Due on 2019-02-27, 23:59 IST.
outline
assignment.

How to access 1) An instruction SUB 3030 1 point


the portal
Subtracts 3030 to the value in Accumulator and stores the result in the memory location 3030
Week 1:
Fundamentals of Subtracts the value in memory location 3030 to the value in Accumulator and stores the
Digital Computer result in Accumulator

Subtracts 3030 to the value in Accumulator and stores the result in Accumulator
Week 2:
Fundamental of None of the above
Digital Computer
No, the answer is incorrect.
Week 3: Score: 0
Addressing Accepted Answers:
Modes, Subtracts the value in memory location 3030 to the value in Accumulator and stores the result in
Instruction Set
Accumulator
and Instruction
Execution Flow
2) The instruction ADD 3030 is of 1 point

Week 4:
A 3-address instruction format
Addressing
Modes, A 2-address instruction format
Instruction Set
and Instruction A 1-address instruction format
Execution Flow
A 0-address instruction format
Lecture 1: No, the answer is incorrect.
Instruction
Score: 0
Format
Accepted Answers:
Lecture 2:
A 1-address instruction format
Instruction Set

Lecture 3: 3) STORE R1, 3030 is 1 point


Addressing
Modes Data transfer instruction
© 2014 NPTEL - Privacy & Terms - Honor Code - FAQs -
Quiz : Arithmetic and Logical instruction
A project of In association with
Assignment for
Week 4 Control instruction

None of the above


Week 5:
Addressing No, the answer is incorrect. Funded by

1 of 4 Tuesday 11 June 2019 07:56 PM


Computer Organization and Architecture A Ped... https://onlinecourses-archive.nptel.ac.in/noc19_...

Modes, Score: 0 Powered by


Instruction Set
and Instruction Accepted Answers:
Execution Flow Data transfer instruction

4) Which of the following options represents the correct matching? 1 point


Week 6:
Organization
and Optimization
of Micro-
programmed
Controlled
Control Unit

Week 7:
Organization
and Optimization
of Micro-
programmed
Controlled
Control Unit
1->A; 2->D; 3->C; 4->B;

Week 8: 1->C; 2->B; 3->D; 4->A;


Organization
1->C; 2->B; 3->A; 4->D;
and Optimization
of Micro- 1->A; 2->D; 3->B; 4->C;
programmed
Controlled No, the answer is incorrect.
Control Unit Score: 0
Accepted Answers:
Week 9: Memory
Sub-system 1->C; 2->B; 3->A; 4->D;
Organization
5) Consider an example of memory organization as shown in the figure below. Which value 1 point
will be loaded into the accumulator when the instruction “LOAD DIRECT 3” is executed?
Week 10:
Memory
Sub-system
Organization

Week 11:
Memory
Sub-system
Organization

3
Week 12:
Input/output 25
Subsystem
12
TEXT 20
TRANSCRIPTS
No, the answer is incorrect.
Score: 0
Accepted Answers:
20

6) As per the example shown in the previous question (question 5), what will be the content of 1 point
the accumulator when the instruction “LOAD INDIRECT 7” is executed?

25

20

No, the answer is incorrect.


Score: 0
Accepted Answers:

2 of 4 Tuesday 11 June 2019 07:56 PM


Computer Organization and Architecture A Ped... https://onlinecourses-archive.nptel.ac.in/noc19_...

25

7) For a 0-address instruction format, what would be the top element of the stack following 1 point
sequences of instructions?
PUSH 20; PUSH 5; PUSH 5; ADD; SUB; PUSH 20; MULT.

100

200

10

No, the answer is incorrect.


Score: 0
Accepted Answers:
200

8) How many bits of opcode is required to implement a CPU with 10 arithmetic and logical 1 point
instructions, 2 control instructions, and 5 data transfer instructions?

No, the answer is incorrect.


Score: 0
Accepted Answers:
5

9) Consider a CPU with 8-bit data bus and 16-bit address bus. The memory is byte 1 point
organized. Consider the instruction format with one operand. Length of the instruction is three bytes
and the first byte indicates the op-code. Second byte indicates the lower eight bits address and third
byte indicates the higher eight bits address. Consider the instruction “ADD FE 70”. This instruction
adds the content of memory location to accumulator. The instruction is stored in consecutive memory
location starting from memory location 5000H. We assume that Accumulator initially has the value of
20. In the figure given below, what are the values in Memory Locations 5000, 5001, 5002 and
Accumulator after the instruction ADD FE 70 is executed.

5000=ADD, 5001=FE, 5002=70, and Accumulator=30

5000=ADD, 5001=70, 5002=FE, and Accumulator=30

5000=ADD, 5001=70, 5002=FE, and Accumulator=40

5000=ADD, 5001=FE, 5002=70, and Accumulator=40

No, the answer is incorrect.


Score: 0
Accepted Answers:
5000=ADD, 5001=FE, 5002=70, and Accumulator=30

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Computer Organization and Architecture A Ped... https://onlinecourses-archive.nptel.ac.in/noc19_...

10)The instruction LDA FF0 (machine code of LDA is 5) is stored in location 7F0. The contents 1 point
in memory location FF0 are loaded into accumulator. After its execution, accumulator stores value 8.
The figure below shows a snapshot of the registers and their contents.

Immediately after the fetch cycle of the 1st instruction (LDA FF0), the values in MAR, IR and MBR are:

MAR=FF0, IR=5FF0, MBR=5FF0

MAR=7F0, IR=5FF0, MBR=0008

MAR=7F0, IR=5FF0, MBR=5FF0

MAR=FF1, IR=5FF0, MBR=7F0

No, the answer is incorrect.


Score: 0
Accepted Answers:
MAR=7F0, IR=5FF0, MBR=5FF0

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