Slides Part III
Slides Part III
Excerpt of [1]:
Excerpt of [1]:
Excerpt of [1]:
x̄(t) = X + x̄ˆ(t)
Excerpt of [1]:
The buck converter of figure (b)
can then be linearized:
Therefore,
ˆ
v̄ˆx (t) ≈ D v̄ˆg (t) + d(t)Vg.
v̄ˆo (s)
1 + srC C
Gvd (s) , =Vg
ˆ
d(s)
v̄ˆ =0,ˆī =0 1 + s(rC + rL )C + s 2 LC
g o
s
1+ ωESR
=Gvd0 s s2
.
1+ Qω0 + ω02
Gvd0 ,Vg ,
1
ωESR , ,
rC C
1
ω0 , √ ,
LC
r
1 L
Q, .
rC + rL C
(a) Buck
(b) Boost
(c) Buck-Boost
(V 0 0
v̄ˆo (s)
D 0 − rL IL ) − sL IL
o
Gvd (s) , =
ˆ v̄ˆ
d(s) ˆ
g =0,īo =0
1 + srL0 C + s 2 L0 C
rL
rL0 = D 02
, L0 = L
D 02
.
Interpretation with exponential response, step response and frequency domain
dx
=c(t)[A1 x(t) + B1 v (t)] + c 0 (t)[A0 x(t) + B0 v (t)],
dt
y (t) =c(t)[C1 x(t) + E1 v (t)] + c 0 (t)[C0 x(t) + E0 v (t)].
0 =[DA1 + D 0 A0 ]X + [DB1 + D 0 B0 ]V ,
Y =[DC1 + D 0 C0 ]X + [DE1 + D 0 E0 ]V .
A ,DA1 + D 0 A0 , B , DB1 + D 0 B0 ,
C ,DC1 + D 0 C0 , E , DE1 + D 0 E0 ,
we get:
X = −A−1 BV , Y = [−CA−1 B + E ]V .
The above solution is equivalent to apply the inductors volt-second
balance and the capacitors charge balance under the small-ripple
approximation. Example: see [1] eq 1.45, 1.46, 1.47
ELEC0055: Elements of Power Electronics - Fall 2020
State-space averaging: small signal model
The state equation can be linearized by defining small signals
around the operating point:
d x̄ˆ ˆ + B v̄ˆ(t),
=Ax̄ˆ(t) + F d(t)
dt
ˆ + E v̄ˆ(t),
ȳˆ(t) =C x̄ˆ(t) + G d(t)
where,
F ,(A1 X + B1 V ) − (A0 X + B0 V ),
G ,(C1 X + E1 V ) − (C0 X + E0 V ).
Example: see [1] eq 1.48, 1.49, the boost transfer function has a RHZ (Right Half-Plane Zero).
I Link with the LCS course: each term of W (s) and WD (s)
represents the transfer function that models the effect of
external inputs (duty-cycle, input voltage....) on outputs.
Because there are multiple outputs and multiple inputs the
system is called MIMO.
The pulse width modulator
u(tk ) dˆ 1
d[k] = ⇒ GPWM (s) , = (1)
Vr û Vr
Excerpt of [1]:
ûy (s)
T (s) , − = Gc (s)GPWM (s)Gvd (s)H(s)
ûx (s) v̂ref =0
Excerpt of [1]:
v̄ˆo (s)
1 T (s)
Gvvref ,cl (s) , = ,
v̄ˆref v̄ˆg (s)=0,ˆīo =0
H(s) 1 + T (s)
v̄ˆo (s)
Gvg (s)
Gvg ,cl (s) , = ,
ˆ
v̄g (s) v̄ˆref =0,ˆīo =0
1 + T (s)
v̄ˆo (s)
Zo (s)
Zo,cl (s) , − = .
ˆī (s) v̄ˆ =0,v̄ˆ =0
1 + T (s)
o ref g
For open loop characteristics with a loop gain that falls by -20
dB/decade when T (s) amplitude approaches 1, the phase margin
directly affects the quality factor of the closed loop (second order)
system response.
ELEC0055: Elements of Power Electronics - Fall 2020
Relation between phase margin and stability
Excerpt of [2]:
I Sampling process
I Amplitude quantization
I Conversion delay tA/D
Excerpt of [1]:
(A/D) VFS
qvs = (4)
2nA/D
where VFS is the full scale
voltage.
(A/D)
vs [k] , QA/D [vs [k]] = qvs ṽs [k]
where vs [k] is the quantized signal, vs [k] is the analog signal and
ṽs [k] is the binary coded signal.
ELEC0055: Elements of Power Electronics - Fall 2020
The controller
Excerpt of [1]:
Excerpt of [1]:
The PID law is given by:
U(z) Ki
GPID (z) , = Kp + + Kd (1 − z −1 )
E (z) 1 − z −1
z = e sT (5)
This transformation is not adequate because it transforms GPID (z)
in a transcendental function of s. A good approximation is:
T
sT e +s 2 1 + s T2 + · · · 1 + s T2
z(s) = e = T = ≈ (6)
e −s 2 1 − s T2 + · · · 1 − s T2
It is called the bilinear transformation:
1 + s T2 2 1 − z −1
z(s) ≈ ⇔ s(z) ≈ (7)
1− s T2 T 1 + z −1
In time domain:
Z
v (τ )dτ = p(t)
In s-domain:
1
V (s) = P(s) ⇒ V (s) = s P(s)
s
We can write in discrete time:
v [k − 1] + v [k]
p[k] − p[k − 1] = trapeze surface = T
2
In z-domain:
z −1 V (z) + V (z) 2 1 − z −1
P(z) − z −1 P(z) = T ⇒ V (z) = P(z)
2 T 1 + z −1
U(z) Ki
GPID (z) , = Kp + + Kd (1 − z −1 )
E (z) 1 − z −1
is transformed to
s
0 U(s) K i 1 + ωp s
GPID (s) , = Kp + + Kd T ,
E (s) T s 1 + ωsp
where ωp , T2 .
It should be noted that ωp appears when converting GPID (z) in the
s-domain and there is no freedom on the value of ωp .
s
0 K i 1 + ωp s
GPID (s) = Kp + + Kd T (8)
T s 1 + ωsp
is equivalent to
s
0 0 ωPI 0 1 + ωPD
GPID (s) = GPI ∞ (1 + )GPD0
s 1 + ωsp
with,
0 0 ωPI 2ωPI
Kp =GPI ∞ GPD0 (1 + − ), (9)
ωPD ωp
0 0 ωPI
Ki =2GPI ∞ GPD0 , (10)
ωp
1 0 0 ωPI ωp
Kd = GPI ∞ GPD0 (1 − )( − 1). (11)
2 ωp ωPD
s
0 Ki 1 + ωp
GPI (s) = Kp + (12)
T s
is equivalent to
0 0 ωPI
GPI (s) = GPI ∞ (1 + )
s
with,
0 ωPI
Kp =GPI ∞ (1 − ), (13)
ωp
0 ωPI
Ki =2GPI ∞ . (14)
ωp
0 s
GPD (s) = Kp + Kd T (15)
1 + ωsp
is equivalent to
s
0 0
1+ ωPD
GPD (s) = GPD0
1 + ωsp
with,
0
Kp =GPD0 , (16)
1 0 ωp
Kd = GPD0 ( − 1). (17)
2 ωPD
td , tcntrl + tDPWM .
1. Model the loop as in the analog control loop design but with
the delay corrected loop gain Tu† (s).
2. Design the compensation as in the analog control loop design
using the chosen compensator (equation 8, 12 or 15).
3. Once the controller coefficient are determined, transform
them to their digital version (equation 9 to 11, 13 to 14 or 16
to 17).
4. Implement the control law in the digital processor.
It should be noted that the above design procedure is valid if the
sampled signal is a good representation of the averaged signal.
This assumption is the small-aliasing approximation expressed
mathematically by:
vs [k] ≈ v̄s (tk ).
If it is not the case, discrete-time modeling techniques have to be
used.
The integral windup problem (example)
Excerpt of [1]:
For Vg = 4V , at 0µs, the
current rises to 10 A. The
controller reacts quickly to
the induced vo (t) change and
u[k] quickly reaches its
saturation point. However,
vo (t) is still under the set
point and the integrator
continues to integrate.
When vo (t) starts to rise
again, the integrator is well
above 1 and forces u[k] to
stay at 1 and creates an
unexpected lag in the reaction
of the crontroller finally
creating a vo (t) overshoot.
ELEC0055: Elements of Power Electronics - Fall 2020
Actuator saturation and integral anti-windup
The solution to the windup problem is to:
I Saturate all variables to avoid numeric issues. Especially
saturate u[k] between the min/max duty-cycle.
I Stop integration when u[k] reaches its saturation limits:
0 if 0 ≤ uPID [k] ≤ 1,
sat[k] =
1 otherwise.
Excerpt of [1]:
Excerpt of [1]:
L L
Ts =d[k]Ts + d 0 [k]Ts = (ich − icl ) + (ich − icl )
Vg − Vo Vo
1 1 Vg
=(ich − icl )L( + ) = (ich − icl )L
Vg − Vo Vo (Vg − Vo )Vo
L 1
=(ich − icl )
Vg ( Vg − Vo ) Vo
Vg Vg Vg
L 1 Vo
=(ich − icl ) , D,
Vg (1 − D)D Vg
Instead of using the average model to analyze the control loop, it is possible to
directly work in the z-domain. The procedure is as follows:
1. select all state variables (iL (t)),
2. select the sampling instant and name it using ”k” index (iL [k]),
3. express the state evolution (matrix form) from ”k” to ”k+1” (iL [k + 1] as
a function of iL [k], ic [k]),
4. apply linearization (ic [k] = Ic + iˆc [k], iL [k] = IL + iˆL [k]),
5. linearization gives steady-state and small-signal equations,
6. apply z-transform to small-signal equation by ”replacing” k + 1 by z,
k + 2 by z 2 ...
7. extract the poles of the z-domain transfer function to access stability,
8. trace the step function and the bode plot to evaluate the performances.
ELEC0055: Elements of Power Electronics - Fall 2020
Current programmed control: time domain equation
Vg − Vo L
ic [k] − iL [k] =d[k]Ts ⇒ d[k] = (ic [k] − iL [k]) , (21)
L Ts (Vg − Vo )
−Vo Vo
iL [k + 1] − ic [k] =d 0 [k]Ts ⇒ iL [k + 1] = ic [k] − (1 − d[k])Ts . (22)
L L
Introducing (21) in (22) yields:
Vo Vo Vo
iL [k + 1] = ic [k](1 + ) − iL [k] − Ts . (23)
Vg − Vo Vg − Vo L
Let us define:
ic [k] =Ic + iˆc [k], (24)
iL [k] =IL + iˆL [k]. (25)
1 D
IˆL (z) = Iˆc (z) , pz = − . (29)
z(1 − D) + D 1−D
Vg
IR , δTs
L
Vg − Vo Vg
iL [k] + d[k]Ts = ic [k] − d[k]δTs (30)
L L
1
⇒ d[k] = (ic [k] − iL [k]) Vg −Vo V
, (31)
Ts L + δTs Lg
Vg Vo
iL [k + 1] = ic [k] − d[k]δTs − (1 − d[k])Ts . (32)
L L
Compensation: small signal and steady state
Eliminating d[k] by inserting (31) in (32) yields:
Vo −δVg Vo −δVg Vo
iL [k + 1] = ic [k](1 + ) − iL [k]( ) − Ts
Vg − Vo +δVg Vg − Vo +δVg L
Vo −δVg Vo −δVg
iˆL [k + 1] =iˆc [k](1 + ) − iˆL [k] ,
Vg − Vo +δVg Vg − Vo +δVg
Vo −δVg Vo Vo −δVg
IL =Ic (1 + ) − Ts − IL .
Vg − Vo +δVg L Vg − Vo +δVg
Vo
Introducing D = Vg
in the above equations yields:
1 D−δ
iˆL [k + 1] =iˆc [k] − iˆL [k] , (33)
1 − (D−δ) 1 − (D−δ)
Vo
IL =Ic − Ts (1 − (D−δ)). (34)
L
1 D−δ
IˆL (z) = Iˆc (z) , pz = − . (36)
z(1 − (D−δ)) + (D−δ) 1 − (D−δ)
Excerpt of [2]
I The internal loop is built with the current programmed controller, its
setpoint is ic (t).
I The external control loop computes the voltage error between the set
point voltage vref and the output voltage v (t).
I The voltage error is used by the compensator to drive ic (t).
Excerpt of [2]
Over one switching period, the The current control loop is assumed to
averaged values are related by d(t) in be perfect (simple approximation):
CCM:
iˆ
¯g = iˆ
¯1 iˆ¯2 iˆ
¯L
+ + +
L
C
R
vˆ
¯g = vˆ
¯1 iˆ¯c V
V1
2 − VI11 vˆ¯2 VIc1 vˆ¯2 v̄ˆ
iˆ¯c
- - -
Controlled sources function of input and output voltages
iˆ
¯g = iˆ
¯1 iˆ¯2 iˆ
¯L
+ + +
L
C
R
vˆ
¯g = vˆ
¯1 iˆ¯c V
V1
2 − VI11 vˆ¯2 VIc1 vˆ¯2 v̄ˆ
iˆ¯c
- - -
V2 I1 V2 Ic Ic D
=D, = D, = R, = V2 = ,
V1 I2 I2 V1 D
R
V2
V1 R Ic ¯c ) D = v̄ˆ D + iˆ
¯c D sL .
− =− D = − 2, vˆ
¯2 =(v̄ˆ + sLiˆ
I1 I2 D D V1 R R R
iˆ¯g iˆ¯L
+ +
L
C
R v̄ˆ
vˆ¯g iˆ
¯c D(1 + sL
R)
− DR2 v̄ˆ D
R
iˆ
¯c
- -
Current programmed control: transfer functions
iˆ¯g iˆ¯L
+ +
L
C
R v̄ˆ
vˆ¯g iˆ
¯c D(1 + sL
R)
− DR2 v̄ˆ D
R
iˆ
¯c
- -
v̄ˆ (s)
1 R
Gvc,cpc (s) , = (R|| ) = →1st order, easy compensator design,
ˆ
¯
ic (s) v¯g =0
ˆ sC 1 + sRC
v̄ˆ (s)
Gvg ,cpc (s) , =0 →no sensitivity to input voltage,
vˆ¯g (s) iˆ¯c =0
ˆg (s)
v¯ R
Zg ,cpc (s) , =− 2 →stability concern.
ˆ
¯ ˆ¯
i (s) i =0,v̄ˆ=0 D
g c