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    Chapter 2: BJTS: Exercises 2

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    Nguyễn Duy
    This document contains 12 problems about analyzing various bipolar junction transistor (BJT) circuits. The problems involve determining currents, voltages, and other circuit parameters for different BJT configurations, including emitter-stabilized bias circuits, load lines, cascode amplifiers, and circuits using both npn and pnp transistors. Diagrams of the circuit being analyzed are provided for each problem.

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    Chapter 2: BJTS: Exercises 2

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    Nguyễn Duy
    30 views6 pages
    This document contains 12 problems about analyzing various bipolar junction transistor (BJT) circuits. The problems involve determining currents, voltages, and other circuit parameters for different BJT configurations, including emitter-stabilized bias circuits, load lines, cascode amplifiers, and circuits using both npn and pnp transistors. Diagrams of the circuit being analyzed are provided for each problem.

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    This document contains 12 problems about analyzing various bipolar junction transistor (BJT) circuits. The problems involve determining currents, voltages, and other circuit parameters for different BJT configurations, including emitter-stabilized bias circuits, load lines, cascode amplifiers, and circuits using both npn and pnp transistors. Diagrams of the circuit being analyzed are provided for each problem.

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    30 views6 pages

    Chapter 2: BJTS: Exercises 2

    Uploaded by

    Nguyễn Duy
    This document contains 12 problems about analyzing various bipolar junction transistor (BJT) circuits. The problems involve determining currents, voltages, and other circuit parameters for different BJT configurations, including emitter-stabilized bias circuits, load lines, cascode amplifiers, and circuits using both npn and pnp transistors. Diagrams of the circuit being analyzed are provided for each problem.

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    of 6

    Exercises 2

    Chapter 2: BJTs

    Problem 1. For the emitter-stabilized bias circuit of Fig. 1, determine:


    a. IB_Q
    b. IC_Q
    c. VCE_Q
    d. VC
    e. VB
    f. VE

    Figure 1.
    Problem 2.
    a. Draw the load line for the network of Fig. 1 on the characteristics of Fig. 1 using b from
    problem 1 to find IBQ.
    b. Find the Q-point and resulting values ICQ and VCEQ.
    c. Find the value of b at the Q-point.
    d. How does the value of part (c) compare with β = 125 in problem 1?
    e. Why are the results for problem 2 different from those of problem 1?
    Problem 3. Given the information provided in Fig. 2 , determine:
    a. I C.
    b. VE.
    c. VB.
    d. R1
    Figure 2.
    Problem 4. Given VB = 4 V for the network of Fig. 3, determine:
    a. VE.
    b. IC.
    c. VC.
    d. VCE.
    e. IB.
    f. β

    Figure 3.
    Problem 5. Determine the level of VE and IE for the network of Fig. 4.
    Figure 4.
    Problem 6. For the network of Fig. 5, determine:
    a. IB
    b. IC
    c. VCE
    d. VC

    Figure 5.
    Problem 7. For the network of Fig. 6, determine:
    a. IB.
    b. IC.
    c. VE.
    d. VCE.

    Figure 6.
    Problem 8. For the cascode amplifier of Fig. 7, determine
    a. The base and collector currents of each transistor.
    b. The voltages VB1, VB2, VE1, VC1, VE2, and VC2.
    Figure 7.

    Problem 9. For the feedback amplifier of Fig. 8, determine


    a. The base and collector current of each transistor.
    b. The base, emitter, and collector voltages of each transistor.

    Figure 8.

    Problem 10. Calculate the mirrored current I in the circuit of Fig. 9.

    Figure 9.

    Problem 11. Calculate collector currents for Q1 and Q2 in Fig. 10.


    Figure 10.

    Problem 12. pnp Transistors


    Determine VC, VCE, and IC for the network of Fig. 11.

    Figure 11.

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