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Curriculum Vitae
Shivkaran Ravidas, Ph.D. ( Pursuing )

PhD Regi. No. 2013/PhD./Engg./013, Gautam Buddha University, Greater Noida
202 A, Ashok Avenue ,

Near Space tower
Nirav Nikunj, Phase I
Sikandra, Agra (UP)
Contact : +91-8527749869
Email : [email protected]
Career Objective:
To put forth my ability and expertise in teaching field and to the best of my standards and looking forward to
work in a Esteem Academic Institution.
Presently, working as Asst. Professor in Skyline Institute of Engineering and Technology, Greater Noida (UP)
Academic Qualifications:
1. PhD ( Pursuing ) i) Completed course work with 8.0 CGPI

ii) Successfully Completed RDC.
iii) Completed Literature Survey and published Review Paper in International Journal.
2. M.E (Electronics) with 64.72% in from SGGS IE&T, Nanded, Maharashtra completed in 2006.
3. Bachelor of Engineering (Electronics) with 63.54% from MIT, Aurangabad, Maharashtra, in 2002
4. Engineering Diploma (Industrial Electronics) with 67.53% from C.P.C. Chandrapur in the year 1999
(B.T.E Mumbai board )
5. GATE-2003 Qualified with 80.01 Percentile.
Work Experience: (Total Experience is more than 11 Years, Teaching ,Research and Industry )
Organisation/Institution Period Post Held Field Pay Scale

Skyline Institute of Engg. &
Feb 2014 To till date Asst Professor Teaching 15600-39100
Technology, Greater Noida
Teaching
R B Group of Institution , Agra Aug 2011 to Feb 2014 Asso. Professor 12000-420-18300
(HOD)
Lovely Professional University,

June 2008- Aug 2011 Senior Lecturer Teaching 26000 (Consolidated)
Phagwara, Punjab
Central Electronics Engineering
Research Institute ,CEERI , Pilani, Aug. 2007- July 2008 Project Assistant Research 10000 ( Fixed)
Rajasthan
Finolex Academy of Management & AICTE Pay Scale

June 2005-July 2007 Lecturer Teaching
Technology, Ratnagiri, Maharashtra 8000-275-13500
MGM College of Engineering, 10000 (Fix Contract

2002-2003 Lecturer Teaching
Aurangabad, Maharashtra Basis)
PAPERS PUBLISHED IN NATIONAL CONFERENCES
1. Shivkaran Ravidas, Y.V Joshi , “Implementation of a FIR filter in VHDL”, TEQIP Sponsored National
conference on advances in electronics, computing and security, NCACNS 2005, SGGS Institute of engineering
and technology , Nanded,
PAPERS PUBLISHED IN INTERNATIONAL JOURNALS
1. Shivkaran Ravidas, M.A.Ansari,, “ Multiview Face Detection: A survey”, International Journal of Computer
Science and Mobile Computing. Vol. 3, Issue. 3, March 2014, pg.1193 – 1203 (ISSN 2320-088X).
SUBJECTS TAUGHT DURING THE PAST NINE YEARS:
Under graduate:
Basic Electronics, Electronics Engineering, Digital Electronics, Control System, Electronics measurements,
Communication System, Image Processing, Electronic Switching, Circuit theory, Electromagnetic theory,
Basics of Electrical &Electronics Engineering.
Post graduate:
Advance Semiconductor Devices, VLSI Design, Image Processing.
Domain Knowledge:
1. VLSI Design flows.

2. Neural Network.
3. Fuzzy Logic
4. Digital Circuit Design (Synthesis and Simulation).
5. Design Analysis and Simulation Techniques.
Skill Summary :
1. Languages : C, C++.
2. Operating systems : Windows 9X, Windows XP, Redhat Linux Enterprise.
3. HDL : VHDL, SystemC,
4. EDA Tool : Xilinx ISE Series,ModelSim,Celoxica Agility Compilar, Xilinx CORE
Generator,Xilinx System Generator for DSP, MatLab Simulink,
LTspice/swicherCAD.
5. FPGA Board : Spartan 3 DSP board
Academic Project & Seminar:
1. Project # 1 : VHDL Implementation of Floating Point FIR Filter with Lattice structure.
2. Project # 2 : Automatic Collision controller in conveyor belt in assembly line.
3. Project # 3 : VHDL implementation and testing a FIR filter on Spartan FPGA kit.
4. Project # 4 : Design and simulation cascaded filter in Matlab-Simuling.
Paper Publications: (Two )
1. National Conferences-1
2. International Journals – 1
SPECIAL ACHIEVEMENTS
 Three times 100% results produced in the theory course titled “Electronics Engineering”
 Recipient of GATE scholarship from MHRD for PG Program.
 Attended International conference organized by world semiconductor forum on “Generalized Open Source
Programmable Logic”, (gospl2004) held in New Delhi.
 Two times 100% results produced in the theory course titled “Principle of Communication”
SPECIFIC CONTRIBUTIONS
 Course Co-ordinator for Subject “ Linear Integrated Circuit” in Lovely Professional University, Punjab.
 Co-ordinator for Faculty development program on “Emerging Trends in Electronics and
Communication” in R B Institute of Technology, Agra.

 Organized in Campus Workshop on “ Robotics” in R B Institute of Technology, Agra.
LABORATORY MANUALS PREPARED
Electronics Engineering Lab EC-101P, Electronics circuits and Devices, Electric circuits lab, Measurements &
Instruments lab and Electronic devices & circuits lab.
DETAILS OF LABORATORIES ESTABLISHED
Electronics Engineering Lab, Electric circuits lab, Measurements & Instruments lab and Electronic devices &
circuits lab in G. L. Bajaj Institute of Engineering and technology, Mathura.
CONFERENCES/ WORKSHOPS/ FDPS/ SEMINARS ATTENDED
1. Attended International conference organized by world semiconductor forum on “Generalized Open

Source Programmable Logic”, (gospl2004) held in New Delhi.
2. A t t tended and participated Pune University sponsored three day national level w rkshop on EDA tools in
VLSI Design, March 15 to march 17, 2008
3. Three day national level workshop on “Tanner tool for lay out designing and DRC Rule checking “,in SGGS
th th
Institute of engineering and technology , Nanded, held between 15 and 17 July 2005.
4. One week faculty development program on “Image processing with MatLab” organized and sponsored by
Marathwada University, Aurangabad, held between 24.06.2006 and 30.06.2006.
5. Three days faculty development program on “Teaching Skills and enhancing presentation skill” in
Lovely Professional University, Phagwara, May 2009.
6. Attednded two days workshop on “ Emerging trends in Electronics engineering”, organized by
7. Electronics department, Dronacharya College of Engineering, Gurgaon, 2010.
Reference:
Dr. M. A. Ansari Dr. A.S. Mandal

Asst. Professor Senior Scientist,
School of Engineering IC Design Group,
Gautam Buddha University Central Electronics Engineering Research Institute,
Greater Noida Pilani, Rajasthan
Ph.: 01596-242359(O)
Declaration:
The information given above is true to the best of my knowledge and will be responsible for any flaws in it.
(Shivkaran Ravidas)

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Curriculum Vitae

Shivkaran Ravidas, Ph.D. ( Pursuing )

202 A, Ashok Avenue ,

1. PhD ( Pursuing ) i) Completed course work with 8.0 CGPI

Organisation/Institution Period Post Held Field Pay Scale

Lovely Professional University,

Finolex Academy of Management & AICTE Pay Scale

MGM College of Engineering, 10000 (Fix Contract

PAPERS PUBLISHED IN INTERNATIONAL JOURNALS

SUBJECTS TAUGHT DURING THE PAST NINE YEARS:

Advance Semiconductor Devices, VLSI Design, Image Processing.

1. VLSI Design flows.

Paper Publications: (Two )

Communication” in R B Institute of Technology, Agra.

LABORATORY MANUALS PREPARED

DETAILS OF LABORATORIES ESTABLISHED

1. Attended International conference organized by world semiconductor forum on “Generalized Open

Dr. M. A. Ansari Dr. A.S. Mandal

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