Professional Documents
Culture Documents
Slides CW Benini
Slides CW Benini
http://pulp-platform.org @pulp_platform
Open Source Hardware
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5
Not only cores – many IPs for a Platform
RISC-V Cores Peripherals Interconnect
RI5CY Ibex Snitch Ariane JTAG SPI Logarithmic interconnect
+ Ara
UART I2S APB – Peripheral Bus
32b 32b 32b 64b
DMA GPIO AXI4 – Interconnect
Platforms https://github.com/pulp‐platform/ M M M M
I M M M M M M M M
M M interconnect
M M MinterconnectM M
interconnect
O RV I interconnect
interconnect
I R5 R5 R5 RV
interconnect
interconnect
A RV RV RV R5 R5
cluster R5 RV
A O A RV RV RV
cluster
cluster O cluster
Single Core RV Multi-core R5 Multi-cluster
• PULPino • Open-PULP • Hero
• PULPissimo • PULP-PM • Manticore
IOT HPC
Accelerators HWCE Neurostream HWCrypt PULPO
(convolution) (ML) (crypto) (1st ord. opt)
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6
61-512.webp
61-512-1.webp
Energy
Security
Safety
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7
Research – XPULP ML extensions: RI5CY
PULP RI5CY – An Open MCU-class RISC-V Core for EE-AI
3-cycle ALU-OP, 4-cyle MEM-OPIPC loss: LD-use, Branch
RISC‐V V1
V1 Baseline RISC-V RV32IMC (not good for ML)
V2
V2 HW loops. Post modified Load/Store, MAC V3
17
5
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9
Energy efficient OSCHW based Products?
FACT: prototype is prerequisite for product!
✘ prototype
(core,IO phy, tech,
MPW +$10M)
✘ product (+100M$)
Energy
Security
Safety
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11
Research – knowing how things “work” is vital
From the “ZombieLoad” paper
From section 3.2, emphasis added for this presentation
“While we identified some necessary building blocks to observe the leakage (cf. Section 5), we
can only provide a hypothesis on why the interaction of the building blocks leads to the
observed leakage. As we could only observe data leakage on Intel CPUs, we assume that this
is indeed an implementation issue (such as Meltdown) and not an issue with the underlying
design (as with Spectre).”
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12
Research Product
OpenTitan is the first
open source silicon
project building a
transparent, high-
quality reference
design for silicon root
of trust (RoT) chips.
Founding Partners
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13
Research Product
OpenTitan is the first
open source silicon
project building a
transparent, high-
quality reference
design for silicon root
of trust (RoT) chips.
Founding Partners
Leakage
resistant crypto
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14
OSCHW to address key challenges
Energy
Security
Safety
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15
PULP in Space: Protecting PULP from SEU
PULP
Scrubbing
RISC-V
DMA L1 Mem (TCDM)
core
ECC
Interconnect
Interconnect ECC
L2 Mem
RISC-V
RISC-V
RISC-V
RISC-V
RISC-V
RISC-V
HWPE Peripherals
core
core
core
core
core
core
C-TCLS
I/O
Configurable Triple core lockstep
icache
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16
Research Product
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17
Scaling up OSCHW industrial ambition
RISC-V Cores Peripherals Interconnect
RI5CY Ibex Snitch Ariane JTAG SPI Logarithmic interconnect
+ Ara
UART I2S APB – Peripheral Bus
32b 32b 32b 64b
DMA GPIO AXI4 – Interconnect
Platforms
M M M M
I M M M use-cases M M M M
Tens of activeMusers, M Mmany M interconnect
M MinterconnectM M
interconnect
O HW, I
RVSW specialization, verification,
interconnect
interconnect
documentation,
I R5
training R5 R5 RV
interconnect
interconnect
A RV RV RV R5 R5
cluster R5 RV
A Cannot be sustained
O
cluster
by one University, O or two…
A RV RV RV
cluster
cluster
Single Core RV Multi-core R5 Multi-cluster
• PULPino • Open-PULP • Hero
• PULPissimo • PULP-PM • MANTICORE
IOT HPC
Accelerators HWCE Neurostream HWCrypt PULPO
(convolution) (ML) (crypto) (1st ord. opt)
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18
Feel the momentum!
Ibex RISC-V core, flash interface,
communications ports, cryptography
accelerators, and more. Zero-Riscy Ibex
Vibrant repository
35+ Contributors
1300+ Contributions
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19
Academic open source Industrial open source
Rick O’Connor (OpenHW CEO, former RISC-V foundation director)
RI5CY, ARIANE
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20
OpenHW Group Ecosystem
Eval
Boards
GCC /
LLVM &
CV32 & OS
CV64 ports
Cloud Based SoC
Cores
Verification Protos
MPW
Layout
&
RTL Simulation Fab
Formal Methods
Stimulus
Verification is Key! |
21
The role of public EU funding
Facilitate prototyping of OSCHW (Europractice++)
Tech. access and MPW cost (including substrate, packaging)
Enablement (e.g. PLL) + IO/PHY (e.g. HBM) IPs cost
Access to advanced EDA Tools + Expertise (e.g. advanced EDA cockpits)
Design implementation support + Expertise (e.g. Backend, Packaging…)
http://pulp-platform.org @pulp_platform