Professional Documents
Culture Documents
Datasheet MP2380DN
Datasheet MP2380DN
DESCRIPTION FEATURES
The MP2380 is a monolithic step-down switch • Wide 4.5V to 21V Operating Input Range
mode converter with a built in high-side power • 5A Continuous Output Current
MOSFET. It achieves 5A continuous output • 45mΩ Internal Power MOSFET Switch
current over a wide input supply range with • Power Good Indicator
excellent load and line regulation. • Fixed 600KHz Frequency
Current mode operation provides fast transient • Synchronizable Up to 1.5 MHz
response and eases loop stabilization. • Cycle-by-Cycle Over Current Protection
• Thermal Shutdown
Fault condition protection includes cycle-by-cycle
current limiting and thermal shutdown. • Output Adjustable from 0.8V
• Stable with Low ESR Output Ceramic
The MP2380 requires a minimum number of Capacitors
readily available standard external components • Available in a Thermally Enhanced 8-Pin
and is available in an 8-pin SOIC package with SOIC Package
exposed pad.
APPLICATIONS
• Distributed Power Systems
• Battery Charger
• Pre-Regulator for Linear Regulators
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
VIN
8 2 Efficiency vs
IN BST
Output Current
100
95 VIN=4.5V
3
VCC 90
EFFICIENCY (%)
1 VOUT 85
MP2380 SW
3.3V @ 5A 80 VIN=12V
6 D1
POWER PG 75
GOOD B530C
70
VCC
65
7 5 60
OFF ON EN/SYNC FB
55 VOUT=3.3V
GND
50
4 1 2 3 4 5
OUTPUT CURRENT (A)
ELECTRICAL CHARACTERISTICS
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameters Symbol Condition Min Typ Max Units
Feedback Voltage VFB 4.5V ≤ VIN ≤ 21V 0.788 0.808 0.828 V
VFB = 0.8V 10 nA
Feedback Current IFB
VFB = 2V 2 µA
Switch On Resistance (4) RDS(ON) 45 75 mΩ
Switch Leakage VEN = 0V, VSW = 0V 0 25 µA
Current Limit (4) 6.5 7.3 A
Oscillator Frequency fSW VFB = 0.6V 400 600 800 KHz
Fold-back Frequency VFB = 0V 60 150 240 KHz
Maximum Duty Cycle VFB = 0.6V 85 90 %
Minimum On Time tON 100 ns
Under Voltage Lockout Threshold Rising 3.9 4.1 4.3 V
Under Voltage Lockout Threshold Hysteresis 880 mV
EN Input Low Voltage 0.4 V
En Input High Voltage 1.2 V
VEN = 2V 2
EN Input Current µA
VEN = 0V 0
Sync Frequency Range (Low) FSYNCL 300 KHz
Sync Frequency Range (High) FSYNCH 1.5 MHz
Enable Turnoff Delay TOFF 5.0 us
Supply Current (Shutdown) VEN = 0V 25 µA
Supply Current (Quiescent) VEN = 2V, VFB = 1V 0.9 1.1 mA
Thermal Shutdown 150 °C
Power Good Control
Power Good Threshold Rising 0.69 0.74 0.79 V
Power Good Threshold Hysteresis 40 mV
PG Pin Level VPG PG Sink 4mA 0.4 V
Note:
4) Guaranteed by design.
PIN FUNCTIONS
Pin # Name Description
1 SW Switch Output.
Bootstrap. This capacitor is needed to drive the power switch’s gate above the supply
2 BST voltage. It is connected between SW and BS pins to form a floating supply across the power
switch driver.
3 VCC Bias Supply. Decouple this pin with a 1µF ceramic capacitor.
Ground. This pin is the voltage reference for the regulated output voltage. For this reason
4 GND care must be taken in its layout. This node should be placed outside of the D1 to C1 ground
path to prevent switching current spikes from inducing voltage noise into the part.
Feedback. An external resistor divider from the output to GND, tapped to the FB pin sets
the output voltage. To prevent current limit run away during a short circuit fault condition the
5 FB
frequency foldback comparator lowers the oscillator frequency when the FB voltage is
below 250mV.
Power Good Indicator. Connect this pin to VCC or VOUT by a 100kΩ pull-up resistor. The
6 PG output of this pin is low if the output voltage is 10% less than the nominal voltage, otherwise
it is an open drain.
7 EN/SYNC On/Off Control Input and Synchronization Pin.
Supply Voltage. The MP2380 operates from a +4.5V to +21V unregulated input. C1 is
8 IN
needed to prevent large voltage spikes from appearing at the input.
85
VIN=12V VSW VPG
80 10V/div. 5V/div.
75
70 VSW
10V/div.
65 VOUT
60 10mV/div.
IL
55 10A/div.
50
1 2 3 4 5 400ns/div.
OUTPUT CURRENT (A)
VOUT VOUT
2V/div. 2V/div. VOUT
1V/div.
VPG VPG VPG
5V/div. 5V/div. 5V/div.
VOUT
2V/div.
VSW
5V/div. VOUT,AC
100mV/div.
VPG
5V/div.
VSW
10V/div.
VIN VIN
10V/div. 100mV/div.
IL
IL 5A/div.
5A/div.
0.30 4.5
INPUT CURRENT (
0.25 4.3
1000
0.20
4.1
0.15
950 3.9
0.10
0.05 3.7
900 0 3.5
0 5 10 15 20 25 0 5 10 15 20 25 4 4.5 5 5.5 6 6.5 7
INPUT VOLTAGE (V) INPUT VOLTAGE (V) INPUT VOLTAGE (A)
70 1.0000 1.0020
CASE TEMPERATURE (OC)
50 0.9996 1.0010
VIN=12V
40 0.9994 1.0000
IOUT =2.5A
30 0.9992 0.9995
VIN=20V
20 0.9990 0.9990
0 0.9986 0.9980
0 1 2 3 4 5 6 0 1 2 3 4 5 6 0 5 10 15 20 25
OUTPUT CURRENT (A) OUTPUT CURRENT (A) INPUT VOLTAGE (V)
8
PEAK CURRENT (A)
0
10 30 50 70 90
DUTY CYCLE (%)
OPERATION
IN
CURRENT SENSE
D2 AMPLIFIER
--
ƒ″ x40
+
REGULATOR
BST
OSCILLATOR
EN/SYNC REGULATOR
600KHz S Q DRIVER
+
-- R
R SW
VCC 1pF CURRENT
LIMIT
COMPARATOR
REFERENCE 54pF 0.74V
PG
0.81 VREF
+
+ POWER
--
FB -- PWM GOOD
ERROR COMPARATOR
AMPLIFIER
GND
APPLICATION INFORMATION
The schematic on the front page shows a typical Output Rectifier Diode
MP2380 application. The IC can provide up to The output rectifier diode supplies the current to
5A output current at a nominal output voltage of the inductor when the high-side switch is off. To
3.3V. For proper thermal performance, the reduce losses due to the diode forward voltage
exposed pad of the device must be soldered and recovery times, use a Schottky diode.
down to the printed circuit board.
Choose a diode whose maximum reverse
Setting the Output Voltage
voltage rating is greater than the maximum
The external resistor divider is used to set the
input voltage, and whose current rating is
output voltage (see the schematic on front
greater than the maximum load current. Table 2
page). The feedback resistor R1 also sets the
lists example Schottky diodes and
feedback loop bandwidth with the internal
manufacturers.
compensation capacitor (see Figure 1). Choose
R1 for optimal transient response. R2 is then Table 2—Diode Selection Guide
given by:
Voltage/Current
R1 Diode Rating Manufacture
R2 =
VOUT B530C 30V, 5A Diodes Inc.
−1
0 .8 V MBRD630CT 30V, 6A On Semi
Table 1—Resistor Selection for Common Selecting the Input Capacitor
Output Voltages The input capacitor (C1) reduces the surge
VOUT (V) R1 (kΩ) R2 (kΩ) current drawn from the input and the switching
noise from the device. The input capacitor
1 162 (1%) 649 (1%)
impedance at the switching frequency should
1.2 162 (1%) 324 (1%)
be less than the input source impedance to
1.8 40.2 (1%) 32.4 (1%)
prevent high frequency switching current from
2.5 40.2 (1%) 19.1 (1%) passing to the input. Ceramic capacitors with
3.3 40.2 (1%) 13 (1%) X5R or X7R dielectrics are highly
5 40.2 (1%) 7.68 (1%) recommended because of their low ESR and
small temperature coefficients. For 5A output
Selecting the Inductor applications, a 22µF capacitor is sufficient.
A 1µH to 10µH inductor with a DC current rating
of at least 25% percent higher than the Selecting the Output Capacitor
maximum load current is recommended for The output capacitor (C2) keeps output voltage
most applications. For highest efficiency, the small ripple and ensures regulation loop
inductor DC resistance should be less than stability. The output capacitor impedance
15mΩ. For most designs, the inductance value should be low at the switching frequency.
can be derived from the following equation. Ceramic capacitors with X5R or X7R dielectrics
are recommended.
VOUT × ( VIN − VOUT )
L=
VIN × ∆IL × f OSC
4
5
C3
6
3
7
2
R3
Cb
8
Bottom Layer
Figure 4—PCB Layout for Double Layers
PACKAGE INFORMATION
SOIC8E (EXPOSED PAD)
0.189(4.80) 0.124(3.15)
0.197(5.00) 0.136(3.45)
8 5
1 4
0.051(1.30)
0.067(1.70)
0.0075(0.19)
SEATING PLANE
0.0098(0.25)
0.000(0.00)
0.013(0.33) 0.006(0.15)
0.020(0.51) SIDE VIEW
0.050(1.27)
BSC
GAUGE PLANE
0.010(0.25) BSC
0.024(0.61) 0.050(1.27)
0.016(0.41)
0o-8o 0.050(1.27)
0.063(1.60)
DETAIL "A"
0.103(2.62) 0.213(5.40)
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
0.138(3.51) OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
RECOMMENDED LAND PATTERN 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.