ACT8846
ACT8846
ACT8846
ACT8846 Pr A, 3-Jul-12
Advanced Product Information―All Information Subject to Change
FEATURES
INTEGRATED POWER SUPPLIES GENERAL DESCRIPTION
Four DC/DC Step-Down (Buck) Regulators
The ACT8846 is a complete, cost effective, and
2 x 2.8A, 2 x 1.5A highly-efficient ActivePMUTM power management
Five Low-Noise LDOs solution optimized for the power, voltage
2 x 150mA, 3 x 350mA sequencing and control requirements of Rockchip
RK3066 application processor family.
Three Low-Input Voltage LDOs
1 x 150mA, 2 x 350mA The ACT8846 features four fixed-frequency,
current-mode, synchronous PWM step-down
One Low IQ Keep-Alive LDO converters that achieve peak efficiencies of up to
Backup Battery Charger 97%. These regulators operate with a fixed
frequency of 2.25MHz, minimizing noise in sensitive
SYSTEM CONTROL AND INTERFACE applications and allowing the use of small external
components. These buck regulators supply up to
Four General Purpose I/O with PWM Drivers 2.8A of output current and can fully satisfy the
I2C Serial Interface power and control requirements of the multi-core
Interrupt Controller application processor. Dynamic Voltage Scaling
(DVS) is supported either by dedicated control pins,
or through I2C interface to optimize the energy-per-
SYSTEM MANAGEMENT task performance for the processor. This device
Reset Interface and Sequencing Controller also include eight low-noise LDOs (up to 350mA
Power on Reset per LDO), one always-on LDO and an integrated
Soft / Hard Reset backup battery charger to provide a complete
power system for the processor.
Watchdog Supervision
Multiple Sleep Modes The power sequence and reset controller provides
power-on reset, SW-initiated reset, and power cycle
Thermal Management Subsystem reset for the processor. It also features the
watchdog supervisory function. Multiple sleep
modes with autonomous sleep and wake-up
APPLICATIONS sequence control are supported.
The thermal management and protection
Tablet PC subsystem allows the host processor to manage the
Mobile Internet Devices (MID) power dissipation of the PMU and the overall
E-books system dynamically. The PMU provides a thermal
warning to the host processor when the
Personal Navigation Devices temperature reaches a certain threshold such that
Smart Phones the system can turn off some of the non-essential
functions, reduce the clock frequency and etc to
manage the system temperature.
The ACT8846 is available in a compact, Pb-Free
and RoHS-compliant TQFN66-48 package.
TABLE OF CONTENTS
General Information ..................................................................................................................................... p. 01
Functional Block Diagram ............................................................................................................................ p. 03
Ordering Information .................................................................................................................................... p. 04
Pin Configuration ......................................................................................................................................... p. 04
Pin Descriptions ........................................................................................................................................... p. 05
Absolute Maximum Ratings ......................................................................................................................... p. 07
I2C Interface Electrical Characteristics ........................................................................................................ p. 08
Global Register Map .................................................................................................................................... p. 09
Register and Bit Descriptions ...................................................................................................................... p. 11
System Control Electrical Characteristics.................................................................................................... p. 16
Step-Down DC/DC Electrical Characteristics .............................................................................................. p. 17
Low-Noise LDO Electrical Characteristics ................................................................................................... p. 18
Low-Input Voltage LDO Electrical Characteristics ....................................................................................... p. 19
Low-Power (Always-On) LDO Electrical Characteristics ............................................................................. p. 20
PWM LED Driver Electrical Characteristics ................................................................................................. p. 20
Typical Performance Characteristics……………………………………………………………………………..p. 21
System Control Information ......................................................................................................................... p. 27
Interfacing with the Rockchip RK3066 Processor ............................................................................ p. 27
Control Signals ................................................................................................................................. p. 28
Push-Button Control ......................................................................................................................... p. 29
Control Sequences ........................................................................................................................... p. 29
Watch-Dog Supervision ................................................................................................................... p. 30
Software-Initiated Power Cycle ........................................................................................................ p. 30
Functional Description ................................................................................................................................. p. 31
I2C Interface ..................................................................................................................................... p. 31
Housekeeping Functions.................................................................................................................. p. 31
Thermal Protection ........................................................................................................................... p. 31
Step-Down DC/DC Regulators .................................................................................................................... p. 32
General Description.......................................................................................................................... p. 32
100% Duty Cycle Operation ............................................................................................................. p. 32
Operating Mode................................................................................................................................ p. 32
Synchronous Rectification ................................................................................................................ p. 32
Soft-Start .......................................................................................................................................... p. 32
Compensation .................................................................................................................................. p. 32
Configuration Options....................................................................................................................... p. 32
OK[ ] and Output Fault Interrupt ....................................................................................................... p. 33
PCB Layout Considerations ............................................................................................................. p. 33
Low-Noise, Low-Dropout Linear Regulators................................................................................................ p. 34
General Description.......................................................................................................................... p. 34
Output Current Limit ......................................................................................................................... p. 34
Compensation .................................................................................................................................. p. 34
Configuration Options....................................................................................................................... p. 34
OK[ ] and Output Fault Interrupt ....................................................................................................... p. 34
PCB Layout Considerations ............................................................................................................. p. 34
Always-On LDO (REG13) ............................................................................................................................ p. 35
General Description.......................................................................................................................... p. 35
Reverse-Current Protection ............................................................................................................. p. 35
Typical Application ........................................................................................................................... p. 35
PWM LED Drivers ........................................................................................................................................ p. 36
PWM Frequence Selection .............................................................................................................. p. 36
PWM Duty Cycle Selection .............................................................................................................. p. 36
TQFN66-48 Package Outline and Dimensions ........................................................................................... p. 37
Revision History ........................................................................................................................................... p. 38
Active-Semi
ORDERING INFORMATION
PART NUMBER VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 VOUT7 VOUT8 VOUT9 VOUT10 VOUT11 VOUT12 VOUT13
ACT8846QM368-T Adjustable 1.1V 1.1V 3.0V 1.1V 2.5V 1.8V 3.3V 3.3V 3.3V 1.8V 2.8V 1.8V
PIN CONFIGURATION
TOP VIEW
ACT8846
DATE CODE
PIN DESCRIPTIONS
PIN NAME DESCRIPTION
Power Ground for REG3. Connect GP14, GP2, GP3, and GA together at a single
3 GP3
point as close to the IC as possible.
Output Voltage Selection for REG2. Drive to logic low to select default output voltage.
8 VSELR2
Drive to logic high to select secondary output voltage.
Power ground for REG2. Connect GP14, GP2, GP3, and GA together at a single
10 GP2
point as close to the IC as possible.
Power input for REG2. Bypass to GP2 with a high quality ceramic capacitor placed as
13, 14 VP2
close to the IC as possible.
Power Enable Input for REG3. PWREN is functional only when PWRHLD is driven
16 PWREN high. Drive PWREN to a logic high to turn on the REG3. Drive PWREN to a logic low
to turn off the REG3.
Reference Bypass. Connect a 0.047μF ceramic capacitor from REFBP to GA. This
17 REFBP
pin is discharged to GA in shutdown.
20 GA Analog Ground.
23 SDA Data Input for I2C Serial Interface. Data is read on the rising edge of SCL.
Power input for REG4. Bypass to GP14 with a high quality ceramic capacitor placed
25 VP4
as close to the IC as possible.
: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may
affect device reliability.
Figure 1:
I2C Compatible Serial Bus Timing
tSCL
SCL
SDA
Start Stop
condition condition
nRSTO Delay 64
ms
: VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section.
: IMAX Maximum Output Current.
: VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section.
: IMAX Maximum Output Current.
: Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the
regulation voltage (for 3.1V output voltage or higher).
: LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage.
Under heavy overload conditions the output current limit folds back by 50% (typ.)
: VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section.
: IMAX Maximum Output Current.
: Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the
regulation voltage (for 3.1V output voltage or higher).
: LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage.
Under heavy overload conditions the output current limit folds back by 50% (typ)
: VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section.
ACT8846-001
ACT8846-002
1.204
2.340
1.200 2.320
Frequency (MHz)
2.300
1.196
VREF (V)
2.280
2.260
1.192
2.240
1.188 2.220
2.200
1.184
2.180
-40 -20 0 20 40 60 80 100 120 140 -40 -20 0 20 40 60 80 100 120 140
ACT8846-004
CH1
CH1
CH2
CH2
CH3
CH3
CH4 CH4
ACT8846-006
CH1 CH1
CH2 CH2
CH3 CH3
CH4 CH4
ACT8846-007
ACT8846-008
CH1
CH1
CH2
CH2
CH3
CH3
CH4
ACT8846-010
ACT8846-009
CH1 CH1
CH2 CH2
CH3 CH3
CH4 CH4
ACT8846-012
CH1
CH1
CH2
CH3 CH2
CH4
ACT8846-013
ACT8846-014
CH1
CH1
CH2
CH2
CH3
CH4
ACT8846-016
ACT8846-015
CH1 CH1
CH2
CH2
CH3
CH3
CH4
CH4
ACT8846-018
100
CH1 VOUT = 1.2V VIN = 3.6V
80
VIN = 5.0V
Efficiency (%)
CH2
60
VIN = 4.0V
CH3
40
CH4 20
0
CH1: VPWRHOLD, 2V/div 0 1 10 100 1000 10000
CH2: VOUT1, 1V/div
CH3: VOUT4, 1V/div Output Current (mA)
CH3: VOUT2, 1V/div
TIME: 1ms/div
REG2 Efficiency vs. Output Current REG3 Efficiency vs. Output Current
100
ACT8846-019
ACT8846-020
VOUT = 1.2V VIN = 3.6V VOUT = 1.1V VIN = 3.6V
80
VIN = 5.0V 80
VIN = 5.0V
Efficiency (%)
60 VIN = 4.0V
Efficiency (%)
60
VIN = 4.0V
40
40
20 20
0
0
0 1 10 100 1000 10000 0 1 10 100 1000 10000
ACT8846-022
100 VOUT = 1.1V 1.205
VIN = 3.6V
80 1.200
VIN = 5.0V
Efficiency (%)
60 1.195
VOUT (V)
VIN = 4.0V
40 1.190
20 1.185
0 1.180
ACT8846-024
1.186
350
Dropout Voltage (mV)
1.182 300
250
VOUT (V)
1.178 200
150
1.174 100
50
1.170
0
-40 -20 0 20 40 60 80 100 120 140 0 50 100 150 200 250
ACT8846-025
ACT8846-026
1.200 1.200
1.160 1.160
1.120 1.120
1.080 1.080
1.040 1.040
1.000 1.000
0 40 80 120 160 200 0 40 80 120 160 200
ACT8846-028
400
Dropout Voltage (mV)
3.360
300
3.320
200
3.280
100
3.240
0 3.200
0 50 100 150 200 250 300 350 400 0 50 100 150 200 250 300 350
ACT8846-030
3.300
Output Voltage (V)
1.860
Output Voltage (V)
3.290
1.820
3.280
1.780
3.270
1.740
3.260
1.700 3.250
0 50 100 150 200 250 300 350 0 50 100 150 200 250 300 350 400
ACT8846-031
ACT8846-032
1.300
Dropout Voltage (mV)
200 1.260
100 1.180
50 1.140
0 1.000
0 50 100 150 200 0 40 80 120 160 200
ACT8846-034
1.200
Dropout Voltage (mV)
200
1.160
Output Voltage (V)
150 1.120
100 1.080
50 1.040
0 1.000
0 100 200 300 400 0 50 100 150 200 250 300 350
ACT8846-036
1.900
Dropout Voltage (mV)
200 1.860
Output Voltage (V)
150 1.820
100 1.780
50 1.740
0 1.700
0 100 200 300 400 0 50 100 150 200 250 300 350
Table 1:
ACT8846 and Rockchip RK3066 Power Domains
ACT8846 DEFAULT MAX POWER UP ON/OFF @
POWER DOMAIN TYPE
REGULATOR VOLTAGE CURRENT ORDER SLEEP
REG1 VCC_DDR 1.2V 1.5A 5 ON DC/DC Step Down
REG2 VDD_LOG 1.1V 2.8A 5 ON DC/DC Step Down
REG3 VDD_ARM 1.1V 2.8A 4 OFF DC/DC Step Down
REG4 VCC_IO 3.0V 1.5A 3 ON DC/DC Step Down
REG5 VDD_11 1.1V 150mA 2 ON Low-Noise LDO
REG6 VCC_25 2.5V 150mA 2 ON Low-Noise LDO
REG7 VCC18_CIF 1.8V 350mA / OFF Low-Noise LDO
REG8 VCCA_33 3.3V 350mA 6 ON Low-Noise LDO
REG9 VCC_TOUCH 3.3V 350mA / OFF Low-Noise LDO
REG10 VCC33 3.3V 150mA 1 ON Low Input-Voltage LDO
REG11 VCC18_IO 1.8V 350mA 3 ON Low Input-Voltage LDO
Table 2:
ACT8846 and Rockchip RK3066 Power Mode
Table 3:
ACT8846 and RK3066 Signal Interface
ACT8846 DIRECTION ROCKCHIP RK3066
PWREN GPIO6_B1
SCL I2C1_SCL
SDA I2C1_SDA
VSELR2 GPIO0_D7
GPIO1/VSELR3 GPIO0_D6
nRSTO NPOR
nIRQ GPIO6_A4
nPBSTAT GPIO6_A2
PWRHLD GPIO6_B0
Enabling/Disabling Sequence
A typical enable sequence is initiated whenever the
nPBIN is asserted low via 50KΩ resistance. The
power control diagram is shown in Figure 3. During
the boot sequence, the microprocessor must assert
Figure 3:
Power Control Sequence
FUNCTIONAL DESCRIPTION
I2C Interface Table 4:
BATLEV Falling Threshold
The ACT8846 features an I2C interface that allows
advanced programming capability to enhance overall
system performance. To ensure compatibility with a BATLEV[3:0] BATLEV Falling
wide range of system processors, the I2C interface Threshold
supports clock speeds of up to 400kHz (“Fast-Mode” 0000 2.5
operation) and uses standard I2C commands. I2C
write-byte commands are used to program the 0001 2.6
ACT8846, and I2C read-byte commands are used to
0010 2.7
read the ACT8846’s internal registers. The ACT8846
always operates as a slave device, and is addressed 0011 2.8
using a 7-bit slave address followed by an eighth bit,
which indicates whether the transaction is a read- 0100 2.9
operation or a write-operation, [1011010x]. 0101 3.0
SDA is a bi-directional data line and SCL is a clock
0110 3.1
input. The master device initiates a transaction by
issuing a START condition, defined by SDA 0111 3.2
transitioning from high to low while SCL is high. Data
is transferred in 8-bit packets, beginning with the 1000 3.3
MSB, and is clocked-in on the rising edge of SCL. 1001 3.4
Each packet of data is followed by an “Acknowledge”
(ACK) bit, used to confirm that the data was 1010 3.5
transmitted successfully.
1011 3.6
For more information regarding the I2C 2-wire serial
interface, go to the NXP website: http://www.nxp.com. 1100 3.7
1101 3.8
Housekeeping Functions
1110 3.9
Programmable battery Voltage Monitor
The ACT8846 features a programmable battery- 1111 4.0
voltage monitor, which monitors the voltage at INL2
(which should be connected directly to the battery)
and compares it to a programmable threshold
voltage. The VBATMON comparator is designed to Thermal Protection
be immune to noise resulting from switching, load The ACT8846 integrates thermal shutdown
transients, etc. The BATMON comparator is disable protection circuitry to prevent damage resulting
by default; to enable it, set the BATLEV[3:0] register from excessive thermal stress, as may be
to one of the value in Table 4. Note that there is a encountered under fault conditions.
200mV hysteresis between the rising and falling
threshold for the comparator. The VBATDAT [-] bit Thermal Interrupt
reflects the output of the BATMON comparator. The If the thermal interrupt is unmasked (by setting
value of VBATDAT[ ] is 1 when VINL2 < BATLEV; nTMSK[ ] to 1), ACT8846 can generate an interrupt
value is 0 otherwise. when the die temperature reaches 120°C (typ).
Compensation
REG1, REG2, REG3, and REG4 utilize current-mode
control and a proprietary internal compensation
scheme to simultaneously simplify external
component selection and optimize transient
performance over their full operating range. No
compensation design is required; simply follow a few
simple guide lines described below when choosing
external components.
Figure 4 shows the feedback network necessary to be read by the system microprocessor via the I2C
set the output voltage for REG1 when using the interface. If an output voltage is lower than the power-
adjustable output voltage option. Connect the FB1 OK threshold, typically 7% below the programmed
pin to the output directly to regulate the output regulation voltage, that regulator's OK[ ] bit will be 0.
voltage at 1.2V. Select components as follows: Set
If a DC/DC's nFLTMSK[-] bit is set to 1, the ACT8846
RFB2 = 51kΩ, then calculate RFB1 using the
will interrupt the processor if that DC/DC's output
following equation:
voltage falls below the power-OK threshold. In this
case, nIRQ will assert low and remain asserted until
V
R FB 1 R FB 2 OUT 1 1 (1)
either the regulator is turned off or back in regulation,
and the OK[ ] bit has been read via I2C.
V FB 1
where VFB1 is 1.2V. Finally choose CFF using the PCB Layout Considerations
following equation: High switching frequencies and large peak currents
make PC board layout an important part of step-down
DC/DC converter design. A good design minimizes
1 10 6
C FF (2)
excessive EMI on the feedback paths and voltage
gradients in the ground plane, both of which can
R FB 1 result in instability or regulation errors.
By default, REG2, REG3 and REG4 power up and Step-down DC/DCs exhibit discontinuous input
regulate to their default output voltages. For REG2, current, so the input capacitors should be placed as
REG3 and REG4, the output voltage is selectable by close as possible to the IC, and avoiding the use of
setting corresponding VSELR# pin that when via if possible. The inductor, input filter capacitor, and
VSELR# is low, output voltage is programmed by output filter capacitor should be connected as close
VSET0[ ] bits, and when VSELR# is high, output together as possible, with short, direct, and wide
voltage is programmed by VSET1[ ] bits. Also, once traces. The ground nodes for each regulator's power
the system is enabled, each regulator's output loop should be connected at a single point in a star-
voltage may be independently programmed to a ground configuration, and this point should be
different value. Program the output voltages via the connected to the backside ground plane with multiple
I2C serial interface by writing to the regulator's via. The output node for each regulator should be
VSET0[ ] register if VSELR# is low or VSET1[ ] connected to its corresponding OUTx pin through the
register if VSELR# is high as shown in Table 5. shortest possible route, while keeping sufficient
distance from switching nodes to prevent noise
Enable / Disable Control injection. Finally, the exposed pad should be directly
During normal operation, each buck may be enabled connected to the backside ground plane using
or disabled via the I2C interface by writing to that multiple via to achieve low electrical and thermal
regulator's ON[ ] bit. resistance.
REGx/VSET[5:3]
REGx/VSET[2:0]
000 001 010 011 100 101 110 111
000 0.600 0.800 1.000 1.200 1.600 2.000 2.400 3.200
001 0.625 0.825 1.025 1.250 1.650 2.050 2.500 3.300
010 0.650 0.850 1.050 1.300 1.700 2.100 2.600 3.400
011 0.675 0.875 1.075 1.350 1.750 2.150 2.700 3.500
100 0.700 0.900 1.100 1.400 1.800 2.200 2.800 3.600
101 0.725 0.925 1.125 1.450 1.850 2.250 2.900 3.700
110 0.750 0.950 1.150 1.500 1.900 2.300 3.000 3.800
111 0.775 0.975 1.175 1.550 1.950 2.350 3.100 3.900
Reverse-Current Protection
REG13 features internal circuitry that limits the
reverse supply current to less than 1µA when the
input voltage falls below the output voltage, as can
be encountered in backup-battery charging
applications. REG13's internal circuitry monitors the
input and the output, and disconnects internal
circuitry and parasitic diodes when the input voltage
falls below the output voltage, greatly minimizing
backup battery discharge.
Typical Application
Voltage Regulators
REG13 is ideally suited for always-on voltage-
regulation applications, such as for real-time clock
and memory keep-alive applications. This regulator
requires only a small ceramic capacitor with a
minimum capacitance of 0.47μF for stability. For
best performance, the output capacitor should be
connected directly between the output and GA, with
a short and direct connection.
Figure 5:
Typical Application of RTC LDO
DIMENSION IN DIMENSION IN
SYMBOL MILLIMETERS INCHES
MIN MAX MIN MAX
A 0.700 0.800 0.032 0.036
D 6.00 0.24
E 6.00 0.24
REVISION HISTORY
Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each
product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use
as critical components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of
the use of any product or circuit described in this datasheet, nor does it convey any patent license.
Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact
[email protected] or visit http://www.active-semi.com.
®
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