2022 Dec. ECT203-C
2022 Dec. ECT203-C
PART A
Answer all questions. Each question carries 3 marks Marks
Answer any one full question from each module. Each question carries 14 marks
Module 1
11 a) Find the sum of two hexadecimal numbers (85C) 16 and (23C6) 16 (2)
b) Covert each decimal number to binary and perform the subtraction
21.510 --13.2510 using (i)1’s complement method(ii)2’s complement (4)
method
c) Explain the main differences between the Verilog terms
(i)Wire and Reg
(ii)Task and Function (8)
ns
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0800ECT203122101
12 a) How is the Hamming code word generated? The message “1001001” is (8)
coded in 7-bit even parity Hamming code, which is transmitted through
a noisy channel. Decode the message, assuming that at most a single
error occurred in each code word.
b) Explain Verilog operators with examples. (6)
Module 2
13 a) Simplify the Boolean expression F (A, B, C, D) =∑m (0, 1, 2, 6, 8, 9, 10, (8)
11) + d (3, 7, 14, 15) using K-Map and implement the simplified
expression using universal gates.
b) Prove the following Boolean rules
i. A+AB=A (6)
ii. A+A′B=A+B
14 a) Reduce the following function using Karnaugh map technique (8)
f (A, B, C, D) = πM (0, 2, 4, 10, 11, 14, 15) and implement the
simplified expression using NAND gates.
b) Explain the significance of duality principle in Boolean algebra (6)
Module 3
15 a) Implement the following functions using MUX (9)
(i)AND
(ii)XOR (5)
iii) f (A, B, C) = ∑ m (0, 3, 5, 6)
b) Write a verilog code to implement 4:1 multiplexer.
16 a) Implement a Full adder circuit using (9)
(i) 3: 8 decoder (ii) 1:8 demultiplexer (5)
b) Write a Verilog description for a one-bit full adder circuit
Module 4
17 a) Design a 3-bit synchronous up counter using T flip-flop. (9)
b) Explain the operation of a 4-bit Ring counter. (5)
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