Download as pdf or txt
Download as pdf or txt
You are on page 1of 16

CHENDHURAN COLLEGE OF ENGINEERING AND TECHNOLOGY

Pilivalam (Po), Thirumayam (Tk), Pudukkottai (Dt.) – 622 507

Department of Computer Science and Engineering


III Semester
CS3351 – Digital Principles and Computer Organization

UNIT III

COMPUTER FUNDAMENTALS

PART-A
1. Classify the instructions based on the operations they perform and give one example to each
category. AU: Dec.-18

.
2.What is Instruction set architecture ?AU : Dec-15
Ans. : One of the most imporant abstraction is the interface between the hardware and the lowest-level
softwrae. Because of its importance, it is given a special name:The instruction set architecture of a
computer. It includes anything programmer needs to know to make a binary machine language program
work correctly, including instructions, I/O devices and so on.
3. Differentiate direct and indirect addressing mode.AU: Dec.-08
Ans. : In direct addressing mode the address of the location of the operand is given explicitly as a part of the
instruction. On the other hand, in indirect addressing mode, the effective address of the operand is the
contents of a register or the main memory location whose address is given explicitly in the instruction.
4. What do you mean by big endian and little endian ?
Ans. : When lower byte addresses are used for the more significant bytes (the leftmost bytes) of the word,
addressing is called big endian.
Ans. : When the lower byte addresses are used for, the less significant bytes (the rightmost byte) of the word,
addressing is called little-endian.

1
5. Compare machine level, assembly level and high level languages.

6. outline instruction cycle with diagram

Each instruction cycle consists of the following phases:

1. Fetch instruction from memory.


2. Decode the instruction.
3. Read the effective address from memory.
4. Execute the instruction.

7. What do you mean by effective address ?

• An address computed by the processor when executing a memory access or branch instruction or when
fetching the next sequential instruction is known as Effective Address (EA). An effective address can be
made up from as many as three elements: The base, index and displacement.
• An addressing mode specifies how to calculate the effective of an operand by using elements of effective
information held in registers and/or constants contained within a machine instruction or elsewhere.
8. List the types of addressing modes
The various types of addressing modes are:
• Implicit addressing mode. • Register addressing mode.
• Immediate addressing mode. • Register indirect addressing mode.
• Direct addressing mode. • Auto-increment/decrement addressing mode.
• Indirect addressing mode. • Relative addressing mode.

9. What is Von Neumann bottleneck ?


Von Neumann Bottleneck Because of the stored program architecture of Von-Neumann machine, the
processor performance is tightly bound to the memory performance. That is, since we need to access
memory at least once per cycle to read an instruction, the processor can only operate as fast as the memory.
This is sometimes known as the Von Neumann bottleneck or memory wall.
10. List various instruction formats with example.
1. Three-address instruction - add a,b,c
2. Two-address instruction - add a,b
3. One address instruction - add a.

2
PART-B
1. Outline the von neumann architecture.(13)

Von-Neumann Model

Von-Neumann proposed his computer architecture design in 1945 which was later known as Von-Neumann
Architecture. It consisted of a Control Unit, Arithmetic, and Logical Memory Unit (ALU), Registers and
Inputs/Outputs.

Von Neumann architecture is based on the stored-program computer concept, where instruction data and
program data are stored in the same memory. This design is still used in most computers produced today.

A Von Neumann-based computer:

o Uses a single processor

o Uses one memory for both instructions and data.

o Executes programs following the fetch-decode-execute cycle

Components of Von-Neumann Model:

o Central Processing Unit

o Buses

o Memory Unit

Central Processing Unit

3
The part of the Computer that performs the bulk of data processing operations is called the Central Processing
Unit and is referred to as the CPU.

The Central Processing Unit can also be defined as an electric circuit responsible for executing the
instructions of a computer program.

The CPU performs a variety of functions dictated by the type of instructions that are incorporated in the
computer.

The major components of CPU are Arithmetic and Logic Unit (ALU), Control Unit (CU) and a variety of
registers.

Arithmetic and Logic Unit (ALU)

The Arithmetic and Logic Unit (ALU) performs the required micro-operations for executing the instructions.
In simple words, ALU allows arithmetic (add, subtract, etc.) and logic (AND, OR, NOT, etc.) operations
to be carried out.

Control Unit

The Control Unit of a computer system controls the operations of components like ALU, memory and
input/output devices.

The Control Unit consists of a program counter that contains the address of the instructions to be fetched and
an instruction register into which instructions are fetched from memory for execution.

Registers

Registers refer to high-speed storage areas in the CPU. The data processed by the CPU are fetched from the
registers.

Following is the list of registers that plays a crucial role in data processing.

Registers Description

MAR (Memory Address Register)


This register holds the memory location of the data that needs to be
accessed.

MDR (Memory Data Register)


This register holds the data that is being transferred to or from memory.

AC (Accumulator)
This register holds the intermediate arithmetic and logic results.

PC (Program Counter)
This register contains the address of the next instruction to be executed.

CIR (Current Instruction Register)


This register contains the current instruction during processing.

Buses

Buses are the means by which information is shared between the registers in a multiple-register configuration
system.

A bus structure consists of a set of common lines, one for each bit of a register, through which binary
information is transferred one at a time. Control signals determine which register is selected by the bus
during each particular register transfer.
4
Von-Neumann Architecture comprised of three major bus systems for data transfer.

Bus Description

Address Bus
Address Bus carries the address of data (but not the data) between the processor and
the memory.

Data Bus
Data Bus carries data between the processor, the memory unit and the input/output
devices.

Control Bus Control Bus carries signals/commands from the CPU.

Memory Unit

A memory unit is a collection of storage cells together with associated circuits needed to transfer information
in and out of the storage. The memory stores binary information in groups of bits called words. The
internal structure of a memory unit is specified by the number of words it contains and the number of bits
in each word.

Two major types of memories are used in computer systems:

1. RAM (Random Access Memory)


2. ROM (Read-Only Memory)

5
2.What is an addressing mode? Outline the types of addressing modes with an example.(13)

6
7
3. Explain about operation and operands of computer(13)

OPERATIONS AND OPERANDS

Every computer must be able to perform arithmetic. The MIPS assembly language notation add a, b, c
instructs a computer to add the two variables b and c and to put their sum in a. This notation is rigid in
that each MIPS arithmetic instruction performs only one operation and must always have exactly three
variables. For example, suppose we want to place the sum of four variables b, c, d, and e into variable a.

The following sequence of instructions adds the four variables:


add a, b, c # The sum of b and c is placed in a
add a, a, d # The sum of b, c, and d is now in a
add a, a, e # The sum of b, c, d, and e is now in a

Operands are definite elements of computer instruction that show what information is to be operated on. The
most important general categories of data are

1. Addresses
2. Numbers
3. Characters
4. Logical data

In many cases, some calculation must be performed on the operand reference to determine the main or virtual
memory address.

8
In this context, addresses can be considered to be unsigned integers. Other common data types are numbers,
characters, and logical data, and each of these is briefly described below. Some machines define
specialized data types or data structures. For example, machine operations may operate directly on a list
or a string of characters.

Addresses

Addresses are nothing but a form of data. Here some calculations must be performed on the operand reference
in an instruction, which is to determine the physical address of an instruction.

Numbers

All machine languages include numeric data types. Even in non-numeric data processing, numbers are
needed to act as counters, field widths, etc. An important difference between numbers used in ordinary
mathematics and numbers stored in a computer is that the latter is limited. Thus, the programmer is faced
with understanding the consequences of rounding, overflow and underflow.

Here are the three types of numerical data in computers, such as:

1. Integer or fixed point: Fixed point representation is used to store integers, the positive and negative whole
numbers (… -3, -2, -1, 0, 1, 2, 3, …). However, the programmer assigns a radix point location to each
number and tracks the radix point through every operation. High-level programs, such as C and BASIC

9
usually allocate 16 bits to store each integer. Each fixed point binary number has three important
parameters that describe it:

o Whether the number is signed or unsigned,

o The position of the radix point to the right side of the sign bit (for signed numbers), or the position of the
radix point to the most significant bit (for unsigned numbers).
o And the number of fractional bits stored.

2. Floating point: A Floating Point number usually has a decimal point, which means 0, 3.14, 6.5, and-
125.5 are Floating Point

The term floating point is derived from the fact that there is no fixed number of digits before and after the
decimal point, which means the decimal point can float. There are also representations in which the
number of digits before and after the decimal point is set, called fixed-point representations. In general,
floating-point representations are slower and less accurate than fixed-point representations, but they can
handle a larger range of numbers.

3. Decimal number: The decimals are an extension of our number system. We also know that decimals can
be considered fractions with 10, 100, 1000, etc. The numbers expressed in the decimal form are called
decimal numbersor decimals. For example:1, 4.09, 13.83, etc. A decimal number has two parts, and a dot
separates these parts (.) called the decimal point.

o Whole number part: The digits lying to the left of the decimal point form the whole number part. The
places begin with ones, tens, hundreds, thousands and so on.
o Decimal part: The decimal point and the digits laying on the right of the decimal point form the decimal
part. The places begin with tenths, hundredths, thousandths and so on.

Characters

A common form of data is text or character strings. While textual data are most convenient for humans. But
computers work in binary. So, all characters, whether letters, punctuation or digits, are stored as binary
numbers. All of the characters that a computer can use are called character sets. Here are the two common
standards, such as:

1. American Standard Code for Information Interchange (ASCII)


2. Unicode

ASCII uses seven bits, giving a character set of 128 characters. The characters are represented in a table
called the ASCII table. The 128 characters include:

o 32 control codes (mainly to do with printing)

o 32 punctuation codes, symbols, and space

o 26 upper-case letters

o 26 lower-case letters

o numeric digits 0-9

Logical data

10
Normally, each word or other addressable unit (byte, half-word, and so on) is treated as a single unit of data.
Sometimes, it is useful to consider an n-bit unit consisting of 1-bit items of data, each item having the
value 0 or 1. When data are viewed this way, they are considered to be logical data.

The Boolean data can only represent two values: true or false. Although only two values are possible, they
are rarely implemented as a single binary digit for efficiency reasons. Many programming languages do
not have an explicit Boolean type, instead of interpreting 0 as false and other values as true. Boolean data
refers to the logical structure of how the language is interpreted to the machine language. In this case, a
Boolean 0 refers to the logic False, and true is always a non zero, especially one known as Boolean

4.(i)Elaborate RISC and CISC (7)

Reduced Instruction Set Architecture (RISC)


The main idea behind this is to simplify hardware by using an instruction set composed of a few basic steps
for loading, evaluating, and storing operations just like a load command will load data, a store command
will store the data.
Characteristics of RISC
• Simpler instruction, hence simple instruction decoding.
• Instruction comes undersize of one word.
• Instruction takes a single clock cycle to get executed.
• More general-purpose registers.
• Simple Addressing Modes.
• Fewer Data types.
• A pipeline can be achieved.
Advantages of RISC
• Simpler instructions: RISC processors use a smaller set of simple instructions, which makes them
easier to decode and execute quickly. This results in faster processing times.
• Faster execution: Because RISC processors have a simpler instruction set, they can execute
instructions faster than CISC processors.
• Lower power consumption: RISC processors consume less power than CISC processors, making
them ideal for portable devices.
Disadvantages of RISC
• More instructions required: RISC processors require more instructions to perform complex tasks
than CISC processors.
• Increased memory usage: RISC processors require more memory to store the additional instructions
needed to perform complex tasks.
• Higher cost: Developing and manufacturing RISC processors can be more expensive than CISC
processors.
Complex Instruction Set Architecture (CISC)
The main idea is that a single instruction will do all loading, evaluating, and storing operations just like a
multiplication command will do stuff like loading data, evaluating, and storing it, hence it’s complex.
Characteristics of CISC
• Complex instruction, hence complex instruction decoding.
• Instructions are larger than one-word size.
• Instruction may take more than a single clock cycle to get executed.
• Less number of general-purpose registers as operations get performed in memory itself.
• Complex Addressing Modes.
• More Data types.
Advantages of CISC
• Reduced code size: CISC processors use complex instructions that can perform multiple operations,
reducing the amount of code needed to perform a task.
• More memory efficient: Because CISC instructions are more complex, they require fewer
instructions to perform complex tasks, which can result in more memory-efficient code.
• Widely used: CISC processors have been in use for a longer time than RISC processors, so they have
a larger user base and more available software.

11
Disadvantages of CISC
• Slower execution: CISC processors take longer to execute instructions because they have more
complex instructions and need more time to decode them.
• More complex design: CISC processors have more complex instruction sets, which makes them more
difficult to design and manufacture.
• Higher power consumption: CISC processors consume more power than RISC processors because
of their more complex instruction sets.
CPU Performance
Both approaches try to increase the CPU performance
• RISC: Reduce the cycles per instruction at the cost of the number of instructions per program.

CPU Time

• CISC: The CISC approach attempts to minimize the number of instructions per program but at the
cost of an increase in the number of cycles per instruction.
Earlier when programming was done using assembly language, a need was felt to make instruction do more
tasks because programming in assembly was tedious and error-prone due to which CISC architecture
evolved but with the uprise of high-level language dependency on assembly reduced RISC architecture
prevailed.
RISC vs CISC
RISC CISC

Focus on software Focus on hardware

Uses both hardwired and microprogrammed control


Uses only Hardwired control unit
unit

Transistors are used for storing complex


Transistors are used for more registers
Instructions

Fixed sized instructions Variable sized instructions

Can perform only Register to Register Arithmetic


Can perform REG to REG or REG to MEM or MEM
operations to MEM

Requires more number of registers Requires less number of registers

Code size is large Code size is small

An instruction executed in a single clock cycle Instruction takes more than one clock cycle

An instruction fit in one word. Instructions are larger than the size of one word

Simple and limited addressing modes. Complex and more addressing modes.

RISC is Reduced Instruction Cycle. CISC is Complex Instruction Cycle.

12
RISC CISC

The number of instructions are less as compared to


The number of instructions are more as compared to
CISC. RISC.

It consumes the low power. It consumes more/high power.

RISC is highly pipelined. CISC is less pipelined.

RISC required more RAM. CISC required less RAM.

Here, Addressing modes are less. Here, Addressing modes are more.

4.(ii)Explain about encoding in assembly languages and types of instructions.(6)

13
5.(i)Discuss the interaction between assembly language and high level language. (6)

14
15
5.(ii) Discuss about instruction cycle (6)
In computer organization, an instruction cycle, also known as a fetch-decode-execute cycle, is the basic
operation performed by a central processing unit (CPU) to execute an instruction. The instruction
cycle consists of several steps, each of which performs a specific function in the execution of the
instruction. The major steps in the instruction cycle are:
1. Fetch: In the fetch cycle, the CPU retrieves the instruction from memory. The instruction is typically
stored at the address specified by the program counter (PC). The PC is then incremented to point to
the next instruction in memory.
2. Decode: In the decode cycle, the CPU interprets the instruction and determines what operation needs
to be performed. This involves identifying the opcode and any operands that are needed to execute the
instruction.
3. Execute: In the execute cycle, the CPU performs the operation specified by the instruction. This may
involve reading or writing data from or to memory, performing arithmetic or logic operations on data,
or manipulating the control flow of the program.
4. There are also some additional steps that may be performed during the instruction cycle, depending on
the CPU architecture and instruction set:
5. Fetch operands: In some CPUs, the operands needed for an instruction are fetched during a separate
cycle before the execute cycle. This is called the fetch operands cycle.
6. Store results: In some CPUs, the results of an instruction are stored during a separate cycle after the
execute cycle. This is called the store results cycle.
7. Interrupt handling: In some CPUs, interrupt handling may occur during any cycle of the instruction
cycle. An interrupt is a signal that the CPU receives from an external device or software that requires
immediate attention. When an interrupt occurs, the CPU suspends the current instruction and executes
an interrupt handler to service the interrupt.
These cycles are the basic building blocks of the CPU’s operation and are performed for every
instruction executed by the CPU. By optimizing these cycles, CPU designers can improve the
performance and efficiency of the CPU, allowing it to execute instructions faster and more efficiently.
The Instruction Cycle –
Each phase of Instruction Cycle can be decomposed into a sequence of elementary micro-operations. In
the above examples, there is one sequence each for the Fetch, Indirect, Execute and Interrupt Cycles.

16

You might also like