Total No. of Questions : 8] SEAT No.

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P5236 [Total No. of Pages : 2

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VLSI & EMBEDDED SYSTEMS

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Digital CMOS Design

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Time : 3 Hours] [Max. Marks :50

Instructions to the candidates:
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1) Answer any five questions.
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2) Assume suitable data if necessary.

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3) Neat diagrams must be drawn wherever necessary.

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4) Use of nonprogrammable calculator is allowed.
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Q1) a) With the help of diffusion capacitances, explain various parasitics of
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enhancement MOSFET. Which capacitances are dominant? [5]

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b) What is lambda parameter? Explain various wiring parasitics in detail.

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Explore the concept of sheet resistance.

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Q2) a) Explain static dissipation, dissipation due to cross conduction &

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dissipation due to charging - discharging of load capacitor in case of

CMOS logic. [5] ic-
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b) With mathematical expressions, explore fan out in detail. On what factors

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does it depend? [5]

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Q3) a) What is SPICE model? Explain any three spice parameters. [4]
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b) Explain any one CMOS fabrication process in brief. [4]

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c) Explore any two design rules of DRC. [2]

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Q4) a) With the help of suitable example of logic circuit, explain the logical
efforts. Why are these efforts needed? [4]
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b) What are sources of cross talk? Explain cross talk mechanism. [4]
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c) Give the expression for propagation delay. Explain the significance of

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each parameter. [2]

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Q5) a) Design CMOS logic for Y = A + BCDEF + GH. Compute active area.

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b) Can transmission gate produce strong 1 & 0? Explain in detail. [4]

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c) Write note on metastability. [2]

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Q6) a) Draw FSM diagram & write HDL code for 4 bit ring counter. Write test

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bench for it. [4]

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b) Draw D flip flop using transmission gates. Compare with conventional

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c) Explain pass transistor logic in brief. [2]
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Q7) a) What is the concept behind ratioed circuits? Explain in brief. [4]

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b) With suitable schematic, explain cascode voltage switch logic in detail.[4]

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c) Write note on dynamic circuits. [2]
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Q8) a) Write note on domino logic. [4]
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b) Explain NORA logic & its merits. [4]
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c) List merits of BiCMOS. [2]

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