HV9930

Hysteretic Boost-Buck (Ćuk) LED Driver IC

Features General Description
• Constant Output Current LED Driver The HV9930 is a variable frequency PWM controller IC
• Steps Output Voltage Up or Down designed to control an LED lamp driver using a
• Low EMI low-noise boost-buck (Ćuk) topology. The HV9930
uses a patented Hysteretic Current-mode control to
• Variable Frequency Operation
regulate both the input and output currents. This
• Internal 8V to 200V Linear Regulator enables superior input surge immunity without the
• Input and Output Current Sensing necessity for complex loop compensation. Input
• Input Current Limit current control enables current limiting during Startup,
• Enable and Pulse-Width Modulation (PWM) Input Undervoltage, and Output Overload conditions.
Dimming The HV9930 provides a low-frequency PWM dimming
input that can accept an external control signal with a
duty cycle of 0% to 100% and a high dimming ratio.
Applications
The HV9930-based LED driver is ideal for LED lamps
• RGB Backlight Applications and RGB backlight applications with low-voltage DC
• Battery-Powered LED Lamps inputs. The HV9930-based LED Lamp drivers can
• Other Low-Voltage AC/DC or DC/DC LED Drivers achieve efficiency in excess of 80%.

Package Type

8-lead SOIC
(Top view)

VIN 1 8 REF

CS1 2 7 CS2

GND 3 6 VDD

GATE 4 5 PWMD

See Table 2-1 for pin information.

 2019 Microchip Technology Inc. DS20005682A-page 1

HV9930
Functional Block Diagram

VIN Regulator VDD

7.5V
Input
Comparator
CS1

L H GATE
105mV 20mV

CS2
Output
Comparator

PWMD REF
1.25V
GND
HV9930

DS20005682A-page 2  2019 Microchip Technology Inc.

 HV9930
Typical Application Circuit
C1

L1 CD L2
D2 RD -

VDC D3 VO
Q1 D1
RCS1 RCS2 +

RS2A

RS1 C2
VIN VDD RS2B
GATE PWMD RREF2

CS1 CS2
GND REF
RREF1 C3
HV9930

 2019 Microchip Technology Inc. DS20005682A-page 3

HV9930
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
VIN to GND ..............................................................................................................................................–0.5V to +200V
VDD to GND...............................................................................................................................................–0.3V to +12V
CS1, CS2, PWMD, GATE, REF to GND .......................................................................................–0.3V to (VDD + 0.3V)
Junction Temperature, TJ .................................................................................................................... –40°C to +150°C
Storage Temperature, TS ..................................................................................................................... –65°C to +150°C
Continuous Power Dissipation (TA = +25°C):
8-lead SOIC ............................................................................................................................................ 650 mW

† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS
Electrical Specifications: Specifications are at TA = 25°C. VIN = 12V unless otherwise noted.

Parameter Sym. Min. Typ. Max. Unit Conditions

INPUT
Input DC Supply Voltage Range VINDC 8 — 200 V DC input voltage (Note 1)
Shutdown Mode Supply Current IINSD — 0.5 1 mA PWMD connected to GND (Note 1)
INTERNAL REGULATOR
VIN = 8V to 200V, IDD(EXT) = 0 mA,
VDD Internally Regulated Voltage VDD 7 7.5 9 V
GATE open
VDD Current available
IDD(EXT) — — 1 mA VIN = 8V to 200V (Note 2)
for External Circuitry
VDD Undervoltage Lockout Upper
UVLOR 6.45 6.7 6.95 V VDD rising
Threshold
VDD Undervoltage Lockout
∆UVLO — 500 — mV
Hysteresis
Steady State External Voltage
which can be applied at the VDD VDD(EXT) — — 12 V
pin
REFERENCE
REF bypassed with a 0.1 µF
capacitor to GND, IREF = 0 µA,
REF Pin Voltage VREF 1.212 1.25 1.288 V
VDD = 7.5V, VPWMD = 5V,
VIN = open (Note 1)
REF bypassed with a 0.1 µF capaci-
Line Regulation of Reference tor to GND, IREF = 0 µA,
∆VREF,LN 0 — 20 mV
Voltage VDD = 7V to 10V, VPWMD = 5V,
VIN = open
REF bypassed with a 0.1 µF capaci-
Load Regulation of Reference tor to GND, IREF = 0 µA to 500 µA,
∆VREF,LD 0 — 25 mV
Voltage VDD = 7.5V, VPWMD = 5V,
VIN = open
PWM DIMMING
PWMD Input Low Voltage VPWMD(LO) — — 0.8 V VIN = 10V to 200V (Note 1)
PWMD Input High Voltage VPWMD(HI) 2 — — V VIN = 10V to 200V (Note 1)
Note 1: Specifications apply over the full operating ambient temperature range of –40ºC < TA < +125ºC.
2: Also limited by package power dissipation limit, whichever is lower

DS20005682A-page 4  2019 Microchip Technology Inc.

 HV9930
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Specifications are at TA = 25°C. VIN = 12V unless otherwise noted.

Parameter Sym. Min. Typ. Max. Unit Conditions

PWMD Pull-Down Resistance RPWMD 50 100 150 kΩ VPWMD = 5V
GATE DRIVER
GATE Short Circuit Sourcing
ISOURCE 0.165 — — A VGATE = 0V, VDD = 7.5V, VIN = open
Current
VGATE = VDD, VDD = 7.5V,
GATE Sinking Current ISINK 0.165 — — A
VIN = open
CGATE = 500 pF, VDD = 7.5V,
GATE Output Rise Time tRISE — 30 50 ns
VIN = open
CGATE = 500 pF, VDD = 7.5V,
GATE Output Fall Time tFALL — 30 50 ns
VIN = open
INPUT CURRENT SENSE COMPARATOR
Voltage Threshold VCS2 = 200 mV, VCS1 increasing,
VON1 90 105 120 mV
for GATE Turn-On GATE goes LOW to HIGH (Note 1)
Voltage Threshold VCS2 = 200 mV, VCS1 decreasing,
VOFF1 0 20 40 mV
for GATE Turn-Off GATE goes HIGH to LOW (Note 1)
VCS2 = 200 mV,
Delay to Output (Turn-On) tD,ON1 — 80 150 ns
VCS1 = 50 mV to +200 mV step
VCS2 = 200 mV,
Delay to Output (Turn-Off) tD,OFF1 — 80 150 ns
VCS1 = 50 mV to –100 mV step
OUTPUT CURRENT SENSE COMPARATOR
Voltage Threshold VCS1 = 200 mV, VCS2 increasing,
VON2 90 105 120 mV
for GATE Turn-On GATE goes LOW to HIGH (Note 1)
Voltage Threshold VCS1 = 200 mV, VCS2 decreasing,
VOFF2 0 20 40 mV
for GATE Turn-Off GATE goes HIGH to LOW (Note 1)
VCS1 = 200 mV,
Delay to Output (Turn-On) tD,ON2 — 80 150 ns
VCS2 = 50 mV to +200 mV step
VCS1 = 200 mV,
Delay to Output (Turn-Off) tD,OFF2 — 80 150 ns
VCS2 = 50 mV to –100 mV step
Note 1: Specifications apply over the full operating ambient temperature range of –40ºC < TA < +125ºC.
2: Also limited by package power dissipation limit, whichever is lower

TEMPERATURE SPECIFICATIONS
Parameter Sym. Min. Typ. Max. Unit Conditions
TEMPERATURE RANGE
Operating Ambient Temperature TA –40 — +125 °C
Maximum Junction Temperature TJ(ABSMAX) — — +150 °C
Storage Temperature TS –65 — +150 °C
PACKAGE THERMAL RESISTANCE
8-lead SOIC JA — +101 — °C/W

 2019 Microchip Technology Inc. DS20005682A-page 5

HV9930
2.0 PIN DESCRIPTION
The details on the pins of HV9930 are listed in
Table 2-1. Refer to Package Type for the location of
the pins.

TABLE 2-1: PIN FUNCTION TABLE

Pin Number Pin Name Description
1 VIN This pin is the input of an 8V to 200V voltage regulator.
This pin is used to sense the input current of the boost-buck converter. It is the
2 CS1
non-inverting input of the internal input comparator.
This is the ground return for all the internal circuitry. This pin must be electrically
3 GND
connected to the ground of the power train.
This pin is the gate driver output for an external N-channel power Metal-oxide
4 GATE
Semiconductor Field-effect Transistor (MOSFET).
When this pin is left open or pulled to GND, the gate driver is disabled. Pulling the pin to
5 PWMD
a voltage greater than 2V will enable the gate drive output.
This is a power supply pin for all internal circuits. It must be bypassed to GND with a
6 VDD
low-ESR capacitor to GND.
This pin is used to sense the output current of the boost-buck converter. It is the
7 CS2
non-inverting input of the internal output comparator.
This pin provides accurate reference voltage. It must be bypassed with a
8 REF
0.01 µF to 0.1 µF capacitor to GND.

DS20005682A-page 6  2019 Microchip Technology Inc.

 HV9930
3.0 DETAILED DESCRIPTION 3.3 Reference
An internally trimmed voltage reference of 1.25V
3.1 Power Topology (± 3%) is provided at the REF pin. The reference can
The HV9930 is optimized to drive a Continuous supply a maximum output current of 1 mA to drive
Conduction Mode (CCM) boost-buck DC/DC converter external circuitry. This reference can be used to set the
topology commonly referred to as Ćuk converter. (See current-sense voltage thresholds of the two
Typical Application Circuit.) This power converter comparators as shown in the Typical Application
topology offers numerous advantages useful for driving Circuit.
high-brightness light-emitting diodes (HB LED). These
advantages include step-up or step-down voltage 3.4 Current Comparators
conversion ratio and low input and output current
The HV9930 features two identical comparators with a
ripple. The input and output inductors can also share a
built-in 85 mV hysteresis. When the GATE is low, the
common core to achieve ripple current cancellation.
inverting terminal is connected to 105 mV, but when the
The output load is decoupled from the input voltage
GATE is high, it is connected to 20 mV. One comparator
with a capacitor, making the driver inherently
is used for the input current control and the other is
failure-safe for the output load.
used for the output current control.
The HV9930 offers a simple and effective control
The input side hysteretic controller is in operation only
technique for a boost-buck LED driver. It uses two
during Start-up and Overload conditions. This ensures
Hysteretic mode controllers—one for the input and one
that the input current never exceeds the designed
for the output. The outputs of these two hysteretic
value. During normal operation, the input current will be
comparators are logically being AND together and are
less than the programmed current. Therefore, the
used to drive the external FET. This control scheme
output of the input side comparator will be high. The
gives accurate current control and constant output
output of the AND gate will then be dictated by the
current in the presence of input voltage transients
output current controller.
without the need for complicated loop design.
The output side hysteretic comparator will be in
3.2 Input Voltage Regulator operation during the Steady state operation of the
circuit. This comparator turns the MOSFET on and off
The HV9930 can be powered directly from its VIN pin based on the LED current.
that takes voltage from 8V up to the maximum of 200V. The use of these comparators in a boost-buck topology
When voltage is applied to the VIN pin, the HV9930 is a patented technique, which eliminates the need for
attempts to regulate a constant 7.5V (typical) at the compensation components.
VDD pin. The regulator also has a built-in undervoltage
lockout which shuts off the IC when the voltage at the
VDD pin falls below the UVLO lower threshold.
3.5 PWM Dimming
The VDD pin must be bypassed by a low-ESR capacitor PWM dimming can be achieved by applying a PWM
(≥0.1 μF) to provide a low-impedance path for the signal to the PWMD pin. When the PWMD pin is pulled
high-frequency current of the output gate driver. high, the gate driver is enabled and the circuit operates
normally. When the PWMD pin is left open or
The IC can also be operated by supplying a voltage at
connected to GND, the gate driver is disabled and the
the VDD pin greater than the internally regulated
external MOSFET turns off. The signal at the PWMD
voltage. This will turn off the internal linear regulator
pin inhibits the driver only and the IC need not go
and the IC will function by drawing power from the
through the entire start-up cycle each time, ensuring a
external voltage source connected to the VDD pin.
quick response time for the output current.
In case of input transients that reduce the input voltage
The flying capacitor in the Ćuk converter (C1) is initially
below 8V (e.g. Cold Crank condition in an automotive
charged to the input voltage VDC (through diodes D1
system), the VIN pin of the HV9930 can be connected
and D2). When the circuit is turned on and reaches
to the external MOSFET drain through a diode. Since
Steady state, the voltage across C1 will be VDC+VO. In
the drain of the FET is at a voltage equal to the sum of
the absence of diode D2, when the circuit is turned off,
the input and output voltages, the IC will still be
capacitor C1 will discharge through the LEDs and the
operational when the input goes below 8V. In these
input voltage source VDC. Thus, during PWM dimming,
cases, a larger capacitor is needed for the VDD pin to
if capacitor C1 has to be charged and discharged each
supply power to the IC when the MOSFET switches on.
cycle, the transient response of the circuit will be
limited. By adding diode D2, the voltage across
capacitor C1 is held at VDC+VO even when the circuit is
turned off, enabling the circuit to return quickly to its
Steady state (and bypassing the start-up stage) upon
being enabled.

 2019 Microchip Technology Inc. DS20005682A-page 7

HV9930
4.0 APPLICATION INFORMATION The power dissipation in RD is calculated with
Equation 4-5.
4.1 Overvoltage Protection
EQUATION 4-5:
Overvoltage protection can be added by splitting the 2
 V C1 
output side resistor RS2 into two components (RS2A P RD = --------------------
12  R D
and RS2B) and adding a Zener diode D3. When there is
an Open LED condition, the diode D3 will clamp the
output voltage, and the Zener diode current will be 4.3 Output Current Level and Input
sensed by the sum of RS2A and RCS2. The current will Current Limit
also be regulated by the converter.
The current sense resistor RCS2, combined with the
4.2 Damping Circuit other resistors RS2 and RREF2, determines the output
current level at undimmed full brightness. On the other
The Ćuk converter is inherently unstable when the hand, the current sense resistor RCS1, combined with
output current is being controlled. An uncontrolled input the other resistors RS1 and RREF1, determines the input
current will lead to an undamped oscillation between L1 average current limit.
and C1, causing excessively high voltages across
Each set of resistors for the output side or the input side
capacitor C1. To prevent these oscillations, a damping
can be chosen using Equation 4-6 and Equation 4-7.
circuit consisting of RD and CD is applied across the
capacitor C1. This damping circuit will stabilize the
circuit and help maintain the proper operation of the
EQUATION 4-6:
converter.
 V ON + V OFF  RS V ON + V OFF
The values of the damping network can be computed I  R CS = V REF – -----------------------------------   ------------ –  ------------------------------
2  R REF  2 
with Equation 4-1 and Equation 4-2.
Where I is the average current (either IO or IIN), VREF
(1.25V typical) is the reference voltage, VON (0.105V
EQUATION 4-1: typical) is the threshold voltage for the GATE On, and VOFF
D MAX 3 IO 2 (0.02V typical) is the threshold voltage for the GATE Off.
C D = 9   -----------------------  L 1   -------
 1 – D MAX  V O

Where DMAX is the maximum switching duty cycle, L1 is the EQUATION 4-7:
inductance of the input inductor, IO is the output LED current, RS
and VO is the voltage across the output LED string. I  R CS =  V ON – V OFF    ------------ +  V ON – V OFF 
 R REF

Where ΔI is the peak-to-peak ripple in the current

EQUATION 4-2: (either ΔIO or ΔIIN).
3  D MAX L1  IO
R D = ------------------------------2  -------------------- By solving the Equation 4-6 and Equation 4-7, the
 1 – D MAX  CD  VO
value of RS/RREF can be obtained from Equation 4-8.

The maximum switching duty cycle is calculated with EQUATION 4-8:

Equation 4-3.
I  V ON + V OFF 
------  ----------------------------------- +  V ON – V OFF 
EQUATION 4-3: RS I 2
------------ = -----------------------------------------------------------------------------------------------------------------
R REF I  V ON + V OFF 
VO ------  V REF – ----------------------------------- –  V ON – V OFF 
D MAX = ---------------------------------------------------------------------- I 2
V O +  MIN   V IN MIN – V D 
Where ηMIN is the minimum efficiency, and VIN,MIN is the
The value of RREF can be set as 10 kΩ for
minimum input voltage.VD is the input diode forward voltage.
convenience. Then, the value of RS can be chosen
from the calculated value of RS/RREF. The value of RCS
RMS current of the damping capacitor is determined
is then computed from Equation 4-9.
with Equation 4-4.
EQUATION 4-9:
EQUATION 4-4:
V C1  V ON + V OFF  RS  V ON + V OFF 
I CD  RMS  = ----------------------- V REF – -----------------------------------  ------------ – -----------------------------------
12  R D 2 R REF 2
R CS = ------------------------------------------------------------------------------------------------------------------------
Where ΔVC1 is the peak-to-peak ripple voltage of the flying I
capacitor C1 and it is 10% of the average voltage across C1.

DS20005682A-page 8  2019 Microchip Technology Inc.

 HV9930
4.4 Design and Operation of the EQUATION 4-11:
Boost-buck Converter I LIN MIN = 0.85  I IN LIM
Setting
For details on the design for a boost-buck converter I LIN MIN = 1.05  I IN PK
using the HV9930 and the calculation of the damping
components, refer to application notes AN-H51 The average input current limit of the converter can
Designing a Boost-Buck (Ĉuk) Converter with the then be computed. See Equation 4-12.
HV9930/AT9933 and AN-H58 Improving the Efficiency
of a HV9930/AT9933 Controlled Boost-Buck
EQUATION 4-12:
Converter.
1.05
I IN LIM =  ----------  I IN PK
 0.85
4.5 Design Example = 2.1A
The choice of the resistor dividers to set the input and
Using IO = 0.35A and ΔIO = 0.25 × IO = 0.0875A for the
output current levels is illustrated by means of the
output side in Equation 4-8 and Equation 4-9,
design example given below.
RS2/RREF2 = 0.475 and RCS2 = 1.43Ω are obtained.
The parameters of the power circuit are:
Before the design of the output side is complete,
V IN MIN = 9V overvoltage protection has to be included in the design.
For this application, choose a 33V Zener diode. This is
V IN MAX = 16V
the voltage at which the output will clamp in case of an
V O = 28V Open LED condition. For a 350 mW diode, the
I O = 0.35A maximum current rating at 33V works out to about
f S MIN = 300kHz 10 mA. Using a 2.5 mA current level during Open LED
conditions, and assuming the same RS2/RREF2 ratio,
Using these parameters, the values of the power stage and splitting RS2 into RS2A and RS2B, the Zener current
inductors and capacitor can be computed. (See figures limiting resistor can be determined as illustrated in
below.) Refer to Application Note AN-H51 for more Equation 4-13.
details.
EQUATION 4-13:
L 1 = 82H R CS2 Z = R CS2 + R S2A = 120
L 2 = 150H
Choose the following values for the resistors on the
C 1 = 0.22F output side:
RCS2 = 1.43Ω, 1/4W, 1%
The input and output currents for this design are:
RREF2 = 10 kΩ, 1/8W, 1%
I IN MAX = 1.6A
RS2A = 110Ω, 1/8W, 1%
I IN = 0.21A
RS2B = 4.64 kΩ, 1/8W, 1%
I O = 350mA
I O = 87.5mA
The current sense resistor needs to be at least a 1/4W,
1% resistor. Similarly, using IIN,LIM = 2.1A and ΔIIN,LIM
For the input side, the average current limit level used = 0.3 x IIN,LIM = 0.63A for the input side in Equation 4-8
in the equations should be larger than the operating and Equation 4-9, the following values can be
maximum average input current, so it does not interfere determined:
with the normal operation of the circuit. The peak input R S1
--------------
- = 0.382
current can be computed as shown in Equation 4-10. R REF1

R CS1 = 0.187
EQUATION 4-10: 2
P RCS1 = I IN LIM  R CS1
I IN
I IN PK = I IN MAX +  ----------- = 0.825W
 2 
Choose the following values for the resistors on the input
= 1.705A
side:
RCS1 = parallel combination of three 0.56Ω, 1/2W, 5%
Assuming a 30% peak-to-peak input current ripple to resistors
average input current ratio when the converter is in
Input Current Limit mode, the minimum value of the RREF1 = 10kΩ, 1/8W, 1%
input current in the Input Current Limit mode is RS1 = 3.82kΩ, 1/8W, 1%
calculated as shown in Equation 4-11.

 2019 Microchip Technology Inc. DS20005682A-page 9

HV9930
5.0 PACKAGING INFORMATION

5.1 Package Marking Information

8-lead SOIC Example

XXXXXXXX HV9930LG
e3 YYWW e3 1912
NNN 236

Legend: XX...X Product Code or Customer-specific information

Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
e3 Pb-free JEDEC® designator for Matte Tin (Sn)
* This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.

DS20005682A-page 10  2019 Microchip Technology Inc.

 HV9930

Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.

 2019 Microchip Technology Inc. DS20005682A-page 11

HV9930
NOTES:

DS20005682A-page 12  2019 Microchip Technology Inc.

 HV9930
APPENDIX A: REVISION HISTORY

Revision A (November 2019)

• Converted Supertex Doc# DSFP-HV9930 to
Microchip DS20005682A
• Changed the quantity of the 8-lead SOIC LG
package from 2500/Reel to 3300/Reel
• Made minor text changes throughout the docu-
ment

 2019 Microchip Technology Inc. DS20005682A-page 13

HV9930
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
Example:
PART NO. XX - X - X
a) HV9930LG-G: Hysteretic Boost-Buck (Ćuk) LED
Device Package Environmental Media Type Driver IC, 8-lead SOIC Package,
Options 3300/Reel

Device: HV9930 = Hysteretic Boost-Buck (Ćuk) LED Driver IC

Package: LG = 8-lead SOIC

Environmental: G = Lead (Pb)-free/RoHS-compliant Package

Media Type: (blank) = 3300/Reel for an LG Package

DS20005682A-page 14  2019 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in

the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage
Technology, and Symmcom are registered trademarks of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany
II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
other countries.
All other trademarks mentioned herein are property of their
respective companies.

© 2019, Microchip Technology Incorporated, All Rights Reserved.

For information regarding Microchip’s Quality Management Systems, ISBN: 978-1-5224-5218-8

please visit www.microchip.com/quality.

 2019 Microchip Technology Inc. DS20005682A-page 15

 Worldwide Sales and Service
AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE
Corporate Office Australia - Sydney India - Bangalore Austria - Wels
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Fax: 480-792-7277 Tel: 45-4450-2828
China - Chengdu India - Pune
Technical Support: Fax: 45-4485-2829
Tel: 86-28-8665-5511 Tel: 91-20-4121-0141
http://www.microchip.com/
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Tel: 86-23-8980-9588 Tel: 81-6-6152-7160 Tel: 358-9-4520-820
Web Address:
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Tel: 919-844-7510
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Tel: 631-435-6000
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Tel: 44-118-921-5800
Canada - Toronto Fax: 44-118-921-5820
Tel: 905-695-1980
Fax: 905-695-2078

DS20005682A-page 16  2019 Microchip Technology Inc.

05/14/19