SEMICONDUCTOR KF4N20LD/I

N CHANNEL MOS FIELD

TECHNICAL DATA EFFECT TRANSISTOR

General Description
KF4N20LD

This planar stripe MOSFET has better characteristics, such as fast

switching time, low on resistance, low gate charge and excellent
A K DIM MILLIMETERS
avalanche characteristics. It is mainly suitable for LED Lighting and C D L
A 6.60 +_ 0.20
B _ 0.20
6.10 +
switching mode power supplies. C 5.34 +_ 0.30
D _ 0.20
0.70 +
B E 2.70 +_ 0.15
_ 0.10
FEATURES F 2.30 +
G 0.96 MAX
・VDSS(Min.)= 200V, ID= 3.6A H
H 0.90 MAX
J J _ 0.20
1.80 +
E
・Drain-Source ON Resistance : RDS(ON)=1.15 Ω(max) @VGS =10V G N K _ 0.10
2.30 +
L _
0.50 + 0.10
・Qg(typ.) =2.9nC F F M M _ 0.10
0.50 +
N 0.70 MIN
・Vth(Max.)= 2V

1 2 3
MAXIMUM RATING (Tc=25℃) 1. GATE
2. DRAIN
CHARACTERISTIC SYMBOL RATING UNIT 3. SOURCE

Drain-Source Voltage VDSS 200 V

Gate-Source Voltage VGSS ±20 V
@TC=25℃ 3.6 DPAK (1)
ID
Drain Current @TC=100℃ 2.2 A
Pulsed (Note1) IDP 7*
Single Pulsed Avalanche Energy
EAS 52 mJ
(Note 2)
Repetitive Avalanche Energy KF4N20LI
EAR 3 mJ A
(Note 1) H
C J
Peak Diode Recovery dv/dt
D
dv/dt 5.5 V/ns
(Note 3)
Drain Power TC=25℃ 31 W
B

DIM MILLIMETERS
PD A _ 0.2
6.6 +
Dissipation Derate above25℃ 0.25 W/℃ _ 0.2
6.1 +
M B
K

C _ 0.3
5.34 +
Maximum Junction Temperature Tj 150 ℃ P
D _ 0.2
0.7 +
N
E _ 0.3
9.3 +
Storage Temperature Range Tstg -55～150 ℃
E

F _ 0.2
2.3 +
G _ 0.1
0.76 +
Thermal Characteristics G H _ 0.1
2.3 +
L J _ 0.1
0.5 +
Thermal Resistance, Junction-to-Case RthJC 4.0 ℃/W F F
K _ 0.2
1.8 +
Thermal Resistance, Junction-to- L _ 0.1
0.5 +
RthJA 110 ℃/W M _ 0.1
1.0 +
Ambient 1 2 3 N 0.96 MAX
* : Drain current limited by maximum junction temperature. 1. GATE P _ 0.3
1.02 +
2. DRAIN
3. SOURCE

PIN CONNECTION
IPAK(1)

2012. 1. 18 Revision No : 1 1/6

 KF4N20LD/I

ELECTRICAL CHARACTERISTICS (Tc=25℃)

CHARACTERISTIC SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT

Static
Drain-Source Breakdown Voltage BVDSS ID=250μA, VGS=0V 200 - - V
Breakdown Voltage Temperature Coefficient ΔBVDSS/ΔTj ID=250μA, Referenced to 25℃ - 0.2 - V/℃
Drain Cut-off Current IDSS VDS=200V, VGS=0V, - - 10 μA
Gate Threshold Voltage Vth VDS=VGS, ID=250μA 1.0 - 2.0 V
Gate Leakage Current IGSS VGS=±20V, VDS=0V - - ±100 nA
VGS=10V, ID=1.8A - 0.85 1.15
Drain-Source ON Resistance RDS(ON) Ω
VGS=5V, ID=1.8A 0.89 1.20
Dynamic
Total Gate Charge Qg - 2.9 3.8
VDS=160V, ID=3.6A
Gate-Source Charge Qgs - 0.6 - nC
VGS=5V (Note4,5)
Gate-Drain Charge Qgd - 2.2 -
Turn-on Delay time td(on) - 10 -
VDD=100V, ID=3.6A
Turn-on Rise time tr - 20 -
RG=25Ω (Note4,5) ns
Turn-off Delay time td(off) - 15 -
VGS=5V
Turn-off Fall time tf - 15 -
Input Capacitance Ciss - 170 220
Output Capacitance Coss VDS=25V, VGS=0V, f=1.0MHz - 25 - pF
Reverse Transfer Capacitance Crss - 4.0 -
Source-Drain Diode Ratings
Continuous Source Current IS - - 1
VGS<Vth A
Pulsed Source Current ISP - - 4
Diode Forward Voltage VSD IS=3.6A, VGS=0V - - 1.4 V
Reverse Recovery Time trr IS=3.6A, VGS=0V, - 100 - ns
Reverse Recovery Charge Qrr dIs/dt=100A/㎲ - 0.30 - μC
Note 1) Repetivity rating : Pulse width limited by junction temperature.
Note 2) L = 78mH, IS=1A, VDD=50V, RG = 25Ω, Starting Tj = 25℃.
Note 3) IS ≤2A, dI/dt≤300A/㎲, VDD≤BVDSS, Starting Tj = 25℃.
Note 4) Pulse Test : Pulse width ≤ 300㎲, Duty Cycle ≤ 2%.
Note 5) Essentially independent of operating temperature.
Marking

KF4N20 KF4N20
LD LI

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 KF4N20LD/I

VGS = 3V

0 2 4 6 8

3.0

2.5

2.0

1.5

1.0

0.5

2012. 1. 18 Revision No : 1 3/6

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Fig 7. C - VDS Fig8. Qg- VGS

1000 12
ID=4A

Gate - Source Voltage VGS (V)

10
Ciss VDS = 40V
Capacitance (pF)

100 8

6
Coss VDS = 160V
10 4

Crss 2

1 0
0 5 10 15 20 25 30 35 40 0 1 2 3 4 5 6 7 8

Gate - Charge Qg (nC)

Drain - Source Voltage VDS (V)

Fig9. Safe Operation Area Fig10. ID - Tj

Operation in this
5
area is limited by RDS(ON)
10 4
Drain Current ID (A)

Drain Current ID (A)

10µs

100µs
3
1
1ms

10ms 2
DC
0.1
Tc= 25 C 1
Tj = 150 C
Single pulse
0.01 0
1 10 100 1000 0 25 50 75 100 125 150

Drain - Source Voltage VDS (V)

Junction Temperature Tj ( C)

Fig11. Transient Thermal Response Curve

10
Transient Thermal Resistance

Duty=0.5

0.20
1 PDM
0.10 t1

0.05 t2

2 - Duty Factor, D= t1/t2

0.0
0.0
1
lse
Tj(max) - Tc
Pu - RthJC =
le PD
ng
Si
0.1
10-4 10-3 10-2 10-1 100 1 10

TIME (sec)

2012. 1. 18 Revision No : 1 4/6

 KF4N20LD/I

Fig12. Gate Charge

VGS

5V

RL

0.8 VDSS
ID
1.0 mA
Q
VDS Qgs Qgd
Qg
VGS

Fig13. Single Pulsed Avalanche Energy

1 BVDSS
EAS= LIAS2
2 BVDSS - VDD

BVDSS
L
IAS
50V

25Ω
VDS ID(t)

VGS VDD VDS(t)

10 V

Time
tp
Fig14. Resistive Load Switching

VDS
90%

RL

0.5 VDSS
VGS 10%
td(off)
25 Ω td(on) tr
VDS tf

ton toff
VGS
10V

2012. 1. 18 Revision No : 1 5/6

 KF4N20LD/I

Fig15. Source - Drain Diode Reverse Recovery and dv /dt

DUT Body Diode Forword Current

VDS
ISD
L (DUT) di/dt

IRM

IS
Body Diode Reverse Current

0.5 VDSS
VDS Body Diode Recovery dv/dt
(DUT)
driver VSD
VDD

10V VGS
Body Diode Forword Voltage drop

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