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  • Direct Memory Access (DMA)

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    Dhivya Dharshni
    436 views7 pages
    Direct Memory Access (DMA) allows data to be transferred directly between peripheral devices and memory without intervention from the CPU. The DMA controller handles the transfer by reading data from the source device and writing it to memory. When the transfer is complete, the DMA controller interrupts the CPU. Handshaking signals between the DMA and device controllers coordinate the transfer of each word of data between the peripheral and memory.

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    Clear view of the DIRECT MEMORY ACCESS

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    Direct Memory Access (DMA) allows data to be transferred directly between peripheral devices and memory without intervention from the CPU. The DMA controller handles the transfer by reading data from the source device and writing it to memory. When the transfer is complete, the DMA controller interrupts the CPU. Handshaking signals between the DMA and device controllers coordinate the transfer of each word of data between the peripheral and memory.

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    © All Rights Reserved
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    436 views7 pages

    Direct Memory Access (DMA)

    Uploaded by

    Dhivya Dharshni
    Direct Memory Access (DMA) allows data to be transferred directly between peripheral devices and memory without intervention from the CPU. The DMA controller handles the transfer by reading data from the source device and writing it to memory. When the transfer is complete, the DMA controller interrupts the CPU. Handshaking signals between the DMA and device controllers coordinate the transfer of each word of data between the peripheral and memory.

    Copyright:

    © All Rights Reserved
    Download as PPT, PDF, TXT or read online from Scribd
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    of 7

    Introduction of

    Direct Memory Access (DMA)


    Why is DMA?
    • It is wasteful to feed data into a controller
    register 1 bytes at a time. (PIO)
    • The DMA unit is word.
    • In the high loading environment, a system
    with DMA has better improvement.
    DMA transfer
    1. device driver told to transfer disk
    data to buffer at address X
    CPU
    2. device driver tells disk controller to
    5. DMA controller transfers bytes transfer C bytes from disk to buffer at
    to buffer X, increasing memory address X
    address and decreasing C until C=0 cache
    6. when C=0, DMA interrupts CPU
    to signal transfer completion DMA/bus/ X
    interrupt CPU memory bus Memory buffer
    controller

    PCI bus

    3. disk controller initiates


    IDE disk DMA transfer
    controller 4. disk controller sends each
    byte to DMA controller

    disk disk

    disk disk
    DMA Progress
    • To initiate a DMA transfer, the host writes a
    DMA command into memory:
    – A pointer to the source of a transfer
    – A count of the number of bytes to be transferred
    – ……..
    • The CPU writes the address of the DMA
    command block to the DMA controller.
    DMA Progress (cont.)
    • The DMA controller proceeds to operate the
    memory bus directly without CPU help.
    • Handshaking exists between DMA
    controller and device controller.
    • When the entire transfer is finished, the
    DMA controller will interrupts the CPU.
    Handshaking
    • DMA-request and DMA_acknowledge
    – When a word of data is available, the device
    controller places a signal on the DMA-request
    wire.
    – The signal causes the DMA controller to seize
    the memory bus,
    • To place the desired address on the memory-address
    wire
    • To place a signal on the DMA-acknowledge wire
    Handshaking (cont.)
    • When the device controller receives the
    DMA-acknowledge signal,
    – it transfer the word of data to memory
    – and remove the DMA_request signal.

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