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  • Oxidation

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    Malavika R Nair
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    Thermal oxidation is a process that grows a silicon dioxide layer on a silicon wafer surface by supplying an oxygen source like oxygen or water vapor at high temperatures between 800-1050°C. The Deal-Grove model describes the oxidation process as occurring in three steps - oxygen diffuses through gas to the wafer surface, through the existing oxide layer to the silicon interface, and then reacts with silicon to form more silicon dioxide. Thermal oxidation is used to form insulating oxide layers for applications like gate oxides, field oxides, and passivation layers in integrated circuits.

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    Thermal oxidation is a process that grows a silicon dioxide layer on a silicon wafer surface by supplying an oxygen source like oxygen or water vapor at high temperatures between 800-1050°C. The Deal-Grove model describes the oxidation process as occurring in three steps - oxygen diffuses through gas to the wafer surface, through the existing oxide layer to the silicon interface, and then reacts with silicon to form more silicon dioxide. Thermal oxidation is used to form insulating oxide layers for applications like gate oxides, field oxides, and passivation layers in integrated circuits.

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    11 views21 pages

    Oxidation

    Uploaded by

    Malavika R Nair
    Thermal oxidation is a process that grows a silicon dioxide layer on a silicon wafer surface by supplying an oxygen source like oxygen or water vapor at high temperatures between 800-1050°C. The Deal-Grove model describes the oxidation process as occurring in three steps - oxygen diffuses through gas to the wafer surface, through the existing oxide layer to the silicon interface, and then reacts with silicon to form more silicon dioxide. Thermal oxidation is used to form insulating oxide layers for applications like gate oxides, field oxides, and passivation layers in integrated circuits.

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    Thermal Oxidation

    Growth mechanisms
    Dry and wet oxidation
    Deal Grove model
    THERMAL OXIDATION
    • Is a chemical process,
    where Oxide is “grown” by
    supplying an oxygen
    source that reacts with the
    silicon wafer at high
    temperatures (usually
    between 800°C to 1050°C)
    to form SiO2 at the wafer
    surface
    Structure of SiO2
    • A silicon surface has a high affinity for oxygen.
    • Silicon will oxidize in air at room temperature.
    • Once an oxide forms, silicon atoms must travel
    through the oxide layer to react with the
    oxygen present at the surface of the wafer, or
    else oxygen molecules must travel through the
    oxide to reach the silicon surface where a
    reaction can occur.
    • The diffusivity of Si in SiO2 is several orders of
    magnitude smaller than the diffusivity of O2.
    • As a result, the chemical reaction occurs at the
    Si-SiO2 interface.
    • The interface produced by thermal oxidation
    has not seen the atmosphere. As a result , it is
    relatively free of impurities.
    • The amount of Si
    consumed due to
    the chemical
    reaction is about
    44% of the thickness
    of the final oxide.
    • At room temperature, neither the silicon nor the
    oxygen molecules are sufficiently mobile to
    diffuse through the native oxide.
    • After a while, the reaction stops and the oxide
    will not get much thicker than 25Å.
    • For a sustained reaction to occur, the silicon wafer
    must be heated in the presence of an oxidizing
    ambient of O2 or H2O , producing oxide films
    whose thicknesses range from 500Å – 100,000Å
    The Chemical reactions describing thermal
    oxidation of silicon in oxygen or water vapor
    are given by

    – Dry Oxidation
    Si (solid) + O2 (gas) SiO2 (solid)

    – Wet Oxidation
    Si (solid) + 2H2O (gas) SiO2 (solid) + 2H2 (gas)
    • During dry oxidation, the silicon wafer reacts with the
    ambient oxygen, forming a layer of silicon dioxide on its
    surface.

    • In wet oxidation, hydrogen and oxygen gases are


    introduced into a chamber where they react to form
    water molecules.

    • The water molecule is then made to enter the


    reactor where they diffuse toward the wafers.

    • The water molecules react with the silicon to produce


    the oxide and another byproduct, i.e., hydrogen gas
    Furnaces used for diffusion and thermal oxidation
    at LAAS technological facility in Toulouse, France.
    • Silicon wafers are oxidized in furnaces at
    temperatures ranging from 800°C to 1050°C.
    • The furnaces consist of a quartz tube in which
    the wafers are placed on a carrier made of
    quartz glass.
    • The quartz glass has a very high melting point
    (above 1500°C) providing a stable carrier for
    high temperature processes.
    • To prevent cracks and/or warping, the quartz
    tube is heated slowly (e.g. +10°C per minute).
    Individual heating zones provide optimal
    tempering throughout the tube.
    • Oxidation of silicon is necessary throughout the IC
    fabrication process.
    • SiO2 has several uses
    1. To serve as a mask against implant or diffusion of
    dopant into silicon
    2. to provide surface passivation (shell against
    corrosion by the environment)
    3. To isolate one device from another (dielectric
    isolation)
    4. To act as a component in MOS structures
    5. To provide electrical isolation of multi-level
    metallization systems
    Techniques for forming oxide layers
    1. Thermal oxidation
    2. Wet anodization
    3. Chemical vapor deposition(CVD)
    4. Plasma anodization
    When the interface between the oxide and
    the silicon requires a low-charge density
    level, thermal oxidation is preferred.
    Kinetics of Oxide Growth
    Deal-Grove Model
    • Bruce Deal and Andy Grove (of Fairchild
    Semiconductor) developed a simple
    kinetic mechanism/model for oxide growth
    Deal-Grove Mechanism
    • Three-step mechanism:
    – Oxygen diffuses through the gas to the top of
    the wafer
    – Oxygen diffuses through the oxide that has
    formed on the wafer to the Si interface
    – Oxygen reacts with silicon to form SiO2
    • • Limitations of the model
    – 1D model (planar substrates)
    – Not accurate for heavily doped silicon
    – Not accurate for thin oxides, < 20 - 25 nm
    Deal-Grove Model
    Gate oxide and field oxide

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