Ch8 (Main Memory)

Chapter 8: Main Memory
Operating System Concepts – 9th Edition Silberschatz, Galvin and Gagne

Chapter 8: Memory Management
 Background
 Swapping
 Contiguous Memory Allocation
 Segmentation
 Paging
 Structure of the Page Table
Operating System Concepts – 9th Edition 8.2 Silberschatz, Galvin and Gagne
Objectives
 To provide a detailed description of various ways of

organizing memory hardware
 To discuss various memory-management
techniques, including paging and segmentation
 To provide a detailed description of the Intel
Pentium, which supports both pure segmentation
and segmentation with paging
Background
 Program must be brought (from disk) into memory

and placed within a process for it to be run
 Main memory and registers are only storage CPU can
access directly
 Memory unit only sees a stream of addresses + read
requests, or address + data and write requests
 Register access in one CPU clock (or less)
 Main memory can take many cycles, causing a stall
 Cache sits between main memory and CPU registers
 Protection of memory required to ensure correct
operation
Base and Limit Registers
 A pair of base and limit registers define the logical
address space
 CPU must check every memory access generated in
user mode to be sure it is between base and limit for
that user
Hardware Address Protection
Address Binding
 The Association of program instruction and data to the
actual physical memory locations is called the Address
Binding.
 There are precisely three distinct mechanisms for binding
addresses based on the differences in the virtual address
in question.
1. Compile time binding: Symbolic variables in processes that
have their memory location specified before execution and
are translated into absolute addresses at the time of
compilation.
 must recompile code if starting location changes
2. Load time binding: Symbolic variables in processes that do
not have their memory location specified before execution
and are translated into relocatable addresses at the time of
loading.
3. Runtime or execution binding: Binding is uncertain due to
the likelihood that the process might be changed from one
memory slot to another during execution. Hence, address
binding is done at the execution time of the process
 Need hardware support for address maps (e.g., base and
limit registers)
Multistep Processing of a User Program
Logical vs. Physical Address Space
 Logical Address: generated by the CPU while a

program is running. It is referred to as a virtual
address because it does not exist physically.
 Logical address space is the set of all logical addresses
generated by a program
 Physical Address: Physical Address is the actual
address of the data inside the memory. The user
program generates the logical address and is
mapped to the physical address by the Memory
Management Unit(MMU).
 Physical address space is the set of all physical
addresses generated by a program
 Logical and physical addresses are the same in
compile-time and load-time address-binding schemes
but differ in execution-time address-binding scheme
Memory-Management Unit (MMU)
 Hardware device that at run time maps virtual to
physical address
 Many methods possible, covered in the rest of this
chapter
 To start, consider simple scheme where the value
in the relocation register is added to every address
generated by a user process at the time it is sent to
memory
 Base register now called relocation register
 The user program deals with logical addresses; it
never sees the real physical addresses
 Execution-time binding occurs when reference is
made to location in memory
 Logical address bound to physical addresses
Dynamic relocation using a relocation register
Dynamic Loading and linking
 Dynamic Loading
 Routine is not loaded until it is called
 Better memory-space utilization; unused routine is never
loaded
 All routines kept on disk in relocatable load format
 Useful when large amounts of code are needed to handle
infrequently occurring cases
 Dynamic Linking
 Dynamic linking –linking of system libraries and code
postponed until execution time
 Small piece of code, stub, used to locate the appropriate
memory-resident library routine
 Stub replaces itself with the address of the routine, and
executes the routine
 Operating system checks if routine is in processes’
memory address
 If not in address space, add to address space
Swapping
 A process can be swapped temporarily out of
memory to a backing store, and then brought back
into memory for continued execution
 Total physical memory space of processes can exceed
physical memory
 Backing store – fast disk large enough to
accommodate copies of all memory images for all
users; must provide direct access to these memory
images
 Roll out, roll in – swapping variant used for priority-
based scheduling algorithms; lower-priority process is
swapped out so higher-priority process can be loaded
and executed
 Major part of swap time is transfer time; total transfer
time is directly proportional to the amount of memory
swapped
 System maintains a ready queue of ready-to-run
processes which have memory images on disk
Swapping (Cont.)
 Does the swapped out process need to swap back in
to same physical addresses?
 Depends on address binding method
 Modified versions of swapping are found on many
systems (i.e., UNIX, Linux, and Windows)
 Swapping normally disabled
 Started if more than threshold amount of memory
allocated
 Disabled again once memory demand reduced
below threshold
Schematic View of Swapping
Context Switch Time including Swapping
 If next processes to be put on CPU is not in

memory, need to swap out a process and swap in
target process
 Context switch time can then be very high
 100MB process swapping to hard disk with
transfer rate of 50MB/sec
 Swap out time of 2000 ms
 Plus swap in of same sized process
 Total context switch swapping component time
of 4000ms (4 seconds)
 Can reduce if reduce size of memory swapped – by
knowing how much memory really being used
Contiguous Allocation
Contiguous Allocation
 Main memory must support both OS and user processes
 Limited resource, must allocate efficiently
 Contiguous allocation is one early method
 Main memory usually into two partitions:
 Resident operating system, usually held in low
memory with interrupt vector
 User processes then held in high memory as a single
contiguous section
 Relocation registers used to protect OS and user
processes from each other
 Base register contains value of smallest physical
address
 Limit register contains range of logical addresses –
each logical address must be less than the limit
register
 MMU maps logical address dynamically
Hardware Support for Relocation and Limit Registers
Multiple-partition allocation
 Multiple-partition allocation
 Degree of multiprogramming limited by number of partitions
1. Fixed-size partitioning
 Program too big to fit
 Program too small for big partition (Internal fragmentation)
2. Unequal-size partition sizes for efficiency (sized to a given process’ needs)
3. Dynamic partitioning
 Hole (external fragmentation) – block of available memory; holes of various size are
scattered throughout memory
 When a process arrives, it is allocated memory from a hole large enough to
accommodate it
 Process exiting frees its partition, adjacent free partitions combined
 Operating system maintains information about:
a) allocated partitions b) free partitions (hole)
Dynamic Storage-Allocation Problem
How to satisfy a request of size n from a list of free holes?
 First-fit: Allocate the first hole that is big enough
 Best-fit: Allocate the smallest hole that is big

enough; must search entire list, unless ordered by
size
 Produces the smallest leftover hole
 Worst-fit: Allocate the largest hole; must also

search entire list
 Produces the largest leftover hole
First-fit and best-fit better than worst-fit in terms of speed
and storage utilization
Fragmentation
 External Fragmentation – total memory space
exists to satisfy a request, but it is not
contiguous
 Internal Fragmentation – allocated memory may
be slightly larger than requested memory; this
size difference is memory internal to a partition,
but not being used
 First fit analysis reveals that given N blocks
allocated, 0.5 N blocks lost to fragmentation
 1/3 may be unusable -> 50-percent rule
Fragmentation
OS OS OS
400K 400K 400K
P1 P1 P1
1000K 1000K 1000K
P2 P2 P4
terminates allocate P4
1700K
2000K 2000K 2000K
P3 P3 P3
2300K 2300K 2300K
2560K 2560K 2560K
Fragmentation (Cont.)
 Reduce external fragmentation by compaction
 Shuffle memory contents to place all free
memory together in one large block
300K
500K P1 P1 P1 P1
P2 P2 P2 P2
600K
400K P3 P4 900K
1000K P4
P3 P3
1200K
300K 900K 900K
1500K P4 P4
1900K
200K P3
2100K
Original allocation Moved 600K Moved 400K Moved 200K
Non-Contiguous Allocation
1. Segmentation
 Memory-management scheme that supports user view of
memory
 A program is a collection of segments
 A segment is a logical unit such as:
main program
procedure
function
method
object
local variables, global variables
common block
stack
symbol table
arrays
User’s View of a Program
Logical View of Segmentation
4
1
3 2
4
user space physical memory space
Segmentation Architecture
 Logical address consists of a two tuple:
<segment-number, offset>,
 Segment table – maps two-dimensional physical

addresses; each table entry has:
 base – contains the starting physical address
where the segments reside in memory
 limit – specifies the length of the segment
 Segment-table base register (STBR) points to the

segment table’s location in memory
 Segment-table length register (STLR) indicates

number of segments used by a program;
segment number s is legal if s < STLR
Segmentation Architecture (Cont.)
Segmentation Hardware
2. Paging
 In paging, main memory is partitioned into equal
fixed-size chunks that are relatively small, and each
process is also divided into small fixed-size chunks of
the same size.
 Then the chunks of a process, known as pages ,
could be assigned to available chunks of memory,
known as frames , or page frames.
 Using this technique the wasted space in memory for
each process is due to internal fragmentation
consisting of only a fraction of the last page of a
process. There is no external fragmentation.
Assignment of Process to Free Frames
• Figure 7.9 illustrates the use of pages and
frames. At a given point in time, some of the
frames in memory are in use and some are
free. A list of free frames is maintained by the
OS.
• Process A, stored on disk, consists of four
pages. When it is time to load this process,
the OS finds four free frames and loads the
four pages of process A into the four frames
( Figure 7.9b ).
• Process B, consisting of three pages, and
process C, consisting of four pages, are
subsequently loaded. Then process B is
suspended and is swapped out of main
memory. Later, all of the processes in main
memory are blocked, and the OS needs to
bring in a new process, process D, which
consists of five pages.
• Now suppose, as in this example, that there
are not sufficient unused contiguous frames
to hold the process. Does this prevent the
operating system from loading D? The
answer is no, because we can once again
use the concept of logical address.
Page Table
 A simple base address register will no longer

suffice. Rather, the operating system maintains a
page table for each process.
 The page table shows the frame location for each
page of the process.
 Within the program, each logical address consists
of a page number and an offset within the page.
page number page offset
p d
m -n n
Data Structures
• A page table contains one entry for each page of the process,
so that the table is easily indexed by the page number
(starting at page 0 ).
• In addition, the OS maintains a single free-frame list of all the
frames in main memory that are currently
unoccupied/available for pages.
Paging Hardware
In our example, we have the logical address 0000010111011110,
which is page number 1, offset 478. Suppose that this page is
residing in main memory frame 6 binary 000110. Then the physical
address is frame number 6, offset 478 0001100111011110 ( Figure
7.12a ).
Paging Example
n=2 and m=4 32-byte memory and 4-byte pages
Free Frames
Before allocation After allocation
End of Chapter 8
Operating System Concepts – 9th Edition Silberschatz, Galvin and Gagne

Ch8 (Main Memory)

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Chapter 8: Main Memory

Operating System Concepts – 9th Edition Silberschatz, Galvin and Gagne

 To provide a detailed description of various ways of

 Program must be brought (from disk) into memory

 Logical Address: generated by the CPU while a

 If next processes to be put on CPU is not in

 First-fit: Allocate the first hole that is big enough

 Best-fit: Allocate the smallest hole that is big

 Worst-fit: Allocate the largest hole; must also

2560K 2560K 2560K

user space physical memory space

 Segment table – maps two-dimensional physical

 Segment-table base register (STBR) points to the

 Segment-table length register (STLR) indicates

 A simple base address register will no longer

n=2 and m=4 32-byte memory and 4-byte pages

Before allocation After allocation

Operating System Concepts – 9th Edition Silberschatz, Galvin and Gagne

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